crypto: caam - de-CHIP-ify device tree compatibles

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

- all the integration parameters have been captured by the binding.
- the block name really uniquely identifies this hardware.

Some advocate putting SoC names everywhere in case software needs
to work around some chip-specific bug, but more precise SoC
information already exists in SVR, and board information already
exists in the top-level device tree node.

Note that sometimes the SoC name is a worse identifier than the
block version, as the block version can change between revisions
of the same SoC.

As a matter of historical reference, neither SEC versions 2.x
nor 3.x (driven by talitos) ever needed CHIP references.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Kumar Gala <kumar.gala@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
Acked-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

authored by

Kim Phillips and committed by

Herbert Xu 15 years ago 7dfc2179 6d00376a

+37 -59

2 changed files

expand all

Documentation

devicetree

bindings

crypto

fsl-sec4.txt

arch

powerpc

boot

dts

p4080ds.dts

+26 -38

Documentation/devicetree/bindings/crypto/fsl-sec4.txt

··· 38 38 up to 4 JRs can be configured; and all 4 JRs process requests in parallel. 39 39 40 40 ===================================================================== 41 - P4080 SEC 4 Node 41 + SEC 4 Node 42 42 43 43 Description 44 44 ··· 53 53 - compatible 54 54 Usage: required 55 55 Value type: <string> 56 - Definition: Must include "fsl,p4080-sec-v4.0","fsl,sec-v4.0" 56 + Definition: Must include "fsl,sec-v4.0" 57 57 58 58 - #address-cells 59 59 Usage: required ··· 105 105 106 106 EXAMPLE 107 107 crypto@300000 { 108 - compatible = "fsl,p4080-sec-v4.0", "fsl,sec-v4.0"; 108 + compatible = "fsl,sec-v4.0"; 109 109 #address-cells = <1>; 110 110 #size-cells = <1>; 111 111 reg = <0x300000 0x10000>; ··· 115 115 }; 116 116 117 117 ===================================================================== 118 - P4080 Job Ring (JR) Node 118 + Job Ring (JR) Node 119 119 120 120 Child of the crypto node defines data processing interface to SEC 4 121 121 across the peripheral bus for purposes of processing ··· 127 127 - compatible 128 128 Usage: required 129 129 Value type: <string> 130 - Definition: Must include "fsl,p4080-sec-v4.0-job-ring","fsl,sec-v4.0-job-ring" 130 + Definition: Must include "fsl,sec-v4.0-job-ring" 131 131 132 132 - reg 133 133 Usage: required ··· 163 163 164 164 EXAMPLE 165 165 jr@1000 { 166 - compatible = "fsl,p4080-sec-v4.0-job-ring", 167 - "fsl,sec-v4.0-job-ring"; 166 + compatible = "fsl,sec-v4.0-job-ring"; 168 167 reg = <0x1000 0x1000>; 169 168 fsl,liodn = <0x081>; 170 169 interrupt-parent = <&mpic>; ··· 172 173 173 174 174 175 ===================================================================== 175 - P4080 Run Time Integrity Check (RTIC) Node 176 + Run Time Integrity Check (RTIC) Node 176 177 177 178 Child node of the crypto node. Defines a register space that 178 179 contains up to 5 sets of addresses and their lengths (sizes) that ··· 185 186 - compatible 186 187 Usage: required 187 188 Value type: <string> 188 - Definition: Must include "fsl,p4080-sec-v4.0-rtic","fsl,sec-v4.0-rtic". 189 + Definition: Must include "fsl,sec-v4.0-rtic". 189 190 190 191 - #address-cells 191 192 Usage: required ··· 218 219 219 220 EXAMPLE 220 221 rtic@6000 { 221 - compatible = "fsl,p4080-sec-v4.0-rtic", 222 - "fsl,sec-v4.0-rtic"; 222 + compatible = "fsl,sec-v4.0-rtic"; 223 223 #address-cells = <1>; 224 224 #size-cells = <1>; 225 225 reg = <0x6000 0x100>; ··· 226 228 }; 227 229 228 230 ===================================================================== 229 - P4080 Run Time Integrity Check (RTIC) Memory Node 231 + Run Time Integrity Check (RTIC) Memory Node 230 232 A child node that defines individual RTIC memory regions that are used to 231 233 perform run-time integrity check of memory areas that should not modified. 232 234 The node defines a register that contains the memory address & ··· 236 238 - compatible 237 239 Usage: required 238 240 Value type: <string> 239 - Definition: Must include "fsl,p4080-sec-v4.0-rtic-memory","fsl,sec-v4.0-rtic-memory". 241 + Definition: Must include "fsl,sec-v4.0-rtic-memory". 240 242 241 243 - reg 242 244 Usage: required ··· 268 270 269 271 EXAMPLE 270 272 rtic-a@0 { 271 - compatible = "fsl,p4080-sec-v4.0-rtic-memory", 272 - "fsl,sec-v4.0-rtic-memory"; 273 + compatible = "fsl,sec-v4.0-rtic-memory"; 273 274 reg = <0x00 0x20 0x100 0x80>; 274 275 fsl,liodn = <0x03c>; 275 276 fsl,rtic-region = <0x12345678 0x12345678 0x12345678>; 276 277 }; 277 278 278 279 ===================================================================== 279 - P4080 Secure Non-Volatile Storage (SNVS) Node 280 + Secure Non-Volatile Storage (SNVS) Node 280 281 281 282 Node defines address range and the associated 282 283 interrupt for the SNVS function. This function ··· 285 288 - compatible 286 289 Usage: required 287 290 Value type: <string> 288 - Definition: Must include "fsl,p4080-sec-v4.0-mon", "fsl,sec-v4.0-mon". 291 + Definition: Must include "fsl,sec-v4.0-mon". 289 292 290 293 - reg 291 294 Usage: required ··· 312 315 313 316 EXAMPLE 314 317 sec_mon@314000 { 315 - compatible = "fsl,p4080-sec-v4.0-mon", "fsl,sec-v4.0-mon"; 318 + compatible = "fsl,sec-v4.0-mon"; 316 319 reg = <0x314000 0x1000>; 317 320 interrupt-parent = <&mpic>; 318 321 interrupts = <93 2>; ··· 322 325 FULL EXAMPLE 323 326 324 327 crypto: crypto@300000 { 325 - compatible = "fsl,p4080-sec-v4.0", "fsl,sec-v4.0"; 328 + compatible = "fsl,sec-v4.0"; 326 329 #address-cells = <1>; 327 330 #size-cells = <1>; 328 331 reg = <0x300000 0x10000>; ··· 331 334 interrupts = <92 2>; 332 335 333 336 sec_jr0: jr@1000 { 334 - compatible = "fsl,p4080-sec-v4.0-job-ring", 335 - "fsl,sec-v4.0-job-ring"; 337 + compatible = "fsl,sec-v4.0-job-ring"; 336 338 reg = <0x1000 0x1000>; 337 339 interrupt-parent = <&mpic>; 338 340 interrupts = <88 2>; 339 341 }; 340 342 341 343 sec_jr1: jr@2000 { 342 - compatible = "fsl,p4080-sec-v4.0-job-ring", 343 - "fsl,sec-v4.0-job-ring"; 344 + compatible = "fsl,sec-v4.0-job-ring"; 344 345 reg = <0x2000 0x1000>; 345 346 interrupt-parent = <&mpic>; 346 347 interrupts = <89 2>; 347 348 }; 348 349 349 350 sec_jr2: jr@3000 { 350 - compatible = "fsl,p4080-sec-v4.0-job-ring", 351 - "fsl,sec-v4.0-job-ring"; 351 + compatible = "fsl,sec-v4.0-job-ring"; 352 352 reg = <0x3000 0x1000>; 353 353 interrupt-parent = <&mpic>; 354 354 interrupts = <90 2>; 355 355 }; 356 356 357 357 sec_jr3: jr@4000 { 358 - compatible = "fsl,p4080-sec-v4.0-job-ring", 359 - "fsl,sec-v4.0-job-ring"; 358 + compatible = "fsl,sec-v4.0-job-ring"; 360 359 reg = <0x4000 0x1000>; 361 360 interrupt-parent = <&mpic>; 362 361 interrupts = <91 2>; 363 362 }; 364 363 365 364 rtic@6000 { 366 - compatible = "fsl,p4080-sec-v4.0-rtic", 367 - "fsl,sec-v4.0-rtic"; 365 + compatible = "fsl,sec-v4.0-rtic"; 368 366 #address-cells = <1>; 369 367 #size-cells = <1>; 370 368 reg = <0x6000 0x100>; 371 369 ranges = <0x0 0x6100 0xe00>; 372 370 373 371 rtic_a: rtic-a@0 { 374 - compatible = "fsl,p4080-sec-v4.0-rtic-memory", 375 - "fsl,sec-v4.0-rtic-memory"; 372 + compatible = "fsl,sec-v4.0-rtic-memory"; 376 373 reg = <0x00 0x20 0x100 0x80>; 377 374 }; 378 375 379 376 rtic_b: rtic-b@20 { 380 - compatible = "fsl,p4080-sec-v4.0-rtic-memory", 381 - "fsl,sec-v4.0-rtic-memory"; 377 + compatible = "fsl,sec-v4.0-rtic-memory"; 382 378 reg = <0x20 0x20 0x200 0x80>; 383 379 }; 384 380 385 381 rtic_c: rtic-c@40 { 386 - compatible = "fsl,p4080-sec-v4.0-rtic-memory", 387 - "fsl,sec-v4.0-rtic-memory"; 382 + compatible = "fsl,sec-v4.0-rtic-memory"; 388 383 reg = <0x40 0x20 0x300 0x80>; 389 384 }; 390 385 391 386 rtic_d: rtic-d@60 { 392 - compatible = "fsl,p4080-sec-v4.0-rtic-memory", 393 - "fsl,sec-v4.0-rtic-memory"; 387 + compatible = "fsl,sec-v4.0-rtic-memory"; 394 388 reg = <0x60 0x20 0x500 0x80>; 395 389 }; 396 390 }; 397 391 }; 398 392 399 393 sec_mon: sec_mon@314000 { 400 - compatible = "fsl,p4080-sec-v4.0-mon", "fsl,sec-v4.0-mon"; 394 + compatible = "fsl,sec-v4.0-mon"; 401 395 reg = <0x314000 0x1000>; 402 396 interrupt-parent = <&mpic>; 403 397 interrupts = <93 2>;

+11 -21

arch/powerpc/boot/dts/p4080ds.dts

··· 423 423 }; 424 424 425 425 crypto: crypto@300000 { 426 - compatible = "fsl,p4080-sec-v4.0", "fsl,sec-v4.0"; 426 + compatible = "fsl,sec-v4.0"; 427 427 #address-cells = <1>; 428 428 #size-cells = <1>; 429 429 reg = <0x300000 0x10000>; ··· 432 432 interrupts = <92 2>; 433 433 434 434 sec_jr0: jr@1000 { 435 - compatible = "fsl,p4080-sec-v4.0-job-ring", 436 - "fsl,sec-v4.0-job-ring"; 435 + compatible = "fsl,sec-v4.0-job-ring"; 437 436 reg = <0x1000 0x1000>; 438 437 interrupt-parent = <&mpic>; 439 438 interrupts = <88 2>; 440 439 }; 441 440 442 441 sec_jr1: jr@2000 { 443 - compatible = "fsl,p4080-sec-v4.0-job-ring", 444 - "fsl,sec-v4.0-job-ring"; 442 + compatible = "fsl,sec-v4.0-job-ring"; 445 443 reg = <0x2000 0x1000>; 446 444 interrupt-parent = <&mpic>; 447 445 interrupts = <89 2>; 448 446 }; 449 447 450 448 sec_jr2: jr@3000 { 451 - compatible = "fsl,p4080-sec-v4.0-job-ring", 452 - "fsl,sec-v4.0-job-ring"; 449 + compatible = "fsl,sec-v4.0-job-ring"; 453 450 reg = <0x3000 0x1000>; 454 451 interrupt-parent = <&mpic>; 455 452 interrupts = <90 2>; 456 453 }; 457 454 458 455 sec_jr3: jr@4000 { 459 - compatible = "fsl,p4080-sec-v4.0-job-ring", 460 - "fsl,sec-v4.0-job-ring"; 456 + compatible = "fsl,sec-v4.0-job-ring"; 461 457 reg = <0x4000 0x1000>; 462 458 interrupt-parent = <&mpic>; 463 459 interrupts = <91 2>; 464 460 }; 465 461 466 462 rtic@6000 { 467 - compatible = "fsl,p4080-sec-v4.0-rtic", 468 - "fsl,sec-v4.0-rtic"; 463 + compatible = "fsl,sec-v4.0-rtic"; 469 464 #address-cells = <1>; 470 465 #size-cells = <1>; 471 466 reg = <0x6000 0x100>; 472 467 ranges = <0x0 0x6100 0xe00>; 473 468 474 469 rtic_a: rtic-a@0 { 475 - compatible = "fsl,p4080-sec-v4.0-rtic-memory", 476 - "fsl,sec-v4.0-rtic-memory"; 470 + compatible = "fsl,sec-v4.0-rtic-memory"; 477 471 reg = <0x00 0x20 0x100 0x80>; 478 472 }; 479 473 480 474 rtic_b: rtic-b@20 { 481 - compatible = "fsl,p4080-sec-v4.0-rtic-memory", 482 - "fsl,sec-v4.0-rtic-memory"; 475 + compatible = "fsl,sec-v4.0-rtic-memory"; 483 476 reg = <0x20 0x20 0x200 0x80>; 484 477 }; 485 478 486 479 rtic_c: rtic-c@40 { 487 - compatible = "fsl,p4080-sec-v4.0-rtic-memory", 488 - "fsl,sec-v4.0-rtic-memory"; 480 + compatible = "fsl,sec-v4.0-rtic-memory"; 489 481 reg = <0x40 0x20 0x300 0x80>; 490 482 }; 491 483 492 484 rtic_d: rtic-d@60 { 493 - compatible = "fsl,p4080-sec-v4.0-rtic-memory", 494 - "fsl,sec-v4.0-rtic-memory"; 485 + compatible = "fsl,sec-v4.0-rtic-memory"; 495 486 reg = <0x60 0x20 0x500 0x80>; 496 487 }; 497 488 }; 498 489 }; 499 490 500 491 sec_mon: sec_mon@314000 { 501 - compatible = "fsl,p4080-sec-v4.0-mon", 502 - "fsl,sec-v4.0-mon"; 492 + compatible = "fsl,sec-v4.0-mon"; 503 493 reg = <0x314000 0x1000>; 504 494 interrupt-parent = <&mpic>; 505 495 interrupts = <93 2>;