Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge git://www.linux-watchdog.org/linux-watchdog

Pull watchdog updates from Wim Van Sebroeck:
"This contains following changes:

- Octeon: convert to watchdog-API and apply some fixes
- Cadence wdt: remove dependency on ARCH
- add DT bindings for qcom + msm
- bcm281xx: Remove use of seq_printf return value
- stmp3xxx_rtc_wdt + pnx4008_wdt: fix broken email addresses"

* git://www.linux-watchdog.org/linux-watchdog:
watchdog: stmp3xxx_rtc_wdt: fix broken email address
watchdog: pnx4008_wdt: fix broken email address
watchdog: octeon: use fixed length string for register names
watchdog: octeon: fix some trivial coding style issues
watchdog: octeon: convert to WATCHDOG_CORE API
watchdog: cadence: Remove Kconfig dependency on ARCH
ARM: msm: add watchdog entries to DT timer binding doc
ARM: qcom: add description of KPSS WDT for IPQ8064
watchdog: qcom: use timer devicetree binding
watchdog: bcm281xx: Remove use of seq_printf return value

+113 -182
+13 -3
Documentation/devicetree/bindings/arm/msm/timer.txt
··· 9 9 "qcom,scss-timer" - scorpion subsystem 10 10 11 11 - interrupts : Interrupts for the debug timer, the first general purpose 12 - timer, and optionally a second general purpose timer in that 13 - order. 12 + timer, and optionally a second general purpose timer, and 13 + optionally as well, 2 watchdog interrupts, in that order. 14 14 15 15 - reg : Specifies the base address of the timer registers. 16 + 17 + - clocks: Reference to the parent clocks, one per output clock. The parents 18 + must appear in the same order as the clock names. 19 + 20 + - clock-names: The name of the clocks as free-form strings. They should be in 21 + the same order as the clocks. 16 22 17 23 - clock-frequency : The frequency of the debug timer and the general purpose 18 24 timer(s) in Hz in that order. ··· 35 29 compatible = "qcom,scss-timer", "qcom,msm-timer"; 36 30 interrupts = <1 1 0x301>, 37 31 <1 2 0x301>, 38 - <1 3 0x301>; 32 + <1 3 0x301>, 33 + <1 4 0x301>, 34 + <1 5 0x301>; 39 35 reg = <0x0200a000 0x100>; 40 36 clock-frequency = <19200000>, 41 37 <32768>; 38 + clocks = <&sleep_clk>; 39 + clock-names = "sleep"; 42 40 cpu-offset = <0x40000>; 43 41 };
+13 -1
arch/arm/boot/dts/qcom-ipq8064.dtsi
··· 61 61 }; 62 62 }; 63 63 64 + clocks { 65 + sleep_clk: sleep_clk { 66 + compatible = "fixed-clock"; 67 + clock-frequency = <32768>; 68 + #clock-cells = <0>; 69 + }; 70 + }; 71 + 64 72 soc: soc { 65 73 #address-cells = <1>; 66 74 #size-cells = <1>; ··· 113 105 compatible = "qcom,kpss-timer", "qcom,msm-timer"; 114 106 interrupts = <1 1 0x301>, 115 107 <1 2 0x301>, 116 - <1 3 0x301>; 108 + <1 3 0x301>, 109 + <1 4 0x301>, 110 + <1 5 0x301>; 117 111 reg = <0x0200a000 0x100>; 118 112 clock-frequency = <25000000>, 119 113 <32768>; 114 + clocks = <&sleep_clk>; 115 + clock-names = "sleep"; 120 116 cpu-offset = <0x80000>; 121 117 }; 122 118
+1 -1
drivers/watchdog/Kconfig
··· 169 169 170 170 config CADENCE_WATCHDOG 171 171 tristate "Cadence Watchdog Timer" 172 - depends on ARM 173 172 select WATCHDOG_CORE 174 173 help 175 174 Say Y here if you want to include support for the watchdog ··· 1189 1190 tristate "Cavium OCTEON SOC family Watchdog Timer" 1190 1191 depends on CAVIUM_OCTEON_SOC 1191 1192 default y 1193 + select WATCHDOG_CORE 1192 1194 select EXPORT_UASM if OCTEON_WDT = m 1193 1195 help 1194 1196 Hardware driver for OCTEON's on chip watchdog timer.
+16 -11
drivers/watchdog/bcm_kona_wdt.c
··· 99 99 100 100 static int bcm_kona_wdt_dbg_show(struct seq_file *s, void *data) 101 101 { 102 - int ctl_val, cur_val, ret; 102 + int ctl_val, cur_val; 103 103 unsigned long flags; 104 104 struct bcm_kona_wdt *wdt = s->private; 105 105 106 - if (!wdt) 107 - return seq_puts(s, "No device pointer\n"); 106 + if (!wdt) { 107 + seq_puts(s, "No device pointer\n"); 108 + return 0; 109 + } 108 110 109 111 spin_lock_irqsave(&wdt->lock, flags); 110 112 ctl_val = secure_register_read(wdt, SECWDOG_CTRL_REG); ··· 114 112 spin_unlock_irqrestore(&wdt->lock, flags); 115 113 116 114 if (ctl_val < 0 || cur_val < 0) { 117 - ret = seq_puts(s, "Error accessing hardware\n"); 115 + seq_puts(s, "Error accessing hardware\n"); 118 116 } else { 119 117 int ctl, cur, ctl_sec, cur_sec, res; 120 118 ··· 123 121 cur = cur_val & SECWDOG_COUNT_MASK; 124 122 ctl_sec = TICKS_TO_SECS(ctl, wdt); 125 123 cur_sec = TICKS_TO_SECS(cur, wdt); 126 - ret = seq_printf(s, "Resolution: %d / %d\n" 127 - "Control: %d s / %d (%#x) ticks\n" 128 - "Current: %d s / %d (%#x) ticks\n" 129 - "Busy count: %lu\n", res, 130 - wdt->resolution, ctl_sec, ctl, ctl, cur_sec, 131 - cur, cur, wdt->busy_count); 124 + seq_printf(s, 125 + "Resolution: %d / %d\n" 126 + "Control: %d s / %d (%#x) ticks\n" 127 + "Current: %d s / %d (%#x) ticks\n" 128 + "Busy count: %lu\n", 129 + res, wdt->resolution, 130 + ctl_sec, ctl, ctl, 131 + cur_sec, cur, cur, 132 + wdt->busy_count); 132 133 } 133 134 134 - return ret; 135 + return 0; 135 136 } 136 137 137 138 static int bcm_kona_dbg_open(struct inode *inode, struct file *file)
+52 -157
drivers/watchdog/octeon-wdt-main.c
··· 3 3 * 4 4 * Copyright (C) 2007, 2008, 2009, 2010 Cavium Networks 5 5 * 6 + * Converted to use WATCHDOG_CORE by Aaro Koskinen <aaro.koskinen@iki.fi>. 7 + * 6 8 * Some parts derived from wdt.c 7 9 * 8 10 * (c) Copyright 1996-1997 Alan Cox <alan@lxorguk.ukuu.org.uk>, ··· 105 103 "Watchdog cannot be stopped once started (default=" 106 104 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); 107 105 108 - static unsigned long octeon_wdt_is_open; 109 - static char expect_close; 110 - 111 - static u32 __initdata nmi_stage1_insns[64]; 106 + static u32 nmi_stage1_insns[64] __initdata; 112 107 /* We need one branch and therefore one relocation per target label. */ 113 - static struct uasm_label __initdata labels[5]; 114 - static struct uasm_reloc __initdata relocs[5]; 108 + static struct uasm_label labels[5] __initdata; 109 + static struct uasm_reloc relocs[5] __initdata; 115 110 116 111 enum lable_id { 117 112 label_enter_bootloader = 1 ··· 217 218 pr_debug("\t.set pop\n"); 218 219 219 220 if (len > 32) 220 - panic("NMI stage 1 handler exceeds 32 instructions, was %d\n", len); 221 + panic("NMI stage 1 handler exceeds 32 instructions, was %d\n", 222 + len); 221 223 } 222 224 223 225 static int cpu2core(int cpu) ··· 294 294 { 295 295 int d; 296 296 int v; 297 + 297 298 for (d = 0; d < digits; d++) { 298 299 v = (value >> ((digits - d - 1) * 4)) & 0xf; 299 300 if (v >= 10) ··· 304 303 } 305 304 } 306 305 307 - const char *reg_name[] = { 306 + static const char reg_name[][3] = { 308 307 "$0", "at", "v0", "v1", "a0", "a1", "a2", "a3", 309 308 "a4", "a5", "a6", "a7", "t0", "t1", "t2", "t3", 310 309 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", ··· 445 444 return NOTIFY_OK; 446 445 } 447 446 448 - static void octeon_wdt_ping(void) 447 + static int octeon_wdt_ping(struct watchdog_device __always_unused *wdog) 449 448 { 450 449 int cpu; 451 450 int coreid; ··· 458 457 !cpumask_test_cpu(cpu, &irq_enabled_cpus)) { 459 458 /* We have to enable the irq */ 460 459 int irq = OCTEON_IRQ_WDOG0 + coreid; 460 + 461 461 enable_irq(irq); 462 462 cpumask_set_cpu(cpu, &irq_enabled_cpus); 463 463 } 464 464 } 465 + return 0; 465 466 } 466 467 467 468 static void octeon_wdt_calc_parameters(int t) ··· 492 489 timeout_cnt = ((octeon_get_io_clock_rate() >> 8) * timeout_sec) >> 8; 493 490 } 494 491 495 - static int octeon_wdt_set_heartbeat(int t) 492 + static int octeon_wdt_set_timeout(struct watchdog_device *wdog, 493 + unsigned int t) 496 494 { 497 495 int cpu; 498 496 int coreid; ··· 513 509 cvmx_write_csr(CVMX_CIU_WDOGX(coreid), ciu_wdog.u64); 514 510 cvmx_write_csr(CVMX_CIU_PP_POKEX(coreid), 1); 515 511 } 516 - octeon_wdt_ping(); /* Get the irqs back on. */ 512 + octeon_wdt_ping(wdog); /* Get the irqs back on. */ 517 513 return 0; 518 514 } 519 515 520 - /** 521 - * octeon_wdt_write: 522 - * @file: file handle to the watchdog 523 - * @buf: buffer to write (unused as data does not matter here 524 - * @count: count of bytes 525 - * @ppos: pointer to the position to write. No seeks allowed 526 - * 527 - * A write to a watchdog device is defined as a keepalive signal. Any 528 - * write of data will do, as we we don't define content meaning. 529 - */ 530 - 531 - static ssize_t octeon_wdt_write(struct file *file, const char __user *buf, 532 - size_t count, loff_t *ppos) 516 + static int octeon_wdt_start(struct watchdog_device *wdog) 533 517 { 534 - if (count) { 535 - if (!nowayout) { 536 - size_t i; 537 - 538 - /* In case it was set long ago */ 539 - expect_close = 0; 540 - 541 - for (i = 0; i != count; i++) { 542 - char c; 543 - if (get_user(c, buf + i)) 544 - return -EFAULT; 545 - if (c == 'V') 546 - expect_close = 1; 547 - } 548 - } 549 - octeon_wdt_ping(); 550 - } 551 - return count; 552 - } 553 - 554 - /** 555 - * octeon_wdt_ioctl: 556 - * @file: file handle to the device 557 - * @cmd: watchdog command 558 - * @arg: argument pointer 559 - * 560 - * The watchdog API defines a common set of functions for all 561 - * watchdogs according to their available features. We only 562 - * actually usefully support querying capabilities and setting 563 - * the timeout. 564 - */ 565 - 566 - static long octeon_wdt_ioctl(struct file *file, unsigned int cmd, 567 - unsigned long arg) 568 - { 569 - void __user *argp = (void __user *)arg; 570 - int __user *p = argp; 571 - int new_heartbeat; 572 - 573 - static struct watchdog_info ident = { 574 - .options = WDIOF_SETTIMEOUT| 575 - WDIOF_MAGICCLOSE| 576 - WDIOF_KEEPALIVEPING, 577 - .firmware_version = 1, 578 - .identity = "OCTEON", 579 - }; 580 - 581 - switch (cmd) { 582 - case WDIOC_GETSUPPORT: 583 - return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0; 584 - case WDIOC_GETSTATUS: 585 - case WDIOC_GETBOOTSTATUS: 586 - return put_user(0, p); 587 - case WDIOC_KEEPALIVE: 588 - octeon_wdt_ping(); 589 - return 0; 590 - case WDIOC_SETTIMEOUT: 591 - if (get_user(new_heartbeat, p)) 592 - return -EFAULT; 593 - if (octeon_wdt_set_heartbeat(new_heartbeat)) 594 - return -EINVAL; 595 - /* Fall through. */ 596 - case WDIOC_GETTIMEOUT: 597 - return put_user(heartbeat, p); 598 - default: 599 - return -ENOTTY; 600 - } 601 - } 602 - 603 - /** 604 - * octeon_wdt_open: 605 - * @inode: inode of device 606 - * @file: file handle to device 607 - * 608 - * The watchdog device has been opened. The watchdog device is single 609 - * open and on opening we do a ping to reset the counters. 610 - */ 611 - 612 - static int octeon_wdt_open(struct inode *inode, struct file *file) 613 - { 614 - if (test_and_set_bit(0, &octeon_wdt_is_open)) 615 - return -EBUSY; 616 - /* 617 - * Activate 618 - */ 619 - octeon_wdt_ping(); 518 + octeon_wdt_ping(wdog); 620 519 do_coundown = 1; 621 - return nonseekable_open(inode, file); 622 - } 623 - 624 - /** 625 - * octeon_wdt_release: 626 - * @inode: inode to board 627 - * @file: file handle to board 628 - * 629 - * The watchdog has a configurable API. There is a religious dispute 630 - * between people who want their watchdog to be able to shut down and 631 - * those who want to be sure if the watchdog manager dies the machine 632 - * reboots. In the former case we disable the counters, in the latter 633 - * case you have to open it again very soon. 634 - */ 635 - 636 - static int octeon_wdt_release(struct inode *inode, struct file *file) 637 - { 638 - if (expect_close) { 639 - do_coundown = 0; 640 - octeon_wdt_ping(); 641 - } else { 642 - pr_crit("WDT device closed unexpectedly. WDT will not stop!\n"); 643 - } 644 - clear_bit(0, &octeon_wdt_is_open); 645 - expect_close = 0; 646 520 return 0; 647 521 } 648 522 649 - static const struct file_operations octeon_wdt_fops = { 650 - .owner = THIS_MODULE, 651 - .llseek = no_llseek, 652 - .write = octeon_wdt_write, 653 - .unlocked_ioctl = octeon_wdt_ioctl, 654 - .open = octeon_wdt_open, 655 - .release = octeon_wdt_release, 656 - }; 657 - 658 - static struct miscdevice octeon_wdt_miscdev = { 659 - .minor = WATCHDOG_MINOR, 660 - .name = "watchdog", 661 - .fops = &octeon_wdt_fops, 662 - }; 523 + static int octeon_wdt_stop(struct watchdog_device *wdog) 524 + { 525 + do_coundown = 0; 526 + octeon_wdt_ping(wdog); 527 + return 0; 528 + } 663 529 664 530 static struct notifier_block octeon_wdt_cpu_notifier = { 665 531 .notifier_call = octeon_wdt_cpu_callback, 666 532 }; 667 533 534 + static const struct watchdog_info octeon_wdt_info = { 535 + .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING, 536 + .identity = "OCTEON", 537 + }; 538 + 539 + static const struct watchdog_ops octeon_wdt_ops = { 540 + .owner = THIS_MODULE, 541 + .start = octeon_wdt_start, 542 + .stop = octeon_wdt_stop, 543 + .ping = octeon_wdt_ping, 544 + .set_timeout = octeon_wdt_set_timeout, 545 + }; 546 + 547 + static struct watchdog_device octeon_wdt = { 548 + .info = &octeon_wdt_info, 549 + .ops = &octeon_wdt_ops, 550 + }; 668 551 669 552 /** 670 553 * Module/ driver initialization. ··· 576 685 max_timeout_sec = 6; 577 686 do { 578 687 max_timeout_sec--; 579 - timeout_cnt = ((octeon_get_io_clock_rate() >> 8) * max_timeout_sec) >> 8; 688 + timeout_cnt = ((octeon_get_io_clock_rate() >> 8) * 689 + max_timeout_sec) >> 8; 580 690 } while (timeout_cnt > 65535); 581 691 582 692 BUG_ON(timeout_cnt == 0); ··· 586 694 587 695 pr_info("Initial granularity %d Sec\n", timeout_sec); 588 696 589 - ret = misc_register(&octeon_wdt_miscdev); 697 + octeon_wdt.timeout = timeout_sec; 698 + octeon_wdt.max_timeout = UINT_MAX; 699 + 700 + watchdog_set_nowayout(&octeon_wdt, nowayout); 701 + 702 + ret = watchdog_register_device(&octeon_wdt); 590 703 if (ret) { 591 - pr_err("cannot register miscdev on minor=%d (err=%d)\n", 592 - WATCHDOG_MINOR, ret); 593 - goto out; 704 + pr_err("watchdog_register_device() failed: %d\n", ret); 705 + return ret; 594 706 } 595 707 596 708 /* Build the NMI handler ... */ ··· 617 721 __register_hotcpu_notifier(&octeon_wdt_cpu_notifier); 618 722 cpu_notifier_register_done(); 619 723 620 - out: 621 - return ret; 724 + return 0; 622 725 } 623 726 624 727 /** ··· 627 732 { 628 733 int cpu; 629 734 630 - misc_deregister(&octeon_wdt_miscdev); 735 + watchdog_unregister_device(&octeon_wdt); 631 736 632 737 cpu_notifier_register_begin(); 633 738 __unregister_hotcpu_notifier(&octeon_wdt_cpu_notifier);
+1 -1
drivers/watchdog/pnx4008_wdt.c
··· 216 216 module_platform_driver(platform_wdt_driver); 217 217 218 218 MODULE_AUTHOR("MontaVista Software, Inc. <source@mvista.com>"); 219 - MODULE_AUTHOR("Wolfram Sang <w.sang@pengutronix.de>"); 219 + MODULE_AUTHOR("Wolfram Sang <kernel@pengutronix.de>"); 220 220 MODULE_DESCRIPTION("PNX4008 Watchdog Driver"); 221 221 222 222 module_param(heartbeat, uint, 0);
+15 -6
drivers/watchdog/qcom-wdt.c
··· 20 20 #include <linux/reboot.h> 21 21 #include <linux/watchdog.h> 22 22 23 - #define WDT_RST 0x0 24 - #define WDT_EN 0x8 25 - #define WDT_BITE_TIME 0x24 23 + #define WDT_RST 0x38 24 + #define WDT_EN 0x40 25 + #define WDT_BITE_TIME 0x5C 26 26 27 27 struct qcom_wdt { 28 28 struct watchdog_device wdd; ··· 117 117 { 118 118 struct qcom_wdt *wdt; 119 119 struct resource *res; 120 + struct device_node *np = pdev->dev.of_node; 121 + u32 percpu_offset; 120 122 int ret; 121 123 122 124 wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL); ··· 126 124 return -ENOMEM; 127 125 128 126 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 127 + 128 + /* We use CPU0's DGT for the watchdog */ 129 + if (of_property_read_u32(np, "cpu-offset", &percpu_offset)) 130 + percpu_offset = 0; 131 + 132 + res->start += percpu_offset; 133 + res->end += percpu_offset; 134 + 129 135 wdt->base = devm_ioremap_resource(&pdev->dev, res); 130 136 if (IS_ERR(wdt->base)) 131 137 return PTR_ERR(wdt->base); ··· 213 203 } 214 204 215 205 static const struct of_device_id qcom_wdt_of_table[] = { 216 - { .compatible = "qcom,kpss-wdt-msm8960", }, 217 - { .compatible = "qcom,kpss-wdt-apq8064", }, 218 - { .compatible = "qcom,kpss-wdt-ipq8064", }, 206 + { .compatible = "qcom,kpss-timer" }, 207 + { .compatible = "qcom,scss-timer" }, 219 208 { }, 220 209 }; 221 210 MODULE_DEVICE_TABLE(of, qcom_wdt_of_table);
+2 -2
drivers/watchdog/stmp3xxx_rtc_wdt.c
··· 1 1 /* 2 2 * Watchdog driver for the RTC based watchdog in STMP3xxx and i.MX23/28 3 3 * 4 - * Author: Wolfram Sang <w.sang@pengutronix.de> 4 + * Author: Wolfram Sang <kernel@pengutronix.de> 5 5 * 6 6 * Copyright (C) 2011-12 Wolfram Sang, Pengutronix 7 7 * ··· 129 129 130 130 MODULE_DESCRIPTION("STMP3XXX RTC Watchdog Driver"); 131 131 MODULE_LICENSE("GPL v2"); 132 - MODULE_AUTHOR("Wolfram Sang <w.sang@pengutronix.de>"); 132 + MODULE_AUTHOR("Wolfram Sang <kernel@pengutronix.de>");