tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
LoongArch: Add hibernation (ACPI S4) support
Add hibernation (Suspend to Disk, aka ACPI S4) support for LoongArch.
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
+154
+3
arch/loongarch/Kconfig
+3
arch/loongarch/Kconfig
+12
arch/loongarch/kernel/asm-offsets.c
+12
arch/loongarch/kernel/asm-offsets.c
···
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BLANK();
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}
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#endif
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+
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#ifdef CONFIG_HIBERNATION
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void output_pbe_defines(void)
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{
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COMMENT(" Linux struct pbe offsets. ");
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OFFSET(PBE_ADDRESS, pbe, address);
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OFFSET(PBE_ORIG_ADDRESS, pbe, orig_address);
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OFFSET(PBE_NEXT, pbe, next);
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DEFINE(PBE_SIZE, sizeof(struct pbe));
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BLANK();
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}
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#endif
+5
arch/loongarch/kernel/reset.c
+5
arch/loongarch/kernel/reset.c
···
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#include <acpi/reboot.h>
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#include <asm/idle.h>
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#include <asm/loongarch.h>
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#include <asm/loongson.h>
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void (*pm_power_off)(void);
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EXPORT_SYMBOL(pm_power_off);
···
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#ifdef CONFIG_SMP
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preempt_disable();
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smp_send_stop();
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+
#endif
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#ifdef CONFIG_PM
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if (!acpi_disabled)
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enable_pci_wakeup();
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#endif
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do_kernel_power_off();
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#ifdef CONFIG_EFI
+5
arch/loongarch/kernel/setup.c
+5
arch/loongarch/kernel/setup.c
···
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#include <linux/libfdt.h>
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#include <linux/of_fdt.h>
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#include <linux/of_address.h>
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+
#include <linux/suspend.h>
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#include <linux/swiotlb.h>
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#include <asm/addrspace.h>
···
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swiotlb_init(true, SWIOTLB_VERBOSE);
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dma_contiguous_reserve(PFN_PHYS(max_low_pfn));
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+
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/* Reserve for hibernation. */
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register_nosave_region(PFN_DOWN(__pa_symbol(&__nosave_begin)),
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PFN_UP(__pa_symbol(&__nosave_end)));
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memblock_dump_all();
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+1
arch/loongarch/power/Makefile
+1
arch/loongarch/power/Makefile
+62
arch/loongarch/power/hibernate.c
+62
arch/loongarch/power/hibernate.c
···
1
+
// SPDX-License-Identifier: GPL-2.0
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#include <asm/fpu.h>
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#include <asm/loongson.h>
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#include <asm/sections.h>
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#include <asm/tlbflush.h>
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#include <linux/suspend.h>
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+
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static u32 saved_crmd;
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static u32 saved_prmd;
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static u32 saved_euen;
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static u32 saved_ecfg;
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static u64 saved_pcpu_base;
13
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struct pt_regs saved_regs;
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+
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void save_processor_state(void)
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{
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saved_crmd = csr_read32(LOONGARCH_CSR_CRMD);
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saved_prmd = csr_read32(LOONGARCH_CSR_PRMD);
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saved_euen = csr_read32(LOONGARCH_CSR_EUEN);
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saved_ecfg = csr_read32(LOONGARCH_CSR_ECFG);
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saved_pcpu_base = csr_read64(PERCPU_BASE_KS);
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+
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if (is_fpu_owner())
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save_fp(current);
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}
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void restore_processor_state(void)
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{
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csr_write32(saved_crmd, LOONGARCH_CSR_CRMD);
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csr_write32(saved_prmd, LOONGARCH_CSR_PRMD);
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csr_write32(saved_euen, LOONGARCH_CSR_EUEN);
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csr_write32(saved_ecfg, LOONGARCH_CSR_ECFG);
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csr_write64(saved_pcpu_base, PERCPU_BASE_KS);
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+
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if (is_fpu_owner())
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restore_fp(current);
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}
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+
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int pfn_is_nosave(unsigned long pfn)
40
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{
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unsigned long nosave_begin_pfn = PFN_DOWN(__pa(&__nosave_begin));
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unsigned long nosave_end_pfn = PFN_UP(__pa(&__nosave_end));
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+
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return (pfn >= nosave_begin_pfn) && (pfn < nosave_end_pfn);
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}
46
+
47
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extern int swsusp_asm_suspend(void);
48
+
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int swsusp_arch_suspend(void)
50
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{
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enable_pci_wakeup();
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return swsusp_asm_suspend();
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}
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+
55
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extern int swsusp_asm_resume(void);
56
+
57
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int swsusp_arch_resume(void)
58
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{
59
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/* Avoid TLB mismatch during and after kernel resume */
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local_flush_tlb_all();
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return swsusp_asm_resume();
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}
+66
arch/loongarch/power/hibernate_asm.S
+66
arch/loongarch/power/hibernate_asm.S
···
1
+
/* SPDX-License-Identifier: GPL-2.0 */
2
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/*
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* Hibernation support specific for LoongArch
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*
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* Author: Huacai Chen <chenhuacai@loongson.cn>
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* Copyright (C) 2020-2022 Loongson Technology Corporation Limited
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*/
8
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#include <linux/linkage.h>
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#include <asm/asm.h>
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#include <asm/asm-offsets.h>
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#include <asm/regdef.h>
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+
13
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.text
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SYM_FUNC_START(swsusp_asm_suspend)
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la.pcrel t0, saved_regs
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PTR_S ra, t0, PT_R1
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PTR_S tp, t0, PT_R2
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PTR_S sp, t0, PT_R3
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PTR_S u0, t0, PT_R21
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PTR_S fp, t0, PT_R22
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PTR_S s0, t0, PT_R23
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PTR_S s1, t0, PT_R24
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PTR_S s2, t0, PT_R25
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PTR_S s3, t0, PT_R26
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PTR_S s4, t0, PT_R27
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PTR_S s5, t0, PT_R28
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PTR_S s6, t0, PT_R29
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PTR_S s7, t0, PT_R30
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PTR_S s8, t0, PT_R31
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b swsusp_save
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SYM_FUNC_END(swsusp_asm_suspend)
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+
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SYM_FUNC_START(swsusp_asm_resume)
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la.pcrel t0, restore_pblist
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PTR_L t0, t0, 0
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0:
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PTR_L t1, t0, PBE_ADDRESS /* source */
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PTR_L t2, t0, PBE_ORIG_ADDRESS /* destination */
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PTR_LI t3, _PAGE_SIZE
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PTR_ADD t3, t3, t1
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+
1:
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REG_L t8, t1, 0
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REG_S t8, t2, 0
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PTR_ADDI t1, t1, SZREG
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PTR_ADDI t2, t2, SZREG
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bne t1, t3, 1b
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PTR_L t0, t0, PBE_NEXT
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bnez t0, 0b
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la.pcrel t0, saved_regs
50
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PTR_L ra, t0, PT_R1
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PTR_L tp, t0, PT_R2
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PTR_L sp, t0, PT_R3
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PTR_L u0, t0, PT_R21
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PTR_L fp, t0, PT_R22
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PTR_L s0, t0, PT_R23
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PTR_L s1, t0, PT_R24
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PTR_L s2, t0, PT_R25
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PTR_L s3, t0, PT_R26
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PTR_L s4, t0, PT_R27
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PTR_L s5, t0, PT_R28
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PTR_L s6, t0, PT_R29
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PTR_L s7, t0, PT_R30
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+
PTR_L s8, t0, PT_R31
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PTR_LI a0, 0x0
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jirl zero, ra, 0
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SYM_FUNC_END(swsusp_asm_resume)