Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

EDAC: Replace HTTP links with HTTPS ones

Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.

Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.

[ bp: Merge all EDAC patches into a single one. ]

Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Tero Kristo <t-kristo@ti.com> # ti_edac
Link: https://lkml.kernel.org/r/20200708113546.14135-1-grandmaster@al2klimov.de

authored by

Alexander A. Klimov and committed by
Borislav Petkov
7d4c1ea2 9123e3a7

+13 -13
+1 -1
drivers/edac/e752x_edac.c
··· 7 7 * Implement support for the e7520, E7525, e7320 and i3100 memory controllers. 8 8 * 9 9 * Datasheets: 10 - * http://www.intel.in/content/www/in/en/chipsets/e7525-memory-controller-hub-datasheet.html 10 + * https://www.intel.in/content/www/in/en/chipsets/e7525-memory-controller-hub-datasheet.html 11 11 * ftp://download.intel.com/design/intarch/datashts/31345803.pdf 12 12 * 13 13 * Written by Tom Zimmerman
+1 -1
drivers/edac/ghes_edac.c
··· 4 4 * 5 5 * Copyright (c) 2013 by Mauro Carvalho Chehab 6 6 * 7 - * Red Hat Inc. http://www.redhat.com 7 + * Red Hat Inc. https://www.redhat.com 8 8 */ 9 9 10 10 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+2 -2
drivers/edac/i5400_edac.c
··· 8 8 * Ben Woodard <woodard@redhat.com> 9 9 * Mauro Carvalho Chehab 10 10 * 11 - * Red Hat Inc. http://www.redhat.com 11 + * Red Hat Inc. https://www.redhat.com 12 12 * 13 13 * Forked and adapted from the i5000_edac driver which was 14 14 * written by Douglas Thompson Linux Networx <norsk5@xmission.com> ··· 1460 1460 MODULE_LICENSE("GPL"); 1461 1461 MODULE_AUTHOR("Ben Woodard <woodard@redhat.com>"); 1462 1462 MODULE_AUTHOR("Mauro Carvalho Chehab"); 1463 - MODULE_AUTHOR("Red Hat Inc. (http://www.redhat.com)"); 1463 + MODULE_AUTHOR("Red Hat Inc. (https://www.redhat.com)"); 1464 1464 MODULE_DESCRIPTION("MC Driver for Intel I5400 memory controllers - " 1465 1465 I5400_REVISION); 1466 1466
+2 -2
drivers/edac/i7300_edac.c
··· 5 5 * Copyright (c) 2010 by: 6 6 * Mauro Carvalho Chehab 7 7 * 8 - * Red Hat Inc. http://www.redhat.com 8 + * Red Hat Inc. https://www.redhat.com 9 9 * 10 10 * Intel 7300 Chipset Memory Controller Hub (MCH) - Datasheet 11 11 * http://www.intel.com/Assets/PDF/datasheet/318082.pdf ··· 1206 1206 1207 1207 MODULE_LICENSE("GPL"); 1208 1208 MODULE_AUTHOR("Mauro Carvalho Chehab"); 1209 - MODULE_AUTHOR("Red Hat Inc. (http://www.redhat.com)"); 1209 + MODULE_AUTHOR("Red Hat Inc. (https://www.redhat.com)"); 1210 1210 MODULE_DESCRIPTION("MC Driver for Intel I7300 memory controllers - " 1211 1211 I7300_REVISION); 1212 1212
+2 -2
drivers/edac/i7core_edac.c
··· 9 9 * Copyright (c) 2009-2010 by: 10 10 * Mauro Carvalho Chehab 11 11 * 12 - * Red Hat Inc. http://www.redhat.com 12 + * Red Hat Inc. https://www.redhat.com 13 13 * 14 14 * Forked and adapted from the i5400_edac driver 15 15 * ··· 2391 2391 2392 2392 MODULE_LICENSE("GPL"); 2393 2393 MODULE_AUTHOR("Mauro Carvalho Chehab"); 2394 - MODULE_AUTHOR("Red Hat Inc. (http://www.redhat.com)"); 2394 + MODULE_AUTHOR("Red Hat Inc. (https://www.redhat.com)"); 2395 2395 MODULE_DESCRIPTION("MC Driver for Intel i7 Core memory controllers - " 2396 2396 I7CORE_REVISION); 2397 2397
+3 -3
drivers/edac/ie31200_edac.c
··· 9 9 * Since the DRAM controller is on the cpu chip, we can use its PCI device 10 10 * id to identify these processors. 11 11 * 12 - * PCI DRAM controller device ids (Taken from The PCI ID Repository - http://pci-ids.ucw.cz/) 12 + * PCI DRAM controller device ids (Taken from The PCI ID Repository - https://pci-ids.ucw.cz/) 13 13 * 14 14 * 0108: Xeon E3-1200 Processor Family DRAM Controller 15 15 * 010c: Xeon E3-1200/2nd Generation Core Processor Family DRAM Controller ··· 23 23 * 3e..: 8th/9th Gen Core Processor Host Bridge/DRAM Registers 24 24 * 25 25 * Based on Intel specification: 26 - * http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/xeon-e3-1200v3-vol-2-datasheet.pdf 26 + * https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/xeon-e3-1200v3-vol-2-datasheet.pdf 27 27 * http://www.intel.com/content/www/us/en/processors/xeon/xeon-e3-1200-family-vol-2-datasheet.html 28 - * http://www.intel.com/content/www/us/en/processors/core/7th-gen-core-family-mobile-h-processor-lines-datasheet-vol-2.html 28 + * https://www.intel.com/content/www/us/en/processors/core/7th-gen-core-family-mobile-h-processor-lines-datasheet-vol-2.html 29 29 * https://www.intel.com/content/www/us/en/products/docs/processors/core/8th-gen-core-family-datasheet-vol-2.html 30 30 * 31 31 * According to the above datasheet (p.16):
+1 -1
drivers/edac/sb_edac.c
··· 3552 3552 3553 3553 MODULE_LICENSE("GPL"); 3554 3554 MODULE_AUTHOR("Mauro Carvalho Chehab"); 3555 - MODULE_AUTHOR("Red Hat Inc. (http://www.redhat.com)"); 3555 + MODULE_AUTHOR("Red Hat Inc. (https://www.redhat.com)"); 3556 3556 MODULE_DESCRIPTION("MC Driver for Intel Sandy Bridge and Ivy Bridge memory controllers - " 3557 3557 SBRIDGE_REVISION);
+1 -1
drivers/edac/ti_edac.c
··· 1 1 // SPDX-License-Identifier: GPL-2.0 2 2 /* 3 - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ 3 + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ 4 4 * 5 5 * Texas Instruments DDR3 ECC error correction and detection driver 6 6 *