Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

MIPS: dts: ralink: Add Mediatek MT7628A SoC

The MT7628A is the successor to the MT7620 and pin compatible with the
MT7688A, although the latter supports only a 1T1R antenna rather than
a 2T2R antenna.

This commit adds support for the following features:

- UART
- USB PHY
- EHCI
- Interrupt controller
- System controller
- Memory controller
- Reset controller

Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com>
Cc: robh+dt@kernel.org
Cc: mark.rutland@arm.com
Cc: john@phrozen.org
Cc: Harvey Hunt <harvey.hunt@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-mediatek@lists.infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/17133/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

authored by

Harvey Hunt and committed by
Ralf Baechle
7d4ad2e7 cc10815e

+127
+1
Documentation/devicetree/bindings/mips/ralink.txt
··· 15 15 ralink,rt5350-soc 16 16 ralink,mt7620a-soc 17 17 ralink,mt7620n-soc 18 + ralink,mt7628a-soc
+126
arch/mips/boot/dts/ralink/mt7628a.dtsi
··· 1 + / { 2 + #address-cells = <1>; 3 + #size-cells = <1>; 4 + compatible = "ralink,mt7628a-soc"; 5 + 6 + cpus { 7 + #address-cells = <1>; 8 + #size-cells = <0>; 9 + 10 + cpu@0 { 11 + compatible = "mti,mips24KEc"; 12 + device_type = "cpu"; 13 + reg = <0>; 14 + }; 15 + }; 16 + 17 + resetc: reset-controller { 18 + compatible = "ralink,rt2880-reset"; 19 + #reset-cells = <1>; 20 + }; 21 + 22 + cpuintc: interrupt-controller { 23 + #address-cells = <0>; 24 + #interrupt-cells = <1>; 25 + interrupt-controller; 26 + compatible = "mti,cpu-interrupt-controller"; 27 + }; 28 + 29 + palmbus@10000000 { 30 + compatible = "palmbus"; 31 + reg = <0x10000000 0x200000>; 32 + ranges = <0x0 0x10000000 0x1FFFFF>; 33 + 34 + #address-cells = <1>; 35 + #size-cells = <1>; 36 + 37 + sysc: system-controller@0 { 38 + compatible = "ralink,mt7620a-sysc", "syscon"; 39 + reg = <0x0 0x100>; 40 + }; 41 + 42 + intc: interrupt-controller@200 { 43 + compatible = "ralink,rt2880-intc"; 44 + reg = <0x200 0x100>; 45 + 46 + interrupt-controller; 47 + #interrupt-cells = <1>; 48 + 49 + resets = <&resetc 9>; 50 + reset-names = "intc"; 51 + 52 + interrupt-parent = <&cpuintc>; 53 + interrupts = <2>; 54 + 55 + ralink,intc-registers = <0x9c 0xa0 56 + 0x6c 0xa4 57 + 0x80 0x78>; 58 + }; 59 + 60 + memory-controller@300 { 61 + compatible = "ralink,mt7620a-memc"; 62 + reg = <0x300 0x100>; 63 + }; 64 + 65 + uart0: uartlite@c00 { 66 + compatible = "ns16550a"; 67 + reg = <0xc00 0x100>; 68 + 69 + resets = <&resetc 12>; 70 + reset-names = "uart0"; 71 + 72 + interrupt-parent = <&intc>; 73 + interrupts = <20>; 74 + 75 + reg-shift = <2>; 76 + }; 77 + 78 + uart1: uart1@d00 { 79 + compatible = "ns16550a"; 80 + reg = <0xd00 0x100>; 81 + 82 + resets = <&resetc 19>; 83 + reset-names = "uart1"; 84 + 85 + interrupt-parent = <&intc>; 86 + interrupts = <21>; 87 + 88 + reg-shift = <2>; 89 + }; 90 + 91 + uart2: uart2@e00 { 92 + compatible = "ns16550a"; 93 + reg = <0xe00 0x100>; 94 + 95 + resets = <&resetc 20>; 96 + reset-names = "uart2"; 97 + 98 + interrupt-parent = <&intc>; 99 + interrupts = <22>; 100 + 101 + reg-shift = <2>; 102 + }; 103 + }; 104 + 105 + usb_phy: usb-phy@10120000 { 106 + compatible = "mediatek,mt7628-usbphy"; 107 + reg = <0x10120000 0x1000>; 108 + 109 + #phy-cells = <0>; 110 + 111 + ralink,sysctl = <&sysc>; 112 + resets = <&resetc 22 &resetc 25>; 113 + reset-names = "host", "device"; 114 + }; 115 + 116 + ehci@101c0000 { 117 + compatible = "generic-ehci"; 118 + reg = <0x101c0000 0x1000>; 119 + 120 + phys = <&usb_phy>; 121 + phy-names = "usb"; 122 + 123 + interrupt-parent = <&intc>; 124 + interrupts = <18>; 125 + }; 126 + };