Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

alpha: kill off alpha_do_IRQ

Good riddance... Nuke a pile of redundant handlers that the
generic code takes care of as well.

Tested-by: Michael Cree <mcree@orcon.net.nz>
Signed-off-by: Kyle McMartin <kyle@redhat.com>
Signed-off-by: Matt Turner <mattst88@gmail.com>

authored by

Kyle McMartin and committed by
Matt Turner
7d209c81 a891b393

+94 -460
-3
arch/alpha/include/asm/irq.h
··· 88 88 struct pt_regs; 89 89 extern void (*perf_irq)(unsigned long, struct pt_regs *); 90 90 91 - struct irq_desc; 92 - extern void alpha_do_IRQ(unsigned int irq, struct irq_desc *desc); 93 - 94 91 #endif /* _ALPHA_IRQ_H */
+1 -5
arch/alpha/kernel/irq.c
··· 162 162 163 163 irq_enter(); 164 164 /* 165 - * __do_IRQ() must be called with IPL_MAX. Note that we do not 165 + * handle_irq() must be called with IPL_MAX. Note that we do not 166 166 * explicitly enable interrupts afterwards - some MILO PALcode 167 167 * (namely LX164 one) seems to have severe problems with RTI 168 168 * at IPL 0. ··· 172 172 irq_exit(); 173 173 } 174 174 175 - void alpha_do_IRQ(unsigned int irq, struct irq_desc *desc) 176 - { 177 - __do_IRQ(irq); 178 - }
+2 -14
arch/alpha/kernel/irq_alpha.c
··· 219 219 * processed by PALcode, and comes in via entInt vector 1. 220 220 */ 221 221 222 - static void rtc_enable_disable(unsigned int irq) { } 223 - static unsigned int rtc_startup(unsigned int irq) { return 0; } 224 - 225 222 struct irqaction timer_irqaction = { 226 223 .handler = timer_interrupt, 227 224 .flags = IRQF_DISABLED, 228 225 .name = "timer", 229 - }; 230 - 231 - static struct irq_chip rtc_irq_type = { 232 - .name = "RTC", 233 - .startup = rtc_startup, 234 - .shutdown = rtc_enable_disable, 235 - .enable = rtc_enable_disable, 236 - .disable = rtc_enable_disable, 237 - .ack = rtc_enable_disable, 238 - .end = rtc_enable_disable, 239 226 }; 240 227 241 228 void __init ··· 232 245 233 246 if (desc) { 234 247 desc->status |= IRQ_DISABLED; 235 - set_irq_chip(RTC_IRQ, &rtc_irq_type); 248 + set_irq_chip_and_handler_name(RTC_IRQ, &no_irq_chip, 249 + handle_simple_irq, "RTC"); 236 250 setup_irq(RTC_IRQ, &timer_irqaction); 237 251 } 238 252 }
+4 -22
arch/alpha/kernel/irq_i8259.c
··· 69 69 spin_unlock(&i8259_irq_lock); 70 70 } 71 71 72 - unsigned int 73 - i8259a_startup_irq(unsigned int irq) 74 - { 75 - i8259a_enable_irq(irq); 76 - return 0; /* never anything pending */ 77 - } 78 - 79 - void 80 - i8259a_end_irq(unsigned int irq) 81 - { 82 - struct irq_desc *desc = irq_to_desc(irq); 83 - if (desc || !(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS))) 84 - i8259a_enable_irq(irq); 85 - } 86 - 87 72 struct irq_chip i8259a_irq_type = { 88 73 .name = "XT-PIC", 89 - .startup = i8259a_startup_irq, 90 - .shutdown = i8259a_disable_irq, 91 - .enable = i8259a_enable_irq, 92 - .disable = i8259a_disable_irq, 93 - .ack = i8259a_mask_and_ack_irq, 94 - .end = i8259a_end_irq, 74 + .unmask = i8259a_enable_irq, 75 + .mask = i8259a_disable_irq, 76 + .mask_ack = i8259a_mask_and_ack_irq, 95 77 }; 96 78 97 79 void __init ··· 90 108 outb(0xff, 0xA1); /* mask all of 8259A-2 */ 91 109 92 110 for (i = 0; i < 16; i++) { 93 - set_irq_chip_and_handler(i, &i8259a_irq_type, alpha_do_IRQ); 111 + set_irq_chip_and_handler(i, &i8259a_irq_type, handle_level_irq); 94 112 } 95 113 96 114 setup_irq(2, &cascade);
+4 -22
arch/alpha/kernel/irq_pyxis.c
··· 40 40 pyxis_update_irq_hw(cached_irq_mask &= ~(1UL << (irq - 16))); 41 41 } 42 42 43 - static unsigned int 44 - pyxis_startup_irq(unsigned int irq) 45 - { 46 - pyxis_enable_irq(irq); 47 - return 0; 48 - } 49 - 50 - static void 51 - pyxis_end_irq(unsigned int irq) 52 - { 53 - struct irq_desc *desc = irq_to_desc(irq); 54 - if (desc || !(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS))) 55 - pyxis_enable_irq(irq); 56 - } 57 - 58 43 static void 59 44 pyxis_mask_and_ack_irq(unsigned int irq) 60 45 { ··· 58 73 59 74 static struct irq_chip pyxis_irq_type = { 60 75 .name = "PYXIS", 61 - .startup = pyxis_startup_irq, 62 - .shutdown = pyxis_disable_irq, 63 - .enable = pyxis_enable_irq, 64 - .disable = pyxis_disable_irq, 65 - .ack = pyxis_mask_and_ack_irq, 66 - .end = pyxis_end_irq, 76 + .mask_ack = pyxis_mask_and_ack_irq, 77 + .mask = pyxis_disable_irq, 78 + .unmask = pyxis_enable_irq, 67 79 }; 68 80 69 81 void ··· 102 120 for (i = 16; i < 48; ++i) { 103 121 if ((ignore_mask >> i) & 1) 104 122 continue; 105 - set_irq_chip_and_handler(i, &pyxis_irq_type, alpha_do_IRQ); 123 + set_irq_chip_and_handler(i, &pyxis_irq_type, handle_level_irq); 106 124 irq_to_desc(i)->status |= IRQ_LEVEL; 107 125 } 108 126
+4 -21
arch/alpha/kernel/irq_srm.c
··· 33 33 spin_unlock(&srm_irq_lock); 34 34 } 35 35 36 - static unsigned int 37 - srm_startup_irq(unsigned int irq) 38 - { 39 - srm_enable_irq(irq); 40 - return 0; 41 - } 42 - 43 - static void 44 - srm_end_irq(unsigned int irq) 45 - { 46 - if (!(irq_to_desc(irq)->status & (IRQ_DISABLED|IRQ_INPROGRESS))) 47 - srm_enable_irq(irq); 48 - } 49 - 50 36 /* Handle interrupts from the SRM, assuming no additional weirdness. */ 51 37 static struct irq_chip srm_irq_type = { 52 38 .name = "SRM", 53 - .startup = srm_startup_irq, 54 - .shutdown = srm_disable_irq, 55 - .enable = srm_enable_irq, 56 - .disable = srm_disable_irq, 57 - .ack = srm_disable_irq, 58 - .end = srm_end_irq, 39 + .unmask = srm_enable_irq, 40 + .mask = srm_disable_irq, 41 + .mask_ack = srm_disable_irq, 59 42 }; 60 43 61 44 void __init ··· 51 68 for (i = 16; i < max; ++i) { 52 69 if (i < 64 && ((ignore_mask >> i) & 1)) 53 70 continue; 54 - set_irq_chip_and_handler(i, &srm_irq_type, alpha_do_IRQ); 71 + set_irq_chip_and_handler(i, &srm_irq_type, handle_level_irq); 55 72 irq_to_desc(i)->status |= IRQ_LEVEL; 56 73 } 57 74 }
+4 -21
arch/alpha/kernel/sys_alcor.c
··· 65 65 *(vuip)GRU_INT_CLEAR = 0; mb(); 66 66 } 67 67 68 - static unsigned int 69 - alcor_startup_irq(unsigned int irq) 70 - { 71 - alcor_enable_irq(irq); 72 - return 0; 73 - } 74 - 75 68 static void 76 69 alcor_isa_mask_and_ack_irq(unsigned int irq) 77 70 { ··· 75 82 *(vuip)GRU_INT_CLEAR = 0; mb(); 76 83 } 77 84 78 - static void 79 - alcor_end_irq(unsigned int irq) 80 - { 81 - if (!(irq_to_desc(irq)->status & (IRQ_DISABLED|IRQ_INPROGRESS))) 82 - alcor_enable_irq(irq); 83 - } 84 - 85 85 static struct irq_chip alcor_irq_type = { 86 86 .name = "ALCOR", 87 - .startup = alcor_startup_irq, 88 - .shutdown = alcor_disable_irq, 89 - .enable = alcor_enable_irq, 90 - .disable = alcor_disable_irq, 91 - .ack = alcor_mask_and_ack_irq, 92 - .end = alcor_end_irq, 87 + .unmask = alcor_enable_irq, 88 + .mask = alcor_disable_irq, 89 + .mask_ack = alcor_mask_and_ack_irq, 93 90 }; 94 91 95 92 static void ··· 125 142 on while IRQ probing. */ 126 143 if (i >= 16+20 && i <= 16+30) 127 144 continue; 128 - set_irq_chip_and_handler(i, &alcor_irq_type, alpha_do_IRQ); 145 + set_irq_chip_and_handler(i, &alcor_irq_type, handle_level_irq); 129 146 irq_to_desc(i)->status |= IRQ_LEVEL; 130 147 } 131 148 i8259a_irq_type.ack = alcor_isa_mask_and_ack_irq;
+4 -21
arch/alpha/kernel/sys_cabriolet.c
··· 57 57 cabriolet_update_irq_hw(irq, cached_irq_mask |= 1UL << irq); 58 58 } 59 59 60 - static unsigned int 61 - cabriolet_startup_irq(unsigned int irq) 62 - { 63 - cabriolet_enable_irq(irq); 64 - return 0; /* never anything pending */ 65 - } 66 - 67 - static void 68 - cabriolet_end_irq(unsigned int irq) 69 - { 70 - if (!(irq_to_desc(irq)->status & (IRQ_DISABLED|IRQ_INPROGRESS))) 71 - cabriolet_enable_irq(irq); 72 - } 73 - 74 60 static struct irq_chip cabriolet_irq_type = { 75 61 .name = "CABRIOLET", 76 - .startup = cabriolet_startup_irq, 77 - .shutdown = cabriolet_disable_irq, 78 - .enable = cabriolet_enable_irq, 79 - .disable = cabriolet_disable_irq, 80 - .ack = cabriolet_disable_irq, 81 - .end = cabriolet_end_irq, 62 + .unmask = cabriolet_enable_irq, 63 + .mask = cabriolet_disable_irq, 64 + .mask_ack = cabriolet_disable_irq, 82 65 }; 83 66 84 67 static void ··· 106 123 107 124 for (i = 16; i < 35; ++i) { 108 125 set_irq_chip_and_handler(i, &cabriolet_irq_type, 109 - alpha_do_IRQ); 126 + handle_level_irq); 110 127 irq_to_desc(i)->status |= IRQ_LEVEL; 111 128 } 112 129 }
+7 -41
arch/alpha/kernel/sys_dp264.c
··· 115 115 spin_unlock(&dp264_irq_lock); 116 116 } 117 117 118 - static unsigned int 119 - dp264_startup_irq(unsigned int irq) 120 - { 121 - dp264_enable_irq(irq); 122 - return 0; /* never anything pending */ 123 - } 124 - 125 - static void 126 - dp264_end_irq(unsigned int irq) 127 - { 128 - if (!(irq_to_desc(irq)->status & (IRQ_DISABLED|IRQ_INPROGRESS))) 129 - dp264_enable_irq(irq); 130 - } 131 - 132 118 static void 133 119 clipper_enable_irq(unsigned int irq) 134 120 { ··· 131 145 cached_irq_mask &= ~(1UL << (irq - 16)); 132 146 tsunami_update_irq_hw(cached_irq_mask); 133 147 spin_unlock(&dp264_irq_lock); 134 - } 135 - 136 - static unsigned int 137 - clipper_startup_irq(unsigned int irq) 138 - { 139 - clipper_enable_irq(irq); 140 - return 0; /* never anything pending */ 141 - } 142 - 143 - static void 144 - clipper_end_irq(unsigned int irq) 145 - { 146 - if (!(irq_to_desc(irq)->status & (IRQ_DISABLED|IRQ_INPROGRESS))) 147 - clipper_enable_irq(irq); 148 148 } 149 149 150 150 static void ··· 172 200 173 201 static struct irq_chip dp264_irq_type = { 174 202 .name = "DP264", 175 - .startup = dp264_startup_irq, 176 - .shutdown = dp264_disable_irq, 177 - .enable = dp264_enable_irq, 178 - .disable = dp264_disable_irq, 179 - .ack = dp264_disable_irq, 180 - .end = dp264_end_irq, 203 + .unmask = dp264_enable_irq, 204 + .mask = dp264_disable_irq, 205 + .mask_ack = dp264_disable_irq, 181 206 .set_affinity = dp264_set_affinity, 182 207 }; 183 208 184 209 static struct irq_chip clipper_irq_type = { 185 210 .name = "CLIPPER", 186 - .startup = clipper_startup_irq, 187 - .shutdown = clipper_disable_irq, 188 - .enable = clipper_enable_irq, 189 - .disable = clipper_disable_irq, 190 - .ack = clipper_disable_irq, 191 - .end = clipper_end_irq, 211 + .unmask = clipper_enable_irq, 212 + .mask = clipper_disable_irq, 213 + .mask_ack = clipper_disable_irq, 192 214 .set_affinity = clipper_set_affinity, 193 215 }; 194 216 ··· 269 303 long i; 270 304 for (i = imin; i <= imax; ++i) { 271 305 irq_to_desc(i)->status |= IRQ_LEVEL; 272 - set_irq_chip_and_handler(i, ops, alpha_do_IRQ); 306 + set_irq_chip_and_handler(i, ops, handle_level_irq); 273 307 } 274 308 } 275 309
+4 -21
arch/alpha/kernel/sys_eb64p.c
··· 55 55 eb64p_update_irq_hw(irq, cached_irq_mask |= 1 << irq); 56 56 } 57 57 58 - static unsigned int 59 - eb64p_startup_irq(unsigned int irq) 60 - { 61 - eb64p_enable_irq(irq); 62 - return 0; /* never anything pending */ 63 - } 64 - 65 - static void 66 - eb64p_end_irq(unsigned int irq) 67 - { 68 - if (!(irq_to_desc(irq)->status & (IRQ_DISABLED|IRQ_INPROGRESS))) 69 - eb64p_enable_irq(irq); 70 - } 71 - 72 58 static struct irq_chip eb64p_irq_type = { 73 59 .name = "EB64P", 74 - .startup = eb64p_startup_irq, 75 - .shutdown = eb64p_disable_irq, 76 - .enable = eb64p_enable_irq, 77 - .disable = eb64p_disable_irq, 78 - .ack = eb64p_disable_irq, 79 - .end = eb64p_end_irq, 60 + .unmask = eb64p_enable_irq, 61 + .mask = eb64p_disable_irq, 62 + .mask_ack = eb64p_disable_irq, 80 63 }; 81 64 82 65 static void ··· 119 136 120 137 for (i = 16; i < 32; ++i) { 121 138 irq_to_desc(i)->status |= IRQ_LEVEL; 122 - set_irq_chip_and_handler(i, &eb64p_irq_type, alpha_do_IRQ); 139 + set_irq_chip_and_handler(i, &eb64p_irq_type, handle_level_irq); 123 140 } 124 141 125 142 common_init_isa_dma();
+4 -21
arch/alpha/kernel/sys_eiger.c
··· 66 66 eiger_update_irq_hw(irq, mask); 67 67 } 68 68 69 - static unsigned int 70 - eiger_startup_irq(unsigned int irq) 71 - { 72 - eiger_enable_irq(irq); 73 - return 0; /* never anything pending */ 74 - } 75 - 76 - static void 77 - eiger_end_irq(unsigned int irq) 78 - { 79 - if (!(irq_to_desc(irq)->status & (IRQ_DISABLED|IRQ_INPROGRESS))) 80 - eiger_enable_irq(irq); 81 - } 82 - 83 69 static struct irq_chip eiger_irq_type = { 84 70 .name = "EIGER", 85 - .startup = eiger_startup_irq, 86 - .shutdown = eiger_disable_irq, 87 - .enable = eiger_enable_irq, 88 - .disable = eiger_disable_irq, 89 - .ack = eiger_disable_irq, 90 - .end = eiger_end_irq, 71 + .unmask = eiger_enable_irq, 72 + .mask = eiger_disable_irq, 73 + .mask_ack = eiger_disable_irq, 91 74 }; 92 75 93 76 static void ··· 137 154 138 155 for (i = 16; i < 128; ++i) { 139 156 irq_to_desc(i)->status |= IRQ_LEVEL; 140 - set_irq_chip_and_handler(i, &eiger_irq_type, alpha_do_IRQ); 157 + set_irq_chip_and_handler(i, &eiger_irq_type, handle_level_irq); 141 158 } 142 159 } 143 160
+9 -38
arch/alpha/kernel/sys_jensen.c
··· 62 62 * world. 63 63 */ 64 64 65 - static unsigned int 66 - jensen_local_startup(unsigned int irq) 67 - { 68 - /* the parport is really hw IRQ 1, silly Jensen. */ 69 - if (irq == 7) 70 - i8259a_startup_irq(1); 71 - 72 - return 0; 73 - } 74 - 75 - static void 76 - jensen_local_shutdown(unsigned int irq) 77 - { 78 - /* the parport is really hw IRQ 1, silly Jensen. */ 79 - if (irq == 7) 80 - i8259a_disable_irq(1); 81 - } 82 - 83 65 static void 84 66 jensen_local_enable(unsigned int irq) 85 67 { ··· 79 97 } 80 98 81 99 static void 82 - jensen_local_ack(unsigned int irq) 100 + jensen_local_mask_ack(unsigned int irq) 83 101 { 84 102 /* the parport is really hw IRQ 1, silly Jensen. */ 85 103 if (irq == 7) 86 104 i8259a_mask_and_ack_irq(1); 87 105 } 88 106 89 - static void 90 - jensen_local_end(unsigned int irq) 91 - { 92 - /* the parport is really hw IRQ 1, silly Jensen. */ 93 - if (irq == 7) 94 - i8259a_end_irq(1); 95 - } 96 - 97 107 static struct irq_chip jensen_local_irq_type = { 98 108 .name = "LOCAL", 99 - .startup = jensen_local_startup, 100 - .shutdown = jensen_local_shutdown, 101 - .enable = jensen_local_enable, 102 - .disable = jensen_local_disable, 103 - .ack = jensen_local_ack, 104 - .end = jensen_local_end, 109 + .unmask = jensen_local_enable, 110 + .mask = jensen_local_disable, 111 + .mask_ack = jensen_local_mask_ack, 105 112 }; 106 113 107 114 static void ··· 171 200 { 172 201 init_i8259a_irqs(); 173 202 174 - set_irq_chip_and_handler(1, &jensen_local_irq_type, alpha_do_IRQ); 175 - set_irq_chip_and_handler(4, &jensen_local_irq_type, alpha_do_IRQ); 176 - set_irq_chip_and_handler(3, &jensen_local_irq_type, alpha_do_IRQ); 177 - set_irq_chip_and_handler(7, &jensen_local_irq_type, alpha_do_IRQ); 178 - set_irq_chip_and_handler(9, &jensen_local_irq_type, alpha_do_IRQ); 203 + set_irq_chip_and_handler(1, &jensen_local_irq_type, handle_level_irq); 204 + set_irq_chip_and_handler(4, &jensen_local_irq_type, handle_level_irq); 205 + set_irq_chip_and_handler(3, &jensen_local_irq_type, handle_level_irq); 206 + set_irq_chip_and_handler(7, &jensen_local_irq_type, handle_level_irq); 207 + set_irq_chip_and_handler(9, &jensen_local_irq_type, handle_level_irq); 179 208 180 209 common_init_isa_dma(); 181 210 }
+10 -34
arch/alpha/kernel/sys_marvel.c
··· 143 143 spin_unlock(&io7->irq_lock); 144 144 } 145 145 146 - static unsigned int 147 - io7_startup_irq(unsigned int irq) 148 - { 149 - io7_enable_irq(irq); 150 - return 0; /* never anything pending */ 151 - } 152 - 153 - static void 154 - io7_end_irq(unsigned int irq) 155 - { 156 - if (!(irq_to_desc(irq)->status & (IRQ_DISABLED|IRQ_INPROGRESS))) 157 - io7_enable_irq(irq); 158 - } 159 - 160 146 static void 161 147 marvel_irq_noop(unsigned int irq) 162 148 { ··· 157 171 158 172 static struct irq_chip marvel_legacy_irq_type = { 159 173 .name = "LEGACY", 160 - .startup = marvel_irq_noop_return, 161 - .shutdown = marvel_irq_noop, 162 - .enable = marvel_irq_noop, 163 - .disable = marvel_irq_noop, 164 - .ack = marvel_irq_noop, 165 - .end = marvel_irq_noop, 174 + .mask = marvel_irq_noop, 175 + .unmask = marvel_irq_noop, 166 176 }; 167 177 168 178 static struct irq_chip io7_lsi_irq_type = { 169 179 .name = "LSI", 170 - .startup = io7_startup_irq, 171 - .shutdown = io7_disable_irq, 172 - .enable = io7_enable_irq, 173 - .disable = io7_disable_irq, 174 - .ack = io7_disable_irq, 175 - .end = io7_end_irq, 180 + .unmask = io7_enable_irq, 181 + .mask = io7_disable_irq, 182 + .mask_ack = io7_disable_irq, 176 183 }; 177 184 178 185 static struct irq_chip io7_msi_irq_type = { 179 186 .name = "MSI", 180 - .startup = io7_startup_irq, 181 - .shutdown = io7_disable_irq, 182 - .enable = io7_enable_irq, 183 - .disable = io7_disable_irq, 187 + .unmask = io7_enable_irq, 188 + .mask = io7_disable_irq, 184 189 .ack = marvel_irq_noop, 185 - .end = io7_end_irq, 186 190 }; 187 191 188 192 static void ··· 281 305 /* Set up the lsi irqs. */ 282 306 for (i = 0; i < 128; ++i) { 283 307 irq_to_desc(base + i)->status |= IRQ_LEVEL; 284 - set_irq_chip_and_handler(base + i, lsi_ops, alpha_do_IRQ); 308 + set_irq_chip_and_handler(base + i, lsi_ops, handle_level_irq); 285 309 } 286 310 287 311 /* Disable the implemented irqs in hardware. */ ··· 295 319 /* Set up the msi irqs. */ 296 320 for (i = 128; i < (128 + 512); ++i) { 297 321 irq_to_desc(base + i)->status |= IRQ_LEVEL; 298 - set_irq_chip_and_handler(base + i, msi_ops, alpha_do_IRQ); 322 + set_irq_chip_and_handler(base + i, msi_ops, handle_level_irq); 299 323 } 300 324 301 325 for (i = 0; i < 16; ++i) ··· 313 337 /* Reserve the legacy irqs. */ 314 338 for (i = 0; i < 16; ++i) { 315 339 set_irq_chip_and_handler(i, &marvel_legacy_irq_type, 316 - alpha_do_IRQ); 340 + handle_level_irq); 317 341 } 318 342 319 343 /* Init the io7 irqs. */
+4 -21
arch/alpha/kernel/sys_mikasa.c
··· 54 54 mikasa_update_irq_hw(cached_irq_mask &= ~(1 << (irq - 16))); 55 55 } 56 56 57 - static unsigned int 58 - mikasa_startup_irq(unsigned int irq) 59 - { 60 - mikasa_enable_irq(irq); 61 - return 0; 62 - } 63 - 64 - static void 65 - mikasa_end_irq(unsigned int irq) 66 - { 67 - if (!(irq_to_desc(irq)->status & (IRQ_DISABLED|IRQ_INPROGRESS))) 68 - mikasa_enable_irq(irq); 69 - } 70 - 71 57 static struct irq_chip mikasa_irq_type = { 72 58 .name = "MIKASA", 73 - .startup = mikasa_startup_irq, 74 - .shutdown = mikasa_disable_irq, 75 - .enable = mikasa_enable_irq, 76 - .disable = mikasa_disable_irq, 77 - .ack = mikasa_disable_irq, 78 - .end = mikasa_end_irq, 59 + .unmask = mikasa_enable_irq, 60 + .mask = mikasa_disable_irq, 61 + .mask_ack = mikasa_disable_irq, 79 62 }; 80 63 81 64 static void ··· 99 116 100 117 for (i = 16; i < 32; ++i) { 101 118 irq_to_desc(i)->status |= IRQ_LEVEL; 102 - set_irq_chip_and_handler(i, &mikasa_irq_type, alpha_do_IRQ); 119 + set_irq_chip_and_handler(i, &mikasa_irq_type, handle_level_irq); 103 120 } 104 121 105 122 init_i8259a_irqs();
+4 -21
arch/alpha/kernel/sys_noritake.c
··· 59 59 noritake_update_irq_hw(irq, cached_irq_mask &= ~(1 << (irq - 16))); 60 60 } 61 61 62 - static unsigned int 63 - noritake_startup_irq(unsigned int irq) 64 - { 65 - noritake_enable_irq(irq); 66 - return 0; 67 - } 68 - 69 - static void 70 - noritake_end_irq(unsigned int irq) 71 - { 72 - if (!(irq_to_desc(irq)->status & (IRQ_DISABLED|IRQ_INPROGRESS))) 73 - noritake_enable_irq(irq); 74 - } 75 - 76 62 static struct irq_chip noritake_irq_type = { 77 63 .name = "NORITAKE", 78 - .startup = noritake_startup_irq, 79 - .shutdown = noritake_disable_irq, 80 - .enable = noritake_enable_irq, 81 - .disable = noritake_disable_irq, 82 - .ack = noritake_disable_irq, 83 - .end = noritake_end_irq, 64 + .unmask = noritake_enable_irq, 65 + .mask = noritake_disable_irq, 66 + .mask_ack = noritake_disable_irq, 84 67 }; 85 68 86 69 static void ··· 128 145 129 146 for (i = 16; i < 48; ++i) { 130 147 irq_to_desc(i)->status |= IRQ_LEVEL; 131 - set_irq_chip_and_handler(i, &noritake_irq_type, alpha_do_IRQ); 148 + set_irq_chip_and_handler(i, &noritake_irq_type, handle_level_irq); 132 149 } 133 150 134 151 init_i8259a_irqs();
+4 -21
arch/alpha/kernel/sys_rawhide.c
··· 121 121 spin_unlock(&rawhide_irq_lock); 122 122 } 123 123 124 - static unsigned int 125 - rawhide_startup_irq(unsigned int irq) 126 - { 127 - rawhide_enable_irq(irq); 128 - return 0; 129 - } 130 - 131 - static void 132 - rawhide_end_irq(unsigned int irq) 133 - { 134 - if (!(irq_to_desc(irq)->status & (IRQ_DISABLED|IRQ_INPROGRESS))) 135 - rawhide_enable_irq(irq); 136 - } 137 - 138 124 static struct irq_chip rawhide_irq_type = { 139 125 .name = "RAWHIDE", 140 - .startup = rawhide_startup_irq, 141 - .shutdown = rawhide_disable_irq, 142 - .enable = rawhide_enable_irq, 143 - .disable = rawhide_disable_irq, 144 - .ack = rawhide_mask_and_ack_irq, 145 - .end = rawhide_end_irq, 126 + .unmask = rawhide_enable_irq, 127 + .mask = rawhide_disable_irq, 128 + .mask_ack = rawhide_mask_and_ack_irq, 146 129 }; 147 130 148 131 static void ··· 178 195 179 196 for (i = 16; i < 128; ++i) { 180 197 irq_to_desc(i)->status |= IRQ_LEVEL; 181 - set_irq_chip_and_handler(i, &rawhide_irq_type, alpha_do_IRQ); 198 + set_irq_chip_and_handler(i, &rawhide_irq_type, handle_level_irq); 182 199 } 183 200 184 201 init_i8259a_irqs();
+4 -21
arch/alpha/kernel/sys_rx164.c
··· 58 58 rx164_update_irq_hw(cached_irq_mask &= ~(1UL << (irq - 16))); 59 59 } 60 60 61 - static unsigned int 62 - rx164_startup_irq(unsigned int irq) 63 - { 64 - rx164_enable_irq(irq); 65 - return 0; 66 - } 67 - 68 - static void 69 - rx164_end_irq(unsigned int irq) 70 - { 71 - if (!(irq_to_desc(irq)->status & (IRQ_DISABLED|IRQ_INPROGRESS))) 72 - rx164_enable_irq(irq); 73 - } 74 - 75 61 static struct irq_chip rx164_irq_type = { 76 62 .name = "RX164", 77 - .startup = rx164_startup_irq, 78 - .shutdown = rx164_disable_irq, 79 - .enable = rx164_enable_irq, 80 - .disable = rx164_disable_irq, 81 - .ack = rx164_disable_irq, 82 - .end = rx164_end_irq, 63 + .unmask = rx164_enable_irq, 64 + .mask = rx164_disable_irq, 65 + .mask_ack = rx164_disable_irq, 83 66 }; 84 67 85 68 static void ··· 100 117 rx164_update_irq_hw(0); 101 118 for (i = 16; i < 40; ++i) { 102 119 irq_to_desc(i)->status |= IRQ_LEVEL; 103 - set_irq_chip_and_handler(i, &rx164_irq_type, alpha_do_IRQ); 120 + set_irq_chip_and_handler(i, &rx164_irq_type, handle_level_irq); 104 121 } 105 122 106 123 init_i8259a_irqs();
+4 -21
arch/alpha/kernel/sys_sable.c
··· 474 474 #endif 475 475 } 476 476 477 - static unsigned int 478 - sable_lynx_startup_irq(unsigned int irq) 479 - { 480 - sable_lynx_enable_irq(irq); 481 - return 0; 482 - } 483 - 484 - static void 485 - sable_lynx_end_irq(unsigned int irq) 486 - { 487 - if (!(irq_to_desc(irq)->status & (IRQ_DISABLED|IRQ_INPROGRESS))) 488 - sable_lynx_enable_irq(irq); 489 - } 490 - 491 477 static void 492 478 sable_lynx_mask_and_ack_irq(unsigned int irq) 493 479 { ··· 489 503 490 504 static struct irq_chip sable_lynx_irq_type = { 491 505 .name = "SABLE/LYNX", 492 - .startup = sable_lynx_startup_irq, 493 - .shutdown = sable_lynx_disable_irq, 494 - .enable = sable_lynx_enable_irq, 495 - .disable = sable_lynx_disable_irq, 496 - .ack = sable_lynx_mask_and_ack_irq, 497 - .end = sable_lynx_end_irq, 506 + .unmask = sable_lynx_enable_irq, 507 + .mask = sable_lynx_disable_irq, 508 + .mask_ack = sable_lynx_mask_and_ack_irq, 498 509 }; 499 510 500 511 static void ··· 520 537 for (i = 0; i < nr_of_irqs; ++i) { 521 538 irq_to_desc(i)->status |= IRQ_LEVEL; 522 539 set_irq_chip_and_handler(i, &sable_lynx_irq_type, 523 - alpha_do_IRQ); 540 + handle_level_irq); 524 541 } 525 542 526 543 common_init_isa_dma();
+4 -21
arch/alpha/kernel/sys_takara.c
··· 60 60 takara_update_irq_hw(irq, mask); 61 61 } 62 62 63 - static unsigned int 64 - takara_startup_irq(unsigned int irq) 65 - { 66 - takara_enable_irq(irq); 67 - return 0; /* never anything pending */ 68 - } 69 - 70 - static void 71 - takara_end_irq(unsigned int irq) 72 - { 73 - if (!(irq_to_desc(irq)->status & (IRQ_DISABLED|IRQ_INPROGRESS))) 74 - takara_enable_irq(irq); 75 - } 76 - 77 63 static struct irq_chip takara_irq_type = { 78 64 .name = "TAKARA", 79 - .startup = takara_startup_irq, 80 - .shutdown = takara_disable_irq, 81 - .enable = takara_enable_irq, 82 - .disable = takara_disable_irq, 83 - .ack = takara_disable_irq, 84 - .end = takara_end_irq, 65 + .unmask = takara_enable_irq, 66 + .mask = takara_disable_irq, 67 + .mask_ack = takara_disable_irq, 85 68 }; 86 69 87 70 static void ··· 137 154 138 155 for (i = 16; i < 128; ++i) { 139 156 irq_to_desc(i)->status |= IRQ_LEVEL; 140 - set_irq_chip_and_handler(i, &takara_irq_type, alpha_do_IRQ); 157 + set_irq_chip_and_handler(i, &takara_irq_type, handle_level_irq); 141 158 } 142 159 143 160 common_init_isa_dma();
+6 -23
arch/alpha/kernel/sys_titan.c
··· 129 129 spin_unlock(&titan_irq_lock); 130 130 } 131 131 132 - static unsigned int 133 - titan_startup_irq(unsigned int irq) 134 - { 135 - titan_enable_irq(irq); 136 - return 0; /* never anything pending */ 137 - } 138 - 139 - static void 140 - titan_end_irq(unsigned int irq) 141 - { 142 - if (!(irq_to_desc(irq)->status & (IRQ_DISABLED|IRQ_INPROGRESS))) 143 - titan_enable_irq(irq); 144 - } 145 - 146 132 static void 147 133 titan_cpu_set_irq_affinity(unsigned int irq, cpumask_t affinity) 148 134 { ··· 176 190 long i; 177 191 for (i = imin; i <= imax; ++i) { 178 192 irq_to_desc(i)->status |= IRQ_LEVEL; 179 - set_irq_chip_and_handler(i, ops, alpha_do_IRQ); 193 + set_irq_chip_and_handler(i, ops, handle_level_irq); 180 194 } 181 195 } 182 196 183 197 static struct irq_chip titan_irq_type = { 184 - .name = "TITAN", 185 - .startup = titan_startup_irq, 186 - .shutdown = titan_disable_irq, 187 - .enable = titan_enable_irq, 188 - .disable = titan_disable_irq, 189 - .ack = titan_disable_irq, 190 - .end = titan_end_irq, 191 - .set_affinity = titan_set_irq_affinity, 198 + .name = "TITAN", 199 + .unmask = titan_enable_irq, 200 + .mask = titan_disable_irq, 201 + .mask_ack = titan_disable_irq, 202 + .set_affinity = titan_set_irq_affinity, 192 203 }; 193 204 194 205 static irqreturn_t
+7 -27
arch/alpha/kernel/sys_wildfire.c
··· 139 139 spin_unlock(&wildfire_irq_lock); 140 140 } 141 141 142 - static unsigned int 143 - wildfire_startup_irq(unsigned int irq) 144 - { 145 - wildfire_enable_irq(irq); 146 - return 0; /* never anything pending */ 147 - } 148 - 149 - static void 150 - wildfire_end_irq(unsigned int irq) 151 - { 152 - #if 0 153 - if (!irq_has_action(irq)) 154 - printk("got irq %d\n", irq); 155 - #endif 156 - if (!(irq_to_desc(irq)->status & (IRQ_DISABLED|IRQ_INPROGRESS))) 157 - wildfire_enable_irq(irq); 158 - } 159 - 160 142 static struct irq_chip wildfire_irq_type = { 161 143 .name = "WILDFIRE", 162 - .startup = wildfire_startup_irq, 163 - .shutdown = wildfire_disable_irq, 164 - .enable = wildfire_enable_irq, 165 - .disable = wildfire_disable_irq, 166 - .ack = wildfire_mask_and_ack_irq, 167 - .end = wildfire_end_irq, 144 + .unmask = wildfire_enable_irq, 145 + .mask = wildfire_disable_irq, 146 + .mask_ack = wildfire_mask_and_ack_irq, 168 147 }; 169 148 170 149 static void __init ··· 179 200 continue; 180 201 irq_to_desc(i+irq_bias)->status |= IRQ_LEVEL; 181 202 set_irq_chip_and_handler(i+irq_bias, &wildfire_irq_type, 182 - alpha_do_IRQ); 203 + handle_level_irq); 183 204 } 184 205 185 206 irq_to_desc(36+irq_bias)->status |= IRQ_LEVEL; 186 - set_irq_chip_and_handler(36+irq_bias, &wildfire_irq_type, alpha_do_IRQ); 207 + set_irq_chip_and_handler(36+irq_bias, &wildfire_irq_type, 208 + handle_level_irq); 187 209 for (i = 40; i < 64; ++i) { 188 210 irq_to_desc(i+irq_bias)->status |= IRQ_LEVEL; 189 211 set_irq_chip_and_handler(i+irq_bias, &wildfire_irq_type, 190 - alpha_do_IRQ); 212 + handle_level_irq); 191 213 } 192 214 193 215 setup_irq(32+irq_bias, &isa_enable);