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kernel os linux

dt-bindings: phy: Convert hisilicon,inno-usb2-phy to DT schema

Convert the HiSilicon INNO USB2 PHY binding to DT schema format. It's a
straight forward conversion.

Add the undocumented "hisilicon,hi3798mv100-usb2-phy" compatible.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212527.741915-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Rob Herring (Arm) and committed by
Vinod Koul
7cc5efcd 40f1d821

+93 -71
+93
Documentation/devicetree/bindings/phy/hisilicon,inno-usb2-phy.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/phy/hisilicon,inno-usb2-phy.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: HiSilicon INNO USB2 PHY 8 + 9 + maintainers: 10 + - Pengcheng Li <lpc.li@hisilicon.com> 11 + 12 + description: 13 + The INNO USB2 PHY device should be a child node of peripheral controller that 14 + contains the PHY configuration register, and each device supports up to 2 PHY 15 + ports which are represented as child nodes of INNO USB2 PHY device. 16 + 17 + properties: 18 + compatible: 19 + enum: 20 + - hisilicon,hi3798cv200-usb2-phy 21 + - hisilicon,hi3798mv100-usb2-phy 22 + - hisilicon,inno-usb2-phy 23 + 24 + reg: 25 + maxItems: 1 26 + 27 + clocks: 28 + maxItems: 1 29 + 30 + resets: 31 + maxItems: 1 32 + 33 + "#address-cells": 34 + const: 1 35 + 36 + "#size-cells": 37 + const: 0 38 + 39 + patternProperties: 40 + "^phy@[0-1]$": 41 + description: PHY port subnode 42 + type: object 43 + additionalProperties: false 44 + 45 + properties: 46 + reg: 47 + maximum: 1 48 + 49 + "#phy-cells": 50 + const: 0 51 + 52 + resets: 53 + maxItems: 1 54 + 55 + required: 56 + - reg 57 + - "#phy-cells" 58 + - resets 59 + 60 + required: 61 + - compatible 62 + - reg 63 + - clocks 64 + - resets 65 + - "#address-cells" 66 + - "#size-cells" 67 + 68 + additionalProperties: false 69 + 70 + examples: 71 + - | 72 + #include <dt-bindings/clock/histb-clock.h> 73 + 74 + usb2-phy@120 { 75 + compatible = "hisilicon,hi3798cv200-usb2-phy"; 76 + reg = <0x120 0x4>; 77 + clocks = <&crg HISTB_USB2_PHY1_REF_CLK>; 78 + resets = <&crg 0xbc 4>; 79 + #address-cells = <1>; 80 + #size-cells = <0>; 81 + 82 + phy@0 { 83 + reg = <0>; 84 + #phy-cells = <0>; 85 + resets = <&crg 0xbc 8>; 86 + }; 87 + 88 + phy@1 { 89 + reg = <1>; 90 + #phy-cells = <0>; 91 + resets = <&crg 0xbc 9>; 92 + }; 93 + };
-71
Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
··· 1 - Device tree bindings for HiSilicon INNO USB2 PHY 2 - 3 - Required properties: 4 - - compatible: Should be one of the following strings: 5 - "hisilicon,inno-usb2-phy", 6 - "hisilicon,hi3798cv200-usb2-phy". 7 - - reg: Should be the address space for PHY configuration register in peripheral 8 - controller, e.g. PERI_USB0 for USB 2.0 PHY01 on Hi3798CV200 SoC. 9 - - clocks: The phandle and clock specifier pair for INNO USB2 PHY device 10 - reference clock. 11 - - resets: The phandle and reset specifier pair for INNO USB2 PHY device reset 12 - signal. 13 - - #address-cells: Must be 1. 14 - - #size-cells: Must be 0. 15 - 16 - The INNO USB2 PHY device should be a child node of peripheral controller that 17 - contains the PHY configuration register, and each device supports up to 2 PHY 18 - ports which are represented as child nodes of INNO USB2 PHY device. 19 - 20 - Required properties for PHY port node: 21 - - reg: The PHY port instance number. 22 - - #phy-cells: Defined by generic PHY bindings. Must be 0. 23 - - resets: The phandle and reset specifier pair for PHY port reset signal. 24 - 25 - Refer to phy/phy-bindings.txt for the generic PHY binding properties 26 - 27 - Example: 28 - 29 - perictrl: peripheral-controller@8a20000 { 30 - compatible = "hisilicon,hi3798cv200-perictrl", "simple-mfd"; 31 - reg = <0x8a20000 0x1000>; 32 - #address-cells = <1>; 33 - #size-cells = <1>; 34 - ranges = <0x0 0x8a20000 0x1000>; 35 - 36 - usb2_phy1: usb2-phy@120 { 37 - compatible = "hisilicon,hi3798cv200-usb2-phy"; 38 - reg = <0x120 0x4>; 39 - clocks = <&crg HISTB_USB2_PHY1_REF_CLK>; 40 - resets = <&crg 0xbc 4>; 41 - #address-cells = <1>; 42 - #size-cells = <0>; 43 - 44 - usb2_phy1_port0: phy@0 { 45 - reg = <0>; 46 - #phy-cells = <0>; 47 - resets = <&crg 0xbc 8>; 48 - }; 49 - 50 - usb2_phy1_port1: phy@1 { 51 - reg = <1>; 52 - #phy-cells = <0>; 53 - resets = <&crg 0xbc 9>; 54 - }; 55 - }; 56 - 57 - usb2_phy2: usb2-phy@124 { 58 - compatible = "hisilicon,hi3798cv200-usb2-phy"; 59 - reg = <0x124 0x4>; 60 - clocks = <&crg HISTB_USB2_PHY2_REF_CLK>; 61 - resets = <&crg 0xbc 6>; 62 - #address-cells = <1>; 63 - #size-cells = <0>; 64 - 65 - usb2_phy2_port0: phy@0 { 66 - reg = <0>; 67 - #phy-cells = <0>; 68 - resets = <&crg 0xbc 10>; 69 - }; 70 - }; 71 - };