Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/bridge: dw-hdmi: add better clock disable control

The video setup path aways sets the clock disable register to a specific
value, which has the effect of disabling the CEC engine. When we add the
CEC driver, this becomes a problem.

Fix this by only setting/clearing the bits that the video path needs to.

Reviewed-by: Jose Abreu <joabreu@synopsys.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: https://patchwork.freedesktop.org/patch/msgid/E1dcBha-00088l-DE@rmk-PC.armlinux.org.uk

authored by

Russell King and committed by
Archit Taneja
7cc4ab22 e84b8d75

+18 -11
+18 -11
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
··· 166 166 bool bridge_is_on; /* indicates the bridge is on */ 167 167 bool rxsense; /* rxsense state */ 168 168 u8 phy_mask; /* desired phy int mask settings */ 169 + u8 mc_clkdis; /* clock disable register */ 169 170 170 171 spinlock_t audio_lock; 171 172 struct mutex audio_mutex; ··· 552 551 553 552 static void hdmi_enable_audio_clk(struct dw_hdmi *hdmi, bool enable) 554 553 { 555 - hdmi_modb(hdmi, enable ? 0 : HDMI_MC_CLKDIS_AUDCLK_DISABLE, 556 - HDMI_MC_CLKDIS_AUDCLK_DISABLE, HDMI_MC_CLKDIS); 554 + if (enable) 555 + hdmi->mc_clkdis &= ~HDMI_MC_CLKDIS_AUDCLK_DISABLE; 556 + else 557 + hdmi->mc_clkdis |= HDMI_MC_CLKDIS_AUDCLK_DISABLE; 558 + hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS); 557 559 } 558 560 559 561 static void dw_hdmi_ahb_audio_enable(struct dw_hdmi *hdmi) ··· 1578 1574 /* HDMI Initialization Step B.4 */ 1579 1575 static void dw_hdmi_enable_video_path(struct dw_hdmi *hdmi) 1580 1576 { 1581 - u8 clkdis; 1582 - 1583 1577 /* control period minimum duration */ 1584 1578 hdmi_writeb(hdmi, 12, HDMI_FC_CTRLDUR); 1585 1579 hdmi_writeb(hdmi, 32, HDMI_FC_EXCTRLDUR); ··· 1589 1587 hdmi_writeb(hdmi, 0x21, HDMI_FC_CH2PREAM); 1590 1588 1591 1589 /* Enable pixel clock and tmds data path */ 1592 - clkdis = 0x7F; 1593 - clkdis &= ~HDMI_MC_CLKDIS_PIXELCLK_DISABLE; 1594 - hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS); 1590 + hdmi->mc_clkdis |= HDMI_MC_CLKDIS_HDCPCLK_DISABLE | 1591 + HDMI_MC_CLKDIS_CSCCLK_DISABLE | 1592 + HDMI_MC_CLKDIS_AUDCLK_DISABLE | 1593 + HDMI_MC_CLKDIS_PREPCLK_DISABLE | 1594 + HDMI_MC_CLKDIS_TMDSCLK_DISABLE; 1595 + hdmi->mc_clkdis &= ~HDMI_MC_CLKDIS_PIXELCLK_DISABLE; 1596 + hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS); 1595 1597 1596 - clkdis &= ~HDMI_MC_CLKDIS_TMDSCLK_DISABLE; 1597 - hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS); 1598 + hdmi->mc_clkdis &= ~HDMI_MC_CLKDIS_TMDSCLK_DISABLE; 1599 + hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS); 1598 1600 1599 1601 /* Enable csc path */ 1600 1602 if (is_color_space_conversion(hdmi)) { 1601 - clkdis &= ~HDMI_MC_CLKDIS_CSCCLK_DISABLE; 1602 - hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS); 1603 + hdmi->mc_clkdis &= ~HDMI_MC_CLKDIS_CSCCLK_DISABLE; 1604 + hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS); 1603 1605 } 1604 1606 1605 1607 /* Enable color space conversion if needed */ ··· 2278 2272 hdmi->disabled = true; 2279 2273 hdmi->rxsense = true; 2280 2274 hdmi->phy_mask = (u8)~(HDMI_PHY_HPD | HDMI_PHY_RX_SENSE); 2275 + hdmi->mc_clkdis = 0x7f; 2281 2276 2282 2277 mutex_init(&hdmi->mutex); 2283 2278 mutex_init(&hdmi->audio_mutex);