Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

sh_mobile_meram: MERAM framework for LCDC

Based on the patch by Takanari Hayama <taki@igel.co.jp>

Adds support framework necessary to use Media RAM (MERAM)
caching functionality with the LCDC. The MERAM is accessed
through up to 4 Interconnect Buffers (ICBs).

ICB numbers and MERAM address ranges to use are specified in
by filling in the .meram_cfg member of the LCDC platform data

Signed-off-by: Damian Hobson-Garcia <dhobsong@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

authored by

Damian and committed by
Paul Mundt
7caa4342 71a86384

+773 -10
+12
drivers/video/Kconfig
··· 1986 1986 ---help--- 1987 1987 Driver for the on-chip SH-Mobile HDMI controller. 1988 1988 1989 + config FB_SH_MOBILE_MERAM 1990 + tristate "SuperH Mobile MERAM read ahead support for LCDC" 1991 + depends on FB_SH_MOBILE_LCDC 1992 + default y 1993 + ---help--- 1994 + Enable MERAM support for the SH-Mobile LCD controller. 1995 + 1996 + This will allow for caching of the framebuffer to provide more 1997 + reliable access under heavy main memory bus traffic situations. 1998 + Up to 4 memory channels can be configured, allowing 4 RGB or 1999 + 2 YCbCr framebuffers to be configured. 2000 + 1989 2001 config FB_TMIO 1990 2002 tristate "Toshiba Mobile IO FrameBuffer support" 1991 2003 depends on FB && MFD_CORE
+1
drivers/video/Makefile
··· 130 130 obj-$(CONFIG_FB_XILINX) += xilinxfb.o 131 131 obj-$(CONFIG_SH_MIPI_DSI) += sh_mipi_dsi.o 132 132 obj-$(CONFIG_FB_SH_MOBILE_HDMI) += sh_mobile_hdmi.o 133 + obj-$(CONFIG_FB_SH_MOBILE_MERAM) += sh_mobile_meram.o 133 134 obj-$(CONFIG_FB_SH_MOBILE_LCDC) += sh_mobile_lcdcfb.o 134 135 obj-$(CONFIG_FB_OMAP) += omap/ 135 136 obj-y += omap2/
+95 -10
drivers/video/sh_mobile_lcdcfb.c
··· 27 27 #include <asm/atomic.h> 28 28 29 29 #include "sh_mobile_lcdcfb.h" 30 + #include "sh_mobile_meram.h" 30 31 31 32 #define SIDE_B_OFFSET 0x1000 32 33 #define MIRROR_OFFSET 0x2000 ··· 144 143 unsigned long saved_shared_regs[NR_SHARED_REGS]; 145 144 int started; 146 145 int forced_bpp; /* 2 channel LCDC must share bpp setting */ 146 + struct sh_mobile_meram_info *meram_dev; 147 147 }; 148 148 149 149 static bool banked(int reg_nr) ··· 566 564 } 567 565 568 566 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { 567 + unsigned long base_addr_y; 568 + unsigned long base_addr_c = 0; 569 + int pitch; 569 570 ch = &priv->ch[k]; 570 571 571 572 if (!priv->ch[k].enabled) ··· 603 598 } 604 599 lcdc_write_chan(ch, LDDFR, tmp); 605 600 606 - /* point out our frame buffer */ 607 - lcdc_write_chan(ch, LDSA1R, ch->info->fix.smem_start); 608 - if (ch->info->var.nonstd) 609 - lcdc_write_chan(ch, LDSA2R, 610 - ch->info->fix.smem_start + 601 + base_addr_y = ch->info->fix.smem_start; 602 + base_addr_c = base_addr_y + 611 603 ch->info->var.xres * 612 - ch->info->var.yres_virtual); 604 + ch->info->var.yres_virtual; 605 + pitch = ch->info->fix.line_length; 606 + 607 + /* test if we can enable meram */ 608 + if (ch->cfg.meram_cfg && priv->meram_dev) { 609 + struct sh_mobile_meram_cfg *cfg; 610 + struct sh_mobile_meram_info *mdev; 611 + unsigned long icb_addr_y, icb_addr_c; 612 + int icb_pitch; 613 + int pf; 614 + 615 + cfg = ch->cfg.meram_cfg; 616 + mdev = priv->meram_dev; 617 + /* we need to de-init configured ICBs before we 618 + * we can re-initialize them. 619 + */ 620 + if (ch->meram_enabled) 621 + mdev->ops->meram_unregister(mdev, cfg); 622 + 623 + ch->meram_enabled = 0; 624 + 625 + if (ch->info->var.nonstd) 626 + pf = SH_MOBILE_MERAM_PF_NV; 627 + else 628 + pf = SH_MOBILE_MERAM_PF_RGB; 629 + 630 + ret = mdev->ops->meram_register(mdev, cfg, pitch, 631 + ch->info->var.yres, 632 + pf, 633 + base_addr_y, 634 + base_addr_c, 635 + &icb_addr_y, 636 + &icb_addr_c, 637 + &icb_pitch); 638 + if (!ret) { 639 + /* set LDSA1R value */ 640 + base_addr_y = icb_addr_y; 641 + pitch = icb_pitch; 642 + 643 + /* set LDSA2R value if required */ 644 + if (base_addr_c) 645 + base_addr_c = icb_addr_c; 646 + 647 + ch->meram_enabled = 1; 648 + } 649 + } 650 + 651 + /* point out our frame buffer */ 652 + lcdc_write_chan(ch, LDSA1R, base_addr_y); 653 + if (ch->info->var.nonstd) 654 + lcdc_write_chan(ch, LDSA2R, base_addr_c); 613 655 614 656 /* set line size */ 615 - lcdc_write_chan(ch, LDMLSR, ch->info->fix.line_length); 657 + lcdc_write_chan(ch, LDMLSR, pitch); 616 658 617 659 /* setup deferred io if SYS bus */ 618 660 tmp = ch->cfg.sys_bus_cfg.deferred_io_msec; ··· 744 692 board_cfg->display_off(board_cfg->board_data); 745 693 module_put(board_cfg->owner); 746 694 } 695 + 696 + /* disable the meram */ 697 + if (ch->meram_enabled) { 698 + struct sh_mobile_meram_cfg *cfg; 699 + struct sh_mobile_meram_info *mdev; 700 + cfg = ch->cfg.meram_cfg; 701 + mdev = priv->meram_dev; 702 + mdev->ops->meram_unregister(mdev, cfg); 703 + ch->meram_enabled = 0; 704 + } 705 + 747 706 } 748 707 749 708 /* stop the lcdc */ ··· 938 875 } else 939 876 base_addr_c = 0; 940 877 941 - lcdc_write_chan_mirror(ch, LDSA1R, base_addr_y); 942 - if (base_addr_c) 943 - lcdc_write_chan_mirror(ch, LDSA2R, base_addr_c); 878 + if (!ch->meram_enabled) { 879 + lcdc_write_chan_mirror(ch, LDSA1R, base_addr_y); 880 + if (base_addr_c) 881 + lcdc_write_chan_mirror(ch, LDSA2R, base_addr_c); 882 + } else { 883 + struct sh_mobile_meram_cfg *cfg; 884 + struct sh_mobile_meram_info *mdev; 885 + unsigned long icb_addr_y, icb_addr_c; 886 + int ret; 887 + 888 + cfg = ch->cfg.meram_cfg; 889 + mdev = priv->meram_dev; 890 + ret = mdev->ops->meram_update(mdev, cfg, 891 + base_addr_y, base_addr_c, 892 + &icb_addr_y, &icb_addr_c); 893 + if (ret) 894 + return ret; 895 + 896 + lcdc_write_chan_mirror(ch, LDSA1R, icb_addr_y); 897 + if (icb_addr_c) 898 + lcdc_write_chan_mirror(ch, LDSA2R, icb_addr_c); 899 + 900 + } 944 901 945 902 if (lcdc_chan_is_sublcd(ch)) 946 903 lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_SRS); ··· 1502 1419 dev_err(&pdev->dev, "unable to setup clocks\n"); 1503 1420 goto err1; 1504 1421 } 1422 + 1423 + priv->meram_dev = pdata->meram_dev; 1505 1424 1506 1425 for (i = 0; i < j; i++) { 1507 1426 struct fb_var_screeninfo *var;
+1
drivers/video/sh_mobile_lcdcfb.h
··· 39 39 int use_count; 40 40 int blank_status; 41 41 struct mutex open_lock; /* protects the use counter */ 42 + int meram_enabled; 42 43 }; 43 44 44 45 #endif
+553
drivers/video/sh_mobile_meram.c
··· 1 + /* 2 + * SuperH Mobile MERAM Driver for SuperH Mobile LCDC Driver 3 + * 4 + * Copyright (c) 2011 Damian Hobson-Garcia <dhobsong@igel.co.jp> 5 + * Takanari Hayama <taki@igel.co.jp> 6 + * 7 + * This file is subject to the terms and conditions of the GNU General Public 8 + * License. See the file "COPYING" in the main directory of this archive 9 + * for more details. 10 + */ 11 + 12 + #include <linux/kernel.h> 13 + #include <linux/module.h> 14 + #include <linux/device.h> 15 + #include <linux/io.h> 16 + #include <linux/slab.h> 17 + #include <linux/platform_device.h> 18 + 19 + #include "sh_mobile_meram.h" 20 + 21 + /* meram registers */ 22 + #define MExxCTL 0x0 23 + #define MExxBSIZE 0x4 24 + #define MExxMNCF 0x8 25 + #define MExxSARA 0x10 26 + #define MExxSARB 0x14 27 + #define MExxSBSIZE 0x18 28 + 29 + #define MERAM_MExxCTL_VAL(ctl, next_icb, addr) \ 30 + ((ctl) | (((next_icb) & 0x1f) << 11) | (((addr) & 0x7ff) << 16)) 31 + #define MERAM_MExxBSIZE_VAL(a, b, c) \ 32 + (((a) << 28) | ((b) << 16) | (c)) 33 + 34 + #define MEVCR1 0x4 35 + #define MEACTS 0x10 36 + #define MEQSEL1 0x40 37 + #define MEQSEL2 0x44 38 + 39 + /* settings */ 40 + #define MERAM_SEC_LINE 15 41 + #define MERAM_LINE_WIDTH 2048 42 + 43 + /* 44 + * MERAM/ICB access functions 45 + */ 46 + 47 + #define MERAM_ICB_OFFSET(base, idx, off) \ 48 + ((base) + (0x400 + ((idx) * 0x20) + (off))) 49 + 50 + static inline void meram_write_icb(void __iomem *base, int idx, int off, 51 + unsigned long val) 52 + { 53 + iowrite32(val, MERAM_ICB_OFFSET(base, idx, off)); 54 + } 55 + 56 + static inline unsigned long meram_read_icb(void __iomem *base, int idx, int off) 57 + { 58 + return ioread32(MERAM_ICB_OFFSET(base, idx, off)); 59 + } 60 + 61 + static inline void meram_write_reg(void __iomem *base, int off, 62 + unsigned long val) 63 + { 64 + iowrite32(val, base + off); 65 + } 66 + 67 + static inline unsigned long meram_read_reg(void __iomem *base, int off) 68 + { 69 + return ioread32(base + off); 70 + } 71 + 72 + /* 73 + * register ICB 74 + */ 75 + 76 + #define MERAM_CACHE_START(p) ((p) >> 16) 77 + #define MERAM_CACHE_END(p) ((p) & 0xffff) 78 + #define MERAM_CACHE_SET(o, s) ((((o) & 0xffff) << 16) | \ 79 + (((o) + (s) - 1) & 0xffff)) 80 + 81 + /* 82 + * check if there's no overlaps in MERAM allocation. 83 + */ 84 + 85 + static inline int meram_check_overlap(struct sh_mobile_meram_priv *priv, 86 + struct sh_mobile_meram_icb *new) 87 + { 88 + int i; 89 + int used_start, used_end, meram_start, meram_end; 90 + 91 + /* valid ICB? */ 92 + if (new->marker_icb & ~0x1f || new->cache_icb & ~0x1f) 93 + return 1; 94 + 95 + if (test_bit(new->marker_icb, &priv->used_icb) || 96 + test_bit(new->cache_icb, &priv->used_icb)) 97 + return 1; 98 + 99 + for (i = 0; i < priv->used_meram_cache_regions; i++) { 100 + used_start = MERAM_CACHE_START(priv->used_meram_cache[i]); 101 + used_end = MERAM_CACHE_END(priv->used_meram_cache[i]); 102 + meram_start = new->meram_offset; 103 + meram_end = new->meram_offset + new->meram_size; 104 + 105 + if ((meram_start >= used_start && meram_start < used_end) || 106 + (meram_end > used_start && meram_end < used_end)) 107 + return 1; 108 + } 109 + 110 + return 0; 111 + } 112 + 113 + /* 114 + * mark the specified ICB as used 115 + */ 116 + 117 + static inline void meram_mark(struct sh_mobile_meram_priv *priv, 118 + struct sh_mobile_meram_icb *new) 119 + { 120 + int n; 121 + 122 + if (new->marker_icb < 0 || new->cache_icb < 0) 123 + return; 124 + 125 + __set_bit(new->marker_icb, &priv->used_icb); 126 + __set_bit(new->cache_icb, &priv->used_icb); 127 + 128 + n = priv->used_meram_cache_regions; 129 + 130 + priv->used_meram_cache[n] = MERAM_CACHE_SET(new->meram_offset, 131 + new->meram_size); 132 + 133 + priv->used_meram_cache_regions++; 134 + } 135 + 136 + /* 137 + * unmark the specified ICB as used 138 + */ 139 + 140 + static inline void meram_unmark(struct sh_mobile_meram_priv *priv, 141 + struct sh_mobile_meram_icb *icb) 142 + { 143 + int i; 144 + unsigned long pattern; 145 + 146 + if (icb->marker_icb < 0 || icb->cache_icb < 0) 147 + return; 148 + 149 + __clear_bit(icb->marker_icb, &priv->used_icb); 150 + __clear_bit(icb->cache_icb, &priv->used_icb); 151 + 152 + pattern = MERAM_CACHE_SET(icb->meram_offset, icb->meram_size); 153 + for (i = 0; i < priv->used_meram_cache_regions; i++) { 154 + if (priv->used_meram_cache[i] == pattern) { 155 + while (i < priv->used_meram_cache_regions - 1) { 156 + priv->used_meram_cache[i] = 157 + priv->used_meram_cache[i + 1] ; 158 + i++; 159 + } 160 + priv->used_meram_cache[i] = 0; 161 + priv->used_meram_cache_regions--; 162 + break; 163 + } 164 + } 165 + } 166 + 167 + 168 + /* 169 + * set the next address to fetch 170 + */ 171 + static inline void meram_set_next_addr(struct sh_mobile_meram_priv *priv, 172 + struct sh_mobile_meram_cfg *cfg, 173 + unsigned long base_addr_y, 174 + unsigned long base_addr_c) 175 + { 176 + unsigned long target; 177 + 178 + target = (cfg->current_reg) ? MExxSARA : MExxSARB; 179 + cfg->current_reg ^= 1; 180 + 181 + /* set the next address to fetch */ 182 + meram_write_icb(priv->base, cfg->icb[0].cache_icb, target, 183 + base_addr_y); 184 + meram_write_icb(priv->base, cfg->icb[0].marker_icb, target, 185 + base_addr_y + cfg->icb[0].cache_unit); 186 + 187 + if (cfg->pixelformat == SH_MOBILE_MERAM_PF_NV) { 188 + meram_write_icb(priv->base, cfg->icb[1].cache_icb, target, 189 + base_addr_c); 190 + meram_write_icb(priv->base, cfg->icb[1].marker_icb, target, 191 + base_addr_c + cfg->icb[1].cache_unit); 192 + } 193 + } 194 + 195 + /* 196 + * get the next ICB address 197 + */ 198 + static inline void meram_get_next_icb_addr(struct sh_mobile_meram_info *pdata, 199 + struct sh_mobile_meram_cfg *cfg, 200 + unsigned long *icb_addr_y, 201 + unsigned long *icb_addr_c) 202 + { 203 + unsigned long icb_offset; 204 + 205 + if (pdata->addr_mode == SH_MOBILE_MERAM_MODE0) 206 + icb_offset = 0x80000000 | (cfg->current_reg << 29); 207 + else 208 + icb_offset = 0xc0000000 | (cfg->current_reg << 23); 209 + 210 + *icb_addr_y = icb_offset | (cfg->icb[0].marker_icb << 24); 211 + if ((*icb_addr_c) && cfg->pixelformat == SH_MOBILE_MERAM_PF_NV) 212 + *icb_addr_c = icb_offset | (cfg->icb[1].marker_icb << 24); 213 + } 214 + 215 + #define MERAM_CALC_BYTECOUNT(x, y) \ 216 + (((x) * (y) + (MERAM_LINE_WIDTH - 1)) & ~(MERAM_LINE_WIDTH - 1)) 217 + 218 + /* 219 + * initialize MERAM 220 + */ 221 + 222 + static int meram_init(struct sh_mobile_meram_priv *priv, 223 + struct sh_mobile_meram_icb *icb, 224 + int xres, int yres, int *out_pitch) 225 + { 226 + unsigned long total_byte_count = MERAM_CALC_BYTECOUNT(xres, yres); 227 + unsigned long bnm; 228 + int lcdc_pitch, xpitch, line_cnt; 229 + int save_lines; 230 + 231 + /* adjust pitch to 1024, 2048, 4096 or 8192 */ 232 + lcdc_pitch = (xres - 1) | 1023; 233 + lcdc_pitch = lcdc_pitch | (lcdc_pitch >> 1); 234 + lcdc_pitch = lcdc_pitch | (lcdc_pitch >> 2); 235 + lcdc_pitch += 1; 236 + 237 + /* derive settings */ 238 + if (lcdc_pitch == 8192 && yres >= 1024) { 239 + lcdc_pitch = xpitch = MERAM_LINE_WIDTH; 240 + line_cnt = total_byte_count >> 11; 241 + *out_pitch = xres; 242 + save_lines = (icb->meram_size / 16 / MERAM_SEC_LINE); 243 + save_lines *= MERAM_SEC_LINE; 244 + } else { 245 + xpitch = xres; 246 + line_cnt = yres; 247 + *out_pitch = lcdc_pitch; 248 + save_lines = icb->meram_size / (lcdc_pitch >> 10) / 2; 249 + save_lines &= 0xff; 250 + } 251 + bnm = (save_lines - 1) << 16; 252 + 253 + /* TODO: we better to check if we have enough MERAM buffer size */ 254 + 255 + /* set up ICB */ 256 + meram_write_icb(priv->base, icb->cache_icb, MExxBSIZE, 257 + MERAM_MExxBSIZE_VAL(0x0, line_cnt - 1, xpitch - 1)); 258 + meram_write_icb(priv->base, icb->marker_icb, MExxBSIZE, 259 + MERAM_MExxBSIZE_VAL(0xf, line_cnt - 1, xpitch - 1)); 260 + 261 + meram_write_icb(priv->base, icb->cache_icb, MExxMNCF, bnm); 262 + meram_write_icb(priv->base, icb->marker_icb, MExxMNCF, bnm); 263 + 264 + meram_write_icb(priv->base, icb->cache_icb, MExxSBSIZE, xpitch); 265 + meram_write_icb(priv->base, icb->marker_icb, MExxSBSIZE, xpitch); 266 + 267 + /* save a cache unit size */ 268 + icb->cache_unit = xres * save_lines; 269 + 270 + /* 271 + * Set MERAM for framebuffer 272 + * 273 + * 0x70f: WD = 0x3, WS=0x1, CM=0x1, MD=FB mode 274 + * we also chain the cache_icb and the marker_icb. 275 + * we also split the allocated MERAM buffer between two ICBs. 276 + */ 277 + meram_write_icb(priv->base, icb->cache_icb, MExxCTL, 278 + MERAM_MExxCTL_VAL(0x70f, icb->marker_icb, 279 + icb->meram_offset)); 280 + meram_write_icb(priv->base, icb->marker_icb, MExxCTL, 281 + MERAM_MExxCTL_VAL(0x70f, icb->cache_icb, 282 + icb->meram_offset + 283 + icb->meram_size / 2)); 284 + 285 + return 0; 286 + } 287 + 288 + static void meram_deinit(struct sh_mobile_meram_priv *priv, 289 + struct sh_mobile_meram_icb *icb) 290 + { 291 + /* disable ICB */ 292 + meram_write_icb(priv->base, icb->cache_icb, MExxCTL, 0); 293 + meram_write_icb(priv->base, icb->marker_icb, MExxCTL, 0); 294 + icb->cache_unit = 0; 295 + } 296 + 297 + /* 298 + * register the ICB 299 + */ 300 + 301 + static int sh_mobile_meram_register(struct sh_mobile_meram_info *pdata, 302 + struct sh_mobile_meram_cfg *cfg, 303 + int xres, int yres, int pixelformat, 304 + unsigned long base_addr_y, 305 + unsigned long base_addr_c, 306 + unsigned long *icb_addr_y, 307 + unsigned long *icb_addr_c, 308 + int *pitch) 309 + { 310 + struct platform_device *pdev; 311 + struct sh_mobile_meram_priv *priv; 312 + int n, out_pitch; 313 + int error = 0; 314 + 315 + if (!pdata || !pdata->priv || !pdata->pdev || !cfg) 316 + return -EINVAL; 317 + 318 + if (pixelformat != SH_MOBILE_MERAM_PF_NV && 319 + pixelformat != SH_MOBILE_MERAM_PF_RGB) 320 + return -EINVAL; 321 + 322 + priv = pdata->priv; 323 + pdev = pdata->pdev; 324 + 325 + dev_dbg(&pdev->dev, "registering %dx%d (%s) (y=%08lx, c=%08lx)", 326 + xres, yres, (!pixelformat) ? "yuv" : "rgb", 327 + base_addr_y, base_addr_c); 328 + 329 + mutex_lock(&priv->lock); 330 + 331 + /* we can't handle wider than 8192px */ 332 + if (xres > 8192) { 333 + dev_err(&pdev->dev, "width exceeding the limit (> 8192)."); 334 + error = -EINVAL; 335 + goto err; 336 + } 337 + 338 + if (priv->used_meram_cache_regions + 2 > SH_MOBILE_MERAM_ICB_NUM) { 339 + dev_err(&pdev->dev, "no more ICB available."); 340 + error = -EINVAL; 341 + goto err; 342 + } 343 + 344 + /* do we have at least one ICB config? */ 345 + if (cfg->icb[0].marker_icb < 0 || cfg->icb[0].cache_icb < 0) { 346 + dev_err(&pdev->dev, "at least one ICB is required."); 347 + error = -EINVAL; 348 + goto err; 349 + } 350 + 351 + /* make sure that there's no overlaps */ 352 + if (meram_check_overlap(priv, &cfg->icb[0])) { 353 + dev_err(&pdev->dev, "conflicting config detected."); 354 + error = -EINVAL; 355 + goto err; 356 + } 357 + n = 1; 358 + 359 + /* do the same if we have the second ICB set */ 360 + if (cfg->icb[1].marker_icb >= 0 && cfg->icb[1].cache_icb >= 0) { 361 + if (meram_check_overlap(priv, &cfg->icb[1])) { 362 + dev_err(&pdev->dev, "conflicting config detected."); 363 + error = -EINVAL; 364 + goto err; 365 + } 366 + n = 2; 367 + } 368 + 369 + if (pixelformat == SH_MOBILE_MERAM_PF_NV && n != 2) { 370 + dev_err(&pdev->dev, "requires two ICB sets for planar Y/C."); 371 + error = -EINVAL; 372 + goto err; 373 + } 374 + 375 + /* we now register the ICB */ 376 + cfg->pixelformat = pixelformat; 377 + meram_mark(priv, &cfg->icb[0]); 378 + if (pixelformat == SH_MOBILE_MERAM_PF_NV) 379 + meram_mark(priv, &cfg->icb[1]); 380 + 381 + /* initialize MERAM */ 382 + meram_init(priv, &cfg->icb[0], xres, yres, &out_pitch); 383 + *pitch = out_pitch; 384 + if (pixelformat == SH_MOBILE_MERAM_PF_NV) 385 + meram_init(priv, &cfg->icb[1], xres, (yres + 1) / 2, 386 + &out_pitch); 387 + 388 + cfg->current_reg = 1; 389 + meram_set_next_addr(priv, cfg, base_addr_y, base_addr_c); 390 + meram_get_next_icb_addr(pdata, cfg, icb_addr_y, icb_addr_c); 391 + 392 + dev_dbg(&pdev->dev, "registered - can access via y=%08lx, c=%08lx", 393 + *icb_addr_y, *icb_addr_c); 394 + 395 + err: 396 + mutex_unlock(&priv->lock); 397 + return error; 398 + } 399 + 400 + static int sh_mobile_meram_unregister(struct sh_mobile_meram_info *pdata, 401 + struct sh_mobile_meram_cfg *cfg) 402 + { 403 + struct sh_mobile_meram_priv *priv; 404 + 405 + if (!pdata || !pdata->priv || !cfg) 406 + return -EINVAL; 407 + 408 + priv = pdata->priv; 409 + 410 + mutex_lock(&priv->lock); 411 + 412 + /* deinit & unmark */ 413 + if (cfg->pixelformat == SH_MOBILE_MERAM_PF_NV) { 414 + meram_deinit(priv, &cfg->icb[1]); 415 + meram_unmark(priv, &cfg->icb[1]); 416 + } 417 + meram_deinit(priv, &cfg->icb[0]); 418 + meram_unmark(priv, &cfg->icb[0]); 419 + 420 + mutex_unlock(&priv->lock); 421 + 422 + return 0; 423 + } 424 + 425 + static int sh_mobile_meram_update(struct sh_mobile_meram_info *pdata, 426 + struct sh_mobile_meram_cfg *cfg, 427 + unsigned long base_addr_y, 428 + unsigned long base_addr_c, 429 + unsigned long *icb_addr_y, 430 + unsigned long *icb_addr_c) 431 + { 432 + struct sh_mobile_meram_priv *priv; 433 + 434 + if (!pdata || !pdata->priv || !cfg) 435 + return -EINVAL; 436 + 437 + priv = pdata->priv; 438 + 439 + mutex_lock(&priv->lock); 440 + 441 + meram_set_next_addr(priv, cfg, base_addr_y, base_addr_c); 442 + meram_get_next_icb_addr(pdata, cfg, icb_addr_y, icb_addr_c); 443 + 444 + mutex_unlock(&priv->lock); 445 + 446 + return 0; 447 + } 448 + 449 + static struct sh_mobile_meram_ops sh_mobile_meram_ops = { 450 + .module = THIS_MODULE, 451 + .meram_register = sh_mobile_meram_register, 452 + .meram_unregister = sh_mobile_meram_unregister, 453 + .meram_update = sh_mobile_meram_update, 454 + }; 455 + 456 + /* 457 + * initialize MERAM 458 + */ 459 + 460 + static int sh_mobile_meram_remove(struct platform_device *pdev); 461 + 462 + static int __devinit sh_mobile_meram_probe(struct platform_device *pdev) 463 + { 464 + struct sh_mobile_meram_priv *priv; 465 + struct sh_mobile_meram_info *pdata = pdev->dev.platform_data; 466 + struct resource *res; 467 + int error; 468 + 469 + if (!pdata) { 470 + dev_err(&pdev->dev, "no platform data defined\n"); 471 + return -EINVAL; 472 + } 473 + 474 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 475 + if (!res) { 476 + dev_err(&pdev->dev, "cannot get platform resources\n"); 477 + return -ENOENT; 478 + } 479 + 480 + priv = kzalloc(sizeof(*priv), GFP_KERNEL); 481 + if (!priv) { 482 + dev_err(&pdev->dev, "cannot allocate device data\n"); 483 + return -ENOMEM; 484 + } 485 + 486 + platform_set_drvdata(pdev, priv); 487 + 488 + /* initialize private data */ 489 + mutex_init(&priv->lock); 490 + priv->base = ioremap_nocache(res->start, resource_size(res)); 491 + if (!priv->base) { 492 + dev_err(&pdev->dev, "ioremap failed\n"); 493 + error = -EFAULT; 494 + goto err; 495 + } 496 + pdata->ops = &sh_mobile_meram_ops; 497 + pdata->priv = priv; 498 + pdata->pdev = pdev; 499 + 500 + /* initialize ICB addressing mode */ 501 + if (pdata->addr_mode == SH_MOBILE_MERAM_MODE1) 502 + meram_write_reg(priv->base, MEVCR1, 1 << 29); 503 + 504 + dev_info(&pdev->dev, "sh_mobile_meram initialized."); 505 + 506 + return 0; 507 + 508 + err: 509 + sh_mobile_meram_remove(pdev); 510 + 511 + return error; 512 + } 513 + 514 + 515 + static int sh_mobile_meram_remove(struct platform_device *pdev) 516 + { 517 + struct sh_mobile_meram_priv *priv = platform_get_drvdata(pdev); 518 + 519 + if (priv->base) 520 + iounmap(priv->base); 521 + 522 + mutex_destroy(&priv->lock); 523 + 524 + kfree(priv); 525 + 526 + return 0; 527 + } 528 + 529 + static struct platform_driver sh_mobile_meram_driver = { 530 + .driver = { 531 + .name = "sh_mobile_meram", 532 + .owner = THIS_MODULE, 533 + }, 534 + .probe = sh_mobile_meram_probe, 535 + .remove = sh_mobile_meram_remove, 536 + }; 537 + 538 + static int __init sh_mobile_meram_init(void) 539 + { 540 + return platform_driver_register(&sh_mobile_meram_driver); 541 + } 542 + 543 + static void __exit sh_mobile_meram_exit(void) 544 + { 545 + platform_driver_unregister(&sh_mobile_meram_driver); 546 + } 547 + 548 + module_init(sh_mobile_meram_init); 549 + module_exit(sh_mobile_meram_exit); 550 + 551 + MODULE_DESCRIPTION("SuperH Mobile MERAM driver"); 552 + MODULE_AUTHOR("Damian Hobson-Garcia / Takanari Hayama"); 553 + MODULE_LICENSE("GPL v2");
+41
drivers/video/sh_mobile_meram.h
··· 1 + #ifndef __sh_mobile_meram_h__ 2 + #define __sh_mobile_meram_h__ 3 + 4 + #include <linux/mutex.h> 5 + #include <video/sh_mobile_meram.h> 6 + 7 + /* 8 + * MERAM private 9 + */ 10 + 11 + #define MERAM_ICB_Y 0x1 12 + #define MERAM_ICB_C 0x2 13 + 14 + /* MERAM cache size */ 15 + #define SH_MOBILE_MERAM_ICB_NUM 32 16 + 17 + #define SH_MOBILE_MERAM_CACHE_OFFSET(p) ((p) >> 16) 18 + #define SH_MOBILE_MERAM_CACHE_SIZE(p) ((p) & 0xffff) 19 + 20 + struct sh_mobile_meram_priv { 21 + void __iomem *base; 22 + struct mutex lock; 23 + unsigned long used_icb; 24 + int used_meram_cache_regions; 25 + unsigned long used_meram_cache[SH_MOBILE_MERAM_ICB_NUM]; 26 + }; 27 + 28 + int sh_mobile_meram_alloc_icb(const struct sh_mobile_meram_cfg *cfg, 29 + int xres, 30 + int yres, 31 + unsigned int base_addr, 32 + int yuv_mode, 33 + int *marker_icb, 34 + int *out_pitch); 35 + 36 + void sh_mobile_meram_free_icb(int marker_icb); 37 + 38 + #define SH_MOBILE_MERAM_START(ind, ab) \ 39 + (0xC0000000 | ((ab & 0x1) << 23) | ((ind & 0x1F) << 24)) 40 + 41 + #endif /* !__sh_mobile_meram_h__ */
+3
include/video/sh_mobile_lcdc.h
··· 2 2 #define __ASM_SH_MOBILE_LCDC_H__ 3 3 4 4 #include <linux/fb.h> 5 + #include <video/sh_mobile_meram.h> 5 6 6 7 enum { 7 8 RGB8, /* 24bpp, 8:8:8 */ ··· 88 87 struct sh_mobile_lcdc_bl_info bl_info; 89 88 struct sh_mobile_lcdc_sys_bus_cfg sys_bus_cfg; /* only for SYSn I/F */ 90 89 int nonstd; 90 + struct sh_mobile_meram_cfg *meram_cfg; 91 91 }; 92 92 93 93 struct sh_mobile_lcdc_info { 94 94 int clock_source; 95 95 struct sh_mobile_lcdc_chan_cfg ch[2]; 96 + struct sh_mobile_meram_info *meram_dev; 96 97 }; 97 98 98 99 #endif /* __ASM_SH_MOBILE_LCDC_H__ */
+67
include/video/sh_mobile_meram.h
··· 1 + #ifndef __VIDEO_SH_MOBILE_MERAM_H__ 2 + #define __VIDEO_SH_MOBILE_MERAM_H__ 3 + 4 + /* For sh_mobile_meram_info.addr_mode */ 5 + enum { 6 + SH_MOBILE_MERAM_MODE0 = 0, 7 + SH_MOBILE_MERAM_MODE1 8 + }; 9 + 10 + enum { 11 + SH_MOBILE_MERAM_PF_NV = 0, 12 + SH_MOBILE_MERAM_PF_RGB 13 + }; 14 + 15 + 16 + struct sh_mobile_meram_priv; 17 + struct sh_mobile_meram_ops; 18 + 19 + struct sh_mobile_meram_info { 20 + int addr_mode; 21 + struct sh_mobile_meram_ops *ops; 22 + struct sh_mobile_meram_priv *priv; 23 + struct platform_device *pdev; 24 + }; 25 + 26 + /* icb config */ 27 + struct sh_mobile_meram_icb { 28 + int marker_icb; /* ICB # for Marker ICB */ 29 + int cache_icb; /* ICB # for Cache ICB */ 30 + int meram_offset; /* MERAM Buffer Offset to use */ 31 + int meram_size; /* MERAM Buffer Size to use */ 32 + 33 + int cache_unit; /* bytes to cache per ICB */ 34 + }; 35 + 36 + struct sh_mobile_meram_cfg { 37 + struct sh_mobile_meram_icb icb[2]; 38 + int pixelformat; 39 + int current_reg; 40 + }; 41 + 42 + struct module; 43 + struct sh_mobile_meram_ops { 44 + struct module *module; 45 + /* register usage of meram */ 46 + int (*meram_register)(struct sh_mobile_meram_info *meram_dev, 47 + struct sh_mobile_meram_cfg *cfg, 48 + int xres, int yres, int pixelformat, 49 + unsigned long base_addr_y, 50 + unsigned long base_addr_c, 51 + unsigned long *icb_addr_y, 52 + unsigned long *icb_addr_c, int *pitch); 53 + 54 + /* unregister usage of meram */ 55 + int (*meram_unregister)(struct sh_mobile_meram_info *meram_dev, 56 + struct sh_mobile_meram_cfg *cfg); 57 + 58 + /* update meram settings */ 59 + int (*meram_update)(struct sh_mobile_meram_info *meram_dev, 60 + struct sh_mobile_meram_cfg *cfg, 61 + unsigned long base_addr_y, 62 + unsigned long base_addr_c, 63 + unsigned long *icb_addr_y, 64 + unsigned long *icb_addr_c); 65 + }; 66 + 67 + #endif /* __VIDEO_SH_MOBILE_MERAM_H__ */