Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

OMAP2+: UART: Remove cpu checks for populating errata flags

Currently the errata is populated based on cpu checks this can
be removed and replaced with module version check of uart ip block.
MVR reg is provided within the uart reg map use the same
to populate the errata and thus now errata population and handling
can be managed within the driver itself.

Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Reviewed-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Govindraj.R and committed by
Greg Kroah-Hartman
7c77c8de 4fd0690b

+73 -10
-8
arch/arm/mach-omap2/serial.c
··· 355 355 omap_up.dma_rx_poll_rate = info->dma_rx_poll_rate; 356 356 omap_up.autosuspend_timeout = info->autosuspend_timeout; 357 357 358 - /* Enable the MDR1 Errata i202 for OMAP2430/3xxx/44xx */ 359 - if (!cpu_is_omap2420() && !cpu_is_ti816x()) 360 - omap_up.errata |= UART_ERRATA_i202_MDR1_ACCESS; 361 - 362 - /* Enable DMA Mode Force Idle Errata i291 for omap34xx/3630 */ 363 - if (cpu_is_omap34xx() || cpu_is_omap3630()) 364 - omap_up.errata |= UART_ERRATA_i291_DMA_FORCEIDLE; 365 - 366 358 pdata = &omap_up; 367 359 pdata_size = sizeof(struct omap_uart_port_info); 368 360
-1
arch/arm/plat-omap/include/plat/omap-serial.h
··· 65 65 bool dma_enabled; /* To specify DMA Mode */ 66 66 unsigned int uartclk; /* UART clock rate */ 67 67 upf_t flags; /* UPF_* flags */ 68 - u32 errata; 69 68 unsigned int dma_rx_buf_size; 70 69 unsigned int dma_rx_timeout; 71 70 unsigned int autosuspend_timeout;
+73 -1
drivers/tty/serial/omap-serial.c
··· 44 44 #include <plat/dmtimer.h> 45 45 #include <plat/omap-serial.h> 46 46 47 + #define UART_BUILD_REVISION(x, y) (((x) << 8) | (y)) 48 + 49 + #define OMAP_UART_REV_42 0x0402 50 + #define OMAP_UART_REV_46 0x0406 51 + #define OMAP_UART_REV_52 0x0502 52 + #define OMAP_UART_REV_63 0x0603 53 + 47 54 #define DEFAULT_CLK_SPEED 48000000 /* 48Mhz*/ 48 55 49 56 /* SCR register bitmasks */ ··· 59 52 /* FCR register bitmasks */ 60 53 #define OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT 6 61 54 #define OMAP_UART_FCR_RX_FIFO_TRIG_MASK (0x3 << 6) 55 + 56 + /* MVR register bitmasks */ 57 + #define OMAP_UART_MVR_SCHEME_SHIFT 30 58 + 59 + #define OMAP_UART_LEGACY_MVR_MAJ_MASK 0xf0 60 + #define OMAP_UART_LEGACY_MVR_MAJ_SHIFT 4 61 + #define OMAP_UART_LEGACY_MVR_MIN_MASK 0x0f 62 + 63 + #define OMAP_UART_MVR_MAJ_MASK 0x700 64 + #define OMAP_UART_MVR_MAJ_SHIFT 8 65 + #define OMAP_UART_MVR_MIN_MASK 0x3f 62 66 63 67 static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS]; 64 68 ··· 1364 1346 return; 1365 1347 } 1366 1348 1349 + static void omap_serial_fill_features_erratas(struct uart_omap_port *up) 1350 + { 1351 + u32 mvr, scheme; 1352 + u16 revision, major, minor; 1353 + 1354 + mvr = serial_in(up, UART_OMAP_MVER); 1355 + 1356 + /* Check revision register scheme */ 1357 + scheme = mvr >> OMAP_UART_MVR_SCHEME_SHIFT; 1358 + 1359 + switch (scheme) { 1360 + case 0: /* Legacy Scheme: OMAP2/3 */ 1361 + /* MINOR_REV[0:4], MAJOR_REV[4:7] */ 1362 + major = (mvr & OMAP_UART_LEGACY_MVR_MAJ_MASK) >> 1363 + OMAP_UART_LEGACY_MVR_MAJ_SHIFT; 1364 + minor = (mvr & OMAP_UART_LEGACY_MVR_MIN_MASK); 1365 + break; 1366 + case 1: 1367 + /* New Scheme: OMAP4+ */ 1368 + /* MINOR_REV[0:5], MAJOR_REV[8:10] */ 1369 + major = (mvr & OMAP_UART_MVR_MAJ_MASK) >> 1370 + OMAP_UART_MVR_MAJ_SHIFT; 1371 + minor = (mvr & OMAP_UART_MVR_MIN_MASK); 1372 + break; 1373 + default: 1374 + dev_warn(&up->pdev->dev, 1375 + "Unknown %s revision, defaulting to highest\n", 1376 + up->name); 1377 + /* highest possible revision */ 1378 + major = 0xff; 1379 + minor = 0xff; 1380 + } 1381 + 1382 + /* normalize revision for the driver */ 1383 + revision = UART_BUILD_REVISION(major, minor); 1384 + 1385 + switch (revision) { 1386 + case OMAP_UART_REV_46: 1387 + up->errata |= (UART_ERRATA_i202_MDR1_ACCESS | 1388 + UART_ERRATA_i291_DMA_FORCEIDLE); 1389 + break; 1390 + case OMAP_UART_REV_52: 1391 + up->errata |= (UART_ERRATA_i202_MDR1_ACCESS | 1392 + UART_ERRATA_i291_DMA_FORCEIDLE); 1393 + break; 1394 + case OMAP_UART_REV_63: 1395 + up->errata |= UART_ERRATA_i202_MDR1_ACCESS; 1396 + break; 1397 + default: 1398 + break; 1399 + } 1400 + } 1401 + 1367 1402 static struct omap_uart_port_info *of_get_uart_port_info(struct device *dev) 1368 1403 { 1369 1404 struct omap_uart_port_info *omap_up_info; ··· 1514 1443 "%d\n", DEFAULT_CLK_SPEED); 1515 1444 } 1516 1445 up->uart_dma.uart_base = mem->start; 1517 - up->errata = omap_up_info->errata; 1518 1446 1519 1447 if (omap_up_info->dma_enabled) { 1520 1448 up->uart_dma.uart_dma_tx = dma_tx->start; ··· 1542 1472 pm_runtime_irq_safe(&pdev->dev); 1543 1473 pm_runtime_enable(&pdev->dev); 1544 1474 pm_runtime_get_sync(&pdev->dev); 1475 + 1476 + omap_serial_fill_features_erratas(up); 1545 1477 1546 1478 ui[up->port.line] = up; 1547 1479 serial_omap_add_console_port(up);