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kernel os linux

MIPS: SEAD3: Probe EHCI controller using DT

Probe the SEAD3 EHCI controller using the generic-ehci driver & device
tree rather than platform code, in order to reduce the amount of the
latter.

Now that no devices probed from platform code require interrupts, remove
the retrieval of the IRQ domain & sead3int.h.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/14051/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

authored by

Paul Burton and committed by
Ralf Baechle
7afd2a5a a34e9388

+23 -81
+9
arch/mips/boot/dts/mti/sead3.dts
··· 60 60 }; 61 61 }; 62 62 63 + ehci@1b200000 { 64 + compatible = "generic-ehci"; 65 + reg = <0x1b200000 0x1000>; 66 + 67 + interrupts = <0>; /* GIC 0 or CPU 6 */ 68 + 69 + has-transaction-translator; 70 + }; 71 + 63 72 /* UART connected to FTDI & miniUSB socket */ 64 73 uart0: uart@1f000900 { 65 74 compatible = "ns16550a";
-21
arch/mips/include/asm/mips-boards/sead3int.h
··· 1 - /* 2 - * This file is subject to the terms and conditions of the GNU General Public 3 - * License. See the file "COPYING" in the main directory of this archive 4 - * for more details. 5 - * 6 - * Copyright (C) 2000,2012 MIPS Technologies, Inc. All rights reserved. 7 - * Douglas Leung <douglas@mips.com> 8 - * Steven J. Hill <sjhill@mips.com> 9 - */ 10 - #ifndef _MIPS_SEAD3INT_H 11 - #define _MIPS_SEAD3INT_H 12 - 13 - #include <linux/irqchip/mips-gic.h> 14 - 15 - /* CPU interrupt offsets */ 16 - #define CPU_INT_EHCI 2 17 - 18 - /* GIC interrupt offsets */ 19 - #define GIC_INT_EHCI GIC_SHARED_TO_HWIRQ(5) 20 - 21 - #endif /* !(_MIPS_SEAD3INT_H) */
+14 -1
arch/mips/mti-sead3/sead3-dtshim.c
··· 24 24 25 25 static int remove_gic(void *fdt) 26 26 { 27 + const unsigned int cpu_ehci_int = 2; 27 28 const unsigned int cpu_uart_int = 4; 28 29 const unsigned int cpu_eth_int = 6; 29 - int gic_off, cpu_off, uart_off, eth_off, err; 30 + int gic_off, cpu_off, uart_off, eth_off, ehci_off, err; 30 31 uint32_t cfg, cpu_phandle; 31 32 32 33 /* leave the GIC node intact if a GIC is present */ ··· 93 92 err = fdt_setprop_u32(fdt, eth_off, "interrupts", cpu_eth_int); 94 93 if (err) { 95 94 pr_err("unable to set ethernet interrupts property: %d\n", err); 95 + return err; 96 + } 97 + 98 + ehci_off = fdt_node_offset_by_compatible(fdt, -1, "mti,sead3-ehci"); 99 + if (ehci_off < 0) { 100 + pr_err("unable to find EHCI DT node: %d\n", ehci_off); 101 + return ehci_off; 102 + } 103 + 104 + err = fdt_setprop_u32(fdt, ehci_off, "interrupts", cpu_ehci_int); 105 + if (err) { 106 + pr_err("unable to set EHCI interrupts property: %d\n", err); 96 107 return err; 97 108 } 98 109
-59
arch/mips/mti-sead3/sead3-platform.c
··· 7 7 */ 8 8 #include <linux/dma-mapping.h> 9 9 #include <linux/init.h> 10 - #include <linux/irq.h> 11 - #include <linux/irqchip/mips-gic.h> 12 - #include <linux/irqdomain.h> 13 10 #include <linux/leds.h> 14 11 #include <linux/mtd/physmap.h> 15 - #include <linux/of.h> 16 12 #include <linux/platform_device.h> 17 - 18 - #include <asm/mips-boards/sead3int.h> 19 13 20 14 static struct mtd_partition sead3_mtd_partitions[] = { 21 15 { ··· 112 118 .id = -1, 113 119 }; 114 120 115 - static struct resource ehci_resources[] = { 116 - { 117 - .start = 0x1b200000, 118 - .end = 0x1b200fff, 119 - .flags = IORESOURCE_MEM 120 - }, { 121 - .flags = IORESOURCE_IRQ 122 - } 123 - }; 124 - 125 - static u64 sead3_usbdev_dma_mask = DMA_BIT_MASK(32); 126 - 127 - static struct platform_device ehci_device = { 128 - .name = "sead3-ehci", 129 - .id = 0, 130 - .dev = { 131 - .dma_mask = &sead3_usbdev_dma_mask, 132 - .coherent_dma_mask = DMA_BIT_MASK(32) 133 - }, 134 - .num_resources = ARRAY_SIZE(ehci_resources), 135 - .resource = ehci_resources 136 - }; 137 - 138 121 static struct platform_device *sead3_platform_devices[] __initdata = { 139 122 &sead3_flash, 140 123 &pled_device, 141 124 &fled_device, 142 125 &sead3_led_device, 143 - &ehci_device, 144 126 }; 145 127 146 128 static int __init sead3_platforms_device_init(void) 147 129 { 148 - const char *intc_compat; 149 - struct device_node *node; 150 - struct irq_domain *irqd; 151 - 152 - if (gic_present) 153 - intc_compat = "mti,gic"; 154 - else 155 - intc_compat = "mti,cpu-interrupt-controller"; 156 - 157 - node = of_find_compatible_node(NULL, NULL, intc_compat); 158 - if (!node) { 159 - pr_err("unable to find interrupt controller DT node\n"); 160 - return -ENODEV; 161 - } 162 - 163 - irqd = irq_find_host(node); 164 - if (!irqd) { 165 - pr_err("unable to find interrupt controller IRQ domain\n"); 166 - return -ENODEV; 167 - } 168 - 169 - if (gic_present) { 170 - ehci_resources[1].start = 171 - irq_create_mapping(irqd, GIC_INT_EHCI); 172 - } else { 173 - ehci_resources[1].start = 174 - irq_create_mapping(irqd, CPU_INT_EHCI); 175 - } 176 - 177 130 return platform_add_devices(sead3_platform_devices, 178 131 ARRAY_SIZE(sead3_platform_devices)); 179 132 }