Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'mips_6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

Pull MIPS updates from Thomas Bogendoerfer:
"Just cleanups and fixes"

* tag 'mips_6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
MIPS: Fix whitespace damage in r4k_wait from VS timer fix
mips: kvm: simplify kvm_mips_deliver_interrupts()
MIPS: alchemy: mtx1: switch to static device properties
mips: Remove __GFP_HIGHMEM masking
MIPS: ftrace: Fix memory corruption when kernel is located beyond 32 bits
MIPS: dts: Always descend vendor subdirectories
mips: configs: loongson1: Update defconfig
MIPS: Fix HOTPLUG_PARALLEL dependency

+183 -121
+1 -1
arch/mips/Kconfig
··· 658 658 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 659 659 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 660 660 select USE_OF 661 - select HOTPLUG_PARALLEL if SMP 661 + select HOTPLUG_PARALLEL if HOTPLUG_CPU 662 662 help 663 663 Select this to build a kernel supporting EyeQ SoC from Mobileye. 664 664
+129 -62
arch/mips/alchemy/board-mtx1.c
··· 9 9 #include <linux/interrupt.h> 10 10 #include <linux/kernel.h> 11 11 #include <linux/platform_device.h> 12 - #include <linux/leds.h> 13 - #include <linux/gpio.h> 14 12 #include <linux/gpio/machine.h> 15 - #include <linux/gpio_keys.h> 13 + #include <linux/gpio/property.h> 16 14 #include <linux/input.h> 17 15 #include <linux/mtd/partitions.h> 18 16 #include <linux/mtd/physmap.h> ··· 78 80 79 81 /******************************************************************************/ 80 82 81 - static struct gpio_keys_button mtx1_gpio_button[] = { 82 - { 83 - .gpio = 207, 84 - .code = BTN_0, 85 - .desc = "System button", 83 + static const struct software_node mtx1_gpiochip_node = { 84 + .name = "alchemy-gpio2", 85 + }; 86 + 87 + static const struct software_node mtx1_gpio_keys_node = { 88 + .name = "mtx1-gpio-keys", 89 + }; 90 + 91 + static const struct property_entry mtx1_button_props[] = { 92 + PROPERTY_ENTRY_U32("linux,code", BTN_0), 93 + PROPERTY_ENTRY_GPIO("gpios", &mtx1_gpiochip_node, 7, GPIO_ACTIVE_HIGH), 94 + PROPERTY_ENTRY_STRING("label", "System button"), 95 + { } 96 + }; 97 + 98 + static const struct software_node mtx1_button_node = { 99 + .parent = &mtx1_gpio_keys_node, 100 + .properties = mtx1_button_props, 101 + }; 102 + 103 + static const struct software_node *mtx1_gpio_keys_swnodes[] __initconst = { 104 + &mtx1_gpio_keys_node, 105 + &mtx1_button_node, 106 + NULL 107 + }; 108 + 109 + static void __init mtx1_keys_init(void) 110 + { 111 + struct platform_device_info keys_info = { 112 + .name = "gpio-keys", 113 + .id = PLATFORM_DEVID_NONE, 114 + }; 115 + struct platform_device *pd; 116 + int err; 117 + 118 + err = software_node_register_node_group(mtx1_gpio_keys_swnodes); 119 + if (err) { 120 + pr_err("failed to register gpio-keys software nodes: %d\n", err); 121 + return; 86 122 } 123 + 124 + keys_info.fwnode = software_node_fwnode(&mtx1_gpio_keys_node); 125 + 126 + pd = platform_device_register_full(&keys_info); 127 + err = PTR_ERR_OR_ZERO(pd); 128 + if (err) 129 + pr_err("failed to create gpio-keys device: %d\n", err); 130 + } 131 + 132 + /* Global number 215 is offset 15 on Alchemy GPIO 2 */ 133 + static const struct property_entry mtx1_wdt_props[] = { 134 + PROPERTY_ENTRY_GPIO("gpios", &mtx1_gpiochip_node, 15, GPIO_ACTIVE_HIGH), 135 + { } 87 136 }; 88 137 89 - static struct gpio_keys_platform_data mtx1_buttons_data = { 90 - .buttons = mtx1_gpio_button, 91 - .nbuttons = ARRAY_SIZE(mtx1_gpio_button), 92 - }; 93 - 94 - static struct platform_device mtx1_button = { 95 - .name = "gpio-keys", 96 - .id = -1, 97 - .dev = { 98 - .platform_data = &mtx1_buttons_data, 99 - } 100 - }; 101 - 102 - static struct gpiod_lookup_table mtx1_wdt_gpio_table = { 103 - .dev_id = "mtx1-wdt.0", 104 - .table = { 105 - /* Global number 215 is offset 15 on Alchemy GPIO 2 */ 106 - GPIO_LOOKUP("alchemy-gpio2", 15, NULL, GPIO_ACTIVE_HIGH), 107 - { }, 108 - }, 109 - }; 110 - 111 - static struct platform_device mtx1_wdt = { 138 + static struct platform_device_info mtx1_wdt_info __initconst = { 112 139 .name = "mtx1-wdt", 113 140 .id = 0, 141 + .properties = mtx1_wdt_props, 114 142 }; 115 143 116 - static const struct gpio_led default_leds[] = { 117 - { 118 - .name = "mtx1:green", 119 - .gpio = 211, 120 - }, { 121 - .name = "mtx1:red", 122 - .gpio = 212, 123 - }, 144 + static void __init mtx1_wdt_init(void) 145 + { 146 + struct platform_device *pd; 147 + int err; 148 + 149 + pd = platform_device_register_full(&mtx1_wdt_info); 150 + err = PTR_ERR_OR_ZERO(pd); 151 + if (err) 152 + pr_err("failed to create gpio-keys device: %d\n", err); 153 + } 154 + 155 + static const struct software_node mtx1_gpio_leds_node = { 156 + .name = "mtx1-leds", 124 157 }; 125 158 126 - static struct gpio_led_platform_data mtx1_led_data = { 127 - .num_leds = ARRAY_SIZE(default_leds), 128 - .leds = default_leds, 159 + static const struct property_entry mtx1_green_led_props[] = { 160 + PROPERTY_ENTRY_GPIO("gpios", &mtx1_gpiochip_node, 11, GPIO_ACTIVE_HIGH), 161 + { } 129 162 }; 130 163 131 - static struct platform_device mtx1_gpio_leds = { 132 - .name = "leds-gpio", 133 - .id = -1, 134 - .dev = { 135 - .platform_data = &mtx1_led_data, 164 + static const struct software_node mtx1_green_led_node = { 165 + .name = "mtx1:green", 166 + .parent = &mtx1_gpio_leds_node, 167 + .properties = mtx1_green_led_props, 168 + }; 169 + 170 + static const struct property_entry mtx1_red_led_props[] = { 171 + PROPERTY_ENTRY_GPIO("gpios", &mtx1_gpiochip_node, 12, GPIO_ACTIVE_HIGH), 172 + { } 173 + }; 174 + 175 + static const struct software_node mtx1_red_led_node = { 176 + .name = "mtx1:red", 177 + .parent = &mtx1_gpio_leds_node, 178 + .properties = mtx1_red_led_props, 179 + }; 180 + 181 + static const struct software_node *mtx1_gpio_leds_swnodes[] = { 182 + &mtx1_gpio_leds_node, 183 + &mtx1_green_led_node, 184 + &mtx1_red_led_node, 185 + NULL 186 + }; 187 + 188 + static void __init mtx1_leds_init(void) 189 + { 190 + struct platform_device_info led_info = { 191 + .name = "leds-gpio", 192 + .id = PLATFORM_DEVID_NONE, 193 + }; 194 + struct platform_device *led_dev; 195 + int err; 196 + 197 + err = software_node_register_node_group(mtx1_gpio_leds_swnodes); 198 + if (err) { 199 + pr_err("failed to register LED software nodes: %d\n", err); 200 + return; 136 201 } 137 - }; 202 + 203 + led_info.fwnode = software_node_fwnode(&mtx1_gpio_leds_node); 204 + 205 + led_dev = platform_device_register_full(&led_info); 206 + err = PTR_ERR_OR_ZERO(led_dev); 207 + if (err) 208 + pr_err("failed to create LED device: %d\n", err); 209 + } 138 210 139 211 static struct mtd_partition mtx1_mtd_partitions[] = { 140 212 { ··· 315 247 316 248 static struct platform_device *mtx1_devs[] __initdata = { 317 249 &mtx1_pci_host, 318 - &mtx1_gpio_leds, 319 - &mtx1_wdt, 320 - &mtx1_button, 321 250 &mtx1_mtd, 322 251 }; 323 252 ··· 335 270 336 271 au1xxx_override_eth_cfg(0, &mtx1_au1000_eth0_pdata); 337 272 338 - rc = gpio_request(mtx1_gpio_button[0].gpio, 339 - mtx1_gpio_button[0].desc); 340 - if (rc < 0) { 341 - printk(KERN_INFO "mtx1: failed to request %d\n", 342 - mtx1_gpio_button[0].gpio); 343 - goto out; 344 - } 345 - gpio_direction_input(mtx1_gpio_button[0].gpio); 346 - out: 347 - gpiod_add_lookup_table(&mtx1_wdt_gpio_table); 348 - return platform_add_devices(mtx1_devs, ARRAY_SIZE(mtx1_devs)); 273 + rc = software_node_register(&mtx1_gpiochip_node); 274 + if (rc) 275 + return rc; 276 + 277 + rc = platform_add_devices(mtx1_devs, ARRAY_SIZE(mtx1_devs)); 278 + if (rc) 279 + return rc; 280 + 281 + mtx1_leds_init(); 282 + mtx1_wdt_init(); 283 + mtx1_keys_init(); 284 + 285 + return 0; 349 286 } 350 287 arch_initcall(mtx1_register_devices);
+16 -19
arch/mips/boot/dts/Makefile
··· 1 1 # SPDX-License-Identifier: GPL-2.0 2 - subdir-$(CONFIG_BMIPS_GENERIC) += brcm 3 - subdir-$(CONFIG_CAVIUM_OCTEON_SOC) += cavium-octeon 4 - subdir-$(CONFIG_ECONET) += econet 5 - subdir-$(CONFIG_EYEQ) += mobileye 6 - subdir-$(CONFIG_FIT_IMAGE_FDT_MARDUK) += img 7 - subdir-$(CONFIG_FIT_IMAGE_FDT_BOSTON) += img 8 - subdir-$(CONFIG_MACH_INGENIC) += ingenic 9 - subdir-$(CONFIG_LANTIQ) += lantiq 10 - subdir-$(CONFIG_MACH_LOONGSON64) += loongson 11 - subdir-$(CONFIG_MACH_LOONGSON32) += loongson 12 - subdir-$(CONFIG_SOC_VCOREIII) += mscc 13 - subdir-$(CONFIG_MIPS_MALTA) += mti 14 - subdir-$(CONFIG_LEGACY_BOARD_SEAD3) += mti 15 - subdir-$(CONFIG_FIT_IMAGE_FDT_NI169445) += ni 16 - subdir-$(CONFIG_MACH_PIC32) += pic32 17 - subdir-$(CONFIG_ATH79) += qca 18 - subdir-$(CONFIG_RALINK) += ralink 19 - subdir-$(CONFIG_MACH_REALTEK_RTL) += realtek 20 - subdir-$(CONFIG_FIT_IMAGE_FDT_XILFPGA) += xilfpga 2 + subdir-y += brcm 3 + subdir-y += cavium-octeon 4 + subdir-y += econet 5 + subdir-y += mobileye 6 + subdir-y += img 7 + subdir-y += ingenic 8 + subdir-y += lantiq 9 + subdir-y += loongson 10 + subdir-y += mscc 11 + subdir-y += mti 12 + subdir-y += ni 13 + subdir-y += pic32 14 + subdir-y += qca 15 + subdir-y += ralink 16 + subdir-y += realtek 17 + subdir-y += xilfpga
+2 -2
arch/mips/boot/dts/realtek/Makefile
··· 1 1 # SPDX-License-Identifier: GPL-2.0 2 - dtb-y += cisco_sg220-26.dtb 3 - dtb-y += cameo-rtl9302c-2x-rtl8224-2xge.dtb 2 + dtb-$(CONFIG_MACH_REALTEK_RTL) += cisco_sg220-26.dtb 3 + dtb-$(CONFIG_MACH_REALTEK_RTL) += cameo-rtl9302c-2x-rtl8224-2xge.dtb
+7 -9
arch/mips/configs/loongson1_defconfig
··· 13 13 CONFIG_PERF_EVENTS=y 14 14 CONFIG_MACH_LOONGSON32=y 15 15 # CONFIG_SUSPEND is not set 16 + CONFIG_JUMP_LABEL=y 16 17 # CONFIG_SECCOMP is not set 17 18 # CONFIG_GCC_PLUGINS is not set 18 19 CONFIG_MODULES=y ··· 31 30 CONFIG_SYN_COOKIES=y 32 31 # CONFIG_INET_DIAG is not set 33 32 # CONFIG_IPV6 is not set 33 + # CONFIG_BQL is not set 34 34 # CONFIG_WIRELESS is not set 35 - # CONFIG_ETHTOOL_NETLINK is not set 36 35 CONFIG_DEVTMPFS=y 37 36 CONFIG_DEVTMPFS_MOUNT=y 38 37 # CONFIG_STANDALONE is not set ··· 40 39 CONFIG_MTD_CMDLINE_PARTS=y 41 40 CONFIG_MTD_BLOCK=y 42 41 CONFIG_MTD_RAW_NAND=y 43 - CONFIG_MTD_NAND_LOONGSON1=y 42 + CONFIG_MTD_NAND_LOONGSON=y 44 43 CONFIG_MTD_UBI=y 45 44 CONFIG_BLK_DEV_LOOP=y 46 45 CONFIG_SCSI=m ··· 73 72 # CONFIG_NET_VENDOR_MICROCHIP is not set 74 73 # CONFIG_NET_VENDOR_MICROSEMI is not set 75 74 # CONFIG_NET_VENDOR_MICROSOFT is not set 75 + # CONFIG_NET_VENDOR_MUCSE is not set 76 76 # CONFIG_NET_VENDOR_NI is not set 77 77 # CONFIG_NET_VENDOR_NATSEMI is not set 78 78 # CONFIG_NET_VENDOR_NETRONOME is not set ··· 168 166 CONFIG_NLS_CODEPAGE_437=m 169 167 CONFIG_NLS_ISO8859_1=m 170 168 # CONFIG_CRYPTO_HW is not set 171 - # CONFIG_XZ_DEC_X86 is not set 172 - # CONFIG_XZ_DEC_POWERPC is not set 173 - # CONFIG_XZ_DEC_ARM is not set 174 - # CONFIG_XZ_DEC_ARMTHUMB is not set 175 - # CONFIG_XZ_DEC_ARM64 is not set 176 - # CONFIG_XZ_DEC_SPARC is not set 177 - # CONFIG_XZ_DEC_RISCV is not set 178 169 CONFIG_DYNAMIC_DEBUG=y 179 170 # CONFIG_DEBUG_MISC is not set 180 171 CONFIG_MAGIC_SYSRQ=y 172 + # CONFIG_SLUB_DEBUG is not set 173 + # CONFIG_RCU_TRACE is not set 181 174 # CONFIG_FTRACE is not set 182 175 # CONFIG_EARLY_PRINTK is not set 176 + CONFIG_TEST_DHRY=m
+1 -2
arch/mips/include/asm/pgalloc.h
··· 81 81 static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long address) 82 82 { 83 83 pud_t *pud; 84 - struct ptdesc *ptdesc = pagetable_alloc(GFP_KERNEL & ~__GFP_HIGHMEM, 85 - PUD_TABLE_ORDER); 84 + struct ptdesc *ptdesc = pagetable_alloc(GFP_KERNEL, PUD_TABLE_ORDER); 86 85 87 86 if (!ptdesc) 88 87 return NULL;
+21 -4
arch/mips/kernel/ftrace.c
··· 54 54 u32 *buf; 55 55 unsigned int v1; 56 56 57 - /* la v1, _mcount */ 58 - v1 = 3; 59 - buf = (u32 *)&insn_la_mcount[0]; 60 - UASM_i_LA(&buf, v1, MCOUNT_ADDR); 57 + /* If we are not in compat space, the number of generated 58 + * instructions will exceed the maximum expected limit of 2. 59 + * To prevent buffer overflow, we avoid generating them. 60 + * insn_la_mcount will not be used later in ftrace_make_call. 61 + */ 62 + if (uasm_in_compat_space_p(MCOUNT_ADDR)) { 63 + /* la v1, _mcount */ 64 + v1 = 3; 65 + buf = (u32 *)&insn_la_mcount[0]; 66 + UASM_i_LA(&buf, v1, MCOUNT_ADDR); 67 + } else { 68 + pr_warn("ftrace: mcount address beyond 32 bits is not supported (%lX)\n", 69 + MCOUNT_ADDR); 70 + } 61 71 62 72 /* jal (ftrace_caller + 8), jump over the first two instruction */ 63 73 buf = (u32 *)&insn_jal_ftrace_caller; ··· 198 188 { 199 189 unsigned int new; 200 190 unsigned long ip = rec->ip; 191 + 192 + /* When the code to patch does not belong to the kernel code 193 + * space, we must use insn_la_mcount. However, if MCOUNT_ADDR 194 + * is not in compat space, insn_la_mcount is not usable. 195 + */ 196 + if (!core_kernel_text(ip) && !uasm_in_compat_space_p(MCOUNT_ADDR)) 197 + return -EFAULT; 201 198 202 199 new = core_kernel_text(ip) ? insn_jal_ftrace_caller : insn_la_mcount[0]; 203 200
+4 -4
arch/mips/kernel/genex.S
··· 109 109 .align 5 110 110 LEAF(r4k_wait) 111 111 /* Keep the ISA bit clear for calculations on local labels here. */ 112 - 0: .fill 0 112 + 0: .fill 0 113 113 /* Start of idle interrupt region. */ 114 114 local_irq_enable 115 115 /* ··· 121 121 */ 122 122 1: .fill 0 123 123 /* The R2 EI/EHB sequence takes 8 bytes, otherwise pad up. */ 124 - .if 1b - 0b > 32 124 + .if 1b - 0b > 32 125 125 .error "overlong idle interrupt region" 126 126 .elseif 1b - 0b > 8 127 127 .align 4 ··· 146 146 MFC0 k0, CP0_EPC 147 147 /* Subtract/add 2 to let the ISA bit propagate through the mask. */ 148 148 PTR_LA k1, r4k_wait_insn - 2 149 - ori k0, r4k_wait_idle_size - 2 149 + ori k0, r4k_wait_idle_size - 2 150 150 .set noreorder 151 151 bne k0, k1, \handler 152 - PTR_ADDIU k0, r4k_wait_exit - r4k_wait_insn + 2 152 + PTR_ADDIU k0, r4k_wait_exit - r4k_wait_insn + 2 153 153 .set reorder 154 154 MTC0 k0, CP0_EPC 155 155 .set pop
+2 -18
arch/mips/kvm/interrupt.c
··· 27 27 unsigned long *pending_clr = &vcpu->arch.pending_exceptions_clr; 28 28 unsigned int priority; 29 29 30 - if (!(*pending) && !(*pending_clr)) 31 - return; 32 - 33 - priority = __ffs(*pending_clr); 34 - while (priority <= MIPS_EXC_MAX) { 30 + for_each_set_bit(priority, pending_clr, MIPS_EXC_MAX + 1) 35 31 kvm_mips_callbacks->irq_clear(vcpu, priority, cause); 36 32 37 - priority = find_next_bit(pending_clr, 38 - BITS_PER_BYTE * sizeof(*pending_clr), 39 - priority + 1); 40 - } 41 - 42 - priority = __ffs(*pending); 43 - while (priority <= MIPS_EXC_MAX) { 33 + for_each_set_bit(priority, pending, MIPS_EXC_MAX + 1) 44 34 kvm_mips_callbacks->irq_deliver(vcpu, priority, cause); 45 - 46 - priority = find_next_bit(pending, 47 - BITS_PER_BYTE * sizeof(*pending), 48 - priority + 1); 49 - } 50 - 51 35 } 52 36 53 37 int kvm_mips_pending_timer(struct kvm_vcpu *vcpu)