tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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spi: Convert to SPI_CONTROLLER_HALF_DUPLEX

Convert the users under SPI subsystem to SPI_CONTROLLER_HALF_DUPLEX.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230710154932.68377-15-andriy.shevchenko@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>

authored by

Andy Shevchenko and committed by
Mark Brown 7a2b552c 82238d2c

+12 -12
+1 -1
drivers/spi/spi-amd.c
··· 404 404 master->bus_num = 0; 405 405 master->num_chipselect = 4; 406 406 master->mode_bits = 0; 407 - master->flags = SPI_MASTER_HALF_DUPLEX; 407 + master->flags = SPI_CONTROLLER_HALF_DUPLEX; 408 408 master->max_speed_hz = AMD_SPI_MAX_HZ; 409 409 master->min_speed_hz = AMD_SPI_MIN_HZ; 410 410 master->setup = amd_spi_master_setup;
+1 -1
drivers/spi/spi-cavium-thunderx.c
··· 64 64 p->sys_freq = SYS_FREQ_DEFAULT; 65 65 dev_info(dev, "Set system clock to %u\n", p->sys_freq); 66 66 67 - master->flags = SPI_MASTER_HALF_DUPLEX; 67 + master->flags = SPI_CONTROLLER_HALF_DUPLEX; 68 68 master->num_chipselect = 4; 69 69 master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_CS_HIGH | 70 70 SPI_LSB_FIRST | SPI_3WIRE;
+1 -1
drivers/spi/spi-falcon.c
··· 401 401 priv->master = master; 402 402 403 403 master->mode_bits = SPI_MODE_3; 404 - master->flags = SPI_MASTER_HALF_DUPLEX; 404 + master->flags = SPI_CONTROLLER_HALF_DUPLEX; 405 405 master->setup = falcon_sflash_setup; 406 406 master->transfer_one_message = falcon_sflash_xfer_one; 407 407 master->dev.of_node = pdev->dev.of_node;
+1 -1
drivers/spi/spi-lp8841-rtc.c
··· 191 191 return -ENOMEM; 192 192 platform_set_drvdata(pdev, master); 193 193 194 - master->flags = SPI_MASTER_HALF_DUPLEX; 194 + master->flags = SPI_CONTROLLER_HALF_DUPLEX; 195 195 master->mode_bits = SPI_CS_HIGH | SPI_3WIRE | SPI_LSB_FIRST; 196 196 197 197 master->bus_num = pdev->id;
+1 -1
drivers/spi/spi-mxs.c
··· 572 572 master->mode_bits = SPI_CPOL | SPI_CPHA; 573 573 master->num_chipselect = 3; 574 574 master->dev.of_node = np; 575 - master->flags = SPI_MASTER_HALF_DUPLEX; 575 + master->flags = SPI_CONTROLLER_HALF_DUPLEX; 576 576 master->auto_runtime_pm = true; 577 577 578 578 spi = spi_master_get_devdata(master);
+1 -1
drivers/spi/spi-omap-uwire.c
··· 486 486 /* the spi->mode bits understood by this driver: */ 487 487 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; 488 488 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16); 489 - master->flags = SPI_MASTER_HALF_DUPLEX; 489 + master->flags = SPI_CONTROLLER_HALF_DUPLEX; 490 490 491 491 master->bus_num = 2; /* "official" */ 492 492 master->num_chipselect = 4;
+1 -1
drivers/spi/spi-pic32-sqi.c
··· 648 648 master->dev.of_node = pdev->dev.of_node; 649 649 master->mode_bits = SPI_MODE_3 | SPI_MODE_0 | SPI_TX_DUAL | 650 650 SPI_RX_DUAL | SPI_TX_QUAD | SPI_RX_QUAD; 651 - master->flags = SPI_MASTER_HALF_DUPLEX; 651 + master->flags = SPI_CONTROLLER_HALF_DUPLEX; 652 652 master->can_dma = pic32_sqi_can_dma; 653 653 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32); 654 654 master->transfer_one_message = pic32_sqi_one_message;
+1 -1
drivers/spi/spi-qcom-qspi.c
··· 724 724 master->mode_bits = SPI_MODE_0 | 725 725 SPI_TX_DUAL | SPI_RX_DUAL | 726 726 SPI_TX_QUAD | SPI_RX_QUAD; 727 - master->flags = SPI_MASTER_HALF_DUPLEX; 727 + master->flags = SPI_CONTROLLER_HALF_DUPLEX; 728 728 master->prepare_message = qcom_qspi_prepare_message; 729 729 master->transfer_one = qcom_qspi_transfer_one; 730 730 master->handle_err = qcom_qspi_handle_err;
+1 -1
drivers/spi/spi-rockchip-sfc.c
··· 565 565 if (!master) 566 566 return -ENOMEM; 567 567 568 - master->flags = SPI_MASTER_HALF_DUPLEX; 568 + master->flags = SPI_CONTROLLER_HALF_DUPLEX; 569 569 master->mem_ops = &rockchip_sfc_mem_ops; 570 570 master->dev.of_node = pdev->dev.of_node; 571 571 master->mode_bits = SPI_TX_QUAD | SPI_TX_DUAL | SPI_RX_QUAD | SPI_RX_DUAL;
+1 -1
drivers/spi/spi-sprd-adi.c
··· 580 580 ctlr->dev.of_node = pdev->dev.of_node; 581 581 ctlr->bus_num = pdev->id; 582 582 ctlr->num_chipselect = num_chipselect; 583 - ctlr->flags = SPI_MASTER_HALF_DUPLEX; 583 + ctlr->flags = SPI_CONTROLLER_HALF_DUPLEX; 584 584 ctlr->bits_per_word_mask = 0; 585 585 ctlr->transfer_one = sprd_adi_transfer_one; 586 586
+1 -1
drivers/spi/spi-ti-qspi.c
··· 770 770 771 771 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_RX_DUAL | SPI_RX_QUAD; 772 772 773 - master->flags = SPI_MASTER_HALF_DUPLEX; 773 + master->flags = SPI_CONTROLLER_HALF_DUPLEX; 774 774 master->setup = ti_qspi_setup; 775 775 master->auto_runtime_pm = true; 776 776 master->transfer_one_message = ti_qspi_start_transfer_one;
+1 -1
drivers/spi/spi-xcomm.c
··· 218 218 master->num_chipselect = 16; 219 219 master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_3WIRE; 220 220 master->bits_per_word_mask = SPI_BPW_MASK(8); 221 - master->flags = SPI_MASTER_HALF_DUPLEX; 221 + master->flags = SPI_CONTROLLER_HALF_DUPLEX; 222 222 master->transfer_one_message = spi_xcomm_transfer_one; 223 223 master->dev.of_node = i2c->dev.of_node; 224 224 i2c_set_clientdata(i2c, master);