+4
-4
arch/x86/kvm/lapic.c
+4
-4
arch/x86/kvm/lapic.c
···
1350
1350
return;
1351
1351
}
1352
1352
1353
+
if (!kvm_vcpu_is_bsp(apic->vcpu))
1354
+
value &= ~MSR_IA32_APICBASE_BSP;
1355
+
vcpu->arch.apic_base = value;
1356
+
1353
1357
/* update jump label if enable bit changes */
1354
1358
if ((vcpu->arch.apic_base ^ value) & MSR_IA32_APICBASE_ENABLE) {
1355
1359
if (value & MSR_IA32_APICBASE_ENABLE)
···
1363
1359
recalculate_apic_map(vcpu->kvm);
1364
1360
}
1365
1361
1366
-
if (!kvm_vcpu_is_bsp(apic->vcpu))
1367
-
value &= ~MSR_IA32_APICBASE_BSP;
1368
-
1369
-
vcpu->arch.apic_base = value;
1370
1362
if ((old_value ^ value) & X2APIC_ENABLE) {
1371
1363
if (value & X2APIC_ENABLE) {
1372
1364
u32 id = kvm_apic_id(apic);
+1
-2
arch/x86/kvm/vmx.c
+1
-2
arch/x86/kvm/vmx.c
···
8283
8283
vcpu->arch.cr4_guest_owned_bits = ~vmcs_readl(CR4_GUEST_HOST_MASK);
8284
8284
kvm_set_cr4(vcpu, vmcs12->host_cr4);
8285
8285
8286
-
if (nested_cpu_has_ept(vmcs12))
8287
-
nested_ept_uninit_mmu_context(vcpu);
8286
+
nested_ept_uninit_mmu_context(vcpu);
8288
8287
8289
8288
kvm_set_cr3(vcpu, vmcs12->host_cr3);
8290
8289
kvm_mmu_reset_context(vcpu);