Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

[media] coda: move BIT specific functions into separate file

This patch moves the BIT processor specific coda_context_ops, the firmware
upload and other related functions from coda-common.c into coda-bit.c.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Kamil Debski <k.debski@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>

authored by

Philipp Zabel and committed by
Mauro Carvalho Chehab
79924ca9 4f4ee9ee

+1880 -1819
+1 -1
drivers/media/platform/coda/Makefile
··· 1 - coda-objs := coda-common.o coda-h264.o 1 + coda-objs := coda-common.o coda-bit.o coda-h264.o 2 2 3 3 obj-$(CONFIG_VIDEO_CODA) += coda.o
+1810
drivers/media/platform/coda/coda-bit.c
··· 1 + /* 2 + * Coda multi-standard codec IP - BIT processor functions 3 + * 4 + * Copyright (C) 2012 Vista Silicon S.L. 5 + * Javier Martin, <javier.martin@vista-silicon.com> 6 + * Xavier Duret 7 + * Copyright (C) 2012-2014 Philipp Zabel, Pengutronix 8 + * 9 + * This program is free software; you can redistribute it and/or modify 10 + * it under the terms of the GNU General Public License as published by 11 + * the Free Software Foundation; either version 2 of the License, or 12 + * (at your option) any later version. 13 + */ 14 + 15 + #include <linux/clk.h> 16 + #include <linux/irqreturn.h> 17 + #include <linux/kernel.h> 18 + #include <linux/platform_device.h> 19 + #include <linux/reset.h> 20 + #include <linux/videodev2.h> 21 + 22 + #include <media/v4l2-common.h> 23 + #include <media/v4l2-ctrls.h> 24 + #include <media/v4l2-fh.h> 25 + #include <media/v4l2-mem2mem.h> 26 + #include <media/videobuf2-core.h> 27 + #include <media/videobuf2-dma-contig.h> 28 + #include <media/videobuf2-vmalloc.h> 29 + 30 + #include "coda.h" 31 + 32 + #define CODA7_PS_BUF_SIZE 0x28000 33 + #define CODA9_PS_SAVE_SIZE (512 * 1024) 34 + 35 + #define CODA_DEFAULT_GAMMA 4096 36 + #define CODA9_DEFAULT_GAMMA 24576 /* 0.75 * 32768 */ 37 + 38 + static inline int coda_is_initialized(struct coda_dev *dev) 39 + { 40 + return (coda_read(dev, CODA_REG_BIT_CUR_PC) != 0); 41 + } 42 + 43 + static inline unsigned long coda_isbusy(struct coda_dev *dev) 44 + { 45 + return coda_read(dev, CODA_REG_BIT_BUSY); 46 + } 47 + 48 + static int coda_wait_timeout(struct coda_dev *dev) 49 + { 50 + unsigned long timeout = jiffies + msecs_to_jiffies(1000); 51 + 52 + while (coda_isbusy(dev)) { 53 + if (time_after(jiffies, timeout)) 54 + return -ETIMEDOUT; 55 + } 56 + return 0; 57 + } 58 + 59 + static void coda_command_async(struct coda_ctx *ctx, int cmd) 60 + { 61 + struct coda_dev *dev = ctx->dev; 62 + 63 + if (dev->devtype->product == CODA_960 || 64 + dev->devtype->product == CODA_7541) { 65 + /* Restore context related registers to CODA */ 66 + coda_write(dev, ctx->bit_stream_param, 67 + CODA_REG_BIT_BIT_STREAM_PARAM); 68 + coda_write(dev, ctx->frm_dis_flg, 69 + CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx)); 70 + coda_write(dev, ctx->frame_mem_ctrl, 71 + CODA_REG_BIT_FRAME_MEM_CTRL); 72 + coda_write(dev, ctx->workbuf.paddr, CODA_REG_BIT_WORK_BUF_ADDR); 73 + } 74 + 75 + if (dev->devtype->product == CODA_960) { 76 + coda_write(dev, 1, CODA9_GDI_WPROT_ERR_CLR); 77 + coda_write(dev, 0, CODA9_GDI_WPROT_RGN_EN); 78 + } 79 + 80 + coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY); 81 + 82 + coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX); 83 + coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD); 84 + coda_write(dev, ctx->params.codec_mode_aux, CODA7_REG_BIT_RUN_AUX_STD); 85 + 86 + coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND); 87 + } 88 + 89 + static int coda_command_sync(struct coda_ctx *ctx, int cmd) 90 + { 91 + struct coda_dev *dev = ctx->dev; 92 + 93 + coda_command_async(ctx, cmd); 94 + return coda_wait_timeout(dev); 95 + } 96 + 97 + int coda_hw_reset(struct coda_ctx *ctx) 98 + { 99 + struct coda_dev *dev = ctx->dev; 100 + unsigned long timeout; 101 + unsigned int idx; 102 + int ret; 103 + 104 + if (!dev->rstc) 105 + return -ENOENT; 106 + 107 + idx = coda_read(dev, CODA_REG_BIT_RUN_INDEX); 108 + 109 + if (dev->devtype->product == CODA_960) { 110 + timeout = jiffies + msecs_to_jiffies(100); 111 + coda_write(dev, 0x11, CODA9_GDI_BUS_CTRL); 112 + while (coda_read(dev, CODA9_GDI_BUS_STATUS) != 0x77) { 113 + if (time_after(jiffies, timeout)) 114 + return -ETIME; 115 + cpu_relax(); 116 + } 117 + } 118 + 119 + ret = reset_control_reset(dev->rstc); 120 + if (ret < 0) 121 + return ret; 122 + 123 + if (dev->devtype->product == CODA_960) 124 + coda_write(dev, 0x00, CODA9_GDI_BUS_CTRL); 125 + coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY); 126 + coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN); 127 + ret = coda_wait_timeout(dev); 128 + coda_write(dev, idx, CODA_REG_BIT_RUN_INDEX); 129 + 130 + return ret; 131 + } 132 + 133 + static void coda_kfifo_sync_from_device(struct coda_ctx *ctx) 134 + { 135 + struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo; 136 + struct coda_dev *dev = ctx->dev; 137 + u32 rd_ptr; 138 + 139 + rd_ptr = coda_read(dev, CODA_REG_BIT_RD_PTR(ctx->reg_idx)); 140 + kfifo->out = (kfifo->in & ~kfifo->mask) | 141 + (rd_ptr - ctx->bitstream.paddr); 142 + if (kfifo->out > kfifo->in) 143 + kfifo->out -= kfifo->mask + 1; 144 + } 145 + 146 + static void coda_kfifo_sync_to_device_full(struct coda_ctx *ctx) 147 + { 148 + struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo; 149 + struct coda_dev *dev = ctx->dev; 150 + u32 rd_ptr, wr_ptr; 151 + 152 + rd_ptr = ctx->bitstream.paddr + (kfifo->out & kfifo->mask); 153 + coda_write(dev, rd_ptr, CODA_REG_BIT_RD_PTR(ctx->reg_idx)); 154 + wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask); 155 + coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx)); 156 + } 157 + 158 + static void coda_kfifo_sync_to_device_write(struct coda_ctx *ctx) 159 + { 160 + struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo; 161 + struct coda_dev *dev = ctx->dev; 162 + u32 wr_ptr; 163 + 164 + wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask); 165 + coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx)); 166 + } 167 + 168 + static int coda_bitstream_queue(struct coda_ctx *ctx, struct vb2_buffer *src_buf) 169 + { 170 + u32 src_size = vb2_get_plane_payload(src_buf, 0); 171 + u32 n; 172 + 173 + n = kfifo_in(&ctx->bitstream_fifo, vb2_plane_vaddr(src_buf, 0), src_size); 174 + if (n < src_size) 175 + return -ENOSPC; 176 + 177 + dma_sync_single_for_device(&ctx->dev->plat_dev->dev, ctx->bitstream.paddr, 178 + ctx->bitstream.size, DMA_TO_DEVICE); 179 + 180 + src_buf->v4l2_buf.sequence = ctx->qsequence++; 181 + 182 + return 0; 183 + } 184 + 185 + static bool coda_bitstream_try_queue(struct coda_ctx *ctx, 186 + struct vb2_buffer *src_buf) 187 + { 188 + int ret; 189 + 190 + if (coda_get_bitstream_payload(ctx) + 191 + vb2_get_plane_payload(src_buf, 0) + 512 >= ctx->bitstream.size) 192 + return false; 193 + 194 + if (vb2_plane_vaddr(src_buf, 0) == NULL) { 195 + v4l2_err(&ctx->dev->v4l2_dev, "trying to queue empty buffer\n"); 196 + return true; 197 + } 198 + 199 + ret = coda_bitstream_queue(ctx, src_buf); 200 + if (ret < 0) { 201 + v4l2_err(&ctx->dev->v4l2_dev, "bitstream buffer overflow\n"); 202 + return false; 203 + } 204 + /* Sync read pointer to device */ 205 + if (ctx == v4l2_m2m_get_curr_priv(ctx->dev->m2m_dev)) 206 + coda_kfifo_sync_to_device_write(ctx); 207 + 208 + ctx->hold = false; 209 + 210 + return true; 211 + } 212 + 213 + void coda_fill_bitstream(struct coda_ctx *ctx) 214 + { 215 + struct vb2_buffer *src_buf; 216 + struct coda_timestamp *ts; 217 + 218 + while (v4l2_m2m_num_src_bufs_ready(ctx->fh.m2m_ctx) > 0) { 219 + src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); 220 + 221 + if (coda_bitstream_try_queue(ctx, src_buf)) { 222 + /* 223 + * Source buffer is queued in the bitstream ringbuffer; 224 + * queue the timestamp and mark source buffer as done 225 + */ 226 + src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); 227 + 228 + ts = kmalloc(sizeof(*ts), GFP_KERNEL); 229 + if (ts) { 230 + ts->sequence = src_buf->v4l2_buf.sequence; 231 + ts->timecode = src_buf->v4l2_buf.timecode; 232 + ts->timestamp = src_buf->v4l2_buf.timestamp; 233 + list_add_tail(&ts->list, &ctx->timestamp_list); 234 + } 235 + 236 + v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE); 237 + } else { 238 + break; 239 + } 240 + } 241 + } 242 + 243 + void coda_bit_stream_end_flag(struct coda_ctx *ctx) 244 + { 245 + struct coda_dev *dev = ctx->dev; 246 + 247 + ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG; 248 + 249 + if ((dev->devtype->product == CODA_960) && 250 + coda_isbusy(dev) && 251 + (ctx->idx == coda_read(dev, CODA_REG_BIT_RUN_INDEX))) { 252 + /* If this context is currently running, update the hardware flag */ 253 + coda_write(dev, ctx->bit_stream_param, CODA_REG_BIT_BIT_STREAM_PARAM); 254 + } 255 + } 256 + 257 + static void coda_parabuf_write(struct coda_ctx *ctx, int index, u32 value) 258 + { 259 + struct coda_dev *dev = ctx->dev; 260 + u32 *p = ctx->parabuf.vaddr; 261 + 262 + if (dev->devtype->product == CODA_DX6) 263 + p[index] = value; 264 + else 265 + p[index ^ 1] = value; 266 + } 267 + 268 + static void coda_free_framebuffers(struct coda_ctx *ctx) 269 + { 270 + int i; 271 + 272 + for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++) 273 + coda_free_aux_buf(ctx->dev, &ctx->internal_frames[i]); 274 + } 275 + 276 + static int coda_alloc_framebuffers(struct coda_ctx *ctx, 277 + struct coda_q_data *q_data, u32 fourcc) 278 + { 279 + struct coda_dev *dev = ctx->dev; 280 + int width, height; 281 + dma_addr_t paddr; 282 + int ysize; 283 + int ret; 284 + int i; 285 + 286 + if (ctx->codec && (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 || 287 + ctx->codec->dst_fourcc == V4L2_PIX_FMT_H264)) { 288 + width = round_up(q_data->width, 16); 289 + height = round_up(q_data->height, 16); 290 + } else { 291 + width = round_up(q_data->width, 8); 292 + height = q_data->height; 293 + } 294 + ysize = width * height; 295 + 296 + /* Allocate frame buffers */ 297 + for (i = 0; i < ctx->num_internal_frames; i++) { 298 + size_t size; 299 + char *name; 300 + 301 + size = ysize + ysize / 2; 302 + if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 && 303 + dev->devtype->product != CODA_DX6) 304 + size += ysize / 4; 305 + name = kasprintf(GFP_KERNEL, "fb%d", i); 306 + ret = coda_alloc_context_buf(ctx, &ctx->internal_frames[i], 307 + size, name); 308 + kfree(name); 309 + if (ret < 0) { 310 + coda_free_framebuffers(ctx); 311 + return ret; 312 + } 313 + } 314 + 315 + /* Register frame buffers in the parameter buffer */ 316 + for (i = 0; i < ctx->num_internal_frames; i++) { 317 + paddr = ctx->internal_frames[i].paddr; 318 + coda_parabuf_write(ctx, i * 3 + 0, paddr); /* Y */ 319 + coda_parabuf_write(ctx, i * 3 + 1, paddr + ysize); /* Cb */ 320 + coda_parabuf_write(ctx, i * 3 + 2, paddr + ysize + ysize/4); /* Cr */ 321 + 322 + /* mvcol buffer for h.264 */ 323 + if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 && 324 + dev->devtype->product != CODA_DX6) 325 + coda_parabuf_write(ctx, 96 + i, 326 + ctx->internal_frames[i].paddr + 327 + ysize + ysize/4 + ysize/4); 328 + } 329 + 330 + /* mvcol buffer for mpeg4 */ 331 + if ((dev->devtype->product != CODA_DX6) && 332 + (ctx->codec->src_fourcc == V4L2_PIX_FMT_MPEG4)) 333 + coda_parabuf_write(ctx, 97, ctx->internal_frames[i].paddr + 334 + ysize + ysize/4 + ysize/4); 335 + 336 + return 0; 337 + } 338 + 339 + static void coda_free_context_buffers(struct coda_ctx *ctx) 340 + { 341 + struct coda_dev *dev = ctx->dev; 342 + 343 + coda_free_aux_buf(dev, &ctx->slicebuf); 344 + coda_free_aux_buf(dev, &ctx->psbuf); 345 + if (dev->devtype->product != CODA_DX6) 346 + coda_free_aux_buf(dev, &ctx->workbuf); 347 + } 348 + 349 + static int coda_alloc_context_buffers(struct coda_ctx *ctx, 350 + struct coda_q_data *q_data) 351 + { 352 + struct coda_dev *dev = ctx->dev; 353 + size_t size; 354 + int ret; 355 + 356 + if (dev->devtype->product == CODA_DX6) 357 + return 0; 358 + 359 + if (ctx->psbuf.vaddr) { 360 + v4l2_err(&dev->v4l2_dev, "psmembuf still allocated\n"); 361 + return -EBUSY; 362 + } 363 + if (ctx->slicebuf.vaddr) { 364 + v4l2_err(&dev->v4l2_dev, "slicebuf still allocated\n"); 365 + return -EBUSY; 366 + } 367 + if (ctx->workbuf.vaddr) { 368 + v4l2_err(&dev->v4l2_dev, "context buffer still allocated\n"); 369 + ret = -EBUSY; 370 + return -ENOMEM; 371 + } 372 + 373 + if (q_data->fourcc == V4L2_PIX_FMT_H264) { 374 + /* worst case slice size */ 375 + size = (DIV_ROUND_UP(q_data->width, 16) * 376 + DIV_ROUND_UP(q_data->height, 16)) * 3200 / 8 + 512; 377 + ret = coda_alloc_context_buf(ctx, &ctx->slicebuf, size, "slicebuf"); 378 + if (ret < 0) { 379 + v4l2_err(&dev->v4l2_dev, "failed to allocate %d byte slice buffer", 380 + ctx->slicebuf.size); 381 + return ret; 382 + } 383 + } 384 + 385 + if (dev->devtype->product == CODA_7541) { 386 + ret = coda_alloc_context_buf(ctx, &ctx->psbuf, CODA7_PS_BUF_SIZE, "psbuf"); 387 + if (ret < 0) { 388 + v4l2_err(&dev->v4l2_dev, "failed to allocate psmem buffer"); 389 + goto err; 390 + } 391 + } 392 + 393 + size = dev->devtype->workbuf_size; 394 + if (dev->devtype->product == CODA_960 && 395 + q_data->fourcc == V4L2_PIX_FMT_H264) 396 + size += CODA9_PS_SAVE_SIZE; 397 + ret = coda_alloc_context_buf(ctx, &ctx->workbuf, size, "workbuf"); 398 + if (ret < 0) { 399 + v4l2_err(&dev->v4l2_dev, "failed to allocate %d byte context buffer", 400 + ctx->workbuf.size); 401 + goto err; 402 + } 403 + 404 + return 0; 405 + 406 + err: 407 + coda_free_context_buffers(ctx); 408 + return ret; 409 + } 410 + 411 + static int coda_encode_header(struct coda_ctx *ctx, struct vb2_buffer *buf, 412 + int header_code, u8 *header, int *size) 413 + { 414 + struct coda_dev *dev = ctx->dev; 415 + size_t bufsize; 416 + int ret; 417 + int i; 418 + 419 + if (dev->devtype->product == CODA_960) 420 + memset(vb2_plane_vaddr(buf, 0), 0, 64); 421 + 422 + coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), 423 + CODA_CMD_ENC_HEADER_BB_START); 424 + bufsize = vb2_plane_size(buf, 0); 425 + if (dev->devtype->product == CODA_960) 426 + bufsize /= 1024; 427 + coda_write(dev, bufsize, CODA_CMD_ENC_HEADER_BB_SIZE); 428 + coda_write(dev, header_code, CODA_CMD_ENC_HEADER_CODE); 429 + ret = coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER); 430 + if (ret < 0) { 431 + v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n"); 432 + return ret; 433 + } 434 + 435 + if (dev->devtype->product == CODA_960) { 436 + for (i = 63; i > 0; i--) 437 + if (((char *)vb2_plane_vaddr(buf, 0))[i] != 0) 438 + break; 439 + *size = i + 1; 440 + } else { 441 + *size = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx)) - 442 + coda_read(dev, CODA_CMD_ENC_HEADER_BB_START); 443 + } 444 + memcpy(header, vb2_plane_vaddr(buf, 0), *size); 445 + 446 + return 0; 447 + } 448 + 449 + static phys_addr_t coda_iram_alloc(struct coda_iram_info *iram, size_t size) 450 + { 451 + phys_addr_t ret; 452 + 453 + size = round_up(size, 1024); 454 + if (size > iram->remaining) 455 + return 0; 456 + iram->remaining -= size; 457 + 458 + ret = iram->next_paddr; 459 + iram->next_paddr += size; 460 + 461 + return ret; 462 + } 463 + 464 + static void coda_setup_iram(struct coda_ctx *ctx) 465 + { 466 + struct coda_iram_info *iram_info = &ctx->iram_info; 467 + struct coda_dev *dev = ctx->dev; 468 + int mb_width; 469 + int dbk_bits; 470 + int bit_bits; 471 + int ip_bits; 472 + 473 + memset(iram_info, 0, sizeof(*iram_info)); 474 + iram_info->next_paddr = dev->iram.paddr; 475 + iram_info->remaining = dev->iram.size; 476 + 477 + switch (dev->devtype->product) { 478 + case CODA_7541: 479 + dbk_bits = CODA7_USE_HOST_DBK_ENABLE | CODA7_USE_DBK_ENABLE; 480 + bit_bits = CODA7_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE; 481 + ip_bits = CODA7_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE; 482 + break; 483 + case CODA_960: 484 + dbk_bits = CODA9_USE_HOST_DBK_ENABLE | CODA9_USE_DBK_ENABLE; 485 + bit_bits = CODA9_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE; 486 + ip_bits = CODA9_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE; 487 + break; 488 + default: /* CODA_DX6 */ 489 + return; 490 + } 491 + 492 + if (ctx->inst_type == CODA_INST_ENCODER) { 493 + struct coda_q_data *q_data_src; 494 + 495 + q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT); 496 + mb_width = DIV_ROUND_UP(q_data_src->width, 16); 497 + 498 + /* Prioritize in case IRAM is too small for everything */ 499 + if (dev->devtype->product == CODA_7541) { 500 + iram_info->search_ram_size = round_up(mb_width * 16 * 501 + 36 + 2048, 1024); 502 + iram_info->search_ram_paddr = coda_iram_alloc(iram_info, 503 + iram_info->search_ram_size); 504 + if (!iram_info->search_ram_paddr) { 505 + pr_err("IRAM is smaller than the search ram size\n"); 506 + goto out; 507 + } 508 + iram_info->axi_sram_use |= CODA7_USE_HOST_ME_ENABLE | 509 + CODA7_USE_ME_ENABLE; 510 + } 511 + 512 + /* Only H.264BP and H.263P3 are considered */ 513 + iram_info->buf_dbk_y_use = coda_iram_alloc(iram_info, 64 * mb_width); 514 + iram_info->buf_dbk_c_use = coda_iram_alloc(iram_info, 64 * mb_width); 515 + if (!iram_info->buf_dbk_c_use) 516 + goto out; 517 + iram_info->axi_sram_use |= dbk_bits; 518 + 519 + iram_info->buf_bit_use = coda_iram_alloc(iram_info, 128 * mb_width); 520 + if (!iram_info->buf_bit_use) 521 + goto out; 522 + iram_info->axi_sram_use |= bit_bits; 523 + 524 + iram_info->buf_ip_ac_dc_use = coda_iram_alloc(iram_info, 128 * mb_width); 525 + if (!iram_info->buf_ip_ac_dc_use) 526 + goto out; 527 + iram_info->axi_sram_use |= ip_bits; 528 + 529 + /* OVL and BTP disabled for encoder */ 530 + } else if (ctx->inst_type == CODA_INST_DECODER) { 531 + struct coda_q_data *q_data_dst; 532 + 533 + q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE); 534 + mb_width = DIV_ROUND_UP(q_data_dst->width, 16); 535 + 536 + iram_info->buf_dbk_y_use = coda_iram_alloc(iram_info, 128 * mb_width); 537 + iram_info->buf_dbk_c_use = coda_iram_alloc(iram_info, 128 * mb_width); 538 + if (!iram_info->buf_dbk_c_use) 539 + goto out; 540 + iram_info->axi_sram_use |= dbk_bits; 541 + 542 + iram_info->buf_bit_use = coda_iram_alloc(iram_info, 128 * mb_width); 543 + if (!iram_info->buf_bit_use) 544 + goto out; 545 + iram_info->axi_sram_use |= bit_bits; 546 + 547 + iram_info->buf_ip_ac_dc_use = coda_iram_alloc(iram_info, 128 * mb_width); 548 + if (!iram_info->buf_ip_ac_dc_use) 549 + goto out; 550 + iram_info->axi_sram_use |= ip_bits; 551 + 552 + /* OVL and BTP unused as there is no VC1 support yet */ 553 + } 554 + 555 + out: 556 + if (!(iram_info->axi_sram_use & CODA7_USE_HOST_IP_ENABLE)) 557 + v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, 558 + "IRAM smaller than needed\n"); 559 + 560 + if (dev->devtype->product == CODA_7541) { 561 + /* TODO - Enabling these causes picture errors on CODA7541 */ 562 + if (ctx->inst_type == CODA_INST_DECODER) { 563 + /* fw 1.4.50 */ 564 + iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE | 565 + CODA7_USE_IP_ENABLE); 566 + } else { 567 + /* fw 13.4.29 */ 568 + iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE | 569 + CODA7_USE_HOST_DBK_ENABLE | 570 + CODA7_USE_IP_ENABLE | 571 + CODA7_USE_DBK_ENABLE); 572 + } 573 + } 574 + } 575 + 576 + static u32 coda_supported_firmwares[] = { 577 + CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5), 578 + CODA_FIRMWARE_VERNUM(CODA_7541, 1, 4, 50), 579 + CODA_FIRMWARE_VERNUM(CODA_960, 2, 1, 5), 580 + }; 581 + 582 + static bool coda_firmware_supported(u32 vernum) 583 + { 584 + int i; 585 + 586 + for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++) 587 + if (vernum == coda_supported_firmwares[i]) 588 + return true; 589 + return false; 590 + } 591 + 592 + int coda_check_firmware(struct coda_dev *dev) 593 + { 594 + u16 product, major, minor, release; 595 + u32 data; 596 + int ret; 597 + 598 + ret = clk_prepare_enable(dev->clk_per); 599 + if (ret) 600 + goto err_clk_per; 601 + 602 + ret = clk_prepare_enable(dev->clk_ahb); 603 + if (ret) 604 + goto err_clk_ahb; 605 + 606 + coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM); 607 + coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY); 608 + coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX); 609 + coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD); 610 + coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND); 611 + if (coda_wait_timeout(dev)) { 612 + v4l2_err(&dev->v4l2_dev, "firmware get command error\n"); 613 + ret = -EIO; 614 + goto err_run_cmd; 615 + } 616 + 617 + if (dev->devtype->product == CODA_960) { 618 + data = coda_read(dev, CODA9_CMD_FIRMWARE_CODE_REV); 619 + v4l2_info(&dev->v4l2_dev, "Firmware code revision: %d\n", 620 + data); 621 + } 622 + 623 + /* Check we are compatible with the loaded firmware */ 624 + data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM); 625 + product = CODA_FIRMWARE_PRODUCT(data); 626 + major = CODA_FIRMWARE_MAJOR(data); 627 + minor = CODA_FIRMWARE_MINOR(data); 628 + release = CODA_FIRMWARE_RELEASE(data); 629 + 630 + clk_disable_unprepare(dev->clk_per); 631 + clk_disable_unprepare(dev->clk_ahb); 632 + 633 + if (product != dev->devtype->product) { 634 + v4l2_err(&dev->v4l2_dev, "Wrong firmware. Hw: %s, Fw: %s," 635 + " Version: %u.%u.%u\n", 636 + coda_product_name(dev->devtype->product), 637 + coda_product_name(product), major, minor, release); 638 + return -EINVAL; 639 + } 640 + 641 + v4l2_info(&dev->v4l2_dev, "Initialized %s.\n", 642 + coda_product_name(product)); 643 + 644 + if (coda_firmware_supported(data)) { 645 + v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n", 646 + major, minor, release); 647 + } else { 648 + v4l2_warn(&dev->v4l2_dev, "Unsupported firmware version: " 649 + "%u.%u.%u\n", major, minor, release); 650 + } 651 + 652 + return 0; 653 + 654 + err_run_cmd: 655 + clk_disable_unprepare(dev->clk_ahb); 656 + err_clk_ahb: 657 + clk_disable_unprepare(dev->clk_per); 658 + err_clk_per: 659 + return ret; 660 + } 661 + 662 + /* 663 + * Encoder context operations 664 + */ 665 + 666 + static int coda_start_encoding(struct coda_ctx *ctx) 667 + { 668 + struct coda_dev *dev = ctx->dev; 669 + struct v4l2_device *v4l2_dev = &dev->v4l2_dev; 670 + struct coda_q_data *q_data_src, *q_data_dst; 671 + u32 bitstream_buf, bitstream_size; 672 + struct vb2_buffer *buf; 673 + int gamma, ret, value; 674 + u32 dst_fourcc; 675 + 676 + q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT); 677 + q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE); 678 + dst_fourcc = q_data_dst->fourcc; 679 + 680 + /* Allocate per-instance buffers */ 681 + ret = coda_alloc_context_buffers(ctx, q_data_src); 682 + if (ret < 0) 683 + return ret; 684 + 685 + buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); 686 + bitstream_buf = vb2_dma_contig_plane_dma_addr(buf, 0); 687 + bitstream_size = q_data_dst->sizeimage; 688 + 689 + if (!coda_is_initialized(dev)) { 690 + v4l2_err(v4l2_dev, "coda is not initialized.\n"); 691 + return -EFAULT; 692 + } 693 + 694 + mutex_lock(&dev->coda_mutex); 695 + 696 + coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR); 697 + coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->reg_idx)); 698 + coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->reg_idx)); 699 + switch (dev->devtype->product) { 700 + case CODA_DX6: 701 + coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN | 702 + CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL); 703 + break; 704 + case CODA_960: 705 + coda_write(dev, 0, CODA9_GDI_WPROT_RGN_EN); 706 + /* fallthrough */ 707 + case CODA_7541: 708 + coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN | 709 + CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL); 710 + break; 711 + } 712 + 713 + value = coda_read(dev, CODA_REG_BIT_FRAME_MEM_CTRL); 714 + value &= ~(1 << 2 | 0x7 << 9); 715 + ctx->frame_mem_ctrl = value; 716 + coda_write(dev, value, CODA_REG_BIT_FRAME_MEM_CTRL); 717 + 718 + if (dev->devtype->product == CODA_DX6) { 719 + /* Configure the coda */ 720 + coda_write(dev, dev->iram.paddr, CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR); 721 + } 722 + 723 + /* Could set rotation here if needed */ 724 + switch (dev->devtype->product) { 725 + case CODA_DX6: 726 + value = (q_data_src->width & CODADX6_PICWIDTH_MASK) << CODADX6_PICWIDTH_OFFSET; 727 + value |= (q_data_src->height & CODADX6_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET; 728 + break; 729 + case CODA_7541: 730 + if (dst_fourcc == V4L2_PIX_FMT_H264) { 731 + value = (round_up(q_data_src->width, 16) & 732 + CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET; 733 + value |= (round_up(q_data_src->height, 16) & 734 + CODA7_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET; 735 + break; 736 + } 737 + /* fallthrough */ 738 + case CODA_960: 739 + value = (q_data_src->width & CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET; 740 + value |= (q_data_src->height & CODA7_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET; 741 + } 742 + coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE); 743 + coda_write(dev, ctx->params.framerate, 744 + CODA_CMD_ENC_SEQ_SRC_F_RATE); 745 + 746 + ctx->params.codec_mode = ctx->codec->mode; 747 + switch (dst_fourcc) { 748 + case V4L2_PIX_FMT_MPEG4: 749 + if (dev->devtype->product == CODA_960) 750 + coda_write(dev, CODA9_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD); 751 + else 752 + coda_write(dev, CODA_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD); 753 + coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA); 754 + break; 755 + case V4L2_PIX_FMT_H264: 756 + if (dev->devtype->product == CODA_960) 757 + coda_write(dev, CODA9_STD_H264, CODA_CMD_ENC_SEQ_COD_STD); 758 + else 759 + coda_write(dev, CODA_STD_H264, CODA_CMD_ENC_SEQ_COD_STD); 760 + if (ctx->params.h264_deblk_enabled) { 761 + value = ((ctx->params.h264_deblk_alpha & 762 + CODA_264PARAM_DEBLKFILTEROFFSETALPHA_MASK) << 763 + CODA_264PARAM_DEBLKFILTEROFFSETALPHA_OFFSET) | 764 + ((ctx->params.h264_deblk_beta & 765 + CODA_264PARAM_DEBLKFILTEROFFSETBETA_MASK) << 766 + CODA_264PARAM_DEBLKFILTEROFFSETBETA_OFFSET); 767 + } else { 768 + value = 1 << CODA_264PARAM_DISABLEDEBLK_OFFSET; 769 + } 770 + coda_write(dev, value, CODA_CMD_ENC_SEQ_264_PARA); 771 + break; 772 + default: 773 + v4l2_err(v4l2_dev, 774 + "dst format (0x%08x) invalid.\n", dst_fourcc); 775 + ret = -EINVAL; 776 + goto out; 777 + } 778 + 779 + switch (ctx->params.slice_mode) { 780 + case V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE: 781 + value = 0; 782 + break; 783 + case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB: 784 + value = (ctx->params.slice_max_mb & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET; 785 + value |= (1 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET; 786 + value |= 1 & CODA_SLICING_MODE_MASK; 787 + break; 788 + case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES: 789 + value = (ctx->params.slice_max_bits & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET; 790 + value |= (0 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET; 791 + value |= 1 & CODA_SLICING_MODE_MASK; 792 + break; 793 + } 794 + coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE); 795 + value = ctx->params.gop_size & CODA_GOP_SIZE_MASK; 796 + coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE); 797 + 798 + if (ctx->params.bitrate) { 799 + /* Rate control enabled */ 800 + value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK) << CODA_RATECONTROL_BITRATE_OFFSET; 801 + value |= 1 & CODA_RATECONTROL_ENABLE_MASK; 802 + if (dev->devtype->product == CODA_960) 803 + value |= BIT(31); /* disable autoskip */ 804 + } else { 805 + value = 0; 806 + } 807 + coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA); 808 + 809 + coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_BUF_SIZE); 810 + coda_write(dev, ctx->params.intra_refresh, 811 + CODA_CMD_ENC_SEQ_INTRA_REFRESH); 812 + 813 + coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START); 814 + coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE); 815 + 816 + 817 + value = 0; 818 + if (dev->devtype->product == CODA_960) 819 + gamma = CODA9_DEFAULT_GAMMA; 820 + else 821 + gamma = CODA_DEFAULT_GAMMA; 822 + if (gamma > 0) { 823 + coda_write(dev, (gamma & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET, 824 + CODA_CMD_ENC_SEQ_RC_GAMMA); 825 + } 826 + 827 + if (ctx->params.h264_min_qp || ctx->params.h264_max_qp) { 828 + coda_write(dev, 829 + ctx->params.h264_min_qp << CODA_QPMIN_OFFSET | 830 + ctx->params.h264_max_qp << CODA_QPMAX_OFFSET, 831 + CODA_CMD_ENC_SEQ_RC_QP_MIN_MAX); 832 + } 833 + if (dev->devtype->product == CODA_960) { 834 + if (ctx->params.h264_max_qp) 835 + value |= 1 << CODA9_OPTION_RCQPMAX_OFFSET; 836 + if (CODA_DEFAULT_GAMMA > 0) 837 + value |= 1 << CODA9_OPTION_GAMMA_OFFSET; 838 + } else { 839 + if (CODA_DEFAULT_GAMMA > 0) { 840 + if (dev->devtype->product == CODA_DX6) 841 + value |= 1 << CODADX6_OPTION_GAMMA_OFFSET; 842 + else 843 + value |= 1 << CODA7_OPTION_GAMMA_OFFSET; 844 + } 845 + if (ctx->params.h264_min_qp) 846 + value |= 1 << CODA7_OPTION_RCQPMIN_OFFSET; 847 + if (ctx->params.h264_max_qp) 848 + value |= 1 << CODA7_OPTION_RCQPMAX_OFFSET; 849 + } 850 + coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION); 851 + 852 + coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_INTERVAL_MODE); 853 + 854 + coda_setup_iram(ctx); 855 + 856 + if (dst_fourcc == V4L2_PIX_FMT_H264) { 857 + switch (dev->devtype->product) { 858 + case CODA_DX6: 859 + value = FMO_SLICE_SAVE_BUF_SIZE << 7; 860 + coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO); 861 + break; 862 + case CODA_7541: 863 + coda_write(dev, ctx->iram_info.search_ram_paddr, 864 + CODA7_CMD_ENC_SEQ_SEARCH_BASE); 865 + coda_write(dev, ctx->iram_info.search_ram_size, 866 + CODA7_CMD_ENC_SEQ_SEARCH_SIZE); 867 + break; 868 + case CODA_960: 869 + coda_write(dev, 0, CODA9_CMD_ENC_SEQ_ME_OPTION); 870 + coda_write(dev, 0, CODA9_CMD_ENC_SEQ_INTRA_WEIGHT); 871 + } 872 + } 873 + 874 + ret = coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT); 875 + if (ret < 0) { 876 + v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n"); 877 + goto out; 878 + } 879 + 880 + if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0) { 881 + v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT failed\n"); 882 + ret = -EFAULT; 883 + goto out; 884 + } 885 + 886 + if (dev->devtype->product == CODA_960) 887 + ctx->num_internal_frames = 4; 888 + else 889 + ctx->num_internal_frames = 2; 890 + ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc); 891 + if (ret < 0) { 892 + v4l2_err(v4l2_dev, "failed to allocate framebuffers\n"); 893 + goto out; 894 + } 895 + 896 + coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM); 897 + coda_write(dev, q_data_src->bytesperline, 898 + CODA_CMD_SET_FRAME_BUF_STRIDE); 899 + if (dev->devtype->product == CODA_7541) { 900 + coda_write(dev, q_data_src->bytesperline, 901 + CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE); 902 + } 903 + if (dev->devtype->product != CODA_DX6) { 904 + coda_write(dev, ctx->iram_info.buf_bit_use, 905 + CODA7_CMD_SET_FRAME_AXI_BIT_ADDR); 906 + coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use, 907 + CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR); 908 + coda_write(dev, ctx->iram_info.buf_dbk_y_use, 909 + CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR); 910 + coda_write(dev, ctx->iram_info.buf_dbk_c_use, 911 + CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR); 912 + coda_write(dev, ctx->iram_info.buf_ovl_use, 913 + CODA7_CMD_SET_FRAME_AXI_OVL_ADDR); 914 + if (dev->devtype->product == CODA_960) { 915 + coda_write(dev, ctx->iram_info.buf_btp_use, 916 + CODA9_CMD_SET_FRAME_AXI_BTP_ADDR); 917 + 918 + /* FIXME */ 919 + coda_write(dev, ctx->internal_frames[2].paddr, CODA9_CMD_SET_FRAME_SUBSAMP_A); 920 + coda_write(dev, ctx->internal_frames[3].paddr, CODA9_CMD_SET_FRAME_SUBSAMP_B); 921 + } 922 + } 923 + 924 + ret = coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF); 925 + if (ret < 0) { 926 + v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n"); 927 + goto out; 928 + } 929 + 930 + /* Save stream headers */ 931 + buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); 932 + switch (dst_fourcc) { 933 + case V4L2_PIX_FMT_H264: 934 + /* 935 + * Get SPS in the first frame and copy it to an 936 + * intermediate buffer. 937 + */ 938 + ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_SPS, 939 + &ctx->vpu_header[0][0], 940 + &ctx->vpu_header_size[0]); 941 + if (ret < 0) 942 + goto out; 943 + 944 + /* 945 + * Get PPS in the first frame and copy it to an 946 + * intermediate buffer. 947 + */ 948 + ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_PPS, 949 + &ctx->vpu_header[1][0], 950 + &ctx->vpu_header_size[1]); 951 + if (ret < 0) 952 + goto out; 953 + 954 + /* 955 + * Length of H.264 headers is variable and thus it might not be 956 + * aligned for the coda to append the encoded frame. In that is 957 + * the case a filler NAL must be added to header 2. 958 + */ 959 + ctx->vpu_header_size[2] = coda_h264_padding( 960 + (ctx->vpu_header_size[0] + 961 + ctx->vpu_header_size[1]), 962 + ctx->vpu_header[2]); 963 + break; 964 + case V4L2_PIX_FMT_MPEG4: 965 + /* 966 + * Get VOS in the first frame and copy it to an 967 + * intermediate buffer 968 + */ 969 + ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOS, 970 + &ctx->vpu_header[0][0], 971 + &ctx->vpu_header_size[0]); 972 + if (ret < 0) 973 + goto out; 974 + 975 + ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VIS, 976 + &ctx->vpu_header[1][0], 977 + &ctx->vpu_header_size[1]); 978 + if (ret < 0) 979 + goto out; 980 + 981 + ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOL, 982 + &ctx->vpu_header[2][0], 983 + &ctx->vpu_header_size[2]); 984 + if (ret < 0) 985 + goto out; 986 + break; 987 + default: 988 + /* No more formats need to save headers at the moment */ 989 + break; 990 + } 991 + 992 + out: 993 + mutex_unlock(&dev->coda_mutex); 994 + return ret; 995 + } 996 + 997 + static int coda_prepare_encode(struct coda_ctx *ctx) 998 + { 999 + struct coda_q_data *q_data_src, *q_data_dst; 1000 + struct vb2_buffer *src_buf, *dst_buf; 1001 + struct coda_dev *dev = ctx->dev; 1002 + int force_ipicture; 1003 + int quant_param = 0; 1004 + u32 picture_y, picture_cb, picture_cr; 1005 + u32 pic_stream_buffer_addr, pic_stream_buffer_size; 1006 + u32 dst_fourcc; 1007 + 1008 + src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); 1009 + dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); 1010 + q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT); 1011 + q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE); 1012 + dst_fourcc = q_data_dst->fourcc; 1013 + 1014 + src_buf->v4l2_buf.sequence = ctx->osequence; 1015 + dst_buf->v4l2_buf.sequence = ctx->osequence; 1016 + ctx->osequence++; 1017 + 1018 + /* 1019 + * Workaround coda firmware BUG that only marks the first 1020 + * frame as IDR. This is a problem for some decoders that can't 1021 + * recover when a frame is lost. 1022 + */ 1023 + if (src_buf->v4l2_buf.sequence % ctx->params.gop_size) { 1024 + src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME; 1025 + src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME; 1026 + } else { 1027 + src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME; 1028 + src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME; 1029 + } 1030 + 1031 + if (dev->devtype->product == CODA_960) 1032 + coda_set_gdi_regs(ctx); 1033 + 1034 + /* 1035 + * Copy headers at the beginning of the first frame for H.264 only. 1036 + * In MPEG4 they are already copied by the coda. 1037 + */ 1038 + if (src_buf->v4l2_buf.sequence == 0) { 1039 + pic_stream_buffer_addr = 1040 + vb2_dma_contig_plane_dma_addr(dst_buf, 0) + 1041 + ctx->vpu_header_size[0] + 1042 + ctx->vpu_header_size[1] + 1043 + ctx->vpu_header_size[2]; 1044 + pic_stream_buffer_size = CODA_MAX_FRAME_SIZE - 1045 + ctx->vpu_header_size[0] - 1046 + ctx->vpu_header_size[1] - 1047 + ctx->vpu_header_size[2]; 1048 + memcpy(vb2_plane_vaddr(dst_buf, 0), 1049 + &ctx->vpu_header[0][0], ctx->vpu_header_size[0]); 1050 + memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0], 1051 + &ctx->vpu_header[1][0], ctx->vpu_header_size[1]); 1052 + memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0] + 1053 + ctx->vpu_header_size[1], &ctx->vpu_header[2][0], 1054 + ctx->vpu_header_size[2]); 1055 + } else { 1056 + pic_stream_buffer_addr = 1057 + vb2_dma_contig_plane_dma_addr(dst_buf, 0); 1058 + pic_stream_buffer_size = CODA_MAX_FRAME_SIZE; 1059 + } 1060 + 1061 + if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) { 1062 + force_ipicture = 1; 1063 + switch (dst_fourcc) { 1064 + case V4L2_PIX_FMT_H264: 1065 + quant_param = ctx->params.h264_intra_qp; 1066 + break; 1067 + case V4L2_PIX_FMT_MPEG4: 1068 + quant_param = ctx->params.mpeg4_intra_qp; 1069 + break; 1070 + default: 1071 + v4l2_warn(&ctx->dev->v4l2_dev, 1072 + "cannot set intra qp, fmt not supported\n"); 1073 + break; 1074 + } 1075 + } else { 1076 + force_ipicture = 0; 1077 + switch (dst_fourcc) { 1078 + case V4L2_PIX_FMT_H264: 1079 + quant_param = ctx->params.h264_inter_qp; 1080 + break; 1081 + case V4L2_PIX_FMT_MPEG4: 1082 + quant_param = ctx->params.mpeg4_inter_qp; 1083 + break; 1084 + default: 1085 + v4l2_warn(&ctx->dev->v4l2_dev, 1086 + "cannot set inter qp, fmt not supported\n"); 1087 + break; 1088 + } 1089 + } 1090 + 1091 + /* submit */ 1092 + coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode, CODA_CMD_ENC_PIC_ROT_MODE); 1093 + coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS); 1094 + 1095 + 1096 + picture_y = vb2_dma_contig_plane_dma_addr(src_buf, 0); 1097 + switch (q_data_src->fourcc) { 1098 + case V4L2_PIX_FMT_YVU420: 1099 + /* Switch Cb and Cr for YVU420 format */ 1100 + picture_cr = picture_y + q_data_src->bytesperline * 1101 + q_data_src->height; 1102 + picture_cb = picture_cr + q_data_src->bytesperline / 2 * 1103 + q_data_src->height / 2; 1104 + break; 1105 + case V4L2_PIX_FMT_YUV420: 1106 + default: 1107 + picture_cb = picture_y + q_data_src->bytesperline * 1108 + q_data_src->height; 1109 + picture_cr = picture_cb + q_data_src->bytesperline / 2 * 1110 + q_data_src->height / 2; 1111 + break; 1112 + } 1113 + 1114 + if (dev->devtype->product == CODA_960) { 1115 + coda_write(dev, 4/*FIXME: 0*/, CODA9_CMD_ENC_PIC_SRC_INDEX); 1116 + coda_write(dev, q_data_src->width, CODA9_CMD_ENC_PIC_SRC_STRIDE); 1117 + coda_write(dev, 0, CODA9_CMD_ENC_PIC_SUB_FRAME_SYNC); 1118 + 1119 + coda_write(dev, picture_y, CODA9_CMD_ENC_PIC_SRC_ADDR_Y); 1120 + coda_write(dev, picture_cb, CODA9_CMD_ENC_PIC_SRC_ADDR_CB); 1121 + coda_write(dev, picture_cr, CODA9_CMD_ENC_PIC_SRC_ADDR_CR); 1122 + } else { 1123 + coda_write(dev, picture_y, CODA_CMD_ENC_PIC_SRC_ADDR_Y); 1124 + coda_write(dev, picture_cb, CODA_CMD_ENC_PIC_SRC_ADDR_CB); 1125 + coda_write(dev, picture_cr, CODA_CMD_ENC_PIC_SRC_ADDR_CR); 1126 + } 1127 + coda_write(dev, force_ipicture << 1 & 0x2, 1128 + CODA_CMD_ENC_PIC_OPTION); 1129 + 1130 + coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START); 1131 + coda_write(dev, pic_stream_buffer_size / 1024, 1132 + CODA_CMD_ENC_PIC_BB_SIZE); 1133 + 1134 + if (!ctx->streamon_out) { 1135 + /* After streamoff on the output side, set the stream end flag */ 1136 + ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG; 1137 + coda_write(dev, ctx->bit_stream_param, CODA_REG_BIT_BIT_STREAM_PARAM); 1138 + } 1139 + 1140 + if (dev->devtype->product != CODA_DX6) 1141 + coda_write(dev, ctx->iram_info.axi_sram_use, 1142 + CODA7_REG_BIT_AXI_SRAM_USE); 1143 + 1144 + coda_command_async(ctx, CODA_COMMAND_PIC_RUN); 1145 + 1146 + return 0; 1147 + } 1148 + 1149 + static void coda_finish_encode(struct coda_ctx *ctx) 1150 + { 1151 + struct vb2_buffer *src_buf, *dst_buf; 1152 + struct coda_dev *dev = ctx->dev; 1153 + u32 wr_ptr, start_ptr; 1154 + 1155 + src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); 1156 + dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); 1157 + 1158 + /* Get results from the coda */ 1159 + start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START); 1160 + wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx)); 1161 + 1162 + /* Calculate bytesused field */ 1163 + if (dst_buf->v4l2_buf.sequence == 0) { 1164 + vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr + 1165 + ctx->vpu_header_size[0] + 1166 + ctx->vpu_header_size[1] + 1167 + ctx->vpu_header_size[2]); 1168 + } else { 1169 + vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr); 1170 + } 1171 + 1172 + v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n", 1173 + wr_ptr - start_ptr); 1174 + 1175 + coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM); 1176 + coda_read(dev, CODA_RET_ENC_PIC_FLAG); 1177 + 1178 + if (coda_read(dev, CODA_RET_ENC_PIC_TYPE) == 0) { 1179 + dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME; 1180 + dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME; 1181 + } else { 1182 + dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME; 1183 + dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME; 1184 + } 1185 + 1186 + dst_buf->v4l2_buf.timestamp = src_buf->v4l2_buf.timestamp; 1187 + dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_TSTAMP_SRC_MASK; 1188 + dst_buf->v4l2_buf.flags |= 1189 + src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_TSTAMP_SRC_MASK; 1190 + dst_buf->v4l2_buf.timecode = src_buf->v4l2_buf.timecode; 1191 + 1192 + v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE); 1193 + 1194 + dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); 1195 + v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE); 1196 + 1197 + ctx->gopcounter--; 1198 + if (ctx->gopcounter < 0) 1199 + ctx->gopcounter = ctx->params.gop_size - 1; 1200 + 1201 + v4l2_dbg(1, coda_debug, &dev->v4l2_dev, 1202 + "job finished: encoding frame (%d) (%s)\n", 1203 + dst_buf->v4l2_buf.sequence, 1204 + (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ? 1205 + "KEYFRAME" : "PFRAME"); 1206 + } 1207 + 1208 + static void coda_seq_end_work(struct work_struct *work) 1209 + { 1210 + struct coda_ctx *ctx = container_of(work, struct coda_ctx, seq_end_work); 1211 + struct coda_dev *dev = ctx->dev; 1212 + 1213 + mutex_lock(&ctx->buffer_mutex); 1214 + mutex_lock(&dev->coda_mutex); 1215 + 1216 + v4l2_dbg(1, coda_debug, &dev->v4l2_dev, 1217 + "%d: %s: sent command 'SEQ_END' to coda\n", ctx->idx, __func__); 1218 + if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) { 1219 + v4l2_err(&dev->v4l2_dev, 1220 + "CODA_COMMAND_SEQ_END failed\n"); 1221 + } 1222 + 1223 + kfifo_init(&ctx->bitstream_fifo, 1224 + ctx->bitstream.vaddr, ctx->bitstream.size); 1225 + 1226 + coda_free_framebuffers(ctx); 1227 + coda_free_context_buffers(ctx); 1228 + 1229 + mutex_unlock(&dev->coda_mutex); 1230 + mutex_unlock(&ctx->buffer_mutex); 1231 + } 1232 + 1233 + static void coda_bit_release(struct coda_ctx *ctx) 1234 + { 1235 + coda_free_framebuffers(ctx); 1236 + coda_free_context_buffers(ctx); 1237 + } 1238 + 1239 + const struct coda_context_ops coda_bit_encode_ops = { 1240 + .queue_init = coda_encoder_queue_init, 1241 + .start_streaming = coda_start_encoding, 1242 + .prepare_run = coda_prepare_encode, 1243 + .finish_run = coda_finish_encode, 1244 + .seq_end_work = coda_seq_end_work, 1245 + .release = coda_bit_release, 1246 + }; 1247 + 1248 + /* 1249 + * Decoder context operations 1250 + */ 1251 + 1252 + static int __coda_start_decoding(struct coda_ctx *ctx) 1253 + { 1254 + struct coda_q_data *q_data_src, *q_data_dst; 1255 + u32 bitstream_buf, bitstream_size; 1256 + struct coda_dev *dev = ctx->dev; 1257 + int width, height; 1258 + u32 src_fourcc; 1259 + u32 val; 1260 + int ret; 1261 + 1262 + /* Start decoding */ 1263 + q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT); 1264 + q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE); 1265 + bitstream_buf = ctx->bitstream.paddr; 1266 + bitstream_size = ctx->bitstream.size; 1267 + src_fourcc = q_data_src->fourcc; 1268 + 1269 + /* Allocate per-instance buffers */ 1270 + ret = coda_alloc_context_buffers(ctx, q_data_src); 1271 + if (ret < 0) 1272 + return ret; 1273 + 1274 + coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR); 1275 + 1276 + /* Update coda bitstream read and write pointers from kfifo */ 1277 + coda_kfifo_sync_to_device_full(ctx); 1278 + 1279 + ctx->display_idx = -1; 1280 + ctx->frm_dis_flg = 0; 1281 + coda_write(dev, 0, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx)); 1282 + 1283 + coda_write(dev, CODA_BIT_DEC_SEQ_INIT_ESCAPE, 1284 + CODA_REG_BIT_BIT_STREAM_PARAM); 1285 + 1286 + coda_write(dev, bitstream_buf, CODA_CMD_DEC_SEQ_BB_START); 1287 + coda_write(dev, bitstream_size / 1024, CODA_CMD_DEC_SEQ_BB_SIZE); 1288 + val = 0; 1289 + if ((dev->devtype->product == CODA_7541) || 1290 + (dev->devtype->product == CODA_960)) 1291 + val |= CODA_REORDER_ENABLE; 1292 + coda_write(dev, val, CODA_CMD_DEC_SEQ_OPTION); 1293 + 1294 + ctx->params.codec_mode = ctx->codec->mode; 1295 + if (dev->devtype->product == CODA_960 && 1296 + src_fourcc == V4L2_PIX_FMT_MPEG4) 1297 + ctx->params.codec_mode_aux = CODA_MP4_AUX_MPEG4; 1298 + else 1299 + ctx->params.codec_mode_aux = 0; 1300 + if (src_fourcc == V4L2_PIX_FMT_H264) { 1301 + if (dev->devtype->product == CODA_7541) { 1302 + coda_write(dev, ctx->psbuf.paddr, 1303 + CODA_CMD_DEC_SEQ_PS_BB_START); 1304 + coda_write(dev, (CODA7_PS_BUF_SIZE / 1024), 1305 + CODA_CMD_DEC_SEQ_PS_BB_SIZE); 1306 + } 1307 + if (dev->devtype->product == CODA_960) { 1308 + coda_write(dev, 0, CODA_CMD_DEC_SEQ_X264_MV_EN); 1309 + coda_write(dev, 512, CODA_CMD_DEC_SEQ_SPP_CHUNK_SIZE); 1310 + } 1311 + } 1312 + if (dev->devtype->product != CODA_960) 1313 + coda_write(dev, 0, CODA_CMD_DEC_SEQ_SRC_SIZE); 1314 + 1315 + if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) { 1316 + v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n"); 1317 + coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM); 1318 + return -ETIMEDOUT; 1319 + } 1320 + 1321 + /* Update kfifo out pointer from coda bitstream read pointer */ 1322 + coda_kfifo_sync_from_device(ctx); 1323 + 1324 + coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM); 1325 + 1326 + if (coda_read(dev, CODA_RET_DEC_SEQ_SUCCESS) == 0) { 1327 + v4l2_err(&dev->v4l2_dev, 1328 + "CODA_COMMAND_SEQ_INIT failed, error code = %d\n", 1329 + coda_read(dev, CODA_RET_DEC_SEQ_ERR_REASON)); 1330 + return -EAGAIN; 1331 + } 1332 + 1333 + val = coda_read(dev, CODA_RET_DEC_SEQ_SRC_SIZE); 1334 + if (dev->devtype->product == CODA_DX6) { 1335 + width = (val >> CODADX6_PICWIDTH_OFFSET) & CODADX6_PICWIDTH_MASK; 1336 + height = val & CODADX6_PICHEIGHT_MASK; 1337 + } else { 1338 + width = (val >> CODA7_PICWIDTH_OFFSET) & CODA7_PICWIDTH_MASK; 1339 + height = val & CODA7_PICHEIGHT_MASK; 1340 + } 1341 + 1342 + if (width > q_data_dst->width || height > q_data_dst->height) { 1343 + v4l2_err(&dev->v4l2_dev, "stream is %dx%d, not %dx%d\n", 1344 + width, height, q_data_dst->width, q_data_dst->height); 1345 + return -EINVAL; 1346 + } 1347 + 1348 + width = round_up(width, 16); 1349 + height = round_up(height, 16); 1350 + 1351 + v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "%s instance %d now: %dx%d\n", 1352 + __func__, ctx->idx, width, height); 1353 + 1354 + ctx->num_internal_frames = coda_read(dev, CODA_RET_DEC_SEQ_FRAME_NEED); 1355 + if (ctx->num_internal_frames > CODA_MAX_FRAMEBUFFERS) { 1356 + v4l2_err(&dev->v4l2_dev, 1357 + "not enough framebuffers to decode (%d < %d)\n", 1358 + CODA_MAX_FRAMEBUFFERS, ctx->num_internal_frames); 1359 + return -EINVAL; 1360 + } 1361 + 1362 + if (src_fourcc == V4L2_PIX_FMT_H264) { 1363 + u32 left_right; 1364 + u32 top_bottom; 1365 + 1366 + left_right = coda_read(dev, CODA_RET_DEC_SEQ_CROP_LEFT_RIGHT); 1367 + top_bottom = coda_read(dev, CODA_RET_DEC_SEQ_CROP_TOP_BOTTOM); 1368 + 1369 + q_data_dst->rect.left = (left_right >> 10) & 0x3ff; 1370 + q_data_dst->rect.top = (top_bottom >> 10) & 0x3ff; 1371 + q_data_dst->rect.width = width - q_data_dst->rect.left - 1372 + (left_right & 0x3ff); 1373 + q_data_dst->rect.height = height - q_data_dst->rect.top - 1374 + (top_bottom & 0x3ff); 1375 + } 1376 + 1377 + ret = coda_alloc_framebuffers(ctx, q_data_dst, src_fourcc); 1378 + if (ret < 0) 1379 + return ret; 1380 + 1381 + /* Tell the decoder how many frame buffers we allocated. */ 1382 + coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM); 1383 + coda_write(dev, width, CODA_CMD_SET_FRAME_BUF_STRIDE); 1384 + 1385 + if (dev->devtype->product != CODA_DX6) { 1386 + /* Set secondary AXI IRAM */ 1387 + coda_setup_iram(ctx); 1388 + 1389 + coda_write(dev, ctx->iram_info.buf_bit_use, 1390 + CODA7_CMD_SET_FRAME_AXI_BIT_ADDR); 1391 + coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use, 1392 + CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR); 1393 + coda_write(dev, ctx->iram_info.buf_dbk_y_use, 1394 + CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR); 1395 + coda_write(dev, ctx->iram_info.buf_dbk_c_use, 1396 + CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR); 1397 + coda_write(dev, ctx->iram_info.buf_ovl_use, 1398 + CODA7_CMD_SET_FRAME_AXI_OVL_ADDR); 1399 + if (dev->devtype->product == CODA_960) 1400 + coda_write(dev, ctx->iram_info.buf_btp_use, 1401 + CODA9_CMD_SET_FRAME_AXI_BTP_ADDR); 1402 + } 1403 + 1404 + if (dev->devtype->product == CODA_960) { 1405 + coda_write(dev, -1, CODA9_CMD_SET_FRAME_DELAY); 1406 + 1407 + coda_write(dev, 0x20262024, CODA9_CMD_SET_FRAME_CACHE_SIZE); 1408 + coda_write(dev, 2 << CODA9_CACHE_PAGEMERGE_OFFSET | 1409 + 32 << CODA9_CACHE_LUMA_BUFFER_SIZE_OFFSET | 1410 + 8 << CODA9_CACHE_CB_BUFFER_SIZE_OFFSET | 1411 + 8 << CODA9_CACHE_CR_BUFFER_SIZE_OFFSET, 1412 + CODA9_CMD_SET_FRAME_CACHE_CONFIG); 1413 + } 1414 + 1415 + if (src_fourcc == V4L2_PIX_FMT_H264) { 1416 + coda_write(dev, ctx->slicebuf.paddr, 1417 + CODA_CMD_SET_FRAME_SLICE_BB_START); 1418 + coda_write(dev, ctx->slicebuf.size / 1024, 1419 + CODA_CMD_SET_FRAME_SLICE_BB_SIZE); 1420 + } 1421 + 1422 + if (dev->devtype->product == CODA_7541) { 1423 + int max_mb_x = 1920 / 16; 1424 + int max_mb_y = 1088 / 16; 1425 + int max_mb_num = max_mb_x * max_mb_y; 1426 + 1427 + coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y, 1428 + CODA7_CMD_SET_FRAME_MAX_DEC_SIZE); 1429 + } else if (dev->devtype->product == CODA_960) { 1430 + int max_mb_x = 1920 / 16; 1431 + int max_mb_y = 1088 / 16; 1432 + int max_mb_num = max_mb_x * max_mb_y; 1433 + 1434 + coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y, 1435 + CODA9_CMD_SET_FRAME_MAX_DEC_SIZE); 1436 + } 1437 + 1438 + if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) { 1439 + v4l2_err(&ctx->dev->v4l2_dev, 1440 + "CODA_COMMAND_SET_FRAME_BUF timeout\n"); 1441 + return -ETIMEDOUT; 1442 + } 1443 + 1444 + return 0; 1445 + } 1446 + 1447 + static int coda_start_decoding(struct coda_ctx *ctx) 1448 + { 1449 + struct coda_dev *dev = ctx->dev; 1450 + int ret; 1451 + 1452 + mutex_lock(&dev->coda_mutex); 1453 + ret = __coda_start_decoding(ctx); 1454 + mutex_unlock(&dev->coda_mutex); 1455 + 1456 + return ret; 1457 + } 1458 + 1459 + static int coda_prepare_decode(struct coda_ctx *ctx) 1460 + { 1461 + struct vb2_buffer *dst_buf; 1462 + struct coda_dev *dev = ctx->dev; 1463 + struct coda_q_data *q_data_dst; 1464 + u32 stridey, height; 1465 + u32 picture_y, picture_cb, picture_cr; 1466 + 1467 + dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); 1468 + q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE); 1469 + 1470 + if (ctx->params.rot_mode & CODA_ROT_90) { 1471 + stridey = q_data_dst->height; 1472 + height = q_data_dst->width; 1473 + } else { 1474 + stridey = q_data_dst->width; 1475 + height = q_data_dst->height; 1476 + } 1477 + 1478 + /* Try to copy source buffer contents into the bitstream ringbuffer */ 1479 + mutex_lock(&ctx->bitstream_mutex); 1480 + coda_fill_bitstream(ctx); 1481 + mutex_unlock(&ctx->bitstream_mutex); 1482 + 1483 + if (coda_get_bitstream_payload(ctx) < 512 && 1484 + (!(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) { 1485 + v4l2_dbg(1, coda_debug, &dev->v4l2_dev, 1486 + "bitstream payload: %d, skipping\n", 1487 + coda_get_bitstream_payload(ctx)); 1488 + v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx); 1489 + return -EAGAIN; 1490 + } 1491 + 1492 + /* Run coda_start_decoding (again) if not yet initialized */ 1493 + if (!ctx->initialized) { 1494 + int ret = __coda_start_decoding(ctx); 1495 + 1496 + if (ret < 0) { 1497 + v4l2_err(&dev->v4l2_dev, "failed to start decoding\n"); 1498 + v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx); 1499 + return -EAGAIN; 1500 + } else { 1501 + ctx->initialized = 1; 1502 + } 1503 + } 1504 + 1505 + if (dev->devtype->product == CODA_960) 1506 + coda_set_gdi_regs(ctx); 1507 + 1508 + /* Set rotator output */ 1509 + picture_y = vb2_dma_contig_plane_dma_addr(dst_buf, 0); 1510 + if (q_data_dst->fourcc == V4L2_PIX_FMT_YVU420) { 1511 + /* Switch Cr and Cb for YVU420 format */ 1512 + picture_cr = picture_y + stridey * height; 1513 + picture_cb = picture_cr + stridey / 2 * height / 2; 1514 + } else { 1515 + picture_cb = picture_y + stridey * height; 1516 + picture_cr = picture_cb + stridey / 2 * height / 2; 1517 + } 1518 + 1519 + if (dev->devtype->product == CODA_960) { 1520 + /* 1521 + * The CODA960 seems to have an internal list of buffers with 1522 + * 64 entries that includes the registered frame buffers as 1523 + * well as the rotator buffer output. 1524 + * ROT_INDEX needs to be < 0x40, but > ctx->num_internal_frames. 1525 + */ 1526 + coda_write(dev, CODA_MAX_FRAMEBUFFERS + dst_buf->v4l2_buf.index, 1527 + CODA9_CMD_DEC_PIC_ROT_INDEX); 1528 + coda_write(dev, picture_y, CODA9_CMD_DEC_PIC_ROT_ADDR_Y); 1529 + coda_write(dev, picture_cb, CODA9_CMD_DEC_PIC_ROT_ADDR_CB); 1530 + coda_write(dev, picture_cr, CODA9_CMD_DEC_PIC_ROT_ADDR_CR); 1531 + coda_write(dev, stridey, CODA9_CMD_DEC_PIC_ROT_STRIDE); 1532 + } else { 1533 + coda_write(dev, picture_y, CODA_CMD_DEC_PIC_ROT_ADDR_Y); 1534 + coda_write(dev, picture_cb, CODA_CMD_DEC_PIC_ROT_ADDR_CB); 1535 + coda_write(dev, picture_cr, CODA_CMD_DEC_PIC_ROT_ADDR_CR); 1536 + coda_write(dev, stridey, CODA_CMD_DEC_PIC_ROT_STRIDE); 1537 + } 1538 + coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode, 1539 + CODA_CMD_DEC_PIC_ROT_MODE); 1540 + 1541 + switch (dev->devtype->product) { 1542 + case CODA_DX6: 1543 + /* TBD */ 1544 + case CODA_7541: 1545 + coda_write(dev, CODA_PRE_SCAN_EN, CODA_CMD_DEC_PIC_OPTION); 1546 + break; 1547 + case CODA_960: 1548 + coda_write(dev, (1 << 10), CODA_CMD_DEC_PIC_OPTION); /* 'hardcode to use interrupt disable mode'? */ 1549 + break; 1550 + } 1551 + 1552 + coda_write(dev, 0, CODA_CMD_DEC_PIC_SKIP_NUM); 1553 + 1554 + coda_write(dev, 0, CODA_CMD_DEC_PIC_BB_START); 1555 + coda_write(dev, 0, CODA_CMD_DEC_PIC_START_BYTE); 1556 + 1557 + if (dev->devtype->product != CODA_DX6) 1558 + coda_write(dev, ctx->iram_info.axi_sram_use, 1559 + CODA7_REG_BIT_AXI_SRAM_USE); 1560 + 1561 + coda_kfifo_sync_to_device_full(ctx); 1562 + 1563 + coda_command_async(ctx, CODA_COMMAND_PIC_RUN); 1564 + 1565 + return 0; 1566 + } 1567 + 1568 + static void coda_finish_decode(struct coda_ctx *ctx) 1569 + { 1570 + struct coda_dev *dev = ctx->dev; 1571 + struct coda_q_data *q_data_src; 1572 + struct coda_q_data *q_data_dst; 1573 + struct vb2_buffer *dst_buf; 1574 + struct coda_timestamp *ts; 1575 + int width, height; 1576 + int decoded_idx; 1577 + int display_idx; 1578 + u32 src_fourcc; 1579 + int success; 1580 + u32 err_mb; 1581 + u32 val; 1582 + 1583 + dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); 1584 + 1585 + /* Update kfifo out pointer from coda bitstream read pointer */ 1586 + coda_kfifo_sync_from_device(ctx); 1587 + 1588 + /* 1589 + * in stream-end mode, the read pointer can overshoot the write pointer 1590 + * by up to 512 bytes 1591 + */ 1592 + if (ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) { 1593 + if (coda_get_bitstream_payload(ctx) >= CODA_MAX_FRAME_SIZE - 512) 1594 + kfifo_init(&ctx->bitstream_fifo, 1595 + ctx->bitstream.vaddr, ctx->bitstream.size); 1596 + } 1597 + 1598 + q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT); 1599 + src_fourcc = q_data_src->fourcc; 1600 + 1601 + val = coda_read(dev, CODA_RET_DEC_PIC_SUCCESS); 1602 + if (val != 1) 1603 + pr_err("DEC_PIC_SUCCESS = %d\n", val); 1604 + 1605 + success = val & 0x1; 1606 + if (!success) 1607 + v4l2_err(&dev->v4l2_dev, "decode failed\n"); 1608 + 1609 + if (src_fourcc == V4L2_PIX_FMT_H264) { 1610 + if (val & (1 << 3)) 1611 + v4l2_err(&dev->v4l2_dev, 1612 + "insufficient PS buffer space (%d bytes)\n", 1613 + ctx->psbuf.size); 1614 + if (val & (1 << 2)) 1615 + v4l2_err(&dev->v4l2_dev, 1616 + "insufficient slice buffer space (%d bytes)\n", 1617 + ctx->slicebuf.size); 1618 + } 1619 + 1620 + val = coda_read(dev, CODA_RET_DEC_PIC_SIZE); 1621 + width = (val >> 16) & 0xffff; 1622 + height = val & 0xffff; 1623 + 1624 + q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE); 1625 + 1626 + /* frame crop information */ 1627 + if (src_fourcc == V4L2_PIX_FMT_H264) { 1628 + u32 left_right; 1629 + u32 top_bottom; 1630 + 1631 + left_right = coda_read(dev, CODA_RET_DEC_PIC_CROP_LEFT_RIGHT); 1632 + top_bottom = coda_read(dev, CODA_RET_DEC_PIC_CROP_TOP_BOTTOM); 1633 + 1634 + if (left_right == 0xffffffff && top_bottom == 0xffffffff) { 1635 + /* Keep current crop information */ 1636 + } else { 1637 + struct v4l2_rect *rect = &q_data_dst->rect; 1638 + 1639 + rect->left = left_right >> 16 & 0xffff; 1640 + rect->top = top_bottom >> 16 & 0xffff; 1641 + rect->width = width - rect->left - 1642 + (left_right & 0xffff); 1643 + rect->height = height - rect->top - 1644 + (top_bottom & 0xffff); 1645 + } 1646 + } else { 1647 + /* no cropping */ 1648 + } 1649 + 1650 + err_mb = coda_read(dev, CODA_RET_DEC_PIC_ERR_MB); 1651 + if (err_mb > 0) 1652 + v4l2_err(&dev->v4l2_dev, 1653 + "errors in %d macroblocks\n", err_mb); 1654 + 1655 + if (dev->devtype->product == CODA_7541) { 1656 + val = coda_read(dev, CODA_RET_DEC_PIC_OPTION); 1657 + if (val == 0) { 1658 + /* not enough bitstream data */ 1659 + v4l2_dbg(1, coda_debug, &dev->v4l2_dev, 1660 + "prescan failed: %d\n", val); 1661 + ctx->hold = true; 1662 + return; 1663 + } 1664 + } 1665 + 1666 + ctx->frm_dis_flg = coda_read(dev, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx)); 1667 + 1668 + /* 1669 + * The previous display frame was copied out by the rotator, 1670 + * now it can be overwritten again 1671 + */ 1672 + if (ctx->display_idx >= 0 && 1673 + ctx->display_idx < ctx->num_internal_frames) { 1674 + ctx->frm_dis_flg &= ~(1 << ctx->display_idx); 1675 + coda_write(dev, ctx->frm_dis_flg, 1676 + CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx)); 1677 + } 1678 + 1679 + /* 1680 + * The index of the last decoded frame, not necessarily in 1681 + * display order, and the index of the next display frame. 1682 + * The latter could have been decoded in a previous run. 1683 + */ 1684 + decoded_idx = coda_read(dev, CODA_RET_DEC_PIC_CUR_IDX); 1685 + display_idx = coda_read(dev, CODA_RET_DEC_PIC_FRAME_IDX); 1686 + 1687 + if (decoded_idx == -1) { 1688 + /* no frame was decoded, but we might have a display frame */ 1689 + if (display_idx >= 0 && display_idx < ctx->num_internal_frames) 1690 + ctx->sequence_offset++; 1691 + else if (ctx->display_idx < 0) 1692 + ctx->hold = true; 1693 + } else if (decoded_idx == -2) { 1694 + /* no frame was decoded, we still return the remaining buffers */ 1695 + } else if (decoded_idx < 0 || decoded_idx >= ctx->num_internal_frames) { 1696 + v4l2_err(&dev->v4l2_dev, 1697 + "decoded frame index out of range: %d\n", decoded_idx); 1698 + } else { 1699 + ts = list_first_entry(&ctx->timestamp_list, 1700 + struct coda_timestamp, list); 1701 + list_del(&ts->list); 1702 + val = coda_read(dev, CODA_RET_DEC_PIC_FRAME_NUM) - 1; 1703 + val -= ctx->sequence_offset; 1704 + if (val != (ts->sequence & 0xffff)) { 1705 + v4l2_err(&dev->v4l2_dev, 1706 + "sequence number mismatch (%d(%d) != %d)\n", 1707 + val, ctx->sequence_offset, ts->sequence); 1708 + } 1709 + ctx->frame_timestamps[decoded_idx] = *ts; 1710 + kfree(ts); 1711 + 1712 + val = coda_read(dev, CODA_RET_DEC_PIC_TYPE) & 0x7; 1713 + if (val == 0) 1714 + ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_KEYFRAME; 1715 + else if (val == 1) 1716 + ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_PFRAME; 1717 + else 1718 + ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_BFRAME; 1719 + 1720 + ctx->frame_errors[decoded_idx] = err_mb; 1721 + } 1722 + 1723 + if (display_idx == -1) { 1724 + /* 1725 + * no more frames to be decoded, but there could still 1726 + * be rotator output to dequeue 1727 + */ 1728 + ctx->hold = true; 1729 + } else if (display_idx == -3) { 1730 + /* possibly prescan failure */ 1731 + } else if (display_idx < 0 || display_idx >= ctx->num_internal_frames) { 1732 + v4l2_err(&dev->v4l2_dev, 1733 + "presentation frame index out of range: %d\n", 1734 + display_idx); 1735 + } 1736 + 1737 + /* If a frame was copied out, return it */ 1738 + if (ctx->display_idx >= 0 && 1739 + ctx->display_idx < ctx->num_internal_frames) { 1740 + dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); 1741 + dst_buf->v4l2_buf.sequence = ctx->osequence++; 1742 + 1743 + dst_buf->v4l2_buf.flags &= ~(V4L2_BUF_FLAG_KEYFRAME | 1744 + V4L2_BUF_FLAG_PFRAME | 1745 + V4L2_BUF_FLAG_BFRAME); 1746 + dst_buf->v4l2_buf.flags |= ctx->frame_types[ctx->display_idx]; 1747 + ts = &ctx->frame_timestamps[ctx->display_idx]; 1748 + dst_buf->v4l2_buf.timecode = ts->timecode; 1749 + dst_buf->v4l2_buf.timestamp = ts->timestamp; 1750 + 1751 + vb2_set_plane_payload(dst_buf, 0, width * height * 3 / 2); 1752 + 1753 + v4l2_m2m_buf_done(dst_buf, ctx->frame_errors[display_idx] ? 1754 + VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE); 1755 + 1756 + v4l2_dbg(1, coda_debug, &dev->v4l2_dev, 1757 + "job finished: decoding frame (%d) (%s)\n", 1758 + dst_buf->v4l2_buf.sequence, 1759 + (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ? 1760 + "KEYFRAME" : "PFRAME"); 1761 + } else { 1762 + v4l2_dbg(1, coda_debug, &dev->v4l2_dev, 1763 + "job finished: no frame decoded\n"); 1764 + } 1765 + 1766 + /* The rotator will copy the current display frame next time */ 1767 + ctx->display_idx = display_idx; 1768 + } 1769 + 1770 + const struct coda_context_ops coda_bit_decode_ops = { 1771 + .queue_init = coda_decoder_queue_init, 1772 + .start_streaming = coda_start_decoding, 1773 + .prepare_run = coda_prepare_decode, 1774 + .finish_run = coda_finish_decode, 1775 + .seq_end_work = coda_seq_end_work, 1776 + .release = coda_bit_release, 1777 + }; 1778 + 1779 + irqreturn_t coda_irq_handler(int irq, void *data) 1780 + { 1781 + struct coda_dev *dev = data; 1782 + struct coda_ctx *ctx; 1783 + 1784 + /* read status register to attend the IRQ */ 1785 + coda_read(dev, CODA_REG_BIT_INT_STATUS); 1786 + coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET, 1787 + CODA_REG_BIT_INT_CLEAR); 1788 + 1789 + ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev); 1790 + if (ctx == NULL) { 1791 + v4l2_err(&dev->v4l2_dev, "Instance released before the end of transaction\n"); 1792 + mutex_unlock(&dev->coda_mutex); 1793 + return IRQ_HANDLED; 1794 + } 1795 + 1796 + if (ctx->aborting) { 1797 + v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, 1798 + "task has been aborted\n"); 1799 + } 1800 + 1801 + if (coda_isbusy(ctx->dev)) { 1802 + v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, 1803 + "coda is still busy!!!!\n"); 1804 + return IRQ_NONE; 1805 + } 1806 + 1807 + complete(&ctx->completion); 1808 + 1809 + return IRQ_HANDLED; 1810 + }
+13 -1818
drivers/media/platform/coda/coda-common.c
··· 48 48 #define CODA_PARA_BUF_SIZE (10 * 1024) 49 49 #define CODA_ISRAM_SIZE (2048 * 2) 50 50 51 - #define CODA7_PS_BUF_SIZE 0x28000 52 - #define CODA9_PS_SAVE_SIZE (512 * 1024) 53 - 54 - #define CODA_DEFAULT_GAMMA 4096 55 - #define CODA9_DEFAULT_GAMMA 24576 /* 0.75 * 32768 */ 56 - 57 51 #define MIN_W 176 58 52 #define MIN_H 144 59 53 ··· 57 63 58 64 #define fh_to_ctx(__fh) container_of(__fh, struct coda_ctx, fh) 59 65 60 - static int coda_debug; 66 + int coda_debug; 61 67 module_param(coda_debug, int, 0644); 62 68 MODULE_PARM_DESC(coda_debug, "Debug level (0-1)"); 63 69 ··· 80 86 v4l2_dbg(1, coda_debug, &dev->v4l2_dev, 81 87 "%s: data=0x%x, reg=0x%x\n", __func__, data, reg); 82 88 return data; 83 - } 84 - 85 - static inline unsigned long coda_isbusy(struct coda_dev *dev) 86 - { 87 - return coda_read(dev, CODA_REG_BIT_BUSY); 88 - } 89 - 90 - static inline int coda_is_initialized(struct coda_dev *dev) 91 - { 92 - return (coda_read(dev, CODA_REG_BIT_CUR_PC) != 0); 93 - } 94 - 95 - static int coda_wait_timeout(struct coda_dev *dev) 96 - { 97 - unsigned long timeout = jiffies + msecs_to_jiffies(1000); 98 - 99 - while (coda_isbusy(dev)) { 100 - if (time_after(jiffies, timeout)) 101 - return -ETIMEDOUT; 102 - } 103 - return 0; 104 - } 105 - 106 - static void coda_command_async(struct coda_ctx *ctx, int cmd) 107 - { 108 - struct coda_dev *dev = ctx->dev; 109 - 110 - if (dev->devtype->product == CODA_960 || 111 - dev->devtype->product == CODA_7541) { 112 - /* Restore context related registers to CODA */ 113 - coda_write(dev, ctx->bit_stream_param, 114 - CODA_REG_BIT_BIT_STREAM_PARAM); 115 - coda_write(dev, ctx->frm_dis_flg, 116 - CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx)); 117 - coda_write(dev, ctx->frame_mem_ctrl, 118 - CODA_REG_BIT_FRAME_MEM_CTRL); 119 - coda_write(dev, ctx->workbuf.paddr, CODA_REG_BIT_WORK_BUF_ADDR); 120 - } 121 - 122 - if (dev->devtype->product == CODA_960) { 123 - coda_write(dev, 1, CODA9_GDI_WPROT_ERR_CLR); 124 - coda_write(dev, 0, CODA9_GDI_WPROT_RGN_EN); 125 - } 126 - 127 - coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY); 128 - 129 - coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX); 130 - coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD); 131 - coda_write(dev, ctx->params.codec_mode_aux, CODA7_REG_BIT_RUN_AUX_STD); 132 - 133 - coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND); 134 - } 135 - 136 - static int coda_command_sync(struct coda_ctx *ctx, int cmd) 137 - { 138 - struct coda_dev *dev = ctx->dev; 139 - 140 - coda_command_async(ctx, cmd); 141 - return coda_wait_timeout(dev); 142 - } 143 - 144 - static int coda_hw_reset(struct coda_ctx *ctx) 145 - { 146 - struct coda_dev *dev = ctx->dev; 147 - unsigned long timeout; 148 - unsigned int idx; 149 - int ret; 150 - 151 - if (!dev->rstc) 152 - return -ENOENT; 153 - 154 - idx = coda_read(dev, CODA_REG_BIT_RUN_INDEX); 155 - 156 - if (dev->devtype->product == CODA_960) { 157 - timeout = jiffies + msecs_to_jiffies(100); 158 - coda_write(dev, 0x11, CODA9_GDI_BUS_CTRL); 159 - while (coda_read(dev, CODA9_GDI_BUS_STATUS) != 0x77) { 160 - if (time_after(jiffies, timeout)) 161 - return -ETIME; 162 - cpu_relax(); 163 - } 164 - } 165 - 166 - ret = reset_control_reset(dev->rstc); 167 - if (ret < 0) 168 - return ret; 169 - 170 - if (dev->devtype->product == CODA_960) 171 - coda_write(dev, 0x00, CODA9_GDI_BUS_CTRL); 172 - coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY); 173 - coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN); 174 - ret = coda_wait_timeout(dev); 175 - coda_write(dev, idx, CODA_REG_BIT_RUN_INDEX); 176 - 177 - return ret; 178 - } 179 - 180 - static void coda_bit_stream_end_flag(struct coda_ctx *ctx) 181 - { 182 - struct coda_dev *dev = ctx->dev; 183 - 184 - ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG; 185 - 186 - if ((dev->devtype->product == CODA_960) && 187 - coda_isbusy(dev) && 188 - (ctx->idx == coda_read(dev, CODA_REG_BIT_RUN_INDEX))) { 189 - /* If this context is currently running, update the hardware flag */ 190 - coda_write(dev, ctx->bit_stream_param, CODA_REG_BIT_BIT_STREAM_PARAM); 191 - } 192 - } 193 - 194 - static struct coda_q_data *get_q_data(struct coda_ctx *ctx, 195 - enum v4l2_buf_type type) 196 - { 197 - switch (type) { 198 - case V4L2_BUF_TYPE_VIDEO_OUTPUT: 199 - return &(ctx->q_data[V4L2_M2M_SRC]); 200 - case V4L2_BUF_TYPE_VIDEO_CAPTURE: 201 - return &(ctx->q_data[V4L2_M2M_DST]); 202 - default: 203 - return NULL; 204 - } 205 89 } 206 90 207 91 /* ··· 202 330 *max_h = h; 203 331 } 204 332 205 - static char *coda_product_name(int product) 333 + const char *coda_product_name(int product) 206 334 { 207 335 static char buf[9]; 208 336 ··· 674 802 .vidioc_unsubscribe_event = v4l2_event_unsubscribe, 675 803 }; 676 804 677 - static int __coda_start_decoding(struct coda_ctx *ctx); 678 - 679 - static inline int coda_get_bitstream_payload(struct coda_ctx *ctx) 680 - { 681 - return kfifo_len(&ctx->bitstream_fifo); 682 - } 683 - 684 - static void coda_kfifo_sync_from_device(struct coda_ctx *ctx) 685 - { 686 - struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo; 687 - struct coda_dev *dev = ctx->dev; 688 - u32 rd_ptr; 689 - 690 - rd_ptr = coda_read(dev, CODA_REG_BIT_RD_PTR(ctx->reg_idx)); 691 - kfifo->out = (kfifo->in & ~kfifo->mask) | 692 - (rd_ptr - ctx->bitstream.paddr); 693 - if (kfifo->out > kfifo->in) 694 - kfifo->out -= kfifo->mask + 1; 695 - } 696 - 697 - static void coda_kfifo_sync_to_device_full(struct coda_ctx *ctx) 698 - { 699 - struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo; 700 - struct coda_dev *dev = ctx->dev; 701 - u32 rd_ptr, wr_ptr; 702 - 703 - rd_ptr = ctx->bitstream.paddr + (kfifo->out & kfifo->mask); 704 - coda_write(dev, rd_ptr, CODA_REG_BIT_RD_PTR(ctx->reg_idx)); 705 - wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask); 706 - coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx)); 707 - } 708 - 709 - static void coda_kfifo_sync_to_device_write(struct coda_ctx *ctx) 710 - { 711 - struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo; 712 - struct coda_dev *dev = ctx->dev; 713 - u32 wr_ptr; 714 - 715 - wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask); 716 - coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx)); 717 - } 718 - 719 - static int coda_bitstream_queue(struct coda_ctx *ctx, struct vb2_buffer *src_buf) 720 - { 721 - u32 src_size = vb2_get_plane_payload(src_buf, 0); 722 - u32 n; 723 - 724 - n = kfifo_in(&ctx->bitstream_fifo, vb2_plane_vaddr(src_buf, 0), src_size); 725 - if (n < src_size) 726 - return -ENOSPC; 727 - 728 - dma_sync_single_for_device(&ctx->dev->plat_dev->dev, ctx->bitstream.paddr, 729 - ctx->bitstream.size, DMA_TO_DEVICE); 730 - 731 - src_buf->v4l2_buf.sequence = ctx->qsequence++; 732 - 733 - return 0; 734 - } 735 - 736 - static bool coda_bitstream_try_queue(struct coda_ctx *ctx, 737 - struct vb2_buffer *src_buf) 738 - { 739 - int ret; 740 - 741 - if (coda_get_bitstream_payload(ctx) + 742 - vb2_get_plane_payload(src_buf, 0) + 512 >= ctx->bitstream.size) 743 - return false; 744 - 745 - if (vb2_plane_vaddr(src_buf, 0) == NULL) { 746 - v4l2_err(&ctx->dev->v4l2_dev, "trying to queue empty buffer\n"); 747 - return true; 748 - } 749 - 750 - ret = coda_bitstream_queue(ctx, src_buf); 751 - if (ret < 0) { 752 - v4l2_err(&ctx->dev->v4l2_dev, "bitstream buffer overflow\n"); 753 - return false; 754 - } 755 - /* Sync read pointer to device */ 756 - if (ctx == v4l2_m2m_get_curr_priv(ctx->dev->m2m_dev)) 757 - coda_kfifo_sync_to_device_write(ctx); 758 - 759 - ctx->hold = false; 760 - 761 - return true; 762 - } 763 - 764 - static void coda_fill_bitstream(struct coda_ctx *ctx) 765 - { 766 - struct vb2_buffer *src_buf; 767 - struct coda_timestamp *ts; 768 - 769 - while (v4l2_m2m_num_src_bufs_ready(ctx->fh.m2m_ctx) > 0) { 770 - src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); 771 - 772 - if (coda_bitstream_try_queue(ctx, src_buf)) { 773 - /* 774 - * Source buffer is queued in the bitstream ringbuffer; 775 - * queue the timestamp and mark source buffer as done 776 - */ 777 - src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); 778 - 779 - ts = kmalloc(sizeof(*ts), GFP_KERNEL); 780 - if (ts) { 781 - ts->sequence = src_buf->v4l2_buf.sequence; 782 - ts->timecode = src_buf->v4l2_buf.timecode; 783 - ts->timestamp = src_buf->v4l2_buf.timestamp; 784 - list_add_tail(&ts->list, &ctx->timestamp_list); 785 - } 786 - 787 - v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE); 788 - } else { 789 - break; 790 - } 791 - } 792 - } 793 - 794 - static void coda_set_gdi_regs(struct coda_ctx *ctx) 805 + void coda_set_gdi_regs(struct coda_ctx *ctx) 795 806 { 796 807 struct gdi_tiled_map *tiled_map = &ctx->tiled_map; 797 808 struct coda_dev *dev = ctx->dev; ··· 698 943 /* 699 944 * Mem-to-mem operations. 700 945 */ 701 - static int coda_prepare_decode(struct coda_ctx *ctx) 702 - { 703 - struct vb2_buffer *dst_buf; 704 - struct coda_dev *dev = ctx->dev; 705 - struct coda_q_data *q_data_dst; 706 - u32 stridey, height; 707 - u32 picture_y, picture_cb, picture_cr; 708 - 709 - dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); 710 - q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE); 711 - 712 - if (ctx->params.rot_mode & CODA_ROT_90) { 713 - stridey = q_data_dst->height; 714 - height = q_data_dst->width; 715 - } else { 716 - stridey = q_data_dst->width; 717 - height = q_data_dst->height; 718 - } 719 - 720 - /* Try to copy source buffer contents into the bitstream ringbuffer */ 721 - mutex_lock(&ctx->bitstream_mutex); 722 - coda_fill_bitstream(ctx); 723 - mutex_unlock(&ctx->bitstream_mutex); 724 - 725 - if (coda_get_bitstream_payload(ctx) < 512 && 726 - (!(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) { 727 - v4l2_dbg(1, coda_debug, &dev->v4l2_dev, 728 - "bitstream payload: %d, skipping\n", 729 - coda_get_bitstream_payload(ctx)); 730 - v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx); 731 - return -EAGAIN; 732 - } 733 - 734 - /* Run coda_start_decoding (again) if not yet initialized */ 735 - if (!ctx->initialized) { 736 - int ret = __coda_start_decoding(ctx); 737 - if (ret < 0) { 738 - v4l2_err(&dev->v4l2_dev, "failed to start decoding\n"); 739 - v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx); 740 - return -EAGAIN; 741 - } else { 742 - ctx->initialized = 1; 743 - } 744 - } 745 - 746 - if (dev->devtype->product == CODA_960) 747 - coda_set_gdi_regs(ctx); 748 - 749 - /* Set rotator output */ 750 - picture_y = vb2_dma_contig_plane_dma_addr(dst_buf, 0); 751 - if (q_data_dst->fourcc == V4L2_PIX_FMT_YVU420) { 752 - /* Switch Cr and Cb for YVU420 format */ 753 - picture_cr = picture_y + stridey * height; 754 - picture_cb = picture_cr + stridey / 2 * height / 2; 755 - } else { 756 - picture_cb = picture_y + stridey * height; 757 - picture_cr = picture_cb + stridey / 2 * height / 2; 758 - } 759 - 760 - if (dev->devtype->product == CODA_960) { 761 - /* 762 - * The CODA960 seems to have an internal list of buffers with 763 - * 64 entries that includes the registered frame buffers as 764 - * well as the rotator buffer output. 765 - * ROT_INDEX needs to be < 0x40, but > ctx->num_internal_frames. 766 - */ 767 - coda_write(dev, CODA_MAX_FRAMEBUFFERS + dst_buf->v4l2_buf.index, 768 - CODA9_CMD_DEC_PIC_ROT_INDEX); 769 - coda_write(dev, picture_y, CODA9_CMD_DEC_PIC_ROT_ADDR_Y); 770 - coda_write(dev, picture_cb, CODA9_CMD_DEC_PIC_ROT_ADDR_CB); 771 - coda_write(dev, picture_cr, CODA9_CMD_DEC_PIC_ROT_ADDR_CR); 772 - coda_write(dev, stridey, CODA9_CMD_DEC_PIC_ROT_STRIDE); 773 - } else { 774 - coda_write(dev, picture_y, CODA_CMD_DEC_PIC_ROT_ADDR_Y); 775 - coda_write(dev, picture_cb, CODA_CMD_DEC_PIC_ROT_ADDR_CB); 776 - coda_write(dev, picture_cr, CODA_CMD_DEC_PIC_ROT_ADDR_CR); 777 - coda_write(dev, stridey, CODA_CMD_DEC_PIC_ROT_STRIDE); 778 - } 779 - coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode, 780 - CODA_CMD_DEC_PIC_ROT_MODE); 781 - 782 - switch (dev->devtype->product) { 783 - case CODA_DX6: 784 - /* TBD */ 785 - case CODA_7541: 786 - coda_write(dev, CODA_PRE_SCAN_EN, CODA_CMD_DEC_PIC_OPTION); 787 - break; 788 - case CODA_960: 789 - coda_write(dev, (1 << 10), CODA_CMD_DEC_PIC_OPTION); /* 'hardcode to use interrupt disable mode'? */ 790 - break; 791 - } 792 - 793 - coda_write(dev, 0, CODA_CMD_DEC_PIC_SKIP_NUM); 794 - 795 - coda_write(dev, 0, CODA_CMD_DEC_PIC_BB_START); 796 - coda_write(dev, 0, CODA_CMD_DEC_PIC_START_BYTE); 797 - 798 - if (dev->devtype->product != CODA_DX6) 799 - coda_write(dev, ctx->iram_info.axi_sram_use, 800 - CODA7_REG_BIT_AXI_SRAM_USE); 801 - 802 - coda_kfifo_sync_to_device_full(ctx); 803 - coda_command_async(ctx, CODA_COMMAND_PIC_RUN); 804 - 805 - return 0; 806 - } 807 - 808 - static int coda_prepare_encode(struct coda_ctx *ctx) 809 - { 810 - struct coda_q_data *q_data_src, *q_data_dst; 811 - struct vb2_buffer *src_buf, *dst_buf; 812 - struct coda_dev *dev = ctx->dev; 813 - int force_ipicture; 814 - int quant_param = 0; 815 - u32 picture_y, picture_cb, picture_cr; 816 - u32 pic_stream_buffer_addr, pic_stream_buffer_size; 817 - u32 dst_fourcc; 818 - 819 - src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); 820 - dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); 821 - q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT); 822 - q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE); 823 - dst_fourcc = q_data_dst->fourcc; 824 - 825 - src_buf->v4l2_buf.sequence = ctx->osequence; 826 - dst_buf->v4l2_buf.sequence = ctx->osequence; 827 - ctx->osequence++; 828 - 829 - /* 830 - * Workaround coda firmware BUG that only marks the first 831 - * frame as IDR. This is a problem for some decoders that can't 832 - * recover when a frame is lost. 833 - */ 834 - if (src_buf->v4l2_buf.sequence % ctx->params.gop_size) { 835 - src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME; 836 - src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME; 837 - } else { 838 - src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME; 839 - src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME; 840 - } 841 - 842 - if (dev->devtype->product == CODA_960) 843 - coda_set_gdi_regs(ctx); 844 - 845 - /* 846 - * Copy headers at the beginning of the first frame for H.264 only. 847 - * In MPEG4 they are already copied by the coda. 848 - */ 849 - if (src_buf->v4l2_buf.sequence == 0) { 850 - pic_stream_buffer_addr = 851 - vb2_dma_contig_plane_dma_addr(dst_buf, 0) + 852 - ctx->vpu_header_size[0] + 853 - ctx->vpu_header_size[1] + 854 - ctx->vpu_header_size[2]; 855 - pic_stream_buffer_size = CODA_MAX_FRAME_SIZE - 856 - ctx->vpu_header_size[0] - 857 - ctx->vpu_header_size[1] - 858 - ctx->vpu_header_size[2]; 859 - memcpy(vb2_plane_vaddr(dst_buf, 0), 860 - &ctx->vpu_header[0][0], ctx->vpu_header_size[0]); 861 - memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0], 862 - &ctx->vpu_header[1][0], ctx->vpu_header_size[1]); 863 - memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0] + 864 - ctx->vpu_header_size[1], &ctx->vpu_header[2][0], 865 - ctx->vpu_header_size[2]); 866 - } else { 867 - pic_stream_buffer_addr = 868 - vb2_dma_contig_plane_dma_addr(dst_buf, 0); 869 - pic_stream_buffer_size = CODA_MAX_FRAME_SIZE; 870 - } 871 - 872 - if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) { 873 - force_ipicture = 1; 874 - switch (dst_fourcc) { 875 - case V4L2_PIX_FMT_H264: 876 - quant_param = ctx->params.h264_intra_qp; 877 - break; 878 - case V4L2_PIX_FMT_MPEG4: 879 - quant_param = ctx->params.mpeg4_intra_qp; 880 - break; 881 - default: 882 - v4l2_warn(&ctx->dev->v4l2_dev, 883 - "cannot set intra qp, fmt not supported\n"); 884 - break; 885 - } 886 - } else { 887 - force_ipicture = 0; 888 - switch (dst_fourcc) { 889 - case V4L2_PIX_FMT_H264: 890 - quant_param = ctx->params.h264_inter_qp; 891 - break; 892 - case V4L2_PIX_FMT_MPEG4: 893 - quant_param = ctx->params.mpeg4_inter_qp; 894 - break; 895 - default: 896 - v4l2_warn(&ctx->dev->v4l2_dev, 897 - "cannot set inter qp, fmt not supported\n"); 898 - break; 899 - } 900 - } 901 - 902 - /* submit */ 903 - coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode, CODA_CMD_ENC_PIC_ROT_MODE); 904 - coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS); 905 - 906 - 907 - picture_y = vb2_dma_contig_plane_dma_addr(src_buf, 0); 908 - switch (q_data_src->fourcc) { 909 - case V4L2_PIX_FMT_YVU420: 910 - /* Switch Cb and Cr for YVU420 format */ 911 - picture_cr = picture_y + q_data_src->bytesperline * 912 - q_data_src->height; 913 - picture_cb = picture_cr + q_data_src->bytesperline / 2 * 914 - q_data_src->height / 2; 915 - break; 916 - case V4L2_PIX_FMT_YUV420: 917 - default: 918 - picture_cb = picture_y + q_data_src->bytesperline * 919 - q_data_src->height; 920 - picture_cr = picture_cb + q_data_src->bytesperline / 2 * 921 - q_data_src->height / 2; 922 - break; 923 - } 924 - 925 - if (dev->devtype->product == CODA_960) { 926 - coda_write(dev, 4/*FIXME: 0*/, CODA9_CMD_ENC_PIC_SRC_INDEX); 927 - coda_write(dev, q_data_src->width, CODA9_CMD_ENC_PIC_SRC_STRIDE); 928 - coda_write(dev, 0, CODA9_CMD_ENC_PIC_SUB_FRAME_SYNC); 929 - 930 - coda_write(dev, picture_y, CODA9_CMD_ENC_PIC_SRC_ADDR_Y); 931 - coda_write(dev, picture_cb, CODA9_CMD_ENC_PIC_SRC_ADDR_CB); 932 - coda_write(dev, picture_cr, CODA9_CMD_ENC_PIC_SRC_ADDR_CR); 933 - } else { 934 - coda_write(dev, picture_y, CODA_CMD_ENC_PIC_SRC_ADDR_Y); 935 - coda_write(dev, picture_cb, CODA_CMD_ENC_PIC_SRC_ADDR_CB); 936 - coda_write(dev, picture_cr, CODA_CMD_ENC_PIC_SRC_ADDR_CR); 937 - } 938 - coda_write(dev, force_ipicture << 1 & 0x2, 939 - CODA_CMD_ENC_PIC_OPTION); 940 - 941 - coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START); 942 - coda_write(dev, pic_stream_buffer_size / 1024, 943 - CODA_CMD_ENC_PIC_BB_SIZE); 944 - 945 - if (!ctx->streamon_out) { 946 - /* After streamoff on the output side, set the stream end flag */ 947 - ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG; 948 - coda_write(dev, ctx->bit_stream_param, CODA_REG_BIT_BIT_STREAM_PARAM); 949 - } 950 - 951 - if (dev->devtype->product != CODA_DX6) 952 - coda_write(dev, ctx->iram_info.axi_sram_use, 953 - CODA7_REG_BIT_AXI_SRAM_USE); 954 - 955 - coda_command_async(ctx, CODA_COMMAND_PIC_RUN); 956 - 957 - return 0; 958 - } 959 946 960 947 static void coda_device_run(void *m2m_priv) 961 948 { ··· 706 1209 707 1210 queue_work(dev->workqueue, &ctx->pic_run_work); 708 1211 } 709 - 710 - static void coda_free_framebuffers(struct coda_ctx *ctx); 711 - static void coda_free_context_buffers(struct coda_ctx *ctx); 712 - 713 - static void coda_seq_end_work(struct work_struct *work) 714 - { 715 - struct coda_ctx *ctx = container_of(work, struct coda_ctx, seq_end_work); 716 - struct coda_dev *dev = ctx->dev; 717 - 718 - mutex_lock(&ctx->buffer_mutex); 719 - mutex_lock(&dev->coda_mutex); 720 - 721 - v4l2_dbg(1, coda_debug, &dev->v4l2_dev, 722 - "%d: %s: sent command 'SEQ_END' to coda\n", ctx->idx, __func__); 723 - if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) { 724 - v4l2_err(&dev->v4l2_dev, 725 - "CODA_COMMAND_SEQ_END failed\n"); 726 - } 727 - 728 - kfifo_init(&ctx->bitstream_fifo, 729 - ctx->bitstream.vaddr, ctx->bitstream.size); 730 - 731 - coda_free_framebuffers(ctx); 732 - coda_free_context_buffers(ctx); 733 - 734 - mutex_unlock(&dev->coda_mutex); 735 - mutex_unlock(&ctx->buffer_mutex); 736 - } 737 - 738 - static void coda_finish_decode(struct coda_ctx *ctx); 739 - static void coda_finish_encode(struct coda_ctx *ctx); 740 1212 741 1213 static void coda_pic_run_work(struct work_struct *work) 742 1214 { ··· 966 1500 } 967 1501 } 968 1502 969 - static void coda_parabuf_write(struct coda_ctx *ctx, int index, u32 value) 970 - { 971 - struct coda_dev *dev = ctx->dev; 972 - u32 *p = ctx->parabuf.vaddr; 973 - 974 - if (dev->devtype->product == CODA_DX6) 975 - p[index] = value; 976 - else 977 - p[index ^ 1] = value; 978 - } 979 - 980 - static int coda_alloc_aux_buf(struct coda_dev *dev, 981 - struct coda_aux_buf *buf, size_t size, 982 - const char *name, struct dentry *parent) 1503 + int coda_alloc_aux_buf(struct coda_dev *dev, struct coda_aux_buf *buf, 1504 + size_t size, const char *name, struct dentry *parent) 983 1505 { 984 1506 buf->vaddr = dma_alloc_coherent(&dev->plat_dev->dev, size, &buf->paddr, 985 1507 GFP_KERNEL); ··· 988 1534 return 0; 989 1535 } 990 1536 991 - static inline int coda_alloc_context_buf(struct coda_ctx *ctx, 992 - struct coda_aux_buf *buf, size_t size, 993 - const char *name) 994 - { 995 - return coda_alloc_aux_buf(ctx->dev, buf, size, name, ctx->debugfs_entry); 996 - } 997 - 998 - static void coda_free_aux_buf(struct coda_dev *dev, 999 - struct coda_aux_buf *buf) 1537 + void coda_free_aux_buf(struct coda_dev *dev, 1538 + struct coda_aux_buf *buf) 1000 1539 { 1001 1540 if (buf->vaddr) { 1002 1541 dma_free_coherent(&dev->plat_dev->dev, buf->size, ··· 999 1552 } 1000 1553 debugfs_remove(buf->dentry); 1001 1554 } 1002 - 1003 - static void coda_free_framebuffers(struct coda_ctx *ctx) 1004 - { 1005 - int i; 1006 - 1007 - for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++) 1008 - coda_free_aux_buf(ctx->dev, &ctx->internal_frames[i]); 1009 - } 1010 - 1011 - static int coda_alloc_framebuffers(struct coda_ctx *ctx, struct coda_q_data *q_data, u32 fourcc) 1012 - { 1013 - struct coda_dev *dev = ctx->dev; 1014 - int width, height; 1015 - dma_addr_t paddr; 1016 - int ysize; 1017 - int ret; 1018 - int i; 1019 - 1020 - if (ctx->codec && (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 || 1021 - ctx->codec->dst_fourcc == V4L2_PIX_FMT_H264)) { 1022 - width = round_up(q_data->width, 16); 1023 - height = round_up(q_data->height, 16); 1024 - } else { 1025 - width = round_up(q_data->width, 8); 1026 - height = q_data->height; 1027 - } 1028 - ysize = width * height; 1029 - 1030 - /* Allocate frame buffers */ 1031 - for (i = 0; i < ctx->num_internal_frames; i++) { 1032 - size_t size; 1033 - char *name; 1034 - 1035 - size = ysize + ysize / 2; 1036 - if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 && 1037 - dev->devtype->product != CODA_DX6) 1038 - size += ysize / 4; 1039 - name = kasprintf(GFP_KERNEL, "fb%d", i); 1040 - ret = coda_alloc_context_buf(ctx, &ctx->internal_frames[i], 1041 - size, name); 1042 - kfree(name); 1043 - if (ret < 0) { 1044 - coda_free_framebuffers(ctx); 1045 - return ret; 1046 - } 1047 - } 1048 - 1049 - /* Register frame buffers in the parameter buffer */ 1050 - for (i = 0; i < ctx->num_internal_frames; i++) { 1051 - paddr = ctx->internal_frames[i].paddr; 1052 - coda_parabuf_write(ctx, i * 3 + 0, paddr); /* Y */ 1053 - coda_parabuf_write(ctx, i * 3 + 1, paddr + ysize); /* Cb */ 1054 - coda_parabuf_write(ctx, i * 3 + 2, paddr + ysize + ysize/4); /* Cr */ 1055 - 1056 - /* mvcol buffer for h.264 */ 1057 - if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 && 1058 - dev->devtype->product != CODA_DX6) 1059 - coda_parabuf_write(ctx, 96 + i, 1060 - ctx->internal_frames[i].paddr + 1061 - ysize + ysize/4 + ysize/4); 1062 - } 1063 - 1064 - /* mvcol buffer for mpeg4 */ 1065 - if ((dev->devtype->product != CODA_DX6) && 1066 - (ctx->codec->src_fourcc == V4L2_PIX_FMT_MPEG4)) 1067 - coda_parabuf_write(ctx, 97, ctx->internal_frames[i].paddr + 1068 - ysize + ysize/4 + ysize/4); 1069 - 1070 - return 0; 1071 - } 1072 - 1073 - static phys_addr_t coda_iram_alloc(struct coda_iram_info *iram, size_t size) 1074 - { 1075 - phys_addr_t ret; 1076 - 1077 - size = round_up(size, 1024); 1078 - if (size > iram->remaining) 1079 - return 0; 1080 - iram->remaining -= size; 1081 - 1082 - ret = iram->next_paddr; 1083 - iram->next_paddr += size; 1084 - 1085 - return ret; 1086 - } 1087 - 1088 - static void coda_setup_iram(struct coda_ctx *ctx) 1089 - { 1090 - struct coda_iram_info *iram_info = &ctx->iram_info; 1091 - struct coda_dev *dev = ctx->dev; 1092 - int mb_width; 1093 - int dbk_bits; 1094 - int bit_bits; 1095 - int ip_bits; 1096 - 1097 - memset(iram_info, 0, sizeof(*iram_info)); 1098 - iram_info->next_paddr = dev->iram.paddr; 1099 - iram_info->remaining = dev->iram.size; 1100 - 1101 - switch (dev->devtype->product) { 1102 - case CODA_7541: 1103 - dbk_bits = CODA7_USE_HOST_DBK_ENABLE | CODA7_USE_DBK_ENABLE; 1104 - bit_bits = CODA7_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE; 1105 - ip_bits = CODA7_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE; 1106 - break; 1107 - case CODA_960: 1108 - dbk_bits = CODA9_USE_HOST_DBK_ENABLE | CODA9_USE_DBK_ENABLE; 1109 - bit_bits = CODA9_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE; 1110 - ip_bits = CODA9_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE; 1111 - break; 1112 - default: /* CODA_DX6 */ 1113 - return; 1114 - } 1115 - 1116 - if (ctx->inst_type == CODA_INST_ENCODER) { 1117 - struct coda_q_data *q_data_src; 1118 - 1119 - q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT); 1120 - mb_width = DIV_ROUND_UP(q_data_src->width, 16); 1121 - 1122 - /* Prioritize in case IRAM is too small for everything */ 1123 - if (dev->devtype->product == CODA_7541) { 1124 - iram_info->search_ram_size = round_up(mb_width * 16 * 1125 - 36 + 2048, 1024); 1126 - iram_info->search_ram_paddr = coda_iram_alloc(iram_info, 1127 - iram_info->search_ram_size); 1128 - if (!iram_info->search_ram_paddr) { 1129 - pr_err("IRAM is smaller than the search ram size\n"); 1130 - goto out; 1131 - } 1132 - iram_info->axi_sram_use |= CODA7_USE_HOST_ME_ENABLE | 1133 - CODA7_USE_ME_ENABLE; 1134 - } 1135 - 1136 - /* Only H.264BP and H.263P3 are considered */ 1137 - iram_info->buf_dbk_y_use = coda_iram_alloc(iram_info, 64 * mb_width); 1138 - iram_info->buf_dbk_c_use = coda_iram_alloc(iram_info, 64 * mb_width); 1139 - if (!iram_info->buf_dbk_c_use) 1140 - goto out; 1141 - iram_info->axi_sram_use |= dbk_bits; 1142 - 1143 - iram_info->buf_bit_use = coda_iram_alloc(iram_info, 128 * mb_width); 1144 - if (!iram_info->buf_bit_use) 1145 - goto out; 1146 - iram_info->axi_sram_use |= bit_bits; 1147 - 1148 - iram_info->buf_ip_ac_dc_use = coda_iram_alloc(iram_info, 128 * mb_width); 1149 - if (!iram_info->buf_ip_ac_dc_use) 1150 - goto out; 1151 - iram_info->axi_sram_use |= ip_bits; 1152 - 1153 - /* OVL and BTP disabled for encoder */ 1154 - } else if (ctx->inst_type == CODA_INST_DECODER) { 1155 - struct coda_q_data *q_data_dst; 1156 - 1157 - q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE); 1158 - mb_width = DIV_ROUND_UP(q_data_dst->width, 16); 1159 - 1160 - iram_info->buf_dbk_y_use = coda_iram_alloc(iram_info, 128 * mb_width); 1161 - iram_info->buf_dbk_c_use = coda_iram_alloc(iram_info, 128 * mb_width); 1162 - if (!iram_info->buf_dbk_c_use) 1163 - goto out; 1164 - iram_info->axi_sram_use |= dbk_bits; 1165 - 1166 - iram_info->buf_bit_use = coda_iram_alloc(iram_info, 128 * mb_width); 1167 - if (!iram_info->buf_bit_use) 1168 - goto out; 1169 - iram_info->axi_sram_use |= bit_bits; 1170 - 1171 - iram_info->buf_ip_ac_dc_use = coda_iram_alloc(iram_info, 128 * mb_width); 1172 - if (!iram_info->buf_ip_ac_dc_use) 1173 - goto out; 1174 - iram_info->axi_sram_use |= ip_bits; 1175 - 1176 - /* OVL and BTP unused as there is no VC1 support yet */ 1177 - } 1178 - 1179 - out: 1180 - if (!(iram_info->axi_sram_use & CODA7_USE_HOST_IP_ENABLE)) 1181 - v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, 1182 - "IRAM smaller than needed\n"); 1183 - 1184 - if (dev->devtype->product == CODA_7541) { 1185 - /* TODO - Enabling these causes picture errors on CODA7541 */ 1186 - if (ctx->inst_type == CODA_INST_DECODER) { 1187 - /* fw 1.4.50 */ 1188 - iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE | 1189 - CODA7_USE_IP_ENABLE); 1190 - } else { 1191 - /* fw 13.4.29 */ 1192 - iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE | 1193 - CODA7_USE_HOST_DBK_ENABLE | 1194 - CODA7_USE_IP_ENABLE | 1195 - CODA7_USE_DBK_ENABLE); 1196 - } 1197 - } 1198 - } 1199 - 1200 - static void coda_free_context_buffers(struct coda_ctx *ctx) 1201 - { 1202 - struct coda_dev *dev = ctx->dev; 1203 - 1204 - coda_free_aux_buf(dev, &ctx->slicebuf); 1205 - coda_free_aux_buf(dev, &ctx->psbuf); 1206 - if (dev->devtype->product != CODA_DX6) 1207 - coda_free_aux_buf(dev, &ctx->workbuf); 1208 - } 1209 - 1210 - static int coda_alloc_context_buffers(struct coda_ctx *ctx, 1211 - struct coda_q_data *q_data) 1212 - { 1213 - struct coda_dev *dev = ctx->dev; 1214 - size_t size; 1215 - int ret; 1216 - 1217 - if (dev->devtype->product == CODA_DX6) 1218 - return 0; 1219 - 1220 - if (ctx->psbuf.vaddr) { 1221 - v4l2_err(&dev->v4l2_dev, "psmembuf still allocated\n"); 1222 - return -EBUSY; 1223 - } 1224 - if (ctx->slicebuf.vaddr) { 1225 - v4l2_err(&dev->v4l2_dev, "slicebuf still allocated\n"); 1226 - return -EBUSY; 1227 - } 1228 - if (ctx->workbuf.vaddr) { 1229 - v4l2_err(&dev->v4l2_dev, "context buffer still allocated\n"); 1230 - ret = -EBUSY; 1231 - return -ENOMEM; 1232 - } 1233 - 1234 - if (q_data->fourcc == V4L2_PIX_FMT_H264) { 1235 - /* worst case slice size */ 1236 - size = (DIV_ROUND_UP(q_data->width, 16) * 1237 - DIV_ROUND_UP(q_data->height, 16)) * 3200 / 8 + 512; 1238 - ret = coda_alloc_context_buf(ctx, &ctx->slicebuf, size, "slicebuf"); 1239 - if (ret < 0) { 1240 - v4l2_err(&dev->v4l2_dev, "failed to allocate %d byte slice buffer", 1241 - ctx->slicebuf.size); 1242 - return ret; 1243 - } 1244 - } 1245 - 1246 - if (dev->devtype->product == CODA_7541) { 1247 - ret = coda_alloc_context_buf(ctx, &ctx->psbuf, CODA7_PS_BUF_SIZE, "psbuf"); 1248 - if (ret < 0) { 1249 - v4l2_err(&dev->v4l2_dev, "failed to allocate psmem buffer"); 1250 - goto err; 1251 - } 1252 - } 1253 - 1254 - size = dev->devtype->workbuf_size; 1255 - if (dev->devtype->product == CODA_960 && 1256 - q_data->fourcc == V4L2_PIX_FMT_H264) 1257 - size += CODA9_PS_SAVE_SIZE; 1258 - ret = coda_alloc_context_buf(ctx, &ctx->workbuf, size, "workbuf"); 1259 - if (ret < 0) { 1260 - v4l2_err(&dev->v4l2_dev, "failed to allocate %d byte context buffer", 1261 - ctx->workbuf.size); 1262 - goto err; 1263 - } 1264 - 1265 - return 0; 1266 - 1267 - err: 1268 - coda_free_context_buffers(ctx); 1269 - return ret; 1270 - } 1271 - 1272 - static int __coda_start_decoding(struct coda_ctx *ctx) 1273 - { 1274 - struct coda_q_data *q_data_src, *q_data_dst; 1275 - u32 bitstream_buf, bitstream_size; 1276 - struct coda_dev *dev = ctx->dev; 1277 - int width, height; 1278 - u32 src_fourcc; 1279 - u32 val; 1280 - int ret; 1281 - 1282 - /* Start decoding */ 1283 - q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT); 1284 - q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE); 1285 - bitstream_buf = ctx->bitstream.paddr; 1286 - bitstream_size = ctx->bitstream.size; 1287 - src_fourcc = q_data_src->fourcc; 1288 - 1289 - /* Allocate per-instance buffers */ 1290 - ret = coda_alloc_context_buffers(ctx, q_data_src); 1291 - if (ret < 0) 1292 - return ret; 1293 - 1294 - coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR); 1295 - 1296 - /* Update coda bitstream read and write pointers from kfifo */ 1297 - coda_kfifo_sync_to_device_full(ctx); 1298 - 1299 - ctx->display_idx = -1; 1300 - ctx->frm_dis_flg = 0; 1301 - coda_write(dev, 0, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx)); 1302 - 1303 - coda_write(dev, CODA_BIT_DEC_SEQ_INIT_ESCAPE, 1304 - CODA_REG_BIT_BIT_STREAM_PARAM); 1305 - 1306 - coda_write(dev, bitstream_buf, CODA_CMD_DEC_SEQ_BB_START); 1307 - coda_write(dev, bitstream_size / 1024, CODA_CMD_DEC_SEQ_BB_SIZE); 1308 - val = 0; 1309 - if ((dev->devtype->product == CODA_7541) || 1310 - (dev->devtype->product == CODA_960)) 1311 - val |= CODA_REORDER_ENABLE; 1312 - coda_write(dev, val, CODA_CMD_DEC_SEQ_OPTION); 1313 - 1314 - ctx->params.codec_mode = ctx->codec->mode; 1315 - if (dev->devtype->product == CODA_960 && 1316 - src_fourcc == V4L2_PIX_FMT_MPEG4) 1317 - ctx->params.codec_mode_aux = CODA_MP4_AUX_MPEG4; 1318 - else 1319 - ctx->params.codec_mode_aux = 0; 1320 - if (src_fourcc == V4L2_PIX_FMT_H264) { 1321 - if (dev->devtype->product == CODA_7541) { 1322 - coda_write(dev, ctx->psbuf.paddr, 1323 - CODA_CMD_DEC_SEQ_PS_BB_START); 1324 - coda_write(dev, (CODA7_PS_BUF_SIZE / 1024), 1325 - CODA_CMD_DEC_SEQ_PS_BB_SIZE); 1326 - } 1327 - if (dev->devtype->product == CODA_960) { 1328 - coda_write(dev, 0, CODA_CMD_DEC_SEQ_X264_MV_EN); 1329 - coda_write(dev, 512, CODA_CMD_DEC_SEQ_SPP_CHUNK_SIZE); 1330 - } 1331 - } 1332 - if (dev->devtype->product != CODA_960) { 1333 - coda_write(dev, 0, CODA_CMD_DEC_SEQ_SRC_SIZE); 1334 - } 1335 - 1336 - if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) { 1337 - v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n"); 1338 - coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM); 1339 - return -ETIMEDOUT; 1340 - } 1341 - 1342 - /* Update kfifo out pointer from coda bitstream read pointer */ 1343 - coda_kfifo_sync_from_device(ctx); 1344 - 1345 - coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM); 1346 - 1347 - if (coda_read(dev, CODA_RET_DEC_SEQ_SUCCESS) == 0) { 1348 - v4l2_err(&dev->v4l2_dev, 1349 - "CODA_COMMAND_SEQ_INIT failed, error code = %d\n", 1350 - coda_read(dev, CODA_RET_DEC_SEQ_ERR_REASON)); 1351 - return -EAGAIN; 1352 - } 1353 - 1354 - val = coda_read(dev, CODA_RET_DEC_SEQ_SRC_SIZE); 1355 - if (dev->devtype->product == CODA_DX6) { 1356 - width = (val >> CODADX6_PICWIDTH_OFFSET) & CODADX6_PICWIDTH_MASK; 1357 - height = val & CODADX6_PICHEIGHT_MASK; 1358 - } else { 1359 - width = (val >> CODA7_PICWIDTH_OFFSET) & CODA7_PICWIDTH_MASK; 1360 - height = val & CODA7_PICHEIGHT_MASK; 1361 - } 1362 - 1363 - if (width > q_data_dst->width || height > q_data_dst->height) { 1364 - v4l2_err(&dev->v4l2_dev, "stream is %dx%d, not %dx%d\n", 1365 - width, height, q_data_dst->width, q_data_dst->height); 1366 - return -EINVAL; 1367 - } 1368 - 1369 - width = round_up(width, 16); 1370 - height = round_up(height, 16); 1371 - 1372 - v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "%s instance %d now: %dx%d\n", 1373 - __func__, ctx->idx, width, height); 1374 - 1375 - ctx->num_internal_frames = coda_read(dev, CODA_RET_DEC_SEQ_FRAME_NEED); 1376 - if (ctx->num_internal_frames > CODA_MAX_FRAMEBUFFERS) { 1377 - v4l2_err(&dev->v4l2_dev, 1378 - "not enough framebuffers to decode (%d < %d)\n", 1379 - CODA_MAX_FRAMEBUFFERS, ctx->num_internal_frames); 1380 - return -EINVAL; 1381 - } 1382 - 1383 - if (src_fourcc == V4L2_PIX_FMT_H264) { 1384 - u32 left_right; 1385 - u32 top_bottom; 1386 - 1387 - left_right = coda_read(dev, CODA_RET_DEC_SEQ_CROP_LEFT_RIGHT); 1388 - top_bottom = coda_read(dev, CODA_RET_DEC_SEQ_CROP_TOP_BOTTOM); 1389 - 1390 - q_data_dst->rect.left = (left_right >> 10) & 0x3ff; 1391 - q_data_dst->rect.top = (top_bottom >> 10) & 0x3ff; 1392 - q_data_dst->rect.width = width - q_data_dst->rect.left - 1393 - (left_right & 0x3ff); 1394 - q_data_dst->rect.height = height - q_data_dst->rect.top - 1395 - (top_bottom & 0x3ff); 1396 - } 1397 - 1398 - ret = coda_alloc_framebuffers(ctx, q_data_dst, src_fourcc); 1399 - if (ret < 0) 1400 - return ret; 1401 - 1402 - /* Tell the decoder how many frame buffers we allocated. */ 1403 - coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM); 1404 - coda_write(dev, width, CODA_CMD_SET_FRAME_BUF_STRIDE); 1405 - 1406 - if (dev->devtype->product != CODA_DX6) { 1407 - /* Set secondary AXI IRAM */ 1408 - coda_setup_iram(ctx); 1409 - 1410 - coda_write(dev, ctx->iram_info.buf_bit_use, 1411 - CODA7_CMD_SET_FRAME_AXI_BIT_ADDR); 1412 - coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use, 1413 - CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR); 1414 - coda_write(dev, ctx->iram_info.buf_dbk_y_use, 1415 - CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR); 1416 - coda_write(dev, ctx->iram_info.buf_dbk_c_use, 1417 - CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR); 1418 - coda_write(dev, ctx->iram_info.buf_ovl_use, 1419 - CODA7_CMD_SET_FRAME_AXI_OVL_ADDR); 1420 - if (dev->devtype->product == CODA_960) 1421 - coda_write(dev, ctx->iram_info.buf_btp_use, 1422 - CODA9_CMD_SET_FRAME_AXI_BTP_ADDR); 1423 - } 1424 - 1425 - if (dev->devtype->product == CODA_960) { 1426 - coda_write(dev, -1, CODA9_CMD_SET_FRAME_DELAY); 1427 - 1428 - coda_write(dev, 0x20262024, CODA9_CMD_SET_FRAME_CACHE_SIZE); 1429 - coda_write(dev, 2 << CODA9_CACHE_PAGEMERGE_OFFSET | 1430 - 32 << CODA9_CACHE_LUMA_BUFFER_SIZE_OFFSET | 1431 - 8 << CODA9_CACHE_CB_BUFFER_SIZE_OFFSET | 1432 - 8 << CODA9_CACHE_CR_BUFFER_SIZE_OFFSET, 1433 - CODA9_CMD_SET_FRAME_CACHE_CONFIG); 1434 - } 1435 - 1436 - if (src_fourcc == V4L2_PIX_FMT_H264) { 1437 - coda_write(dev, ctx->slicebuf.paddr, 1438 - CODA_CMD_SET_FRAME_SLICE_BB_START); 1439 - coda_write(dev, ctx->slicebuf.size / 1024, 1440 - CODA_CMD_SET_FRAME_SLICE_BB_SIZE); 1441 - } 1442 - 1443 - if (dev->devtype->product == CODA_7541) { 1444 - int max_mb_x = 1920 / 16; 1445 - int max_mb_y = 1088 / 16; 1446 - int max_mb_num = max_mb_x * max_mb_y; 1447 - 1448 - coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y, 1449 - CODA7_CMD_SET_FRAME_MAX_DEC_SIZE); 1450 - } else if (dev->devtype->product == CODA_960) { 1451 - int max_mb_x = 1920 / 16; 1452 - int max_mb_y = 1088 / 16; 1453 - int max_mb_num = max_mb_x * max_mb_y; 1454 - 1455 - coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y, 1456 - CODA9_CMD_SET_FRAME_MAX_DEC_SIZE); 1457 - } 1458 - 1459 - if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) { 1460 - v4l2_err(&ctx->dev->v4l2_dev, 1461 - "CODA_COMMAND_SET_FRAME_BUF timeout\n"); 1462 - return -ETIMEDOUT; 1463 - } 1464 - 1465 - return 0; 1466 - } 1467 - 1468 - static int coda_start_decoding(struct coda_ctx *ctx) 1469 - { 1470 - struct coda_dev *dev = ctx->dev; 1471 - int ret; 1472 - 1473 - mutex_lock(&dev->coda_mutex); 1474 - ret = __coda_start_decoding(ctx); 1475 - mutex_unlock(&dev->coda_mutex); 1476 - 1477 - return ret; 1478 - } 1479 - 1480 - static int coda_encode_header(struct coda_ctx *ctx, struct vb2_buffer *buf, 1481 - int header_code, u8 *header, int *size) 1482 - { 1483 - struct coda_dev *dev = ctx->dev; 1484 - size_t bufsize; 1485 - int ret; 1486 - int i; 1487 - 1488 - if (dev->devtype->product == CODA_960) 1489 - memset(vb2_plane_vaddr(buf, 0), 0, 64); 1490 - 1491 - coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), 1492 - CODA_CMD_ENC_HEADER_BB_START); 1493 - bufsize = vb2_plane_size(buf, 0); 1494 - if (dev->devtype->product == CODA_960) 1495 - bufsize /= 1024; 1496 - coda_write(dev, bufsize, CODA_CMD_ENC_HEADER_BB_SIZE); 1497 - coda_write(dev, header_code, CODA_CMD_ENC_HEADER_CODE); 1498 - ret = coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER); 1499 - if (ret < 0) { 1500 - v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n"); 1501 - return ret; 1502 - } 1503 - 1504 - if (dev->devtype->product == CODA_960) { 1505 - for (i = 63; i > 0; i--) 1506 - if (((char *)vb2_plane_vaddr(buf, 0))[i] != 0) 1507 - break; 1508 - *size = i + 1; 1509 - } else { 1510 - *size = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx)) - 1511 - coda_read(dev, CODA_CMD_ENC_HEADER_BB_START); 1512 - } 1513 - memcpy(header, vb2_plane_vaddr(buf, 0), *size); 1514 - 1515 - return 0; 1516 - } 1517 - 1518 - static int coda_start_encoding(struct coda_ctx *ctx); 1519 1555 1520 1556 static int coda_start_streaming(struct vb2_queue *q, unsigned int count) 1521 1557 { ··· 1059 2129 } 1060 2130 1061 2131 ctx->initialized = 1; 1062 - return ret; 1063 - } 1064 - 1065 - static int coda_start_encoding(struct coda_ctx *ctx) 1066 - { 1067 - struct coda_dev *dev = ctx->dev; 1068 - struct v4l2_device *v4l2_dev = &dev->v4l2_dev; 1069 - struct coda_q_data *q_data_src, *q_data_dst; 1070 - u32 bitstream_buf, bitstream_size; 1071 - struct vb2_buffer *buf; 1072 - int gamma, ret, value; 1073 - u32 dst_fourcc; 1074 - 1075 - q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT); 1076 - q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE); 1077 - dst_fourcc = q_data_dst->fourcc; 1078 - 1079 - /* Allocate per-instance buffers */ 1080 - ret = coda_alloc_context_buffers(ctx, q_data_src); 1081 - if (ret < 0) 1082 - return ret; 1083 - 1084 - buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); 1085 - bitstream_buf = vb2_dma_contig_plane_dma_addr(buf, 0); 1086 - bitstream_size = q_data_dst->sizeimage; 1087 - 1088 - if (!coda_is_initialized(dev)) { 1089 - v4l2_err(v4l2_dev, "coda is not initialized.\n"); 1090 - return -EFAULT; 1091 - } 1092 - 1093 - mutex_lock(&dev->coda_mutex); 1094 - 1095 - coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR); 1096 - coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->reg_idx)); 1097 - coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->reg_idx)); 1098 - switch (dev->devtype->product) { 1099 - case CODA_DX6: 1100 - coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN | 1101 - CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL); 1102 - break; 1103 - case CODA_960: 1104 - coda_write(dev, 0, CODA9_GDI_WPROT_RGN_EN); 1105 - /* fallthrough */ 1106 - case CODA_7541: 1107 - coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN | 1108 - CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL); 1109 - break; 1110 - } 1111 - 1112 - value = coda_read(dev, CODA_REG_BIT_FRAME_MEM_CTRL); 1113 - value &= ~(1 << 2 | 0x7 << 9); 1114 - ctx->frame_mem_ctrl = value; 1115 - coda_write(dev, value, CODA_REG_BIT_FRAME_MEM_CTRL); 1116 - 1117 - if (dev->devtype->product == CODA_DX6) { 1118 - /* Configure the coda */ 1119 - coda_write(dev, dev->iram.paddr, CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR); 1120 - } 1121 - 1122 - /* Could set rotation here if needed */ 1123 - switch (dev->devtype->product) { 1124 - case CODA_DX6: 1125 - value = (q_data_src->width & CODADX6_PICWIDTH_MASK) << CODADX6_PICWIDTH_OFFSET; 1126 - value |= (q_data_src->height & CODADX6_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET; 1127 - break; 1128 - case CODA_7541: 1129 - if (dst_fourcc == V4L2_PIX_FMT_H264) { 1130 - value = (round_up(q_data_src->width, 16) & 1131 - CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET; 1132 - value |= (round_up(q_data_src->height, 16) & 1133 - CODA7_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET; 1134 - break; 1135 - } 1136 - /* fallthrough */ 1137 - case CODA_960: 1138 - value = (q_data_src->width & CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET; 1139 - value |= (q_data_src->height & CODA7_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET; 1140 - } 1141 - coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE); 1142 - coda_write(dev, ctx->params.framerate, 1143 - CODA_CMD_ENC_SEQ_SRC_F_RATE); 1144 - 1145 - ctx->params.codec_mode = ctx->codec->mode; 1146 - switch (dst_fourcc) { 1147 - case V4L2_PIX_FMT_MPEG4: 1148 - if (dev->devtype->product == CODA_960) 1149 - coda_write(dev, CODA9_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD); 1150 - else 1151 - coda_write(dev, CODA_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD); 1152 - coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA); 1153 - break; 1154 - case V4L2_PIX_FMT_H264: 1155 - if (dev->devtype->product == CODA_960) 1156 - coda_write(dev, CODA9_STD_H264, CODA_CMD_ENC_SEQ_COD_STD); 1157 - else 1158 - coda_write(dev, CODA_STD_H264, CODA_CMD_ENC_SEQ_COD_STD); 1159 - if (ctx->params.h264_deblk_enabled) { 1160 - value = ((ctx->params.h264_deblk_alpha & 1161 - CODA_264PARAM_DEBLKFILTEROFFSETALPHA_MASK) << 1162 - CODA_264PARAM_DEBLKFILTEROFFSETALPHA_OFFSET) | 1163 - ((ctx->params.h264_deblk_beta & 1164 - CODA_264PARAM_DEBLKFILTEROFFSETBETA_MASK) << 1165 - CODA_264PARAM_DEBLKFILTEROFFSETBETA_OFFSET); 1166 - } else { 1167 - value = 1 << CODA_264PARAM_DISABLEDEBLK_OFFSET; 1168 - } 1169 - coda_write(dev, value, CODA_CMD_ENC_SEQ_264_PARA); 1170 - break; 1171 - default: 1172 - v4l2_err(v4l2_dev, 1173 - "dst format (0x%08x) invalid.\n", dst_fourcc); 1174 - ret = -EINVAL; 1175 - goto out; 1176 - } 1177 - 1178 - switch (ctx->params.slice_mode) { 1179 - case V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE: 1180 - value = 0; 1181 - break; 1182 - case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB: 1183 - value = (ctx->params.slice_max_mb & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET; 1184 - value |= (1 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET; 1185 - value |= 1 & CODA_SLICING_MODE_MASK; 1186 - break; 1187 - case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES: 1188 - value = (ctx->params.slice_max_bits & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET; 1189 - value |= (0 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET; 1190 - value |= 1 & CODA_SLICING_MODE_MASK; 1191 - break; 1192 - } 1193 - coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE); 1194 - value = ctx->params.gop_size & CODA_GOP_SIZE_MASK; 1195 - coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE); 1196 - 1197 - if (ctx->params.bitrate) { 1198 - /* Rate control enabled */ 1199 - value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK) << CODA_RATECONTROL_BITRATE_OFFSET; 1200 - value |= 1 & CODA_RATECONTROL_ENABLE_MASK; 1201 - if (dev->devtype->product == CODA_960) 1202 - value |= BIT(31); /* disable autoskip */ 1203 - } else { 1204 - value = 0; 1205 - } 1206 - coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA); 1207 - 1208 - coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_BUF_SIZE); 1209 - coda_write(dev, ctx->params.intra_refresh, 1210 - CODA_CMD_ENC_SEQ_INTRA_REFRESH); 1211 - 1212 - coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START); 1213 - coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE); 1214 - 1215 - 1216 - value = 0; 1217 - if (dev->devtype->product == CODA_960) 1218 - gamma = CODA9_DEFAULT_GAMMA; 1219 - else 1220 - gamma = CODA_DEFAULT_GAMMA; 1221 - if (gamma > 0) { 1222 - coda_write(dev, (gamma & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET, 1223 - CODA_CMD_ENC_SEQ_RC_GAMMA); 1224 - } 1225 - 1226 - if (ctx->params.h264_min_qp || ctx->params.h264_max_qp) { 1227 - coda_write(dev, 1228 - ctx->params.h264_min_qp << CODA_QPMIN_OFFSET | 1229 - ctx->params.h264_max_qp << CODA_QPMAX_OFFSET, 1230 - CODA_CMD_ENC_SEQ_RC_QP_MIN_MAX); 1231 - } 1232 - if (dev->devtype->product == CODA_960) { 1233 - if (ctx->params.h264_max_qp) 1234 - value |= 1 << CODA9_OPTION_RCQPMAX_OFFSET; 1235 - if (CODA_DEFAULT_GAMMA > 0) 1236 - value |= 1 << CODA9_OPTION_GAMMA_OFFSET; 1237 - } else { 1238 - if (CODA_DEFAULT_GAMMA > 0) { 1239 - if (dev->devtype->product == CODA_DX6) 1240 - value |= 1 << CODADX6_OPTION_GAMMA_OFFSET; 1241 - else 1242 - value |= 1 << CODA7_OPTION_GAMMA_OFFSET; 1243 - } 1244 - if (ctx->params.h264_min_qp) 1245 - value |= 1 << CODA7_OPTION_RCQPMIN_OFFSET; 1246 - if (ctx->params.h264_max_qp) 1247 - value |= 1 << CODA7_OPTION_RCQPMAX_OFFSET; 1248 - } 1249 - coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION); 1250 - 1251 - coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_INTERVAL_MODE); 1252 - 1253 - coda_setup_iram(ctx); 1254 - 1255 - if (dst_fourcc == V4L2_PIX_FMT_H264) { 1256 - switch (dev->devtype->product) { 1257 - case CODA_DX6: 1258 - value = FMO_SLICE_SAVE_BUF_SIZE << 7; 1259 - coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO); 1260 - break; 1261 - case CODA_7541: 1262 - coda_write(dev, ctx->iram_info.search_ram_paddr, 1263 - CODA7_CMD_ENC_SEQ_SEARCH_BASE); 1264 - coda_write(dev, ctx->iram_info.search_ram_size, 1265 - CODA7_CMD_ENC_SEQ_SEARCH_SIZE); 1266 - break; 1267 - case CODA_960: 1268 - coda_write(dev, 0, CODA9_CMD_ENC_SEQ_ME_OPTION); 1269 - coda_write(dev, 0, CODA9_CMD_ENC_SEQ_INTRA_WEIGHT); 1270 - } 1271 - } 1272 - 1273 - ret = coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT); 1274 - if (ret < 0) { 1275 - v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n"); 1276 - goto out; 1277 - } 1278 - 1279 - if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0) { 1280 - v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT failed\n"); 1281 - ret = -EFAULT; 1282 - goto out; 1283 - } 1284 - 1285 - if (dev->devtype->product == CODA_960) 1286 - ctx->num_internal_frames = 4; 1287 - else 1288 - ctx->num_internal_frames = 2; 1289 - ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc); 1290 - if (ret < 0) { 1291 - v4l2_err(v4l2_dev, "failed to allocate framebuffers\n"); 1292 - goto out; 1293 - } 1294 - 1295 - coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM); 1296 - coda_write(dev, q_data_src->bytesperline, 1297 - CODA_CMD_SET_FRAME_BUF_STRIDE); 1298 - if (dev->devtype->product == CODA_7541) { 1299 - coda_write(dev, q_data_src->bytesperline, 1300 - CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE); 1301 - } 1302 - if (dev->devtype->product != CODA_DX6) { 1303 - coda_write(dev, ctx->iram_info.buf_bit_use, 1304 - CODA7_CMD_SET_FRAME_AXI_BIT_ADDR); 1305 - coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use, 1306 - CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR); 1307 - coda_write(dev, ctx->iram_info.buf_dbk_y_use, 1308 - CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR); 1309 - coda_write(dev, ctx->iram_info.buf_dbk_c_use, 1310 - CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR); 1311 - coda_write(dev, ctx->iram_info.buf_ovl_use, 1312 - CODA7_CMD_SET_FRAME_AXI_OVL_ADDR); 1313 - if (dev->devtype->product == CODA_960) { 1314 - coda_write(dev, ctx->iram_info.buf_btp_use, 1315 - CODA9_CMD_SET_FRAME_AXI_BTP_ADDR); 1316 - 1317 - /* FIXME */ 1318 - coda_write(dev, ctx->internal_frames[2].paddr, CODA9_CMD_SET_FRAME_SUBSAMP_A); 1319 - coda_write(dev, ctx->internal_frames[3].paddr, CODA9_CMD_SET_FRAME_SUBSAMP_B); 1320 - } 1321 - } 1322 - 1323 - ret = coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF); 1324 - if (ret < 0) { 1325 - v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n"); 1326 - goto out; 1327 - } 1328 - 1329 - /* Save stream headers */ 1330 - buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); 1331 - switch (dst_fourcc) { 1332 - case V4L2_PIX_FMT_H264: 1333 - /* 1334 - * Get SPS in the first frame and copy it to an 1335 - * intermediate buffer. 1336 - */ 1337 - ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_SPS, 1338 - &ctx->vpu_header[0][0], 1339 - &ctx->vpu_header_size[0]); 1340 - if (ret < 0) 1341 - goto out; 1342 - 1343 - /* 1344 - * Get PPS in the first frame and copy it to an 1345 - * intermediate buffer. 1346 - */ 1347 - ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_PPS, 1348 - &ctx->vpu_header[1][0], 1349 - &ctx->vpu_header_size[1]); 1350 - if (ret < 0) 1351 - goto out; 1352 - 1353 - /* 1354 - * Length of H.264 headers is variable and thus it might not be 1355 - * aligned for the coda to append the encoded frame. In that is 1356 - * the case a filler NAL must be added to header 2. 1357 - */ 1358 - ctx->vpu_header_size[2] = coda_h264_padding( 1359 - (ctx->vpu_header_size[0] + 1360 - ctx->vpu_header_size[1]), 1361 - ctx->vpu_header[2]); 1362 - break; 1363 - case V4L2_PIX_FMT_MPEG4: 1364 - /* 1365 - * Get VOS in the first frame and copy it to an 1366 - * intermediate buffer 1367 - */ 1368 - ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOS, 1369 - &ctx->vpu_header[0][0], 1370 - &ctx->vpu_header_size[0]); 1371 - if (ret < 0) 1372 - goto out; 1373 - 1374 - ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VIS, 1375 - &ctx->vpu_header[1][0], 1376 - &ctx->vpu_header_size[1]); 1377 - if (ret < 0) 1378 - goto out; 1379 - 1380 - ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOL, 1381 - &ctx->vpu_header[2][0], 1382 - &ctx->vpu_header_size[2]); 1383 - if (ret < 0) 1384 - goto out; 1385 - break; 1386 - default: 1387 - /* No more formats need to save headers at the moment */ 1388 - break; 1389 - } 1390 - 1391 - out: 1392 - mutex_unlock(&dev->coda_mutex); 1393 2132 return ret; 1394 2133 } 1395 2134 ··· 1261 2662 return vb2_queue_init(vq); 1262 2663 } 1263 2664 1264 - static int coda_encoder_queue_init(void *priv, struct vb2_queue *src_vq, 1265 - struct vb2_queue *dst_vq) 2665 + int coda_encoder_queue_init(void *priv, struct vb2_queue *src_vq, 2666 + struct vb2_queue *dst_vq) 1266 2667 { 1267 2668 int ret; 1268 2669 ··· 1281 2682 return coda_queue_init(priv, dst_vq); 1282 2683 } 1283 2684 1284 - static int coda_decoder_queue_init(void *priv, struct vb2_queue *src_vq, 1285 - struct vb2_queue *dst_vq) 2685 + int coda_decoder_queue_init(void *priv, struct vb2_queue *src_vq, 2686 + struct vb2_queue *dst_vq) 1286 2687 { 1287 2688 int ret; 1288 2689 ··· 1442 2843 return ret; 1443 2844 } 1444 2845 1445 - static void coda_bit_release(struct coda_ctx *ctx) 1446 - { 1447 - coda_free_framebuffers(ctx); 1448 - coda_free_context_buffers(ctx); 1449 - } 1450 - 1451 - struct coda_context_ops coda_encode_ops = { 1452 - .queue_init = coda_encoder_queue_init, 1453 - .start_streaming = coda_start_encoding, 1454 - .prepare_run = coda_prepare_encode, 1455 - .finish_run = coda_finish_encode, 1456 - .seq_end_work = coda_seq_end_work, 1457 - .release = coda_bit_release, 1458 - }; 1459 - 1460 - struct coda_context_ops coda_decode_ops = { 1461 - .queue_init = coda_decoder_queue_init, 1462 - .start_streaming = coda_start_decoding, 1463 - .prepare_run = coda_prepare_decode, 1464 - .finish_run = coda_finish_decode, 1465 - .seq_end_work = coda_seq_end_work, 1466 - .release = coda_bit_release, 1467 - }; 1468 - 1469 2846 static int coda_encoder_open(struct file *file) 1470 2847 { 1471 - return coda_open(file, CODA_INST_ENCODER, &coda_encode_ops); 2848 + return coda_open(file, CODA_INST_ENCODER, &coda_bit_encode_ops); 1472 2849 } 1473 2850 1474 2851 static int coda_decoder_open(struct file *file) 1475 2852 { 1476 - return coda_open(file, CODA_INST_DECODER, &coda_decode_ops); 2853 + return coda_open(file, CODA_INST_DECODER, &coda_bit_decode_ops); 1477 2854 } 1478 2855 1479 2856 static int coda_release(struct file *file) ··· 1512 2937 .unlocked_ioctl = video_ioctl2, 1513 2938 .mmap = v4l2_m2m_fop_mmap, 1514 2939 }; 1515 - 1516 - static void coda_finish_decode(struct coda_ctx *ctx) 1517 - { 1518 - struct coda_dev *dev = ctx->dev; 1519 - struct coda_q_data *q_data_src; 1520 - struct coda_q_data *q_data_dst; 1521 - struct vb2_buffer *dst_buf; 1522 - struct coda_timestamp *ts; 1523 - int width, height; 1524 - int decoded_idx; 1525 - int display_idx; 1526 - u32 src_fourcc; 1527 - int success; 1528 - u32 err_mb; 1529 - u32 val; 1530 - 1531 - dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); 1532 - 1533 - /* Update kfifo out pointer from coda bitstream read pointer */ 1534 - coda_kfifo_sync_from_device(ctx); 1535 - 1536 - /* 1537 - * in stream-end mode, the read pointer can overshoot the write pointer 1538 - * by up to 512 bytes 1539 - */ 1540 - if (ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) { 1541 - if (coda_get_bitstream_payload(ctx) >= CODA_MAX_FRAME_SIZE - 512) 1542 - kfifo_init(&ctx->bitstream_fifo, 1543 - ctx->bitstream.vaddr, ctx->bitstream.size); 1544 - } 1545 - 1546 - q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT); 1547 - src_fourcc = q_data_src->fourcc; 1548 - 1549 - val = coda_read(dev, CODA_RET_DEC_PIC_SUCCESS); 1550 - if (val != 1) 1551 - pr_err("DEC_PIC_SUCCESS = %d\n", val); 1552 - 1553 - success = val & 0x1; 1554 - if (!success) 1555 - v4l2_err(&dev->v4l2_dev, "decode failed\n"); 1556 - 1557 - if (src_fourcc == V4L2_PIX_FMT_H264) { 1558 - if (val & (1 << 3)) 1559 - v4l2_err(&dev->v4l2_dev, 1560 - "insufficient PS buffer space (%d bytes)\n", 1561 - ctx->psbuf.size); 1562 - if (val & (1 << 2)) 1563 - v4l2_err(&dev->v4l2_dev, 1564 - "insufficient slice buffer space (%d bytes)\n", 1565 - ctx->slicebuf.size); 1566 - } 1567 - 1568 - val = coda_read(dev, CODA_RET_DEC_PIC_SIZE); 1569 - width = (val >> 16) & 0xffff; 1570 - height = val & 0xffff; 1571 - 1572 - q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE); 1573 - 1574 - /* frame crop information */ 1575 - if (src_fourcc == V4L2_PIX_FMT_H264) { 1576 - u32 left_right; 1577 - u32 top_bottom; 1578 - 1579 - left_right = coda_read(dev, CODA_RET_DEC_PIC_CROP_LEFT_RIGHT); 1580 - top_bottom = coda_read(dev, CODA_RET_DEC_PIC_CROP_TOP_BOTTOM); 1581 - 1582 - if (left_right == 0xffffffff && top_bottom == 0xffffffff) { 1583 - /* Keep current crop information */ 1584 - } else { 1585 - struct v4l2_rect *rect = &q_data_dst->rect; 1586 - 1587 - rect->left = left_right >> 16 & 0xffff; 1588 - rect->top = top_bottom >> 16 & 0xffff; 1589 - rect->width = width - rect->left - 1590 - (left_right & 0xffff); 1591 - rect->height = height - rect->top - 1592 - (top_bottom & 0xffff); 1593 - } 1594 - } else { 1595 - /* no cropping */ 1596 - } 1597 - 1598 - err_mb = coda_read(dev, CODA_RET_DEC_PIC_ERR_MB); 1599 - if (err_mb > 0) 1600 - v4l2_err(&dev->v4l2_dev, 1601 - "errors in %d macroblocks\n", err_mb); 1602 - 1603 - if (dev->devtype->product == CODA_7541) { 1604 - val = coda_read(dev, CODA_RET_DEC_PIC_OPTION); 1605 - if (val == 0) { 1606 - /* not enough bitstream data */ 1607 - v4l2_dbg(1, coda_debug, &dev->v4l2_dev, 1608 - "prescan failed: %d\n", val); 1609 - ctx->hold = true; 1610 - return; 1611 - } 1612 - } 1613 - 1614 - ctx->frm_dis_flg = coda_read(dev, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx)); 1615 - 1616 - /* 1617 - * The previous display frame was copied out by the rotator, 1618 - * now it can be overwritten again 1619 - */ 1620 - if (ctx->display_idx >= 0 && 1621 - ctx->display_idx < ctx->num_internal_frames) { 1622 - ctx->frm_dis_flg &= ~(1 << ctx->display_idx); 1623 - coda_write(dev, ctx->frm_dis_flg, 1624 - CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx)); 1625 - } 1626 - 1627 - /* 1628 - * The index of the last decoded frame, not necessarily in 1629 - * display order, and the index of the next display frame. 1630 - * The latter could have been decoded in a previous run. 1631 - */ 1632 - decoded_idx = coda_read(dev, CODA_RET_DEC_PIC_CUR_IDX); 1633 - display_idx = coda_read(dev, CODA_RET_DEC_PIC_FRAME_IDX); 1634 - 1635 - if (decoded_idx == -1) { 1636 - /* no frame was decoded, but we might have a display frame */ 1637 - if (display_idx >= 0 && display_idx < ctx->num_internal_frames) 1638 - ctx->sequence_offset++; 1639 - else if (ctx->display_idx < 0) 1640 - ctx->hold = true; 1641 - } else if (decoded_idx == -2) { 1642 - /* no frame was decoded, we still return the remaining buffers */ 1643 - } else if (decoded_idx < 0 || decoded_idx >= ctx->num_internal_frames) { 1644 - v4l2_err(&dev->v4l2_dev, 1645 - "decoded frame index out of range: %d\n", decoded_idx); 1646 - } else { 1647 - ts = list_first_entry(&ctx->timestamp_list, 1648 - struct coda_timestamp, list); 1649 - list_del(&ts->list); 1650 - val = coda_read(dev, CODA_RET_DEC_PIC_FRAME_NUM) - 1; 1651 - val -= ctx->sequence_offset; 1652 - if (val != (ts->sequence & 0xffff)) { 1653 - v4l2_err(&dev->v4l2_dev, 1654 - "sequence number mismatch (%d(%d) != %d)\n", 1655 - val, ctx->sequence_offset, ts->sequence); 1656 - } 1657 - ctx->frame_timestamps[decoded_idx] = *ts; 1658 - kfree(ts); 1659 - 1660 - val = coda_read(dev, CODA_RET_DEC_PIC_TYPE) & 0x7; 1661 - if (val == 0) 1662 - ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_KEYFRAME; 1663 - else if (val == 1) 1664 - ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_PFRAME; 1665 - else 1666 - ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_BFRAME; 1667 - 1668 - ctx->frame_errors[decoded_idx] = err_mb; 1669 - } 1670 - 1671 - if (display_idx == -1) { 1672 - /* 1673 - * no more frames to be decoded, but there could still 1674 - * be rotator output to dequeue 1675 - */ 1676 - ctx->hold = true; 1677 - } else if (display_idx == -3) { 1678 - /* possibly prescan failure */ 1679 - } else if (display_idx < 0 || display_idx >= ctx->num_internal_frames) { 1680 - v4l2_err(&dev->v4l2_dev, 1681 - "presentation frame index out of range: %d\n", 1682 - display_idx); 1683 - } 1684 - 1685 - /* If a frame was copied out, return it */ 1686 - if (ctx->display_idx >= 0 && 1687 - ctx->display_idx < ctx->num_internal_frames) { 1688 - dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); 1689 - dst_buf->v4l2_buf.sequence = ctx->osequence++; 1690 - 1691 - dst_buf->v4l2_buf.flags &= ~(V4L2_BUF_FLAG_KEYFRAME | 1692 - V4L2_BUF_FLAG_PFRAME | 1693 - V4L2_BUF_FLAG_BFRAME); 1694 - dst_buf->v4l2_buf.flags |= ctx->frame_types[ctx->display_idx]; 1695 - ts = &ctx->frame_timestamps[ctx->display_idx]; 1696 - dst_buf->v4l2_buf.timecode = ts->timecode; 1697 - dst_buf->v4l2_buf.timestamp = ts->timestamp; 1698 - 1699 - vb2_set_plane_payload(dst_buf, 0, width * height * 3 / 2); 1700 - 1701 - v4l2_m2m_buf_done(dst_buf, ctx->frame_errors[display_idx] ? 1702 - VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE); 1703 - 1704 - v4l2_dbg(1, coda_debug, &dev->v4l2_dev, 1705 - "job finished: decoding frame (%d) (%s)\n", 1706 - dst_buf->v4l2_buf.sequence, 1707 - (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ? 1708 - "KEYFRAME" : "PFRAME"); 1709 - } else { 1710 - v4l2_dbg(1, coda_debug, &dev->v4l2_dev, 1711 - "job finished: no frame decoded\n"); 1712 - } 1713 - 1714 - /* The rotator will copy the current display frame next time */ 1715 - ctx->display_idx = display_idx; 1716 - } 1717 - 1718 - static void coda_finish_encode(struct coda_ctx *ctx) 1719 - { 1720 - struct vb2_buffer *src_buf, *dst_buf; 1721 - struct coda_dev *dev = ctx->dev; 1722 - u32 wr_ptr, start_ptr; 1723 - 1724 - src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); 1725 - dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); 1726 - 1727 - /* Get results from the coda */ 1728 - start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START); 1729 - wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx)); 1730 - 1731 - /* Calculate bytesused field */ 1732 - if (dst_buf->v4l2_buf.sequence == 0) { 1733 - vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr + 1734 - ctx->vpu_header_size[0] + 1735 - ctx->vpu_header_size[1] + 1736 - ctx->vpu_header_size[2]); 1737 - } else { 1738 - vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr); 1739 - } 1740 - 1741 - v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n", 1742 - wr_ptr - start_ptr); 1743 - 1744 - coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM); 1745 - coda_read(dev, CODA_RET_ENC_PIC_FLAG); 1746 - 1747 - if (coda_read(dev, CODA_RET_ENC_PIC_TYPE) == 0) { 1748 - dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME; 1749 - dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME; 1750 - } else { 1751 - dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME; 1752 - dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME; 1753 - } 1754 - 1755 - dst_buf->v4l2_buf.timestamp = src_buf->v4l2_buf.timestamp; 1756 - dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_TSTAMP_SRC_MASK; 1757 - dst_buf->v4l2_buf.flags |= 1758 - src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_TSTAMP_SRC_MASK; 1759 - dst_buf->v4l2_buf.timecode = src_buf->v4l2_buf.timecode; 1760 - 1761 - v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE); 1762 - 1763 - dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); 1764 - v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE); 1765 - 1766 - ctx->gopcounter--; 1767 - if (ctx->gopcounter < 0) 1768 - ctx->gopcounter = ctx->params.gop_size - 1; 1769 - 1770 - v4l2_dbg(1, coda_debug, &dev->v4l2_dev, 1771 - "job finished: encoding frame (%d) (%s)\n", 1772 - dst_buf->v4l2_buf.sequence, 1773 - (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ? 1774 - "KEYFRAME" : "PFRAME"); 1775 - } 1776 - 1777 - static irqreturn_t coda_irq_handler(int irq, void *data) 1778 - { 1779 - struct coda_dev *dev = data; 1780 - struct coda_ctx *ctx; 1781 - 1782 - /* read status register to attend the IRQ */ 1783 - coda_read(dev, CODA_REG_BIT_INT_STATUS); 1784 - coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET, 1785 - CODA_REG_BIT_INT_CLEAR); 1786 - 1787 - ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev); 1788 - if (ctx == NULL) { 1789 - v4l2_err(&dev->v4l2_dev, "Instance released before the end of transaction\n"); 1790 - mutex_unlock(&dev->coda_mutex); 1791 - return IRQ_HANDLED; 1792 - } 1793 - 1794 - if (ctx->aborting) { 1795 - v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, 1796 - "task has been aborted\n"); 1797 - } 1798 - 1799 - if (coda_isbusy(ctx->dev)) { 1800 - v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, 1801 - "coda is still busy!!!!\n"); 1802 - return IRQ_NONE; 1803 - } 1804 - 1805 - complete(&ctx->completion); 1806 - 1807 - return IRQ_HANDLED; 1808 - } 1809 - 1810 - static u32 coda_supported_firmwares[] = { 1811 - CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5), 1812 - CODA_FIRMWARE_VERNUM(CODA_7541, 1, 4, 50), 1813 - CODA_FIRMWARE_VERNUM(CODA_960, 2, 1, 5), 1814 - }; 1815 - 1816 - static bool coda_firmware_supported(u32 vernum) 1817 - { 1818 - int i; 1819 - 1820 - for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++) 1821 - if (vernum == coda_supported_firmwares[i]) 1822 - return true; 1823 - return false; 1824 - } 1825 2940 1826 2941 static int coda_hw_init(struct coda_dev *dev) 1827 2942 { ··· 1603 3338 1604 3339 return 0; 1605 3340 1606 - err_clk_ahb: 1607 - clk_disable_unprepare(dev->clk_per); 1608 - err_clk_per: 1609 - return ret; 1610 - } 1611 - 1612 - static int coda_check_firmware(struct coda_dev *dev) 1613 - { 1614 - u16 product, major, minor, release; 1615 - u32 data; 1616 - int ret; 1617 - 1618 - ret = clk_prepare_enable(dev->clk_per); 1619 - if (ret) 1620 - goto err_clk_per; 1621 - 1622 - ret = clk_prepare_enable(dev->clk_ahb); 1623 - if (ret) 1624 - goto err_clk_ahb; 1625 - 1626 - coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM); 1627 - coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY); 1628 - coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX); 1629 - coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD); 1630 - coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND); 1631 - if (coda_wait_timeout(dev)) { 1632 - v4l2_err(&dev->v4l2_dev, "firmware get command error\n"); 1633 - ret = -EIO; 1634 - goto err_run_cmd; 1635 - } 1636 - 1637 - if (dev->devtype->product == CODA_960) { 1638 - data = coda_read(dev, CODA9_CMD_FIRMWARE_CODE_REV); 1639 - v4l2_info(&dev->v4l2_dev, "Firmware code revision: %d\n", 1640 - data); 1641 - } 1642 - 1643 - /* Check we are compatible with the loaded firmware */ 1644 - data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM); 1645 - product = CODA_FIRMWARE_PRODUCT(data); 1646 - major = CODA_FIRMWARE_MAJOR(data); 1647 - minor = CODA_FIRMWARE_MINOR(data); 1648 - release = CODA_FIRMWARE_RELEASE(data); 1649 - 1650 - clk_disable_unprepare(dev->clk_per); 1651 - clk_disable_unprepare(dev->clk_ahb); 1652 - 1653 - if (product != dev->devtype->product) { 1654 - v4l2_err(&dev->v4l2_dev, "Wrong firmware. Hw: %s, Fw: %s," 1655 - " Version: %u.%u.%u\n", 1656 - coda_product_name(dev->devtype->product), 1657 - coda_product_name(product), major, minor, release); 1658 - return -EINVAL; 1659 - } 1660 - 1661 - v4l2_info(&dev->v4l2_dev, "Initialized %s.\n", 1662 - coda_product_name(product)); 1663 - 1664 - if (coda_firmware_supported(data)) { 1665 - v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n", 1666 - major, minor, release); 1667 - } else { 1668 - v4l2_warn(&dev->v4l2_dev, "Unsupported firmware version: " 1669 - "%u.%u.%u\n", major, minor, release); 1670 - } 1671 - 1672 - return 0; 1673 - 1674 - err_run_cmd: 1675 - clk_disable_unprepare(dev->clk_ahb); 1676 3341 err_clk_ahb: 1677 3342 clk_disable_unprepare(dev->clk_per); 1678 3343 err_clk_per:
+56
drivers/media/platform/coda/coda.h
··· 228 228 struct dentry *debugfs_entry; 229 229 }; 230 230 231 + extern int coda_debug; 232 + 233 + void coda_write(struct coda_dev *dev, u32 data, u32 reg); 234 + unsigned int coda_read(struct coda_dev *dev, u32 reg); 235 + 236 + int coda_alloc_aux_buf(struct coda_dev *dev, struct coda_aux_buf *buf, 237 + size_t size, const char *name, struct dentry *parent); 238 + void coda_free_aux_buf(struct coda_dev *dev, struct coda_aux_buf *buf); 239 + 240 + static inline int coda_alloc_context_buf(struct coda_ctx *ctx, 241 + struct coda_aux_buf *buf, size_t size, 242 + const char *name) 243 + { 244 + return coda_alloc_aux_buf(ctx->dev, buf, size, name, ctx->debugfs_entry); 245 + } 246 + 247 + int coda_encoder_queue_init(void *priv, struct vb2_queue *src_vq, 248 + struct vb2_queue *dst_vq); 249 + int coda_decoder_queue_init(void *priv, struct vb2_queue *src_vq, 250 + struct vb2_queue *dst_vq); 251 + 252 + int coda_hw_reset(struct coda_ctx *ctx); 253 + 254 + void coda_fill_bitstream(struct coda_ctx *ctx); 255 + 256 + void coda_set_gdi_regs(struct coda_ctx *ctx); 257 + 258 + static inline struct coda_q_data *get_q_data(struct coda_ctx *ctx, 259 + enum v4l2_buf_type type) 260 + { 261 + switch (type) { 262 + case V4L2_BUF_TYPE_VIDEO_OUTPUT: 263 + return &(ctx->q_data[V4L2_M2M_SRC]); 264 + case V4L2_BUF_TYPE_VIDEO_CAPTURE: 265 + return &(ctx->q_data[V4L2_M2M_DST]); 266 + default: 267 + return NULL; 268 + } 269 + } 270 + 271 + const char *coda_product_name(int product); 272 + 273 + int coda_check_firmware(struct coda_dev *dev); 274 + 275 + static inline int coda_get_bitstream_payload(struct coda_ctx *ctx) 276 + { 277 + return kfifo_len(&ctx->bitstream_fifo); 278 + } 279 + 280 + void coda_bit_stream_end_flag(struct coda_ctx *ctx); 281 + 231 282 int coda_h264_padding(int size, char *p); 283 + 284 + extern const struct coda_context_ops coda_bit_encode_ops; 285 + extern const struct coda_context_ops coda_bit_decode_ops; 286 + 287 + irqreturn_t coda_irq_handler(int irq, void *data);