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mtd: spinand: toshiba: Support for new Kioxia Serial NAND

Add support for new Kioxia products.
The new Kioxia products support program load x4 command, and have
HOLD_D bit which is equivalent to QE bit.

Signed-off-by: Yoshio Furuyama <ytc-mb-yfuruyama7@kioxia.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/aa69e455beedc5ce0d7141359b9364ed8aec9e65.1584949601.git.ytc-mb-yfuruyama7@kioxia.com

authored by

Yoshio Furuyama and committed by
Miquel Raynal 798fcdd0 6b49e58d

+111 -17
+111 -17
drivers/mtd/nand/spi/toshiba.c
··· 20 20 SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), 21 21 SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); 22 22 23 + static SPINAND_OP_VARIANTS(write_cache_x4_variants, 24 + SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), 25 + SPINAND_PROG_LOAD(true, 0, NULL, 0)); 26 + 27 + static SPINAND_OP_VARIANTS(update_cache_x4_variants, 28 + SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), 29 + SPINAND_PROG_LOAD(false, 0, NULL, 0)); 30 + 31 + /** 32 + * Backward compatibility for 1st generation Serial NAND devices 33 + * which don't support Quad Program Load operation. 34 + */ 23 35 static SPINAND_OP_VARIANTS(write_cache_variants, 24 36 SPINAND_PROG_LOAD(true, 0, NULL, 0)); 25 37 ··· 107 95 } 108 96 109 97 static const struct spinand_info toshiba_spinand_table[] = { 110 - /* 3.3V 1Gb */ 98 + /* 3.3V 1Gb (1st generation) */ 111 99 SPINAND_INFO("TC58CVG0S3HRAIG", 112 100 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xC2), 113 101 NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), ··· 118 106 0, 119 107 SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, 120 108 tx58cxgxsxraix_ecc_get_status)), 121 - /* 3.3V 2Gb */ 109 + /* 3.3V 2Gb (1st generation) */ 122 110 SPINAND_INFO("TC58CVG1S3HRAIG", 123 111 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCB), 124 112 NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), ··· 129 117 0, 130 118 SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, 131 119 tx58cxgxsxraix_ecc_get_status)), 132 - /* 3.3V 4Gb */ 120 + /* 3.3V 4Gb (1st generation) */ 133 121 SPINAND_INFO("TC58CVG2S0HRAIG", 134 122 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCD), 135 123 NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), ··· 140 128 0, 141 129 SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, 142 130 tx58cxgxsxraix_ecc_get_status)), 143 - /* 3.3V 4Gb */ 144 - SPINAND_INFO("TC58CVG2S0HRAIJ", 145 - SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xED), 146 - NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), 147 - NAND_ECCREQ(8, 512), 148 - SPINAND_INFO_OP_VARIANTS(&read_cache_variants, 149 - &write_cache_variants, 150 - &update_cache_variants), 151 - 0, 152 - SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, 153 - tx58cxgxsxraix_ecc_get_status)), 154 - /* 1.8V 1Gb */ 131 + /* 1.8V 1Gb (1st generation) */ 155 132 SPINAND_INFO("TC58CYG0S3HRAIG", 156 133 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xB2), 157 134 NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), ··· 151 150 0, 152 151 SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, 153 152 tx58cxgxsxraix_ecc_get_status)), 154 - /* 1.8V 2Gb */ 153 + /* 1.8V 2Gb (1st generation) */ 155 154 SPINAND_INFO("TC58CYG1S3HRAIG", 156 155 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBB), 157 156 NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), ··· 162 161 0, 163 162 SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, 164 163 tx58cxgxsxraix_ecc_get_status)), 165 - /* 1.8V 4Gb */ 164 + /* 1.8V 4Gb (1st generation) */ 166 165 SPINAND_INFO("TC58CYG2S0HRAIG", 167 166 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBD), 168 167 NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), ··· 171 170 &write_cache_variants, 172 171 &update_cache_variants), 173 172 0, 173 + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, 174 + tx58cxgxsxraix_ecc_get_status)), 175 + 176 + /* 177 + * 2nd generation serial nand has HOLD_D which is equivalent to 178 + * QE_BIT. 179 + */ 180 + /* 3.3V 1Gb (2nd generation) */ 181 + SPINAND_INFO("TC58CVG0S3HRAIJ", 182 + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE2), 183 + NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), 184 + NAND_ECCREQ(8, 512), 185 + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, 186 + &write_cache_x4_variants, 187 + &update_cache_x4_variants), 188 + SPINAND_HAS_QE_BIT, 189 + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, 190 + tx58cxgxsxraix_ecc_get_status)), 191 + /* 3.3V 2Gb (2nd generation) */ 192 + SPINAND_INFO("TC58CVG1S3HRAIJ", 193 + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xEB), 194 + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), 195 + NAND_ECCREQ(8, 512), 196 + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, 197 + &write_cache_x4_variants, 198 + &update_cache_x4_variants), 199 + SPINAND_HAS_QE_BIT, 200 + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, 201 + tx58cxgxsxraix_ecc_get_status)), 202 + /* 3.3V 4Gb (2nd generation) */ 203 + SPINAND_INFO("TC58CVG2S0HRAIJ", 204 + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xED), 205 + NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), 206 + NAND_ECCREQ(8, 512), 207 + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, 208 + &write_cache_x4_variants, 209 + &update_cache_x4_variants), 210 + SPINAND_HAS_QE_BIT, 211 + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, 212 + tx58cxgxsxraix_ecc_get_status)), 213 + /* 3.3V 8Gb (2nd generation) */ 214 + SPINAND_INFO("TH58CVG3S0HRAIJ", 215 + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE4), 216 + NAND_MEMORG(1, 4096, 256, 64, 4096, 80, 1, 1, 1), 217 + NAND_ECCREQ(8, 512), 218 + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, 219 + &write_cache_x4_variants, 220 + &update_cache_x4_variants), 221 + SPINAND_HAS_QE_BIT, 222 + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, 223 + tx58cxgxsxraix_ecc_get_status)), 224 + /* 1.8V 1Gb (2nd generation) */ 225 + SPINAND_INFO("TC58CYG0S3HRAIJ", 226 + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD2), 227 + NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), 228 + NAND_ECCREQ(8, 512), 229 + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, 230 + &write_cache_x4_variants, 231 + &update_cache_x4_variants), 232 + SPINAND_HAS_QE_BIT, 233 + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, 234 + tx58cxgxsxraix_ecc_get_status)), 235 + /* 1.8V 2Gb (2nd generation) */ 236 + SPINAND_INFO("TC58CYG1S3HRAIJ", 237 + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xDB), 238 + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), 239 + NAND_ECCREQ(8, 512), 240 + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, 241 + &write_cache_x4_variants, 242 + &update_cache_x4_variants), 243 + SPINAND_HAS_QE_BIT, 244 + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, 245 + tx58cxgxsxraix_ecc_get_status)), 246 + /* 1.8V 4Gb (2nd generation) */ 247 + SPINAND_INFO("TC58CYG2S0HRAIJ", 248 + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xDD), 249 + NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), 250 + NAND_ECCREQ(8, 512), 251 + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, 252 + &write_cache_x4_variants, 253 + &update_cache_x4_variants), 254 + SPINAND_HAS_QE_BIT, 255 + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, 256 + tx58cxgxsxraix_ecc_get_status)), 257 + /* 1.8V 8Gb (2nd generation) */ 258 + SPINAND_INFO("TH58CYG3S0HRAIJ", 259 + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD4), 260 + NAND_MEMORG(1, 4096, 256, 64, 4096, 80, 1, 1, 1), 261 + NAND_ECCREQ(8, 512), 262 + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, 263 + &write_cache_x4_variants, 264 + &update_cache_x4_variants), 265 + SPINAND_HAS_QE_BIT, 174 266 SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, 175 267 tx58cxgxsxraix_ecc_get_status)), 176 268 };