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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'mlx5-fixes'
Saeed Mahameed says:
====================
Mellanox mlx5e fixes for 4.11-rc1
This series includes some important bug fixes for mlx5e driver.
Three misc fixes:
From Mohamad, compilation fix on s390 system
From Me, A fix for driver unload when switchdev mode is on.
From Tariq, HW LRO frag size optimization for when build_skb is not used
(striding RQ mode).
Three CQE compression related fixes:
Two fixes from Tariq and I, to correctly setup CQE compression
parameters on driver load and on arbitrary user modifications.
Last patch, fixes a very critical issue that was originally reported
by Tom, where the driver reported csum errors or even page ref issues
for when cqe compression is enabled and rapidly active.
For your convenience this series was generated on top of net-next branch:
005c3490e9db ('Revert "ath10k: Search SMBIOS for OEM board file extension"')
for -stable:
net/mlx5e: Register/unregister vport representors on interface (for kernel >= 4.9)
net/mlx5e: Do not reduce LRO WQE size when not using build_skb (for kernel >= 4.9)
net/mlx5e: Fix broken CQE compression initialization (for kernel >= 4.9)
net/mlx5e: Update MPWQE stride size when modifying CQE compress state (for kernel >= 4.7)
net/mlx5e: Fix wrong CQE decompression (for kernel >= 4.7)
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
+35
-23
+1
drivers/net/ethernet/mellanox/mlx5/core/en.h
+1
drivers/net/ethernet/mellanox/mlx5/core/en.h
···
816
816
817
817
void mlx5e_set_rx_cq_mode_params(struct mlx5e_params *params,
818
818
u8 cq_period_mode);
819
+
void mlx5e_set_rq_type_params(struct mlx5e_priv *priv, u8 rq_type);
819
820
820
821
static inline void mlx5e_tx_notify_hw(struct mlx5e_sq *sq,
821
822
struct mlx5_wqe_ctrl_seg *ctrl, int bf_sz)
+1
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
+1
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
+24
-16
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
+24
-16
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
···
79
79
MLX5_CAP_ETH(mdev, reg_umr_sq);
80
80
}
81
81
82
-
static void mlx5e_set_rq_type_params(struct mlx5e_priv *priv, u8 rq_type)
82
+
void mlx5e_set_rq_type_params(struct mlx5e_priv *priv, u8 rq_type)
83
83
{
84
84
priv->params.rq_wq_type = rq_type;
85
+
priv->params.lro_wqe_sz = MLX5E_PARAMS_DEFAULT_LRO_WQE_SZ;
85
86
switch (priv->params.rq_wq_type) {
86
87
case MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ:
87
88
priv->params.log_rq_size = is_kdump_kernel() ?
···
99
98
priv->params.log_rq_size = is_kdump_kernel() ?
100
99
MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE :
101
100
MLX5E_PARAMS_DEFAULT_LOG_RQ_SIZE;
101
+
102
+
/* Extra room needed for build_skb */
103
+
priv->params.lro_wqe_sz -= MLX5_RX_HEADROOM +
104
+
SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
102
105
}
103
106
priv->params.min_rx_wqes = mlx5_min_rx_wqes(priv->params.rq_wq_type,
104
107
BIT(priv->params.log_rq_size));
···
3526
3521
cqe_compress_heuristic(link_speed, pci_bw);
3527
3522
}
3528
3523
3524
+
MLX5E_SET_PFLAG(priv, MLX5E_PFLAG_RX_CQE_COMPRESS,
3525
+
priv->params.rx_cqe_compress_def);
3526
+
3529
3527
mlx5e_set_rq_priv_params(priv);
3530
3528
if (priv->params.rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ)
3531
3529
priv->params.lro_en = true;
···
3555
3547
mlx5e_build_default_indir_rqt(mdev, priv->params.indirection_rqt,
3556
3548
MLX5E_INDIR_RQT_SIZE, profile->max_nch(mdev));
3557
3549
3558
-
priv->params.lro_wqe_sz =
3559
-
MLX5E_PARAMS_DEFAULT_LRO_WQE_SZ -
3560
-
/* Extra room needed for build_skb */
3561
-
MLX5_RX_HEADROOM -
3562
-
SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
3563
-
3564
3550
/* Initialize pflags */
3565
3551
MLX5E_SET_PFLAG(priv, MLX5E_PFLAG_RX_CQE_BASED_MODER,
3566
3552
priv->params.rx_cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE);
3567
-
MLX5E_SET_PFLAG(priv, MLX5E_PFLAG_RX_CQE_COMPRESS, priv->params.rx_cqe_compress_def);
3568
3553
3569
3554
mutex_init(&priv->state_lock);
3570
3555
···
3971
3970
}
3972
3971
}
3973
3972
3973
+
static void mlx5e_unregister_vport_rep(struct mlx5_core_dev *mdev)
3974
+
{
3975
+
struct mlx5_eswitch *esw = mdev->priv.eswitch;
3976
+
int total_vfs = MLX5_TOTAL_VPORTS(mdev);
3977
+
int vport;
3978
+
3979
+
if (!MLX5_CAP_GEN(mdev, vport_group_manager))
3980
+
return;
3981
+
3982
+
for (vport = 1; vport < total_vfs; vport++)
3983
+
mlx5_eswitch_unregister_vport_rep(esw, vport);
3984
+
}
3985
+
3974
3986
void mlx5e_detach_netdev(struct mlx5_core_dev *mdev, struct net_device *netdev)
3975
3987
{
3976
3988
struct mlx5e_priv *priv = netdev_priv(netdev);
···
4030
4016
return err;
4031
4017
}
4032
4018
4019
+
mlx5e_register_vport_rep(mdev);
4033
4020
return 0;
4034
4021
}
4035
4022
···
4042
4027
if (!netif_device_present(netdev))
4043
4028
return;
4044
4029
4030
+
mlx5e_unregister_vport_rep(mdev);
4045
4031
mlx5e_detach_netdev(mdev, netdev);
4046
4032
mlx5e_destroy_mdev_resources(mdev);
4047
4033
}
···
4060
4044
err = mlx5e_check_required_hca_cap(mdev);
4061
4045
if (err)
4062
4046
return NULL;
4063
-
4064
-
mlx5e_register_vport_rep(mdev);
4065
4047
4066
4048
if (MLX5_CAP_GEN(mdev, vport_group_manager))
4067
4049
ppriv = &esw->offloads.vport_reps[0];
···
4112
4098
4113
4099
static void mlx5e_remove(struct mlx5_core_dev *mdev, void *vpriv)
4114
4100
{
4115
-
struct mlx5_eswitch *esw = mdev->priv.eswitch;
4116
-
int total_vfs = MLX5_TOTAL_VPORTS(mdev);
4117
4101
struct mlx5e_priv *priv = vpriv;
4118
-
int vport;
4119
-
4120
-
for (vport = 1; vport < total_vfs; vport++)
4121
-
mlx5_eswitch_unregister_vport_rep(esw, vport);
4122
4102
4123
4103
unregister_netdev(priv->netdev);
4124
4104
mlx5e_detach(mdev, vpriv);
+8
-7
drivers/net/ethernet/mellanox/mlx5/core/en_rx.c
+8
-7
drivers/net/ethernet/mellanox/mlx5/core/en_rx.c
···
30
30
* SOFTWARE.
31
31
*/
32
32
33
+
#include <linux/prefetch.h>
33
34
#include <linux/ip.h>
34
35
#include <linux/ipv6.h>
35
36
#include <linux/tcp.h>
···
94
93
static inline void mlx5e_decompress_cqe(struct mlx5e_rq *rq,
95
94
struct mlx5e_cq *cq, u32 cqcc)
96
95
{
97
-
u16 wqe_cnt_step;
98
-
99
96
cq->title.byte_cnt = cq->mini_arr[cq->mini_arr_idx].byte_cnt;
100
97
cq->title.check_sum = cq->mini_arr[cq->mini_arr_idx].checksum;
101
98
cq->title.op_own &= 0xf0;
102
99
cq->title.op_own |= 0x01 & (cqcc >> cq->wq.log_sz);
103
100
cq->title.wqe_counter = cpu_to_be16(cq->decmprs_wqe_counter);
104
101
105
-
wqe_cnt_step =
106
-
rq->wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ ?
107
-
mpwrq_get_cqe_consumed_strides(&cq->title) : 1;
108
-
cq->decmprs_wqe_counter =
109
-
(cq->decmprs_wqe_counter + wqe_cnt_step) & rq->wq.sz_m1;
102
+
if (rq->wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ)
103
+
cq->decmprs_wqe_counter +=
104
+
mpwrq_get_cqe_consumed_strides(&cq->title);
105
+
else
106
+
cq->decmprs_wqe_counter =
107
+
(cq->decmprs_wqe_counter + 1) & rq->wq.sz_m1;
110
108
}
111
109
112
110
static inline void mlx5e_decompress_cqe_no_hash(struct mlx5e_rq *rq,
···
171
171
mlx5e_close_locked(priv->netdev);
172
172
173
173
MLX5E_SET_PFLAG(priv, MLX5E_PFLAG_RX_CQE_COMPRESS, val);
174
+
mlx5e_set_rq_type_params(priv, priv->params.rq_wq_type);
174
175
175
176
if (was_opened)
176
177
mlx5e_open_locked(priv->netdev);