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ARM: 8933/1: replace Sun/Solaris style flag on section directive

It looks like a section directive was using "Solaris style" to declare
the section flags. Replace this with the GNU style so that Clang's
integrated assembler can assemble this directive.

The modified instances were identified via:
$ ag \.section | grep #

Link: https://ftp.gnu.org/old-gnu/Manuals/gas-2.9.1/html_chapter/as_7.html#SEC119
Link: https://github.com/ClangBuiltLinux/linux/issues/744
Link: https://bugs.llvm.org/show_bug.cgi?id=43759
Link: https://reviews.llvm.org/D69296

Acked-by: Nicolas Pitre <nico@fluxnic.net>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Suggested-by: Fangrui Song <maskray@google.com>
Suggested-by: Jian Cai <jiancai@google.com>
Suggested-by: Peter Smith <peter.smith@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>

authored by

Nick Desaulniers and committed by
Russell King 790756c7 74d06efb

+29 -29
+1 -1
arch/arm/boot/bootp/init.S
··· 13 13 * size immediately following the kernel, we could build this into 14 14 * a binary blob, and concatenate the zImage using the cat command. 15 15 */ 16 - .section .start,#alloc,#execinstr 16 + .section .start, "ax" 17 17 .type _start, #function 18 18 .globl _start 19 19
+1 -1
arch/arm/boot/compressed/big-endian.S
··· 6 6 * Author: Nicolas Pitre 7 7 */ 8 8 9 - .section ".start", #alloc, #execinstr 9 + .section ".start", "ax" 10 10 11 11 mrc p15, 0, r0, c1, c0, 0 @ read control reg 12 12 orr r0, r0, #(1 << 7) @ enable big endian mode
+1 -1
arch/arm/boot/compressed/head.S
··· 140 140 #endif 141 141 .endm 142 142 143 - .section ".start", #alloc, #execinstr 143 + .section ".start", "ax" 144 144 /* 145 145 * sort out different calling conventions 146 146 */
+1 -1
arch/arm/boot/compressed/piggy.S
··· 1 1 /* SPDX-License-Identifier: GPL-2.0 */ 2 - .section .piggydata,#alloc 2 + .section .piggydata, "a" 3 3 .globl input_data 4 4 input_data: 5 5 .incbin "arch/arm/boot/compressed/piggy_data"
+1 -1
arch/arm/mm/proc-arm1020.S
··· 491 491 492 492 .align 493 493 494 - .section ".proc.info.init", #alloc 494 + .section ".proc.info.init", "a" 495 495 496 496 .type __arm1020_proc_info,#object 497 497 __arm1020_proc_info:
+1 -1
arch/arm/mm/proc-arm1020e.S
··· 449 449 450 450 .align 451 451 452 - .section ".proc.info.init", #alloc 452 + .section ".proc.info.init", "a" 453 453 454 454 .type __arm1020e_proc_info,#object 455 455 __arm1020e_proc_info:
+1 -1
arch/arm/mm/proc-arm1022.S
··· 443 443 444 444 .align 445 445 446 - .section ".proc.info.init", #alloc 446 + .section ".proc.info.init", "a" 447 447 448 448 .type __arm1022_proc_info,#object 449 449 __arm1022_proc_info:
+1 -1
arch/arm/mm/proc-arm1026.S
··· 437 437 string cpu_arm1026_name, "ARM1026EJ-S" 438 438 .align 439 439 440 - .section ".proc.info.init", #alloc 440 + .section ".proc.info.init", "a" 441 441 442 442 .type __arm1026_proc_info,#object 443 443 __arm1026_proc_info:
+1 -1
arch/arm/mm/proc-arm720.S
··· 172 172 * See <asm/procinfo.h> for a definition of this structure. 173 173 */ 174 174 175 - .section ".proc.info.init", #alloc 175 + .section ".proc.info.init", "a" 176 176 177 177 .macro arm720_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req, cpu_flush:req 178 178 .type __\name\()_proc_info,#object
+1 -1
arch/arm/mm/proc-arm740.S
··· 128 128 129 129 .align 130 130 131 - .section ".proc.info.init", #alloc 131 + .section ".proc.info.init", "a" 132 132 .type __arm740_proc_info,#object 133 133 __arm740_proc_info: 134 134 .long 0x41807400
+1 -1
arch/arm/mm/proc-arm7tdmi.S
··· 72 72 73 73 .align 74 74 75 - .section ".proc.info.init", #alloc 75 + .section ".proc.info.init", "a" 76 76 77 77 .macro arm7tdmi_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req, \ 78 78 extra_hwcaps=0
+1 -1
arch/arm/mm/proc-arm920.S
··· 434 434 435 435 .align 436 436 437 - .section ".proc.info.init", #alloc 437 + .section ".proc.info.init", "a" 438 438 439 439 .type __arm920_proc_info,#object 440 440 __arm920_proc_info:
+1 -1
arch/arm/mm/proc-arm922.S
··· 412 412 413 413 .align 414 414 415 - .section ".proc.info.init", #alloc 415 + .section ".proc.info.init", "a" 416 416 417 417 .type __arm922_proc_info,#object 418 418 __arm922_proc_info:
+1 -1
arch/arm/mm/proc-arm925.S
··· 477 477 478 478 .align 479 479 480 - .section ".proc.info.init", #alloc 480 + .section ".proc.info.init", "a" 481 481 482 482 .macro arm925_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req, cache 483 483 .type __\name\()_proc_info,#object
+1 -1
arch/arm/mm/proc-arm926.S
··· 460 460 461 461 .align 462 462 463 - .section ".proc.info.init", #alloc 463 + .section ".proc.info.init", "a" 464 464 465 465 .type __arm926_proc_info,#object 466 466 __arm926_proc_info:
+1 -1
arch/arm/mm/proc-arm940.S
··· 340 340 341 341 .align 342 342 343 - .section ".proc.info.init", #alloc 343 + .section ".proc.info.init", "a" 344 344 345 345 .type __arm940_proc_info,#object 346 346 __arm940_proc_info:
+1 -1
arch/arm/mm/proc-arm946.S
··· 395 395 396 396 .align 397 397 398 - .section ".proc.info.init", #alloc 398 + .section ".proc.info.init", "a" 399 399 .type __arm946_proc_info,#object 400 400 __arm946_proc_info: 401 401 .long 0x41009460
+1 -1
arch/arm/mm/proc-arm9tdmi.S
··· 66 66 67 67 .align 68 68 69 - .section ".proc.info.init", #alloc 69 + .section ".proc.info.init", "a" 70 70 71 71 .macro arm9tdmi_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req 72 72 .type __\name\()_proc_info, #object
+1 -1
arch/arm/mm/proc-fa526.S
··· 185 185 186 186 .align 187 187 188 - .section ".proc.info.init", #alloc 188 + .section ".proc.info.init", "a" 189 189 190 190 .type __fa526_proc_info,#object 191 191 __fa526_proc_info:
+1 -1
arch/arm/mm/proc-feroceon.S
··· 571 571 572 572 .align 573 573 574 - .section ".proc.info.init", #alloc 574 + .section ".proc.info.init", "a" 575 575 576 576 .macro feroceon_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req, cache:req 577 577 .type __\name\()_proc_info,#object
+1 -1
arch/arm/mm/proc-mohawk.S
··· 416 416 417 417 .align 418 418 419 - .section ".proc.info.init", #alloc 419 + .section ".proc.info.init", "a" 420 420 421 421 .type __88sv331x_proc_info,#object 422 422 __88sv331x_proc_info:
+1 -1
arch/arm/mm/proc-sa110.S
··· 196 196 197 197 .align 198 198 199 - .section ".proc.info.init", #alloc 199 + .section ".proc.info.init", "a" 200 200 201 201 .type __sa110_proc_info,#object 202 202 __sa110_proc_info:
+1 -1
arch/arm/mm/proc-sa1100.S
··· 239 239 240 240 .align 241 241 242 - .section ".proc.info.init", #alloc 242 + .section ".proc.info.init", "a" 243 243 244 244 .macro sa1100_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req 245 245 .type __\name\()_proc_info,#object
+1 -1
arch/arm/mm/proc-v6.S
··· 261 261 string cpu_elf_name, "v6" 262 262 .align 263 263 264 - .section ".proc.info.init", #alloc 264 + .section ".proc.info.init", "a" 265 265 266 266 /* 267 267 * Match any ARMv6 processor core.
+1 -1
arch/arm/mm/proc-v7.S
··· 644 644 string cpu_elf_name, "v7" 645 645 .align 646 646 647 - .section ".proc.info.init", #alloc 647 + .section ".proc.info.init", "a" 648 648 649 649 /* 650 650 * Standard v7 proc info content
+2 -2
arch/arm/mm/proc-v7m.S
··· 93 93 ret lr 94 94 ENDPROC(cpu_cm7_proc_fin) 95 95 96 - .section ".init.text", #alloc, #execinstr 96 + .section ".init.text", "ax" 97 97 98 98 __v7m_cm7_setup: 99 99 mov r8, #(V7M_SCB_CCR_DC | V7M_SCB_CCR_IC| V7M_SCB_CCR_BP) ··· 177 177 string cpu_elf_name "v7m" 178 178 string cpu_v7m_name "ARMv7-M" 179 179 180 - .section ".proc.info.init", #alloc 180 + .section ".proc.info.init", "a" 181 181 182 182 .macro __v7m_proc name, initfunc, cache_fns = nop_cache_fns, hwcaps = 0, proc_fns = v7m_processor_functions 183 183 .long 0 /* proc_info_list.__cpu_mm_mmu_flags */
+1 -1
arch/arm/mm/proc-xsc3.S
··· 496 496 497 497 .align 498 498 499 - .section ".proc.info.init", #alloc 499 + .section ".proc.info.init", "a" 500 500 501 501 .macro xsc3_proc_info name:req, cpu_val:req, cpu_mask:req 502 502 .type __\name\()_proc_info,#object
+1 -1
arch/arm/mm/proc-xscale.S
··· 610 610 611 611 .align 612 612 613 - .section ".proc.info.init", #alloc 613 + .section ".proc.info.init", "a" 614 614 615 615 .macro xscale_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req, cache 616 616 .type __\name\()_proc_info,#object