r8169: fix broken register writes

This is quite similar to b39fe41f481d20c201012e4483e76c203802dda7
though said registers are not even documented as 64-bit registers
- as opposed to the initial TxDescStartAddress ones - but as single
bytes which must be combined into 32 bits at the MMIO read/write
level before being merged into a 64 bit logical entity.

Credits go to Ben Hutchings <ben@decadent.org.uk> for the MAR
registers (aka "multicast is broken for ages on ARM) and to
Timo Teräs <timo.teras@iki.fi> for the MAC registers.

Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

authored by Francois Romieu and committed by David S. Miller 78f1cd02 1546a713

+2 -2
+2 -2
drivers/net/r8169.c
··· 2820 spin_lock_irq(&tp->lock); 2821 2822 RTL_W8(Cfg9346, Cfg9346_Unlock); 2823 - RTL_W32(MAC0, low); 2824 RTL_W32(MAC4, high); 2825 RTL_W8(Cfg9346, Cfg9346_Lock); 2826 2827 spin_unlock_irq(&tp->lock); ··· 4747 mc_filter[1] = swab32(data); 4748 } 4749 4750 - RTL_W32(MAR0 + 0, mc_filter[0]); 4751 RTL_W32(MAR0 + 4, mc_filter[1]); 4752 4753 RTL_W32(RxConfig, tmp); 4754
··· 2820 spin_lock_irq(&tp->lock); 2821 2822 RTL_W8(Cfg9346, Cfg9346_Unlock); 2823 RTL_W32(MAC4, high); 2824 + RTL_W32(MAC0, low); 2825 RTL_W8(Cfg9346, Cfg9346_Lock); 2826 2827 spin_unlock_irq(&tp->lock); ··· 4747 mc_filter[1] = swab32(data); 4748 } 4749 4750 RTL_W32(MAR0 + 4, mc_filter[1]); 4751 + RTL_W32(MAR0 + 0, mc_filter[0]); 4752 4753 RTL_W32(RxConfig, tmp); 4754