Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

EDAC/altera: Initialize peripheral FIFOs in probe()

The FIFO memory and ECC initialization doesn't need to be
done as a separate operation early in the startup.

Improve the Arria10 and Stratix10 peripheral FIFO init
by initializing memory and enabling ECC as part of the
device driver initialization.

Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: James Morse <james.morse@arm.com>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: https://lkml.kernel.org/r/1553635771-32693-2-git-send-email-thor.thayer@linux.intel.com

authored by

Thor Thayer and committed by
Borislav Petkov
788586ef 436b0a58

+91 -71
+91 -71
drivers/edac/altera_edac.c
··· 1361 1361 1362 1362 #ifdef CONFIG_EDAC_ALTERA_ETHERNET 1363 1363 1364 + static int __init socfpga_init_ethernet_ecc(struct altr_edac_device_dev *dev) 1365 + { 1366 + int ret; 1367 + 1368 + ret = altr_init_a10_ecc_device_type("altr,socfpga-eth-mac-ecc"); 1369 + if (ret) 1370 + return ret; 1371 + 1372 + return altr_check_ecc_deps(dev); 1373 + } 1374 + 1364 1375 static const struct edac_device_prv_data a10_enetecc_data = { 1365 - .setup = altr_check_ecc_deps, 1376 + .setup = socfpga_init_ethernet_ecc, 1366 1377 .ce_clear_mask = ALTR_A10_ECC_SERRPENA, 1367 1378 .ue_clear_mask = ALTR_A10_ECC_DERRPENA, 1368 1379 .ecc_enable_mask = ALTR_A10_COMMON_ECC_EN_CTL, ··· 1384 1373 .ecc_irq_handler = altr_edac_a10_ecc_irq, 1385 1374 .inject_fops = &altr_edac_a10_device_inject2_fops, 1386 1375 }; 1387 - 1388 - static int __init socfpga_init_ethernet_ecc(void) 1389 - { 1390 - return altr_init_a10_ecc_device_type("altr,socfpga-eth-mac-ecc"); 1391 - } 1392 - 1393 - early_initcall(socfpga_init_ethernet_ecc); 1394 1376 1395 1377 #endif /* CONFIG_EDAC_ALTERA_ETHERNET */ 1396 1378 ··· 1391 1387 1392 1388 #ifdef CONFIG_EDAC_ALTERA_NAND 1393 1389 1390 + static int __init socfpga_init_nand_ecc(struct altr_edac_device_dev *device) 1391 + { 1392 + int ret; 1393 + 1394 + ret = altr_init_a10_ecc_device_type("altr,socfpga-nand-ecc"); 1395 + if (ret) 1396 + return ret; 1397 + 1398 + return altr_check_ecc_deps(device); 1399 + } 1400 + 1394 1401 static const struct edac_device_prv_data a10_nandecc_data = { 1395 - .setup = altr_check_ecc_deps, 1402 + .setup = socfpga_init_nand_ecc, 1396 1403 .ce_clear_mask = ALTR_A10_ECC_SERRPENA, 1397 1404 .ue_clear_mask = ALTR_A10_ECC_DERRPENA, 1398 1405 .ecc_enable_mask = ALTR_A10_COMMON_ECC_EN_CTL, ··· 1414 1399 .ecc_irq_handler = altr_edac_a10_ecc_irq, 1415 1400 .inject_fops = &altr_edac_a10_device_inject_fops, 1416 1401 }; 1417 - 1418 - static int __init socfpga_init_nand_ecc(void) 1419 - { 1420 - return altr_init_a10_ecc_device_type("altr,socfpga-nand-ecc"); 1421 - } 1422 - 1423 - early_initcall(socfpga_init_nand_ecc); 1424 1402 1425 1403 #endif /* CONFIG_EDAC_ALTERA_NAND */ 1426 1404 ··· 1421 1413 1422 1414 #ifdef CONFIG_EDAC_ALTERA_DMA 1423 1415 1416 + static int __init socfpga_init_dma_ecc(struct altr_edac_device_dev *device) 1417 + { 1418 + int ret; 1419 + 1420 + ret = altr_init_a10_ecc_device_type("altr,socfpga-dma-ecc"); 1421 + if (ret) 1422 + return ret; 1423 + 1424 + return altr_check_ecc_deps(device); 1425 + } 1426 + 1424 1427 static const struct edac_device_prv_data a10_dmaecc_data = { 1425 - .setup = altr_check_ecc_deps, 1428 + .setup = socfpga_init_dma_ecc, 1426 1429 .ce_clear_mask = ALTR_A10_ECC_SERRPENA, 1427 1430 .ue_clear_mask = ALTR_A10_ECC_DERRPENA, 1428 1431 .ecc_enable_mask = ALTR_A10_COMMON_ECC_EN_CTL, ··· 1445 1426 .inject_fops = &altr_edac_a10_device_inject_fops, 1446 1427 }; 1447 1428 1448 - static int __init socfpga_init_dma_ecc(void) 1449 - { 1450 - return altr_init_a10_ecc_device_type("altr,socfpga-dma-ecc"); 1451 - } 1452 - 1453 - early_initcall(socfpga_init_dma_ecc); 1454 - 1455 1429 #endif /* CONFIG_EDAC_ALTERA_DMA */ 1456 1430 1457 1431 /********************** USB Device Functions **********************/ 1458 1432 1459 1433 #ifdef CONFIG_EDAC_ALTERA_USB 1460 1434 1435 + static int __init socfpga_init_usb_ecc(struct altr_edac_device_dev *device) 1436 + { 1437 + int ret; 1438 + 1439 + ret = altr_init_a10_ecc_device_type("altr,socfpga-usb-ecc"); 1440 + if (ret) 1441 + return ret; 1442 + 1443 + return altr_check_ecc_deps(device); 1444 + } 1445 + 1461 1446 static const struct edac_device_prv_data a10_usbecc_data = { 1462 - .setup = altr_check_ecc_deps, 1447 + .setup = socfpga_init_usb_ecc, 1463 1448 .ce_clear_mask = ALTR_A10_ECC_SERRPENA, 1464 1449 .ue_clear_mask = ALTR_A10_ECC_DERRPENA, 1465 1450 .ecc_enable_mask = ALTR_A10_COMMON_ECC_EN_CTL, ··· 1475 1452 .inject_fops = &altr_edac_a10_device_inject2_fops, 1476 1453 }; 1477 1454 1478 - static int __init socfpga_init_usb_ecc(void) 1479 - { 1480 - return altr_init_a10_ecc_device_type("altr,socfpga-usb-ecc"); 1481 - } 1482 - 1483 - early_initcall(socfpga_init_usb_ecc); 1484 - 1485 1455 #endif /* CONFIG_EDAC_ALTERA_USB */ 1486 1456 1487 1457 /********************** QSPI Device Functions **********************/ 1488 1458 1489 1459 #ifdef CONFIG_EDAC_ALTERA_QSPI 1490 1460 1461 + static int __init socfpga_init_qspi_ecc(struct altr_edac_device_dev *device) 1462 + { 1463 + int ret; 1464 + 1465 + ret = altr_init_a10_ecc_device_type("altr,socfpga-qspi-ecc"); 1466 + if (ret) 1467 + return ret; 1468 + 1469 + return altr_check_ecc_deps(device); 1470 + } 1471 + 1491 1472 static const struct edac_device_prv_data a10_qspiecc_data = { 1492 - .setup = altr_check_ecc_deps, 1473 + .setup = socfpga_init_qspi_ecc, 1493 1474 .ce_clear_mask = ALTR_A10_ECC_SERRPENA, 1494 1475 .ue_clear_mask = ALTR_A10_ECC_DERRPENA, 1495 1476 .ecc_enable_mask = ALTR_A10_COMMON_ECC_EN_CTL, ··· 1504 1477 .ecc_irq_handler = altr_edac_a10_ecc_irq, 1505 1478 .inject_fops = &altr_edac_a10_device_inject_fops, 1506 1479 }; 1507 - 1508 - static int __init socfpga_init_qspi_ecc(void) 1509 - { 1510 - return altr_init_a10_ecc_device_type("altr,socfpga-qspi-ecc"); 1511 - } 1512 - 1513 - early_initcall(socfpga_init_qspi_ecc); 1514 1480 1515 1481 #endif /* CONFIG_EDAC_ALTERA_QSPI */ 1516 1482 ··· 1613 1593 return rc; 1614 1594 } 1615 1595 1596 + static int __init socfpga_init_sdmmc_ecc(struct altr_edac_device_dev *device) 1597 + { 1598 + int rc = -ENODEV; 1599 + struct device_node *child; 1600 + 1601 + child = of_find_compatible_node(NULL, NULL, "altr,socfpga-sdmmc-ecc"); 1602 + if (!child) 1603 + return -ENODEV; 1604 + 1605 + if (!of_device_is_available(child)) 1606 + goto exit; 1607 + 1608 + if (validate_parent_available(child)) 1609 + goto exit; 1610 + 1611 + /* Init portB */ 1612 + rc = altr_init_a10_ecc_block(child, ALTR_A10_SDMMC_IRQ_MASK, 1613 + a10_sdmmceccb_data.ecc_enable_mask, 1); 1614 + if (rc) 1615 + goto exit; 1616 + 1617 + /* Setup portB */ 1618 + return altr_portb_setup(device); 1619 + 1620 + exit: 1621 + of_node_put(child); 1622 + return rc; 1623 + } 1624 + 1616 1625 static irqreturn_t altr_edac_a10_ecc_irq_portb(int irq, void *dev_id) 1617 1626 { 1618 1627 struct altr_edac_device_dev *ad = dev_id; ··· 1666 1617 } 1667 1618 1668 1619 static const struct edac_device_prv_data a10_sdmmcecca_data = { 1669 - .setup = altr_portb_setup, 1620 + .setup = socfpga_init_sdmmc_ecc, 1670 1621 .ce_clear_mask = ALTR_A10_ECC_SERRPENA, 1671 1622 .ue_clear_mask = ALTR_A10_ECC_DERRPENA, 1672 1623 .ecc_enable_mask = ALTR_A10_COMMON_ECC_EN_CTL, ··· 1679 1630 }; 1680 1631 1681 1632 static const struct edac_device_prv_data a10_sdmmceccb_data = { 1682 - .setup = altr_portb_setup, 1633 + .setup = socfpga_init_sdmmc_ecc, 1683 1634 .ce_clear_mask = ALTR_A10_ECC_SERRPENB, 1684 1635 .ue_clear_mask = ALTR_A10_ECC_DERRPENB, 1685 1636 .ecc_enable_mask = ALTR_A10_COMMON_ECC_EN_CTL, ··· 1690 1641 .ecc_irq_handler = altr_edac_a10_ecc_irq_portb, 1691 1642 .inject_fops = &altr_edac_a10_device_inject_fops, 1692 1643 }; 1693 - 1694 - static int __init socfpga_init_sdmmc_ecc(void) 1695 - { 1696 - int rc = -ENODEV; 1697 - struct device_node *child; 1698 - 1699 - if (!socfpga_is_a10() && !socfpga_is_s10()) 1700 - return -ENODEV; 1701 - 1702 - child = of_find_compatible_node(NULL, NULL, "altr,socfpga-sdmmc-ecc"); 1703 - if (!child) { 1704 - edac_printk(KERN_WARNING, EDAC_DEVICE, "SDMMC node not found\n"); 1705 - return -ENODEV; 1706 - } 1707 - 1708 - if (!of_device_is_available(child)) 1709 - goto exit; 1710 - 1711 - if (validate_parent_available(child)) 1712 - goto exit; 1713 - 1714 - rc = altr_init_a10_ecc_block(child, ALTR_A10_SDMMC_IRQ_MASK, 1715 - a10_sdmmcecca_data.ecc_enable_mask, 1); 1716 - exit: 1717 - of_node_put(child); 1718 - return rc; 1719 - } 1720 - 1721 - early_initcall(socfpga_init_sdmmc_ecc); 1722 1644 1723 1645 #endif /* CONFIG_EDAC_ALTERA_SDMMC */ 1724 1646