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dt-bindings: clock: qcom: Add SA8775P video clock controller
Add device tree bindings for the video clock controller on Qualcomm
SA8775P platform.
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Link: https://lore.kernel.org/r/20241011-sa8775p-mm-v4-resend-patches-v5-1-4a9f17dc683a@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
authored by
Taniya Das
and committed by
Bjorn Andersson
7867cb65
9852d85e
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Documentation/devicetree/bindings/clock/qcom,sa8775p-videocc.yaml
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Documentation/devicetree/bindings/clock/qcom,sa8775p-videocc.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,sa8775p-videocc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Video Clock & Reset Controller on SA8775P
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maintainers:
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- Taniya Das <quic_tdas@quicinc.com>
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description: |
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Qualcomm video clock control module provides the clocks, resets and power
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domains on SA8775P.
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See also: include/dt-bindings/clock/qcom,sa8775p-videocc.h
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properties:
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compatible:
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enum:
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- qcom,sa8775p-videocc
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clocks:
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items:
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- description: Video AHB clock from GCC
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- description: Board XO source
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- description: Board active XO source
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- description: Sleep Clock source
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power-domains:
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maxItems: 1
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description: MMCX power domain
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required:
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- compatible
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- clocks
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- power-domains
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,rpmh.h>
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#include <dt-bindings/power/qcom-rpmpd.h>
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#include <dt-bindings/clock/qcom,sa8775p-gcc.h>
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videocc: clock-controller@abf0000 {
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compatible = "qcom,sa8775p-videocc";
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reg = <0x0abf0000 0x10000>;
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clocks = <&gcc GCC_VIDEO_AHB_CLK>,
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<&rpmhcc RPMH_CXO_CLK>,
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<&rpmhcc RPMH_CXO_CLK_A>,
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<&sleep_clk>;
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power-domains = <&rpmhpd SA8775P_MMCX>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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};
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...
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include/dt-bindings/clock/qcom,sa8775p-videocc.h
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include/dt-bindings/clock/qcom,sa8775p-videocc.h
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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef _DT_BINDINGS_CLK_QCOM_SA8775P_VIDEO_CC_H
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#define _DT_BINDINGS_CLK_QCOM_SA8775P_VIDEO_CC_H
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/* VIDEO_CC clocks */
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#define VIDEO_CC_AHB_CLK 0
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#define VIDEO_CC_AHB_CLK_SRC 1
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#define VIDEO_CC_MVS0_CLK 2
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#define VIDEO_CC_MVS0_CLK_SRC 3
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#define VIDEO_CC_MVS0_DIV_CLK_SRC 4
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#define VIDEO_CC_MVS0C_CLK 5
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#define VIDEO_CC_MVS0C_DIV2_DIV_CLK_SRC 6
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#define VIDEO_CC_MVS1_CLK 7
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#define VIDEO_CC_MVS1_CLK_SRC 8
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#define VIDEO_CC_MVS1_DIV_CLK_SRC 9
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#define VIDEO_CC_MVS1C_CLK 10
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#define VIDEO_CC_MVS1C_DIV2_DIV_CLK_SRC 11
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#define VIDEO_CC_PLL_LOCK_MONITOR_CLK 12
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#define VIDEO_CC_SLEEP_CLK 13
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#define VIDEO_CC_SLEEP_CLK_SRC 14
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#define VIDEO_CC_SM_DIV_CLK_SRC 15
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#define VIDEO_CC_SM_OBS_CLK 16
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#define VIDEO_CC_XO_CLK 17
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#define VIDEO_CC_XO_CLK_SRC 18
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#define VIDEO_PLL0 19
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#define VIDEO_PLL1 20
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/* VIDEO_CC power domains */
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#define VIDEO_CC_MVS0C_GDSC 0
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#define VIDEO_CC_MVS0_GDSC 1
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#define VIDEO_CC_MVS1C_GDSC 2
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#define VIDEO_CC_MVS1_GDSC 3
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/* VIDEO_CC resets */
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#define VIDEO_CC_INTERFACE_BCR 0
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#define VIDEO_CC_MVS0_BCR 1
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#define VIDEO_CC_MVS0C_CLK_ARES 2
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#define VIDEO_CC_MVS0C_BCR 3
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#define VIDEO_CC_MVS1_BCR 4
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#define VIDEO_CC_MVS1C_CLK_ARES 5
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#define VIDEO_CC_MVS1C_BCR 6
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#endif