x86/PCI: X86_PAT & mprotect

Some versions of X used the mprotect workaround to change caching type from UC
to WB, so that it can then use mtrr to program WC for that region [1]. Change
the mmap of pci space through /sys or /proc interfaces from UC to UC_MINUS.
With this change, X will not need to use mprotect workaround to get WC type
since the MTRR mapping type will be honored.

The bug in mprotect that clobbers PAT bits is fixed in a follow on patch. So,
this X workaround will stop working as well.

Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>

authored by Venki Pallipadi and committed by Jesse Barnes 77db9885 439a7733

+1 -3
+1 -3
arch/x86/pci/i386.c
··· 301 301 prot = pgprot_val(vma->vm_page_prot); 302 302 if (pat_wc_enabled && write_combine) 303 303 prot |= _PAGE_CACHE_WC; 304 - else if (pat_wc_enabled) 304 + else if (pat_wc_enabled || boot_cpu_data.x86 > 3) 305 305 /* 306 306 * ioremap() and ioremap_nocache() defaults to UC MINUS for now. 307 307 * To avoid attribute conflicts, request UC MINUS here 308 308 * aswell. 309 309 */ 310 310 prot |= _PAGE_CACHE_UC_MINUS; 311 - else if (boot_cpu_data.x86 > 3) 312 - prot |= _PAGE_CACHE_UC; 313 311 314 312 vma->vm_page_prot = __pgprot(prot); 315 313