Merge tag 'media/v4.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media

Pull media fixes from Mauro Carvalho Chehab:

"A series of fixes for the media subsytem:

- The largest amount of fixes in this series is with regards to
comments that aren't kernel-doc, but start with "/**".

A new check added for 4.15 makes it to produce a *huge* amount of
new warnings (I'm compiling here with W=1). Most of the patches in
this series fix those.

No code changes - just comment changes at the source files

- rc: some fixed in order to better handle RC repetition codes

- v4l-async: use the v4l2_dev from the root notifier when matching
sub-devices

- v4l2-fwnode: Check subdev count after checking port

- ov 13858 and et8ek8: compilation fix with randconfigs

- usbtv: a trivial new USB ID addition

- dibusb-common: don't do DMA on stack on firmware load

- imx274: Fix error handling, add MAINTAINERS entry

- sir_ir: detect presence of port"

* tag 'media/v4.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (50 commits)
media: imx274: Fix error handling, add MAINTAINERS entry
media: v4l: async: use the v4l2_dev from the root notifier when matching sub-devices
media: v4l2-fwnode: Check subdev count after checking port
media: et8ek8: select V4L2_FWNODE
media: ov13858: Select V4L2_FWNODE
media: rc: partial revert of "media: rc: per-protocol repeat period"
media: dvb: i2c transfers over usb cannot be done from stack
media: dvb-frontends: complete kernel-doc markups
media: docs: add documentation for frontend attach info
media: dvb_frontends: fix kernel-doc macros
media: drivers: remove "/**" from non-kernel-doc comments
media: lm3560: add a missing kernel-doc parameter
media: rcar_jpu: fix two kernel-doc markups
media: vsp1: add a missing kernel-doc parameter
media: soc_camera: fix a kernel-doc markup
media: mt2063: fix some kernel-doc warnings
media: radio-wl1273: fix a parameter name at kernel-doc macro
media: s3c-camif: add missing description at s3c_camif_find_format()
media: mtk-vpu: add description for wdt fields at struct mtk_vpu
media: vdec: fix some kernel-doc warnings
...

+3163 -2945
+30
Documentation/media/dvb-drivers/frontends.rst
··· 1 + **************** 2 + Frontend drivers 3 + **************** 4 + 5 + Frontend attach headers 6 + *********************** 7 + 8 + .. Keep it on alphabetic order 9 + 10 + .. kernel-doc:: drivers/media/dvb-frontends/a8293.h 11 + .. kernel-doc:: drivers/media/dvb-frontends/af9013.h 12 + .. kernel-doc:: drivers/media/dvb-frontends/ascot2e.h 13 + .. kernel-doc:: drivers/media/dvb-frontends/cxd2820r.h 14 + .. kernel-doc:: drivers/media/dvb-frontends/drxk.h 15 + .. kernel-doc:: drivers/media/dvb-frontends/dvb-pll.h 16 + .. kernel-doc:: drivers/media/dvb-frontends/helene.h 17 + .. kernel-doc:: drivers/media/dvb-frontends/horus3a.h 18 + .. kernel-doc:: drivers/media/dvb-frontends/ix2505v.h 19 + .. kernel-doc:: drivers/media/dvb-frontends/m88ds3103.h 20 + .. kernel-doc:: drivers/media/dvb-frontends/mb86a20s.h 21 + .. kernel-doc:: drivers/media/dvb-frontends/mn88472.h 22 + .. kernel-doc:: drivers/media/dvb-frontends/rtl2830.h 23 + .. kernel-doc:: drivers/media/dvb-frontends/rtl2832.h 24 + .. kernel-doc:: drivers/media/dvb-frontends/rtl2832_sdr.h 25 + .. kernel-doc:: drivers/media/dvb-frontends/stb6000.h 26 + .. kernel-doc:: drivers/media/dvb-frontends/tda10071.h 27 + .. kernel-doc:: drivers/media/dvb-frontends/tda826x.h 28 + .. kernel-doc:: drivers/media/dvb-frontends/zd1301_demod.h 29 + .. kernel-doc:: drivers/media/dvb-frontends/zl10036.h 30 +
+1
Documentation/media/dvb-drivers/index.rst
··· 41 41 technisat 42 42 ttusb-dec 43 43 udev 44 + frontends 44 45 contributors
+8
MAINTAINERS
··· 12643 12643 F: drivers/ssb/ 12644 12644 F: include/linux/ssb/ 12645 12645 12646 + SONY IMX274 SENSOR DRIVER 12647 + M: Leon Luo <leonl@leopardimaging.com> 12648 + L: linux-media@vger.kernel.org 12649 + T: git git://linuxtv.org/media_tree.git 12650 + S: Maintained 12651 + F: drivers/media/i2c/imx274.c 12652 + F: Documentation/devicetree/bindings/media/i2c/imx274.txt 12653 + 12646 12654 SONY MEMORYSTICK CARD SUPPORT 12647 12655 M: Alex Dubov <oakad@yahoo.com> 12648 12656 W: http://tifmxx.berlios.de/
+33 -33
drivers/media/common/siano/smscoreapi.c
··· 521 521 spin_unlock_irqrestore(lock, flags); 522 522 } 523 523 524 - /** 524 + /* 525 525 * register a client callback that called when device plugged in/unplugged 526 526 * NOTE: if devices exist callback is called immediately for each device 527 527 * 528 528 * @param hotplug callback 529 529 * 530 - * @return 0 on success, <0 on error. 530 + * return: 0 on success, <0 on error. 531 531 */ 532 532 int smscore_register_hotplug(hotplug_t hotplug) 533 533 { ··· 562 562 } 563 563 EXPORT_SYMBOL_GPL(smscore_register_hotplug); 564 564 565 - /** 565 + /* 566 566 * unregister a client callback that called when device plugged in/unplugged 567 567 * 568 568 * @param hotplug callback ··· 636 636 return cb; 637 637 } 638 638 639 - /** 639 + /* 640 640 * creates coredev object for a device, prepares buffers, 641 641 * creates buffer mappings, notifies registered hotplugs about new device. 642 642 * ··· 644 644 * and handlers 645 645 * @param coredev pointer to a value that receives created coredev object 646 646 * 647 - * @return 0 on success, <0 on error. 647 + * return: 0 on success, <0 on error. 648 648 */ 649 649 int smscore_register_device(struct smsdevice_params_t *params, 650 650 struct smscore_device_t **coredev, ··· 764 764 0 : -ETIME; 765 765 } 766 766 767 - /** 767 + /* 768 768 * Starts & enables IR operations 769 769 * 770 - * @return 0 on success, < 0 on error. 770 + * return: 0 on success, < 0 on error. 771 771 */ 772 772 static int smscore_init_ir(struct smscore_device_t *coredev) 773 773 { ··· 812 812 return 0; 813 813 } 814 814 815 - /** 815 + /* 816 816 * configures device features according to board configuration structure. 817 817 * 818 818 * @param coredev pointer to a coredev object returned by 819 819 * smscore_register_device 820 820 * 821 - * @return 0 on success, <0 on error. 821 + * return: 0 on success, <0 on error. 822 822 */ 823 823 static int smscore_configure_board(struct smscore_device_t *coredev) 824 824 { ··· 861 861 return 0; 862 862 } 863 863 864 - /** 864 + /* 865 865 * sets initial device mode and notifies client hotplugs that device is ready 866 866 * 867 867 * @param coredev pointer to a coredev object returned by 868 868 * smscore_register_device 869 869 * 870 - * @return 0 on success, <0 on error. 870 + * return: 0 on success, <0 on error. 871 871 */ 872 872 int smscore_start_device(struct smscore_device_t *coredev) 873 873 { ··· 1087 1087 }, 1088 1088 }; 1089 1089 1090 - /** 1090 + /* 1091 1091 * get firmware file name from one of the two mechanisms : sms_boards or 1092 1092 * smscore_fw_lkup. 1093 1093 * @param coredev pointer to a coredev object returned by ··· 1096 1096 * @param lookup if 1, always get the fw filename from smscore_fw_lkup 1097 1097 * table. if 0, try first to get from sms_boards 1098 1098 * 1099 - * @return 0 on success, <0 on error. 1099 + * return: 0 on success, <0 on error. 1100 1100 */ 1101 1101 static char *smscore_get_fw_filename(struct smscore_device_t *coredev, 1102 1102 int mode) ··· 1125 1125 return fw[mode]; 1126 1126 } 1127 1127 1128 - /** 1128 + /* 1129 1129 * loads specified firmware into a buffer and calls device loadfirmware_handler 1130 1130 * 1131 1131 * @param coredev pointer to a coredev object returned by ··· 1133 1133 * @param filename null-terminated string specifies firmware file name 1134 1134 * @param loadfirmware_handler device handler that loads firmware 1135 1135 * 1136 - * @return 0 on success, <0 on error. 1136 + * return: 0 on success, <0 on error. 1137 1137 */ 1138 1138 static int smscore_load_firmware_from_file(struct smscore_device_t *coredev, 1139 1139 int mode, ··· 1182 1182 return rc; 1183 1183 } 1184 1184 1185 - /** 1185 + /* 1186 1186 * notifies all clients registered with the device, notifies hotplugs, 1187 1187 * frees all buffers and coredev object 1188 1188 * 1189 1189 * @param coredev pointer to a coredev object returned by 1190 1190 * smscore_register_device 1191 1191 * 1192 - * @return 0 on success, <0 on error. 1192 + * return: 0 on success, <0 on error. 1193 1193 */ 1194 1194 void smscore_unregister_device(struct smscore_device_t *coredev) 1195 1195 { ··· 1282 1282 return rc; 1283 1283 } 1284 1284 1285 - /** 1285 + /* 1286 1286 * send init device request and wait for response 1287 1287 * 1288 1288 * @param coredev pointer to a coredev object returned by 1289 1289 * smscore_register_device 1290 1290 * @param mode requested mode of operation 1291 1291 * 1292 - * @return 0 on success, <0 on error. 1292 + * return: 0 on success, <0 on error. 1293 1293 */ 1294 1294 static int smscore_init_device(struct smscore_device_t *coredev, int mode) 1295 1295 { ··· 1315 1315 return rc; 1316 1316 } 1317 1317 1318 - /** 1318 + /* 1319 1319 * calls device handler to change mode of operation 1320 1320 * NOTE: stellar/usb may disconnect when changing mode 1321 1321 * ··· 1323 1323 * smscore_register_device 1324 1324 * @param mode requested mode of operation 1325 1325 * 1326 - * @return 0 on success, <0 on error. 1326 + * return: 0 on success, <0 on error. 1327 1327 */ 1328 1328 int smscore_set_device_mode(struct smscore_device_t *coredev, int mode) 1329 1329 { ··· 1411 1411 return rc; 1412 1412 } 1413 1413 1414 - /** 1414 + /* 1415 1415 * calls device handler to get current mode of operation 1416 1416 * 1417 1417 * @param coredev pointer to a coredev object returned by 1418 1418 * smscore_register_device 1419 1419 * 1420 - * @return current mode 1420 + * return: current mode 1421 1421 */ 1422 1422 int smscore_get_device_mode(struct smscore_device_t *coredev) 1423 1423 { ··· 1425 1425 } 1426 1426 EXPORT_SYMBOL_GPL(smscore_get_device_mode); 1427 1427 1428 - /** 1428 + /* 1429 1429 * find client by response id & type within the clients list. 1430 1430 * return client handle or NULL. 1431 1431 * ··· 1462 1462 return client; 1463 1463 } 1464 1464 1465 - /** 1465 + /* 1466 1466 * find client by response id/type, call clients onresponse handler 1467 1467 * return buffer to pool on error 1468 1468 * ··· 1615 1615 } 1616 1616 EXPORT_SYMBOL_GPL(smscore_onresponse); 1617 1617 1618 - /** 1618 + /* 1619 1619 * return pointer to next free buffer descriptor from core pool 1620 1620 * 1621 1621 * @param coredev pointer to a coredev object returned by 1622 1622 * smscore_register_device 1623 1623 * 1624 - * @return pointer to descriptor on success, NULL on error. 1624 + * return: pointer to descriptor on success, NULL on error. 1625 1625 */ 1626 1626 1627 1627 static struct smscore_buffer_t *get_entry(struct smscore_device_t *coredev) ··· 1648 1648 } 1649 1649 EXPORT_SYMBOL_GPL(smscore_getbuffer); 1650 1650 1651 - /** 1651 + /* 1652 1652 * return buffer descriptor to a pool 1653 1653 * 1654 1654 * @param coredev pointer to a coredev object returned by ··· 1693 1693 return 0; 1694 1694 } 1695 1695 1696 - /** 1696 + /* 1697 1697 * creates smsclient object, check that id is taken by another client 1698 1698 * 1699 1699 * @param coredev pointer to a coredev object from clients hotplug ··· 1705 1705 * @param context client-specific context 1706 1706 * @param client pointer to a value that receives created smsclient object 1707 1707 * 1708 - * @return 0 on success, <0 on error. 1708 + * return: 0 on success, <0 on error. 1709 1709 */ 1710 1710 int smscore_register_client(struct smscore_device_t *coredev, 1711 1711 struct smsclient_params_t *params, ··· 1740 1740 } 1741 1741 EXPORT_SYMBOL_GPL(smscore_register_client); 1742 1742 1743 - /** 1743 + /* 1744 1744 * frees smsclient object and all subclients associated with it 1745 1745 * 1746 1746 * @param client pointer to smsclient object returned by ··· 1771 1771 } 1772 1772 EXPORT_SYMBOL_GPL(smscore_unregister_client); 1773 1773 1774 - /** 1774 + /* 1775 1775 * verifies that source id is not taken by another client, 1776 1776 * calls device handler to send requests to the device 1777 1777 * ··· 1780 1780 * @param buffer pointer to a request buffer 1781 1781 * @param size size (in bytes) of request buffer 1782 1782 * 1783 - * @return 0 on success, <0 on error. 1783 + * return: 0 on success, <0 on error. 1784 1784 */ 1785 1785 int smsclient_sendrequest(struct smscore_client_t *client, 1786 1786 void *buffer, size_t size)
+33 -35
drivers/media/dvb-core/dvb_ca_en50221.c
··· 206 206 * @hlen: Number of bytes in haystack. 207 207 * @needle: Buffer to find. 208 208 * @nlen: Number of bytes in needle. 209 - * @return Pointer into haystack needle was found at, or NULL if not found. 209 + * return: Pointer into haystack needle was found at, or NULL if not found. 210 210 */ 211 211 static char *findstr(char *haystack, int hlen, char *needle, int nlen) 212 212 { ··· 226 226 /* ************************************************************************** */ 227 227 /* EN50221 physical interface functions */ 228 228 229 - /** 229 + /* 230 230 * dvb_ca_en50221_check_camstatus - Check CAM status. 231 231 */ 232 232 static int dvb_ca_en50221_check_camstatus(struct dvb_ca_private *ca, int slot) ··· 275 275 * @ca: CA instance. 276 276 * @slot: Slot on interface. 277 277 * @waitfor: Flags to wait for. 278 - * @timeout_ms: Timeout in milliseconds. 278 + * @timeout_hz: Timeout in milliseconds. 279 279 * 280 - * @return 0 on success, nonzero on error. 280 + * return: 0 on success, nonzero on error. 281 281 */ 282 282 static int dvb_ca_en50221_wait_if_status(struct dvb_ca_private *ca, int slot, 283 283 u8 waitfor, int timeout_hz) ··· 325 325 * @ca: CA instance. 326 326 * @slot: Slot id. 327 327 * 328 - * @return 0 on success, nonzero on failure. 328 + * return: 0 on success, nonzero on failure. 329 329 */ 330 330 static int dvb_ca_en50221_link_init(struct dvb_ca_private *ca, int slot) 331 331 { ··· 397 397 * @ca: CA instance. 398 398 * @slot: Slot id. 399 399 * @address: Address to read from. Updated. 400 - * @tupleType: Tuple id byte. Updated. 401 - * @tupleLength: Tuple length. Updated. 400 + * @tuple_type: Tuple id byte. Updated. 401 + * @tuple_length: Tuple length. Updated. 402 402 * @tuple: Dest buffer for tuple (must be 256 bytes). Updated. 403 403 * 404 - * @return 0 on success, nonzero on error. 404 + * return: 0 on success, nonzero on error. 405 405 */ 406 406 static int dvb_ca_en50221_read_tuple(struct dvb_ca_private *ca, int slot, 407 407 int *address, int *tuple_type, ··· 455 455 * @ca: CA instance. 456 456 * @slot: Slot id. 457 457 * 458 - * @return 0 on success, <0 on failure. 458 + * return: 0 on success, <0 on failure. 459 459 */ 460 460 static int dvb_ca_en50221_parse_attributes(struct dvb_ca_private *ca, int slot) 461 461 { ··· 632 632 * @ca: CA instance. 633 633 * @slot: Slot to read from. 634 634 * @ebuf: If non-NULL, the data will be written to this buffer. If NULL, 635 - * the data will be added into the buffering system as a normal fragment. 635 + * the data will be added into the buffering system as a normal 636 + * fragment. 636 637 * @ecount: Size of ebuf. Ignored if ebuf is NULL. 637 638 * 638 - * @return Number of bytes read, or < 0 on error 639 + * return: Number of bytes read, or < 0 on error 639 640 */ 640 641 static int dvb_ca_en50221_read_data(struct dvb_ca_private *ca, int slot, 641 642 u8 *ebuf, int ecount) ··· 785 784 * 786 785 * @ca: CA instance. 787 786 * @slot: Slot to write to. 788 - * @ebuf: The data in this buffer is treated as a complete link-level packet to 789 - * be written. 790 - * @count: Size of ebuf. 787 + * @buf: The data in this buffer is treated as a complete link-level packet to 788 + * be written. 789 + * @bytes_write: Size of ebuf. 791 790 * 792 - * @return Number of bytes written, or < 0 on error. 791 + * return: Number of bytes written, or < 0 on error. 793 792 */ 794 793 static int dvb_ca_en50221_write_data(struct dvb_ca_private *ca, int slot, 795 794 u8 *buf, int bytes_write) ··· 934 933 /** 935 934 * dvb_ca_en50221_camchange_irq - A CAMCHANGE IRQ has occurred. 936 935 * 937 - * @ca: CA instance. 936 + * @pubca: CA instance. 938 937 * @slot: Slot concerned. 939 938 * @change_type: One of the DVB_CA_CAMCHANGE_* values. 940 939 */ ··· 964 963 /** 965 964 * dvb_ca_en50221_camready_irq - A CAMREADY IRQ has occurred. 966 965 * 967 - * @ca: CA instance. 966 + * @pubca: CA instance. 968 967 * @slot: Slot concerned. 969 968 */ 970 969 void dvb_ca_en50221_camready_irq(struct dvb_ca_en50221 *pubca, int slot) ··· 984 983 /** 985 984 * dvb_ca_en50221_frda_irq - An FR or DA IRQ has occurred. 986 985 * 987 - * @ca: CA instance. 986 + * @pubca: CA instance. 988 987 * @slot: Slot concerned. 989 988 */ 990 989 void dvb_ca_en50221_frda_irq(struct dvb_ca_en50221 *pubca, int slot) ··· 1092 1091 * 1093 1092 * @ca: CA instance. 1094 1093 * @slot: Slot to process. 1095 - * @return: 0 .. no change 1094 + * return:: 0 .. no change 1096 1095 * 1 .. CAM state changed 1097 1096 */ 1098 1097 ··· 1297 1296 mutex_unlock(&sl->slot_lock); 1298 1297 } 1299 1298 1300 - /** 1299 + /* 1301 1300 * Kernel thread which monitors CA slots for CAM changes, and performs data 1302 1301 * transfers. 1303 1302 */ ··· 1337 1336 * Real ioctl implementation. 1338 1337 * NOTE: CA_SEND_MSG/CA_GET_MSG ioctls have userspace buffers passed to them. 1339 1338 * 1340 - * @inode: Inode concerned. 1341 1339 * @file: File concerned. 1342 1340 * @cmd: IOCTL command. 1343 - * @arg: Associated argument. 1341 + * @parg: Associated argument. 1344 1342 * 1345 - * @return 0 on success, <0 on error. 1343 + * return: 0 on success, <0 on error. 1346 1344 */ 1347 1345 static int dvb_ca_en50221_io_do_ioctl(struct file *file, 1348 1346 unsigned int cmd, void *parg) ··· 1420 1420 /** 1421 1421 * Wrapper for ioctl implementation. 1422 1422 * 1423 - * @inode: Inode concerned. 1424 1423 * @file: File concerned. 1425 1424 * @cmd: IOCTL command. 1426 1425 * @arg: Associated argument. 1427 1426 * 1428 - * @return 0 on success, <0 on error. 1427 + * return: 0 on success, <0 on error. 1429 1428 */ 1430 1429 static long dvb_ca_en50221_io_ioctl(struct file *file, 1431 1430 unsigned int cmd, unsigned long arg) ··· 1440 1441 * @count: Size of source buffer. 1441 1442 * @ppos: Position in file (ignored). 1442 1443 * 1443 - * @return Number of bytes read, or <0 on error. 1444 + * return: Number of bytes read, or <0 on error. 1444 1445 */ 1445 1446 static ssize_t dvb_ca_en50221_io_write(struct file *file, 1446 1447 const char __user *buf, size_t count, ··· 1535 1536 return status; 1536 1537 } 1537 1538 1538 - /** 1539 + /* 1539 1540 * Condition for waking up in dvb_ca_en50221_io_read_condition 1540 1541 */ 1541 1542 static int dvb_ca_en50221_io_read_condition(struct dvb_ca_private *ca, ··· 1592 1593 * @count: Size of destination buffer. 1593 1594 * @ppos: Position in file (ignored). 1594 1595 * 1595 - * @return Number of bytes read, or <0 on error. 1596 + * return: Number of bytes read, or <0 on error. 1596 1597 */ 1597 1598 static ssize_t dvb_ca_en50221_io_read(struct file *file, char __user *buf, 1598 1599 size_t count, loff_t *ppos) ··· 1701 1702 * @inode: Inode concerned. 1702 1703 * @file: File concerned. 1703 1704 * 1704 - * @return 0 on success, <0 on failure. 1705 + * return: 0 on success, <0 on failure. 1705 1706 */ 1706 1707 static int dvb_ca_en50221_io_open(struct inode *inode, struct file *file) 1707 1708 { ··· 1751 1752 * @inode: Inode concerned. 1752 1753 * @file: File concerned. 1753 1754 * 1754 - * @return 0 on success, <0 on failure. 1755 + * return: 0 on success, <0 on failure. 1755 1756 */ 1756 1757 static int dvb_ca_en50221_io_release(struct inode *inode, struct file *file) 1757 1758 { ··· 1780 1781 * @file: File concerned. 1781 1782 * @wait: poll wait table. 1782 1783 * 1783 - * @return Standard poll mask. 1784 + * return: Standard poll mask. 1784 1785 */ 1785 1786 static unsigned int dvb_ca_en50221_io_poll(struct file *file, poll_table *wait) 1786 1787 { ··· 1837 1838 * Initialise a new DVB CA EN50221 interface device. 1838 1839 * 1839 1840 * @dvb_adapter: DVB adapter to attach the new CA device to. 1840 - * @ca: The dvb_ca instance. 1841 + * @pubca: The dvb_ca instance. 1841 1842 * @flags: Flags describing the CA device (DVB_CA_FLAG_*). 1842 1843 * @slot_count: Number of slots supported. 1843 1844 * 1844 - * @return 0 on success, nonzero on failure 1845 + * return: 0 on success, nonzero on failure 1845 1846 */ 1846 1847 int dvb_ca_en50221_init(struct dvb_adapter *dvb_adapter, 1847 1848 struct dvb_ca_en50221 *pubca, int flags, int slot_count) ··· 1928 1929 /** 1929 1930 * Release a DVB CA EN50221 interface device. 1930 1931 * 1931 - * @ca_dev: The dvb_device_t instance for the CA device. 1932 - * @ca: The associated dvb_ca instance. 1932 + * @pubca: The associated dvb_ca instance. 1933 1933 */ 1934 1934 void dvb_ca_en50221_release(struct dvb_ca_en50221 *pubca) 1935 1935 {
+8 -5
drivers/media/dvb-core/dvb_frontend.c
··· 369 369 } 370 370 371 371 /** 372 - * Performs automatic twiddling of frontend parameters. 372 + * dvb_frontend_swzigzag_autotune - Performs automatic twiddling of frontend 373 + * parameters. 373 374 * 374 - * @param fe The frontend concerned. 375 - * @param check_wrapped Checks if an iteration has completed. DO NOT SET ON THE FIRST ATTEMPT 376 - * @returns Number of complete iterations that have been performed. 375 + * @fe: The frontend concerned. 376 + * @check_wrapped: Checks if an iteration has completed. 377 + * DO NOT SET ON THE FIRST ATTEMPT. 378 + * 379 + * return: Number of complete iterations that have been performed. 377 380 */ 378 381 static int dvb_frontend_swzigzag_autotune(struct dvb_frontend *fe, int check_wrapped) 379 382 { ··· 1256 1253 * dtv_get_frontend - calls a callback for retrieving DTV parameters 1257 1254 * @fe: struct dvb_frontend pointer 1258 1255 * @c: struct dtv_frontend_properties pointer (DVBv5 cache) 1259 - * @p_out struct dvb_frontend_parameters pointer (DVBv3 FE struct) 1256 + * @p_out: struct dvb_frontend_parameters pointer (DVBv3 FE struct) 1260 1257 * 1261 1258 * This routine calls either the DVBv3 or DVBv5 get_frontend call. 1262 1259 * If c is not null, it will update the DVBv5 cache struct pointed by it.
+8 -7
drivers/media/dvb-core/dvb_net.c
··· 125 125 }; 126 126 127 127 128 - /** 128 + /* 129 129 * Determine the packet's protocol ID. The rule here is that we 130 130 * assume 802.3 if the type field is short enough to be a length. 131 131 * This is normal practice and works for any 'now in use' protocol. ··· 155 155 156 156 rawp = skb->data; 157 157 158 - /** 158 + /* 159 159 * This is a magic hack to spot IPX packets. Older Novell breaks 160 160 * the protocol design and runs IPX over 802.3 without an 802.2 LLC 161 161 * layer. We look for FFFF which isn't a used 802.2 SSAP/DSAP. This ··· 164 164 if (*(unsigned short *)rawp == 0xFFFF) 165 165 return htons(ETH_P_802_3); 166 166 167 - /** 167 + /* 168 168 * Real 802.2 LLC 169 169 */ 170 170 return htons(ETH_P_802_2); ··· 215 215 return 0; 216 216 } 217 217 218 - /** Handle ULE extension headers. 218 + /* 219 + * Handle ULE extension headers. 219 220 * Function is called after a successful CRC32 verification of an ULE SNDU to complete its decoding. 220 221 * Returns: >= 0: nr. of bytes consumed by next extension header 221 222 * -1: Mandatory extension header that is not recognized or TEST SNDU; discard. ··· 292 291 } 293 292 294 293 295 - /** Prepare for a new ULE SNDU: reset the decoder state. */ 294 + /* Prepare for a new ULE SNDU: reset the decoder state. */ 296 295 static inline void reset_ule( struct dvb_net_priv *p ) 297 296 { 298 297 p->ule_skb = NULL; ··· 305 304 p->ule_bridged = 0; 306 305 } 307 306 308 - /** 307 + /* 309 308 * Decode ULE SNDUs according to draft-ietf-ipdvb-ule-03.txt from a sequence of 310 309 * TS cells of a single PID. 311 310 */ ··· 1006 1005 { 1007 1006 struct net_device *dev = filter->priv; 1008 1007 1009 - /** 1008 + /* 1010 1009 * we rely on the DVB API definition where exactly one complete 1011 1010 * section is delivered in buffer1 1012 1011 */
+15 -9
drivers/media/dvb-frontends/af9013.h
··· 38 38 * @api_version: Firmware API version. 39 39 * @gpio: GPIOs. 40 40 * @get_dvb_frontend: Get DVB frontend callback. 41 + * 42 + * AF9013/5 GPIOs (mostly guessed): 43 + * * demod#1-gpio#0 - set demod#2 i2c-addr for dual devices 44 + * * demod#1-gpio#1 - xtal setting (?) 45 + * * demod#1-gpio#3 - tuner#1 46 + * * demod#2-gpio#0 - tuner#2 47 + * * demod#2-gpio#1 - xtal setting (?) 41 48 */ 42 49 struct af9013_platform_data { 43 50 /* ··· 96 89 #define AF9013_TS_PARALLEL AF9013_TS_MODE_PARALLEL 97 90 #define AF9013_TS_SERIAL AF9013_TS_MODE_SERIAL 98 91 99 - /* 100 - * AF9013/5 GPIOs (mostly guessed) 101 - * demod#1-gpio#0 - set demod#2 i2c-addr for dual devices 102 - * demod#1-gpio#1 - xtal setting (?) 103 - * demod#1-gpio#3 - tuner#1 104 - * demod#2-gpio#0 - tuner#2 105 - * demod#2-gpio#1 - xtal setting (?) 106 - */ 107 - 108 92 #if IS_REACHABLE(CONFIG_DVB_AF9013) 93 + /** 94 + * Attach an af9013 demod 95 + * 96 + * @config: pointer to &struct af9013_config with demod configuration. 97 + * @i2c: i2c adapter to use. 98 + * 99 + * return: FE pointer on success, NULL on failure. 100 + */ 109 101 extern struct dvb_frontend *af9013_attach(const struct af9013_config *config, 110 102 struct i2c_adapter *i2c); 111 103 #else
+9
drivers/media/dvb-frontends/ascot2e.h
··· 41 41 }; 42 42 43 43 #if IS_REACHABLE(CONFIG_DVB_ASCOT2E) 44 + /** 45 + * Attach an ascot2e tuner 46 + * 47 + * @fe: frontend to be attached 48 + * @config: pointer to &struct ascot2e_config with tuner configuration. 49 + * @i2c: i2c adapter to use. 50 + * 51 + * return: FE pointer on success, NULL on failure. 52 + */ 44 53 extern struct dvb_frontend *ascot2e_attach(struct dvb_frontend *fe, 45 54 const struct ascot2e_config *config, 46 55 struct i2c_adapter *i2c);
+23 -1
drivers/media/dvb-frontends/cxd2820r.h
··· 49 49 * @gpio_chip_base: GPIO. 50 50 * @get_dvb_frontend: Get DVB frontend. 51 51 */ 52 - 53 52 struct cxd2820r_platform_data { 54 53 u8 ts_mode; 55 54 bool ts_clk_inv; ··· 61 62 bool attach_in_use; 62 63 }; 63 64 65 + /** 66 + * struct cxd2820r_config - configuration for cxd2020r demod 67 + * 68 + * @i2c_address: Demodulator I2C address. Driver determines DVB-C slave I2C 69 + * address automatically from master address. 70 + * Default: none, must set. Values: 0x6c, 0x6d. 71 + * @ts_mode: TS output mode. Default: none, must set. Values: FIXME? 72 + * @ts_clock_inv: TS clock inverted. Default: 0. Values: 0, 1. 73 + * @if_agc_polarity: Default: 0. Values: 0, 1 74 + * @spec_inv: Spectrum inversion. Default: 0. Values: 0, 1. 75 + */ 64 76 struct cxd2820r_config { 65 77 /* Demodulator I2C address. 66 78 * Driver determines DVB-C slave I2C address automatically from master ··· 108 98 109 99 110 100 #if IS_REACHABLE(CONFIG_DVB_CXD2820R) 101 + /** 102 + * Attach a cxd2820r demod 103 + * 104 + * @config: pointer to &struct cxd2820r_config with demod configuration. 105 + * @i2c: i2c adapter to use. 106 + * @gpio_chip_base: if zero, disables GPIO setting. Otherwise, if 107 + * CONFIG_GPIOLIB is set dynamically allocate 108 + * gpio base; if is not set, use its value to 109 + * setup the GPIO pins. 110 + * 111 + * return: FE pointer on success, NULL on failure. 112 + */ 111 113 extern struct dvb_frontend *cxd2820r_attach( 112 114 const struct cxd2820r_config *config, 113 115 struct i2c_adapter *i2c,
+6 -6
drivers/media/dvb-frontends/drx39xyj/bsp_i2c.h
··· 52 52 }; 53 53 54 54 55 - /** 55 + /* 56 56 * \def IS_I2C_10BIT( addr ) 57 57 * \brief Determine if I2C address 'addr' is a 10 bits address or not. 58 58 * \param addr The I2C address. ··· 67 67 Exported FUNCTIONS 68 68 ------------------------------------------------------------------------------*/ 69 69 70 - /** 70 + /* 71 71 * \fn drxbsp_i2c_init() 72 72 * \brief Initialize I2C communication module. 73 73 * \return drx_status_t Return status. ··· 76 76 */ 77 77 drx_status_t drxbsp_i2c_init(void); 78 78 79 - /** 79 + /* 80 80 * \fn drxbsp_i2c_term() 81 81 * \brief Terminate I2C communication module. 82 82 * \return drx_status_t Return status. ··· 85 85 */ 86 86 drx_status_t drxbsp_i2c_term(void); 87 87 88 - /** 88 + /* 89 89 * \fn drx_status_t drxbsp_i2c_write_read( struct i2c_device_addr *w_dev_addr, 90 90 * u16 w_count, 91 91 * u8 *wData, ··· 121 121 struct i2c_device_addr *r_dev_addr, 122 122 u16 r_count, u8 *r_data); 123 123 124 - /** 124 + /* 125 125 * \fn drxbsp_i2c_error_text() 126 126 * \brief Returns a human readable error. 127 127 * Counter part of numerical drx_i2c_error_g. ··· 130 130 */ 131 131 char *drxbsp_i2c_error_text(void); 132 132 133 - /** 133 + /* 134 134 * \var drx_i2c_error_g; 135 135 * \brief I2C specific error codes, platform dependent. 136 136 */
+439 -439
drivers/media/dvb-frontends/drx39xyj/drx_driver.h
··· 46 46 void *user_data; /* User data pointer */ 47 47 }; 48 48 49 - /** 49 + /* 50 50 * \def IS_I2C_10BIT( addr ) 51 51 * \brief Determine if I2C address 'addr' is a 10 bits address or not. 52 52 * \param addr The I2C address. ··· 61 61 Exported FUNCTIONS 62 62 ------------------------------------------------------------------------------*/ 63 63 64 - /** 64 + /* 65 65 * \fn drxbsp_i2c_init() 66 66 * \brief Initialize I2C communication module. 67 67 * \return int Return status. ··· 70 70 */ 71 71 int drxbsp_i2c_init(void); 72 72 73 - /** 73 + /* 74 74 * \fn drxbsp_i2c_term() 75 75 * \brief Terminate I2C communication module. 76 76 * \return int Return status. ··· 79 79 */ 80 80 int drxbsp_i2c_term(void); 81 81 82 - /** 82 + /* 83 83 * \fn int drxbsp_i2c_write_read( struct i2c_device_addr *w_dev_addr, 84 84 * u16 w_count, 85 85 * u8 * wData, ··· 115 115 struct i2c_device_addr *r_dev_addr, 116 116 u16 r_count, u8 *r_data); 117 117 118 - /** 118 + /* 119 119 * \fn drxbsp_i2c_error_text() 120 120 * \brief Returns a human readable error. 121 121 * Counter part of numerical drx_i2c_error_g. ··· 124 124 */ 125 125 char *drxbsp_i2c_error_text(void); 126 126 127 - /** 127 + /* 128 128 * \var drx_i2c_error_g; 129 129 * \brief I2C specific error codes, platform dependent. 130 130 */ ··· 241 241 struct i2c_device_addr *r_dev_addr, 242 242 u16 r_count, u8 *r_data); 243 243 244 - /************** 244 + /************* 245 245 * 246 246 * This section configures the DRX Data Access Protocols (DAPs). 247 247 * 248 248 **************/ 249 249 250 - /** 250 + /* 251 251 * \def DRXDAP_SINGLE_MASTER 252 252 * \brief Enable I2C single or I2C multimaster mode on host. 253 253 * ··· 262 262 #define DRXDAP_SINGLE_MASTER 1 263 263 #endif 264 264 265 - /** 265 + /* 266 266 * \def DRXDAP_MAX_WCHUNKSIZE 267 267 * \brief Defines maximum chunksize of an i2c write action by host. 268 268 * ··· 282 282 #define DRXDAP_MAX_WCHUNKSIZE 60 283 283 #endif 284 284 285 - /** 285 + /* 286 286 * \def DRXDAP_MAX_RCHUNKSIZE 287 287 * \brief Defines maximum chunksize of an i2c read action by host. 288 288 * ··· 297 297 #define DRXDAP_MAX_RCHUNKSIZE 60 298 298 #endif 299 299 300 - /************** 300 + /************* 301 301 * 302 302 * This section describes drxdriver defines. 303 303 * 304 304 **************/ 305 305 306 - /** 306 + /* 307 307 * \def DRX_UNKNOWN 308 308 * \brief Generic UNKNOWN value for DRX enumerated types. 309 309 * ··· 313 313 #define DRX_UNKNOWN (254) 314 314 #endif 315 315 316 - /** 316 + /* 317 317 * \def DRX_AUTO 318 318 * \brief Generic AUTO value for DRX enumerated types. 319 319 * ··· 324 324 #define DRX_AUTO (255) 325 325 #endif 326 326 327 - /************** 327 + /************* 328 328 * 329 329 * This section describes flag definitions for the device capbilities. 330 330 * 331 331 **************/ 332 332 333 - /** 333 + /* 334 334 * \brief LNA capability flag 335 335 * 336 336 * Device has a Low Noise Amplifier 337 337 * 338 338 */ 339 339 #define DRX_CAPABILITY_HAS_LNA (1UL << 0) 340 - /** 340 + /* 341 341 * \brief OOB-RX capability flag 342 342 * 343 343 * Device has OOB-RX 344 344 * 345 345 */ 346 346 #define DRX_CAPABILITY_HAS_OOBRX (1UL << 1) 347 - /** 347 + /* 348 348 * \brief ATV capability flag 349 349 * 350 350 * Device has ATV 351 351 * 352 352 */ 353 353 #define DRX_CAPABILITY_HAS_ATV (1UL << 2) 354 - /** 354 + /* 355 355 * \brief DVB-T capability flag 356 356 * 357 357 * Device has DVB-T 358 358 * 359 359 */ 360 360 #define DRX_CAPABILITY_HAS_DVBT (1UL << 3) 361 - /** 361 + /* 362 362 * \brief ITU-B capability flag 363 363 * 364 364 * Device has ITU-B 365 365 * 366 366 */ 367 367 #define DRX_CAPABILITY_HAS_ITUB (1UL << 4) 368 - /** 368 + /* 369 369 * \brief Audio capability flag 370 370 * 371 371 * Device has Audio 372 372 * 373 373 */ 374 374 #define DRX_CAPABILITY_HAS_AUD (1UL << 5) 375 - /** 375 + /* 376 376 * \brief SAW switch capability flag 377 377 * 378 378 * Device has SAW switch 379 379 * 380 380 */ 381 381 #define DRX_CAPABILITY_HAS_SAWSW (1UL << 6) 382 - /** 382 + /* 383 383 * \brief GPIO1 capability flag 384 384 * 385 385 * Device has GPIO1 386 386 * 387 387 */ 388 388 #define DRX_CAPABILITY_HAS_GPIO1 (1UL << 7) 389 - /** 389 + /* 390 390 * \brief GPIO2 capability flag 391 391 * 392 392 * Device has GPIO2 393 393 * 394 394 */ 395 395 #define DRX_CAPABILITY_HAS_GPIO2 (1UL << 8) 396 - /** 396 + /* 397 397 * \brief IRQN capability flag 398 398 * 399 399 * Device has IRQN 400 400 * 401 401 */ 402 402 #define DRX_CAPABILITY_HAS_IRQN (1UL << 9) 403 - /** 403 + /* 404 404 * \brief 8VSB capability flag 405 405 * 406 406 * Device has 8VSB 407 407 * 408 408 */ 409 409 #define DRX_CAPABILITY_HAS_8VSB (1UL << 10) 410 - /** 410 + /* 411 411 * \brief SMA-TX capability flag 412 412 * 413 413 * Device has SMATX 414 414 * 415 415 */ 416 416 #define DRX_CAPABILITY_HAS_SMATX (1UL << 11) 417 - /** 417 + /* 418 418 * \brief SMA-RX capability flag 419 419 * 420 420 * Device has SMARX 421 421 * 422 422 */ 423 423 #define DRX_CAPABILITY_HAS_SMARX (1UL << 12) 424 - /** 424 + /* 425 425 * \brief ITU-A/C capability flag 426 426 * 427 427 * Device has ITU-A/C ··· 439 439 DRX_VERSIONSTRING_HELP(PATCH) 440 440 #define DRX_VERSIONSTRING_HELP(NUM) #NUM 441 441 442 - /** 442 + /* 443 443 * \brief Macro to create byte array elements from 16 bit integers. 444 444 * This macro is used to create byte arrays for block writes. 445 445 * Block writes speed up I2C traffic between host and demod. ··· 449 449 #define DRX_16TO8(x) ((u8) (((u16)x) & 0xFF)), \ 450 450 ((u8)((((u16)x)>>8)&0xFF)) 451 451 452 - /** 452 + /* 453 453 * \brief Macro to convert 16 bit register value to a s32 454 454 */ 455 455 #define DRX_U16TODRXFREQ(x) ((x & 0x8000) ? \ ··· 461 461 ENUM 462 462 -------------------------------------------------------------------------*/ 463 463 464 - /** 464 + /* 465 465 * \enum enum drx_standard 466 466 * \brief Modulation standards. 467 467 */ 468 468 enum drx_standard { 469 - DRX_STANDARD_DVBT = 0, /**< Terrestrial DVB-T. */ 470 - DRX_STANDARD_8VSB, /**< Terrestrial 8VSB. */ 471 - DRX_STANDARD_NTSC, /**< Terrestrial\Cable analog NTSC. */ 469 + DRX_STANDARD_DVBT = 0, /*< Terrestrial DVB-T. */ 470 + DRX_STANDARD_8VSB, /*< Terrestrial 8VSB. */ 471 + DRX_STANDARD_NTSC, /*< Terrestrial\Cable analog NTSC. */ 472 472 DRX_STANDARD_PAL_SECAM_BG, 473 - /**< Terrestrial analog PAL/SECAM B/G */ 473 + /*< Terrestrial analog PAL/SECAM B/G */ 474 474 DRX_STANDARD_PAL_SECAM_DK, 475 - /**< Terrestrial analog PAL/SECAM D/K */ 475 + /*< Terrestrial analog PAL/SECAM D/K */ 476 476 DRX_STANDARD_PAL_SECAM_I, 477 - /**< Terrestrial analog PAL/SECAM I */ 477 + /*< Terrestrial analog PAL/SECAM I */ 478 478 DRX_STANDARD_PAL_SECAM_L, 479 - /**< Terrestrial analog PAL/SECAM L 479 + /*< Terrestrial analog PAL/SECAM L 480 480 with negative modulation */ 481 481 DRX_STANDARD_PAL_SECAM_LP, 482 - /**< Terrestrial analog PAL/SECAM L 482 + /*< Terrestrial analog PAL/SECAM L 483 483 with positive modulation */ 484 - DRX_STANDARD_ITU_A, /**< Cable ITU ANNEX A. */ 485 - DRX_STANDARD_ITU_B, /**< Cable ITU ANNEX B. */ 486 - DRX_STANDARD_ITU_C, /**< Cable ITU ANNEX C. */ 487 - DRX_STANDARD_ITU_D, /**< Cable ITU ANNEX D. */ 488 - DRX_STANDARD_FM, /**< Terrestrial\Cable FM radio */ 489 - DRX_STANDARD_DTMB, /**< Terrestrial DTMB standard (China)*/ 484 + DRX_STANDARD_ITU_A, /*< Cable ITU ANNEX A. */ 485 + DRX_STANDARD_ITU_B, /*< Cable ITU ANNEX B. */ 486 + DRX_STANDARD_ITU_C, /*< Cable ITU ANNEX C. */ 487 + DRX_STANDARD_ITU_D, /*< Cable ITU ANNEX D. */ 488 + DRX_STANDARD_FM, /*< Terrestrial\Cable FM radio */ 489 + DRX_STANDARD_DTMB, /*< Terrestrial DTMB standard (China)*/ 490 490 DRX_STANDARD_UNKNOWN = DRX_UNKNOWN, 491 - /**< Standard unknown. */ 491 + /*< Standard unknown. */ 492 492 DRX_STANDARD_AUTO = DRX_AUTO 493 - /**< Autodetect standard. */ 493 + /*< Autodetect standard. */ 494 494 }; 495 495 496 - /** 496 + /* 497 497 * \enum enum drx_standard 498 498 * \brief Modulation sub-standards. 499 499 */ 500 500 enum drx_substandard { 501 - DRX_SUBSTANDARD_MAIN = 0, /**< Main subvariant of standard */ 501 + DRX_SUBSTANDARD_MAIN = 0, /*< Main subvariant of standard */ 502 502 DRX_SUBSTANDARD_ATV_BG_SCANDINAVIA, 503 503 DRX_SUBSTANDARD_ATV_DK_POLAND, 504 504 DRX_SUBSTANDARD_ATV_DK_CHINA, 505 505 DRX_SUBSTANDARD_UNKNOWN = DRX_UNKNOWN, 506 - /**< Sub-standard unknown. */ 506 + /*< Sub-standard unknown. */ 507 507 DRX_SUBSTANDARD_AUTO = DRX_AUTO 508 - /**< Auto (default) sub-standard */ 508 + /*< Auto (default) sub-standard */ 509 509 }; 510 510 511 - /** 511 + /* 512 512 * \enum enum drx_bandwidth 513 513 * \brief Channel bandwidth or channel spacing. 514 514 */ 515 515 enum drx_bandwidth { 516 - DRX_BANDWIDTH_8MHZ = 0, /**< Bandwidth 8 MHz. */ 517 - DRX_BANDWIDTH_7MHZ, /**< Bandwidth 7 MHz. */ 518 - DRX_BANDWIDTH_6MHZ, /**< Bandwidth 6 MHz. */ 516 + DRX_BANDWIDTH_8MHZ = 0, /*< Bandwidth 8 MHz. */ 517 + DRX_BANDWIDTH_7MHZ, /*< Bandwidth 7 MHz. */ 518 + DRX_BANDWIDTH_6MHZ, /*< Bandwidth 6 MHz. */ 519 519 DRX_BANDWIDTH_UNKNOWN = DRX_UNKNOWN, 520 - /**< Bandwidth unknown. */ 520 + /*< Bandwidth unknown. */ 521 521 DRX_BANDWIDTH_AUTO = DRX_AUTO 522 - /**< Auto Set Bandwidth */ 522 + /*< Auto Set Bandwidth */ 523 523 }; 524 524 525 - /** 525 + /* 526 526 * \enum enum drx_mirror 527 527 * \brief Indicate if channel spectrum is mirrored or not. 528 528 */ 529 529 enum drx_mirror { 530 - DRX_MIRROR_NO = 0, /**< Spectrum is not mirrored. */ 531 - DRX_MIRROR_YES, /**< Spectrum is mirrored. */ 530 + DRX_MIRROR_NO = 0, /*< Spectrum is not mirrored. */ 531 + DRX_MIRROR_YES, /*< Spectrum is mirrored. */ 532 532 DRX_MIRROR_UNKNOWN = DRX_UNKNOWN, 533 - /**< Unknown if spectrum is mirrored. */ 533 + /*< Unknown if spectrum is mirrored. */ 534 534 DRX_MIRROR_AUTO = DRX_AUTO 535 - /**< Autodetect if spectrum is mirrored. */ 535 + /*< Autodetect if spectrum is mirrored. */ 536 536 }; 537 537 538 - /** 538 + /* 539 539 * \enum enum drx_modulation 540 540 * \brief Constellation type of the channel. 541 541 */ 542 542 enum drx_modulation { 543 - DRX_CONSTELLATION_BPSK = 0, /**< Modulation is BPSK. */ 544 - DRX_CONSTELLATION_QPSK, /**< Constellation is QPSK. */ 545 - DRX_CONSTELLATION_PSK8, /**< Constellation is PSK8. */ 546 - DRX_CONSTELLATION_QAM16, /**< Constellation is QAM16. */ 547 - DRX_CONSTELLATION_QAM32, /**< Constellation is QAM32. */ 548 - DRX_CONSTELLATION_QAM64, /**< Constellation is QAM64. */ 549 - DRX_CONSTELLATION_QAM128, /**< Constellation is QAM128. */ 550 - DRX_CONSTELLATION_QAM256, /**< Constellation is QAM256. */ 551 - DRX_CONSTELLATION_QAM512, /**< Constellation is QAM512. */ 552 - DRX_CONSTELLATION_QAM1024, /**< Constellation is QAM1024. */ 553 - DRX_CONSTELLATION_QPSK_NR, /**< Constellation is QPSK_NR */ 543 + DRX_CONSTELLATION_BPSK = 0, /*< Modulation is BPSK. */ 544 + DRX_CONSTELLATION_QPSK, /*< Constellation is QPSK. */ 545 + DRX_CONSTELLATION_PSK8, /*< Constellation is PSK8. */ 546 + DRX_CONSTELLATION_QAM16, /*< Constellation is QAM16. */ 547 + DRX_CONSTELLATION_QAM32, /*< Constellation is QAM32. */ 548 + DRX_CONSTELLATION_QAM64, /*< Constellation is QAM64. */ 549 + DRX_CONSTELLATION_QAM128, /*< Constellation is QAM128. */ 550 + DRX_CONSTELLATION_QAM256, /*< Constellation is QAM256. */ 551 + DRX_CONSTELLATION_QAM512, /*< Constellation is QAM512. */ 552 + DRX_CONSTELLATION_QAM1024, /*< Constellation is QAM1024. */ 553 + DRX_CONSTELLATION_QPSK_NR, /*< Constellation is QPSK_NR */ 554 554 DRX_CONSTELLATION_UNKNOWN = DRX_UNKNOWN, 555 - /**< Constellation unknown. */ 555 + /*< Constellation unknown. */ 556 556 DRX_CONSTELLATION_AUTO = DRX_AUTO 557 - /**< Autodetect constellation. */ 557 + /*< Autodetect constellation. */ 558 558 }; 559 559 560 - /** 560 + /* 561 561 * \enum enum drx_hierarchy 562 562 * \brief Hierarchy of the channel. 563 563 */ 564 564 enum drx_hierarchy { 565 - DRX_HIERARCHY_NONE = 0, /**< None hierarchical channel. */ 566 - DRX_HIERARCHY_ALPHA1, /**< Hierarchical channel, alpha=1. */ 567 - DRX_HIERARCHY_ALPHA2, /**< Hierarchical channel, alpha=2. */ 568 - DRX_HIERARCHY_ALPHA4, /**< Hierarchical channel, alpha=4. */ 565 + DRX_HIERARCHY_NONE = 0, /*< None hierarchical channel. */ 566 + DRX_HIERARCHY_ALPHA1, /*< Hierarchical channel, alpha=1. */ 567 + DRX_HIERARCHY_ALPHA2, /*< Hierarchical channel, alpha=2. */ 568 + DRX_HIERARCHY_ALPHA4, /*< Hierarchical channel, alpha=4. */ 569 569 DRX_HIERARCHY_UNKNOWN = DRX_UNKNOWN, 570 - /**< Hierarchy unknown. */ 570 + /*< Hierarchy unknown. */ 571 571 DRX_HIERARCHY_AUTO = DRX_AUTO 572 - /**< Autodetect hierarchy. */ 572 + /*< Autodetect hierarchy. */ 573 573 }; 574 574 575 - /** 575 + /* 576 576 * \enum enum drx_priority 577 577 * \brief Channel priority in case of hierarchical transmission. 578 578 */ 579 579 enum drx_priority { 580 - DRX_PRIORITY_LOW = 0, /**< Low priority channel. */ 581 - DRX_PRIORITY_HIGH, /**< High priority channel. */ 580 + DRX_PRIORITY_LOW = 0, /*< Low priority channel. */ 581 + DRX_PRIORITY_HIGH, /*< High priority channel. */ 582 582 DRX_PRIORITY_UNKNOWN = DRX_UNKNOWN 583 - /**< Priority unknown. */ 583 + /*< Priority unknown. */ 584 584 }; 585 585 586 - /** 586 + /* 587 587 * \enum enum drx_coderate 588 588 * \brief Channel priority in case of hierarchical transmission. 589 589 */ 590 590 enum drx_coderate { 591 - DRX_CODERATE_1DIV2 = 0, /**< Code rate 1/2nd. */ 592 - DRX_CODERATE_2DIV3, /**< Code rate 2/3nd. */ 593 - DRX_CODERATE_3DIV4, /**< Code rate 3/4nd. */ 594 - DRX_CODERATE_5DIV6, /**< Code rate 5/6nd. */ 595 - DRX_CODERATE_7DIV8, /**< Code rate 7/8nd. */ 591 + DRX_CODERATE_1DIV2 = 0, /*< Code rate 1/2nd. */ 592 + DRX_CODERATE_2DIV3, /*< Code rate 2/3nd. */ 593 + DRX_CODERATE_3DIV4, /*< Code rate 3/4nd. */ 594 + DRX_CODERATE_5DIV6, /*< Code rate 5/6nd. */ 595 + DRX_CODERATE_7DIV8, /*< Code rate 7/8nd. */ 596 596 DRX_CODERATE_UNKNOWN = DRX_UNKNOWN, 597 - /**< Code rate unknown. */ 597 + /*< Code rate unknown. */ 598 598 DRX_CODERATE_AUTO = DRX_AUTO 599 - /**< Autodetect code rate. */ 599 + /*< Autodetect code rate. */ 600 600 }; 601 601 602 - /** 602 + /* 603 603 * \enum enum drx_guard 604 604 * \brief Guard interval of a channel. 605 605 */ 606 606 enum drx_guard { 607 - DRX_GUARD_1DIV32 = 0, /**< Guard interval 1/32nd. */ 608 - DRX_GUARD_1DIV16, /**< Guard interval 1/16th. */ 609 - DRX_GUARD_1DIV8, /**< Guard interval 1/8th. */ 610 - DRX_GUARD_1DIV4, /**< Guard interval 1/4th. */ 607 + DRX_GUARD_1DIV32 = 0, /*< Guard interval 1/32nd. */ 608 + DRX_GUARD_1DIV16, /*< Guard interval 1/16th. */ 609 + DRX_GUARD_1DIV8, /*< Guard interval 1/8th. */ 610 + DRX_GUARD_1DIV4, /*< Guard interval 1/4th. */ 611 611 DRX_GUARD_UNKNOWN = DRX_UNKNOWN, 612 - /**< Guard interval unknown. */ 612 + /*< Guard interval unknown. */ 613 613 DRX_GUARD_AUTO = DRX_AUTO 614 - /**< Autodetect guard interval. */ 614 + /*< Autodetect guard interval. */ 615 615 }; 616 616 617 - /** 617 + /* 618 618 * \enum enum drx_fft_mode 619 619 * \brief FFT mode. 620 620 */ 621 621 enum drx_fft_mode { 622 - DRX_FFTMODE_2K = 0, /**< 2K FFT mode. */ 623 - DRX_FFTMODE_4K, /**< 4K FFT mode. */ 624 - DRX_FFTMODE_8K, /**< 8K FFT mode. */ 622 + DRX_FFTMODE_2K = 0, /*< 2K FFT mode. */ 623 + DRX_FFTMODE_4K, /*< 4K FFT mode. */ 624 + DRX_FFTMODE_8K, /*< 8K FFT mode. */ 625 625 DRX_FFTMODE_UNKNOWN = DRX_UNKNOWN, 626 - /**< FFT mode unknown. */ 626 + /*< FFT mode unknown. */ 627 627 DRX_FFTMODE_AUTO = DRX_AUTO 628 - /**< Autodetect FFT mode. */ 628 + /*< Autodetect FFT mode. */ 629 629 }; 630 630 631 - /** 631 + /* 632 632 * \enum enum drx_classification 633 633 * \brief Channel classification. 634 634 */ 635 635 enum drx_classification { 636 - DRX_CLASSIFICATION_GAUSS = 0, /**< Gaussion noise. */ 637 - DRX_CLASSIFICATION_HVY_GAUSS, /**< Heavy Gaussion noise. */ 638 - DRX_CLASSIFICATION_COCHANNEL, /**< Co-channel. */ 639 - DRX_CLASSIFICATION_STATIC, /**< Static echo. */ 640 - DRX_CLASSIFICATION_MOVING, /**< Moving echo. */ 641 - DRX_CLASSIFICATION_ZERODB, /**< Zero dB echo. */ 636 + DRX_CLASSIFICATION_GAUSS = 0, /*< Gaussion noise. */ 637 + DRX_CLASSIFICATION_HVY_GAUSS, /*< Heavy Gaussion noise. */ 638 + DRX_CLASSIFICATION_COCHANNEL, /*< Co-channel. */ 639 + DRX_CLASSIFICATION_STATIC, /*< Static echo. */ 640 + DRX_CLASSIFICATION_MOVING, /*< Moving echo. */ 641 + DRX_CLASSIFICATION_ZERODB, /*< Zero dB echo. */ 642 642 DRX_CLASSIFICATION_UNKNOWN = DRX_UNKNOWN, 643 - /**< Unknown classification */ 643 + /*< Unknown classification */ 644 644 DRX_CLASSIFICATION_AUTO = DRX_AUTO 645 - /**< Autodetect classification. */ 645 + /*< Autodetect classification. */ 646 646 }; 647 647 648 - /** 648 + /* 649 649 * /enum enum drx_interleave_mode 650 650 * /brief Interleave modes 651 651 */ ··· 673 673 DRX_INTERLEAVEMODE_B52_M48, 674 674 DRX_INTERLEAVEMODE_B52_M0, 675 675 DRX_INTERLEAVEMODE_UNKNOWN = DRX_UNKNOWN, 676 - /**< Unknown interleave mode */ 676 + /*< Unknown interleave mode */ 677 677 DRX_INTERLEAVEMODE_AUTO = DRX_AUTO 678 - /**< Autodetect interleave mode */ 678 + /*< Autodetect interleave mode */ 679 679 }; 680 680 681 - /** 681 + /* 682 682 * \enum enum drx_carrier_mode 683 683 * \brief Channel Carrier Mode. 684 684 */ 685 685 enum drx_carrier_mode { 686 - DRX_CARRIER_MULTI = 0, /**< Multi carrier mode */ 687 - DRX_CARRIER_SINGLE, /**< Single carrier mode */ 686 + DRX_CARRIER_MULTI = 0, /*< Multi carrier mode */ 687 + DRX_CARRIER_SINGLE, /*< Single carrier mode */ 688 688 DRX_CARRIER_UNKNOWN = DRX_UNKNOWN, 689 - /**< Carrier mode unknown. */ 690 - DRX_CARRIER_AUTO = DRX_AUTO /**< Autodetect carrier mode */ 689 + /*< Carrier mode unknown. */ 690 + DRX_CARRIER_AUTO = DRX_AUTO /*< Autodetect carrier mode */ 691 691 }; 692 692 693 - /** 693 + /* 694 694 * \enum enum drx_frame_mode 695 695 * \brief Channel Frame Mode. 696 696 */ 697 697 enum drx_frame_mode { 698 - DRX_FRAMEMODE_420 = 0, /**< 420 with variable PN */ 699 - DRX_FRAMEMODE_595, /**< 595 */ 700 - DRX_FRAMEMODE_945, /**< 945 with variable PN */ 698 + DRX_FRAMEMODE_420 = 0, /*< 420 with variable PN */ 699 + DRX_FRAMEMODE_595, /*< 595 */ 700 + DRX_FRAMEMODE_945, /*< 945 with variable PN */ 701 701 DRX_FRAMEMODE_420_FIXED_PN, 702 - /**< 420 with fixed PN */ 702 + /*< 420 with fixed PN */ 703 703 DRX_FRAMEMODE_945_FIXED_PN, 704 - /**< 945 with fixed PN */ 704 + /*< 945 with fixed PN */ 705 705 DRX_FRAMEMODE_UNKNOWN = DRX_UNKNOWN, 706 - /**< Frame mode unknown. */ 706 + /*< Frame mode unknown. */ 707 707 DRX_FRAMEMODE_AUTO = DRX_AUTO 708 - /**< Autodetect frame mode */ 708 + /*< Autodetect frame mode */ 709 709 }; 710 710 711 - /** 711 + /* 712 712 * \enum enum drx_tps_frame 713 713 * \brief Frame number in current super-frame. 714 714 */ 715 715 enum drx_tps_frame { 716 - DRX_TPS_FRAME1 = 0, /**< TPS frame 1. */ 717 - DRX_TPS_FRAME2, /**< TPS frame 2. */ 718 - DRX_TPS_FRAME3, /**< TPS frame 3. */ 719 - DRX_TPS_FRAME4, /**< TPS frame 4. */ 716 + DRX_TPS_FRAME1 = 0, /*< TPS frame 1. */ 717 + DRX_TPS_FRAME2, /*< TPS frame 2. */ 718 + DRX_TPS_FRAME3, /*< TPS frame 3. */ 719 + DRX_TPS_FRAME4, /*< TPS frame 4. */ 720 720 DRX_TPS_FRAME_UNKNOWN = DRX_UNKNOWN 721 - /**< TPS frame unknown. */ 721 + /*< TPS frame unknown. */ 722 722 }; 723 723 724 - /** 724 + /* 725 725 * \enum enum drx_ldpc 726 726 * \brief TPS LDPC . 727 727 */ 728 728 enum drx_ldpc { 729 - DRX_LDPC_0_4 = 0, /**< LDPC 0.4 */ 730 - DRX_LDPC_0_6, /**< LDPC 0.6 */ 731 - DRX_LDPC_0_8, /**< LDPC 0.8 */ 729 + DRX_LDPC_0_4 = 0, /*< LDPC 0.4 */ 730 + DRX_LDPC_0_6, /*< LDPC 0.6 */ 731 + DRX_LDPC_0_8, /*< LDPC 0.8 */ 732 732 DRX_LDPC_UNKNOWN = DRX_UNKNOWN, 733 - /**< LDPC unknown. */ 734 - DRX_LDPC_AUTO = DRX_AUTO /**< Autodetect LDPC */ 733 + /*< LDPC unknown. */ 734 + DRX_LDPC_AUTO = DRX_AUTO /*< Autodetect LDPC */ 735 735 }; 736 736 737 - /** 737 + /* 738 738 * \enum enum drx_pilot_mode 739 739 * \brief Pilot modes in DTMB. 740 740 */ 741 741 enum drx_pilot_mode { 742 - DRX_PILOT_ON = 0, /**< Pilot On */ 743 - DRX_PILOT_OFF, /**< Pilot Off */ 742 + DRX_PILOT_ON = 0, /*< Pilot On */ 743 + DRX_PILOT_OFF, /*< Pilot Off */ 744 744 DRX_PILOT_UNKNOWN = DRX_UNKNOWN, 745 - /**< Pilot unknown. */ 746 - DRX_PILOT_AUTO = DRX_AUTO /**< Autodetect Pilot */ 745 + /*< Pilot unknown. */ 746 + DRX_PILOT_AUTO = DRX_AUTO /*< Autodetect Pilot */ 747 747 }; 748 748 749 - /** 749 + /* 750 750 * enum drxu_code_action - indicate if firmware has to be uploaded or verified. 751 751 * @UCODE_UPLOAD: Upload the microcode image to device 752 752 * @UCODE_VERIFY: Compare microcode image with code on device ··· 756 756 UCODE_VERIFY 757 757 }; 758 758 759 - /** 759 + /* 760 760 * \enum enum drx_lock_status * \brief Used to reflect current lock status of demodulator. 761 761 * 762 762 * The generic lock states have device dependent semantics. ··· 801 801 DRX_LOCKED 802 802 }; 803 803 804 - /** 804 + /* 805 805 * \enum enum drx_uio* \brief Used to address a User IO (UIO). 806 806 */ 807 807 enum drx_uio { ··· 840 840 DRX_UIO_MAX = DRX_UIO32 841 841 }; 842 842 843 - /** 843 + /* 844 844 * \enum enum drxuio_mode * \brief Used to configure the modus oprandi of a UIO. 845 845 * 846 846 * DRX_UIO_MODE_FIRMWARE is an old uio mode. ··· 850 850 */ 851 851 enum drxuio_mode { 852 852 DRX_UIO_MODE_DISABLE = 0x01, 853 - /**< not used, pin is configured as input */ 853 + /*< not used, pin is configured as input */ 854 854 DRX_UIO_MODE_READWRITE = 0x02, 855 - /**< used for read/write by application */ 855 + /*< used for read/write by application */ 856 856 DRX_UIO_MODE_FIRMWARE = 0x04, 857 - /**< controlled by firmware, function 0 */ 857 + /*< controlled by firmware, function 0 */ 858 858 DRX_UIO_MODE_FIRMWARE0 = DRX_UIO_MODE_FIRMWARE, 859 - /**< same as above */ 859 + /*< same as above */ 860 860 DRX_UIO_MODE_FIRMWARE1 = 0x08, 861 - /**< controlled by firmware, function 1 */ 861 + /*< controlled by firmware, function 1 */ 862 862 DRX_UIO_MODE_FIRMWARE2 = 0x10, 863 - /**< controlled by firmware, function 2 */ 863 + /*< controlled by firmware, function 2 */ 864 864 DRX_UIO_MODE_FIRMWARE3 = 0x20, 865 - /**< controlled by firmware, function 3 */ 865 + /*< controlled by firmware, function 3 */ 866 866 DRX_UIO_MODE_FIRMWARE4 = 0x40, 867 - /**< controlled by firmware, function 4 */ 867 + /*< controlled by firmware, function 4 */ 868 868 DRX_UIO_MODE_FIRMWARE5 = 0x80 869 - /**< controlled by firmware, function 5 */ 869 + /*< controlled by firmware, function 5 */ 870 870 }; 871 871 872 - /** 872 + /* 873 873 * \enum enum drxoob_downstream_standard * \brief Used to select OOB standard. 874 874 * 875 875 * Based on ANSI 55-1 and 55-2 876 876 */ 877 877 enum drxoob_downstream_standard { 878 878 DRX_OOB_MODE_A = 0, 879 - /**< ANSI 55-1 */ 879 + /*< ANSI 55-1 */ 880 880 DRX_OOB_MODE_B_GRADE_A, 881 - /**< ANSI 55-2 A */ 881 + /*< ANSI 55-2 A */ 882 882 DRX_OOB_MODE_B_GRADE_B 883 - /**< ANSI 55-2 B */ 883 + /*< ANSI 55-2 B */ 884 884 }; 885 885 886 886 /*------------------------------------------------------------------------- ··· 924 924 /*============================================================================*/ 925 925 /*============================================================================*/ 926 926 927 - /** 927 + /* 928 928 * struct drxu_code_info Parameters for microcode upload and verfiy. 929 929 * 930 930 * @mc_file: microcode file name ··· 935 935 char *mc_file; 936 936 }; 937 937 938 - /** 938 + /* 939 939 * \struct drx_mc_version_rec_t 940 940 * \brief Microcode version record 941 941 * Version numbers are stored in BCD format, as usual: ··· 963 963 964 964 /*========================================*/ 965 965 966 - /** 966 + /* 967 967 * \struct drx_filter_info_t 968 968 * \brief Parameters for loading filter coefficients 969 969 * ··· 971 971 */ 972 972 struct drx_filter_info { 973 973 u8 *data_re; 974 - /**< pointer to coefficients for RE */ 974 + /*< pointer to coefficients for RE */ 975 975 u8 *data_im; 976 - /**< pointer to coefficients for IM */ 976 + /*< pointer to coefficients for IM */ 977 977 u16 size_re; 978 - /**< size of coefficients for RE */ 978 + /*< size of coefficients for RE */ 979 979 u16 size_im; 980 - /**< size of coefficients for IM */ 980 + /*< size of coefficients for IM */ 981 981 }; 982 982 983 983 /*========================================*/ 984 984 985 - /** 985 + /* 986 986 * \struct struct drx_channel * \brief The set of parameters describing a single channel. 987 987 * 988 988 * Used by DRX_CTRL_SET_CHANNEL and DRX_CTRL_GET_CHANNEL. ··· 991 991 */ 992 992 struct drx_channel { 993 993 s32 frequency; 994 - /**< frequency in kHz */ 994 + /*< frequency in kHz */ 995 995 enum drx_bandwidth bandwidth; 996 - /**< bandwidth */ 997 - enum drx_mirror mirror; /**< mirrored or not on RF */ 996 + /*< bandwidth */ 997 + enum drx_mirror mirror; /*< mirrored or not on RF */ 998 998 enum drx_modulation constellation; 999 - /**< constellation */ 999 + /*< constellation */ 1000 1000 enum drx_hierarchy hierarchy; 1001 - /**< hierarchy */ 1002 - enum drx_priority priority; /**< priority */ 1003 - enum drx_coderate coderate; /**< coderate */ 1004 - enum drx_guard guard; /**< guard interval */ 1005 - enum drx_fft_mode fftmode; /**< fftmode */ 1001 + /*< hierarchy */ 1002 + enum drx_priority priority; /*< priority */ 1003 + enum drx_coderate coderate; /*< coderate */ 1004 + enum drx_guard guard; /*< guard interval */ 1005 + enum drx_fft_mode fftmode; /*< fftmode */ 1006 1006 enum drx_classification classification; 1007 - /**< classification */ 1007 + /*< classification */ 1008 1008 u32 symbolrate; 1009 - /**< symbolrate in symbols/sec */ 1009 + /*< symbolrate in symbols/sec */ 1010 1010 enum drx_interleave_mode interleavemode; 1011 - /**< interleaveMode QAM */ 1012 - enum drx_ldpc ldpc; /**< ldpc */ 1013 - enum drx_carrier_mode carrier; /**< carrier */ 1011 + /*< interleaveMode QAM */ 1012 + enum drx_ldpc ldpc; /*< ldpc */ 1013 + enum drx_carrier_mode carrier; /*< carrier */ 1014 1014 enum drx_frame_mode framemode; 1015 - /**< frame mode */ 1016 - enum drx_pilot_mode pilot; /**< pilot mode */ 1015 + /*< frame mode */ 1016 + enum drx_pilot_mode pilot; /*< pilot mode */ 1017 1017 }; 1018 1018 1019 1019 /*========================================*/ ··· 1027 1027 1028 1028 /*========================================*/ 1029 1029 1030 - /** 1030 + /* 1031 1031 * \struct struct drx_complex * A complex number. 1032 1032 * 1033 1033 * Used by DRX_CTRL_CONSTEL. 1034 1034 */ 1035 1035 struct drx_complex { 1036 1036 s16 im; 1037 - /**< Imaginary part. */ 1037 + /*< Imaginary part. */ 1038 1038 s16 re; 1039 - /**< Real part. */ 1039 + /*< Real part. */ 1040 1040 }; 1041 1041 1042 1042 /*========================================*/ 1043 1043 1044 - /** 1044 + /* 1045 1045 * \struct struct drx_frequency_plan * Array element of a frequency plan. 1046 1046 * 1047 1047 * Used by DRX_CTRL_SCAN_INIT. 1048 1048 */ 1049 1049 struct drx_frequency_plan { 1050 1050 s32 first; 1051 - /**< First centre frequency in this band */ 1051 + /*< First centre frequency in this band */ 1052 1052 s32 last; 1053 - /**< Last centre frequency in this band */ 1053 + /*< Last centre frequency in this band */ 1054 1054 s32 step; 1055 - /**< Stepping frequency in this band */ 1055 + /*< Stepping frequency in this band */ 1056 1056 enum drx_bandwidth bandwidth; 1057 - /**< Bandwidth within this frequency band */ 1057 + /*< Bandwidth within this frequency band */ 1058 1058 u16 ch_number; 1059 - /**< First channel number in this band, or first 1059 + /*< First channel number in this band, or first 1060 1060 index in ch_names */ 1061 1061 char **ch_names; 1062 - /**< Optional list of channel names in this 1062 + /*< Optional list of channel names in this 1063 1063 band */ 1064 1064 }; 1065 1065 1066 1066 /*========================================*/ 1067 1067 1068 - /** 1068 + /* 1069 1069 * \struct struct drx_scan_param * Parameters for channel scan. 1070 1070 * 1071 1071 * Used by DRX_CTRL_SCAN_INIT. 1072 1072 */ 1073 1073 struct drx_scan_param { 1074 1074 struct drx_frequency_plan *frequency_plan; 1075 - /**< Frequency plan (array)*/ 1076 - u16 frequency_plan_size; /**< Number of bands */ 1077 - u32 num_tries; /**< Max channels tried */ 1078 - s32 skip; /**< Minimum frequency step to take 1075 + /*< Frequency plan (array)*/ 1076 + u16 frequency_plan_size; /*< Number of bands */ 1077 + u32 num_tries; /*< Max channels tried */ 1078 + s32 skip; /*< Minimum frequency step to take 1079 1079 after a channel is found */ 1080 - void *ext_params; /**< Standard specific params */ 1080 + void *ext_params; /*< Standard specific params */ 1081 1081 }; 1082 1082 1083 1083 /*========================================*/ 1084 1084 1085 - /** 1085 + /* 1086 1086 * \brief Scan commands. 1087 1087 * Used by scanning algorithms. 1088 1088 */ 1089 1089 enum drx_scan_command { 1090 - DRX_SCAN_COMMAND_INIT = 0,/**< Initialize scanning */ 1091 - DRX_SCAN_COMMAND_NEXT, /**< Next scan */ 1092 - DRX_SCAN_COMMAND_STOP /**< Stop scanning */ 1090 + DRX_SCAN_COMMAND_INIT = 0,/*< Initialize scanning */ 1091 + DRX_SCAN_COMMAND_NEXT, /*< Next scan */ 1092 + DRX_SCAN_COMMAND_STOP /*< Stop scanning */ 1093 1093 }; 1094 1094 1095 1095 /*========================================*/ 1096 1096 1097 - /** 1097 + /* 1098 1098 * \brief Inner scan function prototype. 1099 1099 */ 1100 1100 typedef int(*drx_scan_func_t) (void *scan_context, ··· 1104 1104 1105 1105 /*========================================*/ 1106 1106 1107 - /** 1107 + /* 1108 1108 * \struct struct drxtps_info * TPS information, DVB-T specific. 1109 1109 * 1110 1110 * Used by DRX_CTRL_TPS_INFO. 1111 1111 */ 1112 1112 struct drxtps_info { 1113 - enum drx_fft_mode fftmode; /**< Fft mode */ 1114 - enum drx_guard guard; /**< Guard interval */ 1113 + enum drx_fft_mode fftmode; /*< Fft mode */ 1114 + enum drx_guard guard; /*< Guard interval */ 1115 1115 enum drx_modulation constellation; 1116 - /**< Constellation */ 1116 + /*< Constellation */ 1117 1117 enum drx_hierarchy hierarchy; 1118 - /**< Hierarchy */ 1118 + /*< Hierarchy */ 1119 1119 enum drx_coderate high_coderate; 1120 - /**< High code rate */ 1120 + /*< High code rate */ 1121 1121 enum drx_coderate low_coderate; 1122 - /**< Low cod rate */ 1123 - enum drx_tps_frame frame; /**< Tps frame */ 1124 - u8 length; /**< Length */ 1125 - u16 cell_id; /**< Cell id */ 1122 + /*< Low cod rate */ 1123 + enum drx_tps_frame frame; /*< Tps frame */ 1124 + u8 length; /*< Length */ 1125 + u16 cell_id; /*< Cell id */ 1126 1126 }; 1127 1127 1128 1128 /*========================================*/ 1129 1129 1130 - /** 1130 + /* 1131 1131 * \brief Power mode of device. 1132 1132 * 1133 1133 * Used by DRX_CTRL_SET_POWER_MODE. 1134 1134 */ 1135 1135 enum drx_power_mode { 1136 1136 DRX_POWER_UP = 0, 1137 - /**< Generic , Power Up Mode */ 1137 + /*< Generic , Power Up Mode */ 1138 1138 DRX_POWER_MODE_1, 1139 - /**< Device specific , Power Up Mode */ 1139 + /*< Device specific , Power Up Mode */ 1140 1140 DRX_POWER_MODE_2, 1141 - /**< Device specific , Power Up Mode */ 1141 + /*< Device specific , Power Up Mode */ 1142 1142 DRX_POWER_MODE_3, 1143 - /**< Device specific , Power Up Mode */ 1143 + /*< Device specific , Power Up Mode */ 1144 1144 DRX_POWER_MODE_4, 1145 - /**< Device specific , Power Up Mode */ 1145 + /*< Device specific , Power Up Mode */ 1146 1146 DRX_POWER_MODE_5, 1147 - /**< Device specific , Power Up Mode */ 1147 + /*< Device specific , Power Up Mode */ 1148 1148 DRX_POWER_MODE_6, 1149 - /**< Device specific , Power Up Mode */ 1149 + /*< Device specific , Power Up Mode */ 1150 1150 DRX_POWER_MODE_7, 1151 - /**< Device specific , Power Up Mode */ 1151 + /*< Device specific , Power Up Mode */ 1152 1152 DRX_POWER_MODE_8, 1153 - /**< Device specific , Power Up Mode */ 1153 + /*< Device specific , Power Up Mode */ 1154 1154 1155 1155 DRX_POWER_MODE_9, 1156 - /**< Device specific , Power Down Mode */ 1156 + /*< Device specific , Power Down Mode */ 1157 1157 DRX_POWER_MODE_10, 1158 - /**< Device specific , Power Down Mode */ 1158 + /*< Device specific , Power Down Mode */ 1159 1159 DRX_POWER_MODE_11, 1160 - /**< Device specific , Power Down Mode */ 1160 + /*< Device specific , Power Down Mode */ 1161 1161 DRX_POWER_MODE_12, 1162 - /**< Device specific , Power Down Mode */ 1162 + /*< Device specific , Power Down Mode */ 1163 1163 DRX_POWER_MODE_13, 1164 - /**< Device specific , Power Down Mode */ 1164 + /*< Device specific , Power Down Mode */ 1165 1165 DRX_POWER_MODE_14, 1166 - /**< Device specific , Power Down Mode */ 1166 + /*< Device specific , Power Down Mode */ 1167 1167 DRX_POWER_MODE_15, 1168 - /**< Device specific , Power Down Mode */ 1168 + /*< Device specific , Power Down Mode */ 1169 1169 DRX_POWER_MODE_16, 1170 - /**< Device specific , Power Down Mode */ 1170 + /*< Device specific , Power Down Mode */ 1171 1171 DRX_POWER_DOWN = 255 1172 - /**< Generic , Power Down Mode */ 1172 + /*< Generic , Power Down Mode */ 1173 1173 }; 1174 1174 1175 1175 /*========================================*/ 1176 1176 1177 - /** 1177 + /* 1178 1178 * \enum enum drx_module * \brief Software module identification. 1179 1179 * 1180 1180 * Used by DRX_CTRL_VERSION. ··· 1191 1191 DRX_MODULE_UNKNOWN 1192 1192 }; 1193 1193 1194 - /** 1194 + /* 1195 1195 * \enum struct drx_version * \brief Version information of one software module. 1196 1196 * 1197 1197 * Used by DRX_CTRL_VERSION. 1198 1198 */ 1199 1199 struct drx_version { 1200 1200 enum drx_module module_type; 1201 - /**< Type identifier of the module */ 1201 + /*< Type identifier of the module */ 1202 1202 char *module_name; 1203 - /**< Name or description of module */ 1204 - u16 v_major; /**< Major version number */ 1205 - u16 v_minor; /**< Minor version number */ 1206 - u16 v_patch; /**< Patch version number */ 1207 - char *v_string; /**< Version as text string */ 1203 + /*< Name or description of module */ 1204 + u16 v_major; /*< Major version number */ 1205 + u16 v_minor; /*< Minor version number */ 1206 + u16 v_patch; /*< Patch version number */ 1207 + char *v_string; /*< Version as text string */ 1208 1208 }; 1209 1209 1210 - /** 1210 + /* 1211 1211 * \enum struct drx_version_list * \brief List element of NULL terminated, linked list for version information. 1212 1212 * 1213 1213 * Used by DRX_CTRL_VERSION. 1214 1214 */ 1215 1215 struct drx_version_list { 1216 - struct drx_version *version;/**< Version information */ 1216 + struct drx_version *version;/*< Version information */ 1217 1217 struct drx_version_list *next; 1218 - /**< Next list element */ 1218 + /*< Next list element */ 1219 1219 }; 1220 1220 1221 1221 /*========================================*/ 1222 1222 1223 - /** 1223 + /* 1224 1224 * \brief Parameters needed to confiugure a UIO. 1225 1225 * 1226 1226 * Used by DRX_CTRL_UIO_CFG. 1227 1227 */ 1228 1228 struct drxuio_cfg { 1229 1229 enum drx_uio uio; 1230 - /**< UIO identifier */ 1230 + /*< UIO identifier */ 1231 1231 enum drxuio_mode mode; 1232 - /**< UIO operational mode */ 1232 + /*< UIO operational mode */ 1233 1233 }; 1234 1234 1235 1235 /*========================================*/ 1236 1236 1237 - /** 1237 + /* 1238 1238 * \brief Parameters needed to read from or write to a UIO. 1239 1239 * 1240 1240 * Used by DRX_CTRL_UIO_READ and DRX_CTRL_UIO_WRITE. 1241 1241 */ 1242 1242 struct drxuio_data { 1243 1243 enum drx_uio uio; 1244 - /**< UIO identifier */ 1244 + /*< UIO identifier */ 1245 1245 bool value; 1246 - /**< UIO value (true=1, false=0) */ 1246 + /*< UIO value (true=1, false=0) */ 1247 1247 }; 1248 1248 1249 1249 /*========================================*/ 1250 1250 1251 - /** 1251 + /* 1252 1252 * \brief Parameters needed to configure OOB. 1253 1253 * 1254 1254 * Used by DRX_CTRL_SET_OOB. 1255 1255 */ 1256 1256 struct drxoob { 1257 - s32 frequency; /**< Frequency in kHz */ 1257 + s32 frequency; /*< Frequency in kHz */ 1258 1258 enum drxoob_downstream_standard standard; 1259 - /**< OOB standard */ 1260 - bool spectrum_inverted; /**< If true, then spectrum 1259 + /*< OOB standard */ 1260 + bool spectrum_inverted; /*< If true, then spectrum 1261 1261 is inverted */ 1262 1262 }; 1263 1263 1264 1264 /*========================================*/ 1265 1265 1266 - /** 1266 + /* 1267 1267 * \brief Metrics from OOB. 1268 1268 * 1269 1269 * Used by DRX_CTRL_GET_OOB. 1270 1270 */ 1271 1271 struct drxoob_status { 1272 - s32 frequency; /**< Frequency in Khz */ 1273 - enum drx_lock_status lock; /**< Lock status */ 1274 - u32 mer; /**< MER */ 1275 - s32 symbol_rate_offset; /**< Symbolrate offset in ppm */ 1272 + s32 frequency; /*< Frequency in Khz */ 1273 + enum drx_lock_status lock; /*< Lock status */ 1274 + u32 mer; /*< MER */ 1275 + s32 symbol_rate_offset; /*< Symbolrate offset in ppm */ 1276 1276 }; 1277 1277 1278 1278 /*========================================*/ 1279 1279 1280 - /** 1280 + /* 1281 1281 * \brief Device dependent configuration data. 1282 1282 * 1283 1283 * Used by DRX_CTRL_SET_CFG and DRX_CTRL_GET_CFG. ··· 1285 1285 */ 1286 1286 struct drx_cfg { 1287 1287 u32 cfg_type; 1288 - /**< Function identifier */ 1288 + /*< Function identifier */ 1289 1289 void *cfg_data; 1290 - /**< Function data */ 1290 + /*< Function data */ 1291 1291 }; 1292 1292 1293 1293 /*========================================*/ 1294 1294 1295 - /** 1295 + /* 1296 1296 * /struct DRXMpegStartWidth_t 1297 1297 * MStart width [nr MCLK cycles] for serial MPEG output. 1298 1298 */ ··· 1303 1303 }; 1304 1304 1305 1305 /* CTRL CFG MPEG output */ 1306 - /** 1306 + /* 1307 1307 * \struct struct drx_cfg_mpeg_output * \brief Configuration parameters for MPEG output control. 1308 1308 * 1309 1309 * Used by DRX_CFG_MPEG_OUTPUT, in combination with DRX_CTRL_SET_CFG and ··· 1311 1311 */ 1312 1312 1313 1313 struct drx_cfg_mpeg_output { 1314 - bool enable_mpeg_output;/**< If true, enable MPEG output */ 1315 - bool insert_rs_byte; /**< If true, insert RS byte */ 1316 - bool enable_parallel; /**< If true, parallel out otherwise 1314 + bool enable_mpeg_output;/*< If true, enable MPEG output */ 1315 + bool insert_rs_byte; /*< If true, insert RS byte */ 1316 + bool enable_parallel; /*< If true, parallel out otherwise 1317 1317 serial */ 1318 - bool invert_data; /**< If true, invert DATA signals */ 1319 - bool invert_err; /**< If true, invert ERR signal */ 1320 - bool invert_str; /**< If true, invert STR signals */ 1321 - bool invert_val; /**< If true, invert VAL signals */ 1322 - bool invert_clk; /**< If true, invert CLK signals */ 1323 - bool static_clk; /**< If true, static MPEG clockrate 1318 + bool invert_data; /*< If true, invert DATA signals */ 1319 + bool invert_err; /*< If true, invert ERR signal */ 1320 + bool invert_str; /*< If true, invert STR signals */ 1321 + bool invert_val; /*< If true, invert VAL signals */ 1322 + bool invert_clk; /*< If true, invert CLK signals */ 1323 + bool static_clk; /*< If true, static MPEG clockrate 1324 1324 will be used, otherwise clockrate 1325 1325 will adapt to the bitrate of the 1326 1326 TS */ 1327 - u32 bitrate; /**< Maximum bitrate in b/s in case 1327 + u32 bitrate; /*< Maximum bitrate in b/s in case 1328 1328 static clockrate is selected */ 1329 1329 enum drxmpeg_str_width width_str; 1330 - /**< MPEG start width */ 1330 + /*< MPEG start width */ 1331 1331 }; 1332 1332 1333 1333 1334 1334 /*========================================*/ 1335 1335 1336 - /** 1336 + /* 1337 1337 * \struct struct drxi2c_data * \brief Data for I2C via 2nd or 3rd or etc I2C port. 1338 1338 * 1339 1339 * Used by DRX_CTRL_I2C_READWRITE. ··· 1341 1341 * 1342 1342 */ 1343 1343 struct drxi2c_data { 1344 - u16 port_nr; /**< I2C port number */ 1344 + u16 port_nr; /*< I2C port number */ 1345 1345 struct i2c_device_addr *w_dev_addr; 1346 - /**< Write device address */ 1347 - u16 w_count; /**< Size of write data in bytes */ 1348 - u8 *wData; /**< Pointer to write data */ 1346 + /*< Write device address */ 1347 + u16 w_count; /*< Size of write data in bytes */ 1348 + u8 *wData; /*< Pointer to write data */ 1349 1349 struct i2c_device_addr *r_dev_addr; 1350 - /**< Read device address */ 1351 - u16 r_count; /**< Size of data to read in bytes */ 1352 - u8 *r_data; /**< Pointer to read buffer */ 1350 + /*< Read device address */ 1351 + u16 r_count; /*< Size of data to read in bytes */ 1352 + u8 *r_data; /*< Pointer to read buffer */ 1353 1353 }; 1354 1354 1355 1355 /*========================================*/ 1356 1356 1357 - /** 1357 + /* 1358 1358 * \enum enum drx_aud_standard * \brief Audio standard identifier. 1359 1359 * 1360 1360 * Used by DRX_CTRL_SET_AUD. 1361 1361 */ 1362 1362 enum drx_aud_standard { 1363 - DRX_AUD_STANDARD_BTSC, /**< set BTSC standard (USA) */ 1364 - DRX_AUD_STANDARD_A2, /**< set A2-Korea FM Stereo */ 1365 - DRX_AUD_STANDARD_EIAJ, /**< set to Japanese FM Stereo */ 1366 - DRX_AUD_STANDARD_FM_STEREO,/**< set to FM-Stereo Radio */ 1367 - DRX_AUD_STANDARD_M_MONO, /**< for 4.5 MHz mono detected */ 1368 - DRX_AUD_STANDARD_D_K_MONO, /**< for 6.5 MHz mono detected */ 1369 - DRX_AUD_STANDARD_BG_FM, /**< set BG_FM standard */ 1370 - DRX_AUD_STANDARD_D_K1, /**< set D_K1 standard */ 1371 - DRX_AUD_STANDARD_D_K2, /**< set D_K2 standard */ 1372 - DRX_AUD_STANDARD_D_K3, /**< set D_K3 standard */ 1363 + DRX_AUD_STANDARD_BTSC, /*< set BTSC standard (USA) */ 1364 + DRX_AUD_STANDARD_A2, /*< set A2-Korea FM Stereo */ 1365 + DRX_AUD_STANDARD_EIAJ, /*< set to Japanese FM Stereo */ 1366 + DRX_AUD_STANDARD_FM_STEREO,/*< set to FM-Stereo Radio */ 1367 + DRX_AUD_STANDARD_M_MONO, /*< for 4.5 MHz mono detected */ 1368 + DRX_AUD_STANDARD_D_K_MONO, /*< for 6.5 MHz mono detected */ 1369 + DRX_AUD_STANDARD_BG_FM, /*< set BG_FM standard */ 1370 + DRX_AUD_STANDARD_D_K1, /*< set D_K1 standard */ 1371 + DRX_AUD_STANDARD_D_K2, /*< set D_K2 standard */ 1372 + DRX_AUD_STANDARD_D_K3, /*< set D_K3 standard */ 1373 1373 DRX_AUD_STANDARD_BG_NICAM_FM, 1374 - /**< set BG_NICAM_FM standard */ 1374 + /*< set BG_NICAM_FM standard */ 1375 1375 DRX_AUD_STANDARD_L_NICAM_AM, 1376 - /**< set L_NICAM_AM standard */ 1376 + /*< set L_NICAM_AM standard */ 1377 1377 DRX_AUD_STANDARD_I_NICAM_FM, 1378 - /**< set I_NICAM_FM standard */ 1378 + /*< set I_NICAM_FM standard */ 1379 1379 DRX_AUD_STANDARD_D_K_NICAM_FM, 1380 - /**< set D_K_NICAM_FM standard */ 1381 - DRX_AUD_STANDARD_NOT_READY,/**< used to detect audio standard */ 1380 + /*< set D_K_NICAM_FM standard */ 1381 + DRX_AUD_STANDARD_NOT_READY,/*< used to detect audio standard */ 1382 1382 DRX_AUD_STANDARD_AUTO = DRX_AUTO, 1383 - /**< Automatic Standard Detection */ 1383 + /*< Automatic Standard Detection */ 1384 1384 DRX_AUD_STANDARD_UNKNOWN = DRX_UNKNOWN 1385 - /**< used as auto and for readback */ 1385 + /*< used as auto and for readback */ 1386 1386 }; 1387 1387 1388 1388 /* CTRL_AUD_GET_STATUS - struct drx_aud_status */ 1389 - /** 1389 + /* 1390 1390 * \enum enum drx_aud_nicam_status * \brief Status of NICAM carrier. 1391 1391 */ 1392 1392 enum drx_aud_nicam_status { 1393 1393 DRX_AUD_NICAM_DETECTED = 0, 1394 - /**< NICAM carrier detected */ 1394 + /*< NICAM carrier detected */ 1395 1395 DRX_AUD_NICAM_NOT_DETECTED, 1396 - /**< NICAM carrier not detected */ 1397 - DRX_AUD_NICAM_BAD /**< NICAM carrier bad quality */ 1396 + /*< NICAM carrier not detected */ 1397 + DRX_AUD_NICAM_BAD /*< NICAM carrier bad quality */ 1398 1398 }; 1399 1399 1400 - /** 1400 + /* 1401 1401 * \struct struct drx_aud_status * \brief Audio status characteristics. 1402 1402 */ 1403 1403 struct drx_aud_status { 1404 - bool stereo; /**< stereo detection */ 1405 - bool carrier_a; /**< carrier A detected */ 1406 - bool carrier_b; /**< carrier B detected */ 1407 - bool sap; /**< sap / bilingual detection */ 1408 - bool rds; /**< RDS data array present */ 1404 + bool stereo; /*< stereo detection */ 1405 + bool carrier_a; /*< carrier A detected */ 1406 + bool carrier_b; /*< carrier B detected */ 1407 + bool sap; /*< sap / bilingual detection */ 1408 + bool rds; /*< RDS data array present */ 1409 1409 enum drx_aud_nicam_status nicam_status; 1410 - /**< status of NICAM carrier */ 1411 - s8 fm_ident; /**< FM Identification value */ 1410 + /*< status of NICAM carrier */ 1411 + s8 fm_ident; /*< FM Identification value */ 1412 1412 }; 1413 1413 1414 1414 /* CTRL_AUD_READ_RDS - DRXRDSdata_t */ 1415 1415 1416 - /** 1416 + /* 1417 1417 * \struct DRXRDSdata_t 1418 1418 * \brief Raw RDS data array. 1419 1419 */ 1420 1420 struct drx_cfg_aud_rds { 1421 - bool valid; /**< RDS data validation */ 1422 - u16 data[18]; /**< data from one RDS data array */ 1421 + bool valid; /*< RDS data validation */ 1422 + u16 data[18]; /*< data from one RDS data array */ 1423 1423 }; 1424 1424 1425 1425 /* DRX_CFG_AUD_VOLUME - struct drx_cfg_aud_volume - set/get */ 1426 - /** 1426 + /* 1427 1427 * \enum DRXAudAVCDecayTime_t 1428 1428 * \brief Automatic volume control configuration. 1429 1429 */ 1430 1430 enum drx_aud_avc_mode { 1431 - DRX_AUD_AVC_OFF, /**< Automatic volume control off */ 1432 - DRX_AUD_AVC_DECAYTIME_8S, /**< level volume in 8 seconds */ 1433 - DRX_AUD_AVC_DECAYTIME_4S, /**< level volume in 4 seconds */ 1434 - DRX_AUD_AVC_DECAYTIME_2S, /**< level volume in 2 seconds */ 1435 - DRX_AUD_AVC_DECAYTIME_20MS/**< level volume in 20 millisec */ 1431 + DRX_AUD_AVC_OFF, /*< Automatic volume control off */ 1432 + DRX_AUD_AVC_DECAYTIME_8S, /*< level volume in 8 seconds */ 1433 + DRX_AUD_AVC_DECAYTIME_4S, /*< level volume in 4 seconds */ 1434 + DRX_AUD_AVC_DECAYTIME_2S, /*< level volume in 2 seconds */ 1435 + DRX_AUD_AVC_DECAYTIME_20MS/*< level volume in 20 millisec */ 1436 1436 }; 1437 1437 1438 - /** 1438 + /* 1439 1439 * /enum DRXAudMaxAVCGain_t 1440 1440 * /brief Automatic volume control max gain in audio baseband. 1441 1441 */ 1442 1442 enum drx_aud_avc_max_gain { 1443 - DRX_AUD_AVC_MAX_GAIN_0DB, /**< maximum AVC gain 0 dB */ 1444 - DRX_AUD_AVC_MAX_GAIN_6DB, /**< maximum AVC gain 6 dB */ 1445 - DRX_AUD_AVC_MAX_GAIN_12DB /**< maximum AVC gain 12 dB */ 1443 + DRX_AUD_AVC_MAX_GAIN_0DB, /*< maximum AVC gain 0 dB */ 1444 + DRX_AUD_AVC_MAX_GAIN_6DB, /*< maximum AVC gain 6 dB */ 1445 + DRX_AUD_AVC_MAX_GAIN_12DB /*< maximum AVC gain 12 dB */ 1446 1446 }; 1447 1447 1448 - /** 1448 + /* 1449 1449 * /enum DRXAudMaxAVCAtten_t 1450 1450 * /brief Automatic volume control max attenuation in audio baseband. 1451 1451 */ 1452 1452 enum drx_aud_avc_max_atten { 1453 1453 DRX_AUD_AVC_MAX_ATTEN_12DB, 1454 - /**< maximum AVC attenuation 12 dB */ 1454 + /*< maximum AVC attenuation 12 dB */ 1455 1455 DRX_AUD_AVC_MAX_ATTEN_18DB, 1456 - /**< maximum AVC attenuation 18 dB */ 1457 - DRX_AUD_AVC_MAX_ATTEN_24DB/**< maximum AVC attenuation 24 dB */ 1456 + /*< maximum AVC attenuation 18 dB */ 1457 + DRX_AUD_AVC_MAX_ATTEN_24DB/*< maximum AVC attenuation 24 dB */ 1458 1458 }; 1459 - /** 1459 + /* 1460 1460 * \struct struct drx_cfg_aud_volume * \brief Audio volume configuration. 1461 1461 */ 1462 1462 struct drx_cfg_aud_volume { 1463 - bool mute; /**< mute overrides volume setting */ 1464 - s16 volume; /**< volume, range -114 to 12 dB */ 1465 - enum drx_aud_avc_mode avc_mode; /**< AVC auto volume control mode */ 1466 - u16 avc_ref_level; /**< AVC reference level */ 1463 + bool mute; /*< mute overrides volume setting */ 1464 + s16 volume; /*< volume, range -114 to 12 dB */ 1465 + enum drx_aud_avc_mode avc_mode; /*< AVC auto volume control mode */ 1466 + u16 avc_ref_level; /*< AVC reference level */ 1467 1467 enum drx_aud_avc_max_gain avc_max_gain; 1468 - /**< AVC max gain selection */ 1468 + /*< AVC max gain selection */ 1469 1469 enum drx_aud_avc_max_atten avc_max_atten; 1470 - /**< AVC max attenuation selection */ 1471 - s16 strength_left; /**< quasi-peak, left speaker */ 1472 - s16 strength_right; /**< quasi-peak, right speaker */ 1470 + /*< AVC max attenuation selection */ 1471 + s16 strength_left; /*< quasi-peak, left speaker */ 1472 + s16 strength_right; /*< quasi-peak, right speaker */ 1473 1473 }; 1474 1474 1475 1475 /* DRX_CFG_I2S_OUTPUT - struct drx_cfg_i2s_output - set/get */ 1476 - /** 1476 + /* 1477 1477 * \enum enum drxi2s_mode * \brief I2S output mode. 1478 1478 */ 1479 1479 enum drxi2s_mode { 1480 - DRX_I2S_MODE_MASTER, /**< I2S is in master mode */ 1481 - DRX_I2S_MODE_SLAVE /**< I2S is in slave mode */ 1480 + DRX_I2S_MODE_MASTER, /*< I2S is in master mode */ 1481 + DRX_I2S_MODE_SLAVE /*< I2S is in slave mode */ 1482 1482 }; 1483 1483 1484 - /** 1484 + /* 1485 1485 * \enum enum drxi2s_word_length * \brief Width of I2S data. 1486 1486 */ 1487 1487 enum drxi2s_word_length { 1488 - DRX_I2S_WORDLENGTH_32 = 0,/**< I2S data is 32 bit wide */ 1489 - DRX_I2S_WORDLENGTH_16 = 1 /**< I2S data is 16 bit wide */ 1488 + DRX_I2S_WORDLENGTH_32 = 0,/*< I2S data is 32 bit wide */ 1489 + DRX_I2S_WORDLENGTH_16 = 1 /*< I2S data is 16 bit wide */ 1490 1490 }; 1491 1491 1492 - /** 1492 + /* 1493 1493 * \enum enum drxi2s_format * \brief Data wordstrobe alignment for I2S. 1494 1494 */ 1495 1495 enum drxi2s_format { 1496 1496 DRX_I2S_FORMAT_WS_WITH_DATA, 1497 - /**< I2S data and wordstrobe are aligned */ 1497 + /*< I2S data and wordstrobe are aligned */ 1498 1498 DRX_I2S_FORMAT_WS_ADVANCED 1499 - /**< I2S data one cycle after wordstrobe */ 1499 + /*< I2S data one cycle after wordstrobe */ 1500 1500 }; 1501 1501 1502 - /** 1502 + /* 1503 1503 * \enum enum drxi2s_polarity * \brief Polarity of I2S data. 1504 1504 */ 1505 1505 enum drxi2s_polarity { 1506 - DRX_I2S_POLARITY_RIGHT,/**< wordstrobe - right high, left low */ 1507 - DRX_I2S_POLARITY_LEFT /**< wordstrobe - right low, left high */ 1506 + DRX_I2S_POLARITY_RIGHT,/*< wordstrobe - right high, left low */ 1507 + DRX_I2S_POLARITY_LEFT /*< wordstrobe - right low, left high */ 1508 1508 }; 1509 1509 1510 - /** 1510 + /* 1511 1511 * \struct struct drx_cfg_i2s_output * \brief I2S output configuration. 1512 1512 */ 1513 1513 struct drx_cfg_i2s_output { 1514 - bool output_enable; /**< I2S output enable */ 1515 - u32 frequency; /**< range from 8000-48000 Hz */ 1516 - enum drxi2s_mode mode; /**< I2S mode, master or slave */ 1514 + bool output_enable; /*< I2S output enable */ 1515 + u32 frequency; /*< range from 8000-48000 Hz */ 1516 + enum drxi2s_mode mode; /*< I2S mode, master or slave */ 1517 1517 enum drxi2s_word_length word_length; 1518 - /**< I2S wordlength, 16 or 32 bits */ 1519 - enum drxi2s_polarity polarity;/**< I2S wordstrobe polarity */ 1520 - enum drxi2s_format format; /**< I2S wordstrobe delay to data */ 1518 + /*< I2S wordlength, 16 or 32 bits */ 1519 + enum drxi2s_polarity polarity;/*< I2S wordstrobe polarity */ 1520 + enum drxi2s_format format; /*< I2S wordstrobe delay to data */ 1521 1521 }; 1522 1522 1523 1523 /* ------------------------------expert interface-----------------------------*/ 1524 - /** 1524 + /* 1525 1525 * /enum enum drx_aud_fm_deemphasis * setting for FM-Deemphasis in audio demodulator. 1526 1526 * 1527 1527 */ ··· 1531 1531 DRX_AUD_FM_DEEMPH_OFF 1532 1532 }; 1533 1533 1534 - /** 1534 + /* 1535 1535 * /enum DRXAudDeviation_t 1536 1536 * setting for deviation mode in audio demodulator. 1537 1537 * ··· 1541 1541 DRX_AUD_DEVIATION_HIGH 1542 1542 }; 1543 1543 1544 - /** 1544 + /* 1545 1545 * /enum enum drx_no_carrier_option * setting for carrier, mute/noise. 1546 1546 * 1547 1547 */ ··· 1550 1550 DRX_NO_CARRIER_NOISE 1551 1551 }; 1552 1552 1553 - /** 1553 + /* 1554 1554 * \enum DRXAudAutoSound_t 1555 1555 * \brief Automatic Sound 1556 1556 */ ··· 1560 1560 DRX_AUD_AUTO_SOUND_SELECT_ON_CHANGE_OFF 1561 1561 }; 1562 1562 1563 - /** 1563 + /* 1564 1564 * \enum DRXAudASSThres_t 1565 1565 * \brief Automatic Sound Select Thresholds 1566 1566 */ ··· 1570 1570 u16 nicam; /* Nicam Threshold for ASS configuration */ 1571 1571 }; 1572 1572 1573 - /** 1573 + /* 1574 1574 * \struct struct drx_aud_carrier * \brief Carrier detection related parameters 1575 1575 */ 1576 1576 struct drx_aud_carrier { ··· 1580 1580 s32 dco; /* frequency adjustment (A) */ 1581 1581 }; 1582 1582 1583 - /** 1583 + /* 1584 1584 * \struct struct drx_cfg_aud_carriers * \brief combining carrier A & B to one struct 1585 1585 */ 1586 1586 struct drx_cfg_aud_carriers { ··· 1588 1588 struct drx_aud_carrier b; 1589 1589 }; 1590 1590 1591 - /** 1591 + /* 1592 1592 * /enum enum drx_aud_i2s_src * Selection of audio source 1593 1593 */ 1594 1594 enum drx_aud_i2s_src { ··· 1597 1597 DRX_AUD_SRC_STEREO_OR_A, 1598 1598 DRX_AUD_SRC_STEREO_OR_B}; 1599 1599 1600 - /** 1600 + /* 1601 1601 * \enum enum drx_aud_i2s_matrix * \brief Used for selecting I2S output. 1602 1602 */ 1603 1603 enum drx_aud_i2s_matrix { 1604 1604 DRX_AUD_I2S_MATRIX_A_MONO, 1605 - /**< A sound only, stereo or mono */ 1605 + /*< A sound only, stereo or mono */ 1606 1606 DRX_AUD_I2S_MATRIX_B_MONO, 1607 - /**< B sound only, stereo or mono */ 1607 + /*< B sound only, stereo or mono */ 1608 1608 DRX_AUD_I2S_MATRIX_STEREO, 1609 - /**< A+B sound, transparant */ 1610 - DRX_AUD_I2S_MATRIX_MONO /**< A+B mixed to mono sum, (L+R)/2 */}; 1609 + /*< A+B sound, transparant */ 1610 + DRX_AUD_I2S_MATRIX_MONO /*< A+B mixed to mono sum, (L+R)/2 */}; 1611 1611 1612 - /** 1612 + /* 1613 1613 * /enum enum drx_aud_fm_matrix * setting for FM-Matrix in audio demodulator. 1614 1614 * 1615 1615 */ ··· 1620 1620 DRX_AUD_FM_MATRIX_SOUND_A, 1621 1621 DRX_AUD_FM_MATRIX_SOUND_B}; 1622 1622 1623 - /** 1623 + /* 1624 1624 * \struct DRXAudMatrices_t 1625 1625 * \brief Mixer settings 1626 1626 */ ··· 1630 1630 enum drx_aud_fm_matrix matrix_fm; 1631 1631 }; 1632 1632 1633 - /** 1633 + /* 1634 1634 * \enum DRXI2SVidSync_t 1635 1635 * \brief Audio/video synchronization, interacts with I2S mode. 1636 1636 * AUTO_1 and AUTO_2 are for automatic video standard detection with preference 1637 1637 * for NTSC or Monochrome, because the frequencies are too close (59.94 & 60 Hz) 1638 1638 */ 1639 1639 enum drx_cfg_aud_av_sync { 1640 - DRX_AUD_AVSYNC_OFF,/**< audio/video synchronization is off */ 1640 + DRX_AUD_AVSYNC_OFF,/*< audio/video synchronization is off */ 1641 1641 DRX_AUD_AVSYNC_NTSC, 1642 - /**< it is an NTSC system */ 1642 + /*< it is an NTSC system */ 1643 1643 DRX_AUD_AVSYNC_MONOCHROME, 1644 - /**< it is a MONOCHROME system */ 1644 + /*< it is a MONOCHROME system */ 1645 1645 DRX_AUD_AVSYNC_PAL_SECAM 1646 - /**< it is a PAL/SECAM system */}; 1646 + /*< it is a PAL/SECAM system */}; 1647 1647 1648 - /** 1648 + /* 1649 1649 * \struct struct drx_cfg_aud_prescale * \brief Prescalers 1650 1650 */ 1651 1651 struct drx_cfg_aud_prescale { ··· 1653 1653 s16 nicam_gain; 1654 1654 }; 1655 1655 1656 - /** 1656 + /* 1657 1657 * \struct struct drx_aud_beep * \brief Beep 1658 1658 */ 1659 1659 struct drx_aud_beep { ··· 1662 1662 bool mute; 1663 1663 }; 1664 1664 1665 - /** 1665 + /* 1666 1666 * \enum enum drx_aud_btsc_detect * \brief BTSC detetcion mode 1667 1667 */ 1668 1668 enum drx_aud_btsc_detect { 1669 1669 DRX_BTSC_STEREO, 1670 1670 DRX_BTSC_MONO_AND_SAP}; 1671 1671 1672 - /** 1672 + /* 1673 1673 * \struct struct drx_aud_data * \brief Audio data structure 1674 1674 */ 1675 1675 struct drx_aud_data { ··· 1692 1692 bool rds_data_present; 1693 1693 }; 1694 1694 1695 - /** 1695 + /* 1696 1696 * \enum enum drx_qam_lock_range * \brief QAM lock range mode 1697 1697 */ 1698 1698 enum drx_qam_lock_range { ··· 1782 1782 u32 wdata, /* data to write */ 1783 1783 u32 *rdata); /* data to read */ 1784 1784 1785 - /** 1785 + /* 1786 1786 * \struct struct drx_access_func * \brief Interface to an access protocol. 1787 1787 */ 1788 1788 struct drx_access_func { ··· 1811 1811 /*============================================================================*/ 1812 1812 /*============================================================================*/ 1813 1813 1814 - /** 1814 + /* 1815 1815 * \struct struct drx_common_attr * \brief Set of common attributes, shared by all DRX devices. 1816 1816 */ 1817 1817 struct drx_common_attr { 1818 1818 /* Microcode (firmware) attributes */ 1819 - char *microcode_file; /**< microcode filename */ 1819 + char *microcode_file; /*< microcode filename */ 1820 1820 bool verify_microcode; 1821 - /**< Use microcode verify or not. */ 1821 + /*< Use microcode verify or not. */ 1822 1822 struct drx_mc_version_rec mcversion; 1823 - /**< Version record of microcode from file */ 1823 + /*< Version record of microcode from file */ 1824 1824 1825 1825 /* Clocks and tuner attributes */ 1826 1826 s32 intermediate_freq; 1827 - /**< IF,if tuner instance not used. (kHz)*/ 1827 + /*< IF,if tuner instance not used. (kHz)*/ 1828 1828 s32 sys_clock_freq; 1829 - /**< Systemclock frequency. (kHz) */ 1829 + /*< Systemclock frequency. (kHz) */ 1830 1830 s32 osc_clock_freq; 1831 - /**< Oscillator clock frequency. (kHz) */ 1831 + /*< Oscillator clock frequency. (kHz) */ 1832 1832 s16 osc_clock_deviation; 1833 - /**< Oscillator clock deviation. (ppm) */ 1833 + /*< Oscillator clock deviation. (ppm) */ 1834 1834 bool mirror_freq_spect; 1835 - /**< Mirror IF frequency spectrum or not.*/ 1835 + /*< Mirror IF frequency spectrum or not.*/ 1836 1836 1837 1837 /* Initial MPEG output attributes */ 1838 1838 struct drx_cfg_mpeg_output mpeg_cfg; 1839 - /**< MPEG configuration */ 1839 + /*< MPEG configuration */ 1840 1840 1841 - bool is_opened; /**< if true instance is already opened. */ 1841 + bool is_opened; /*< if true instance is already opened. */ 1842 1842 1843 1843 /* Channel scan */ 1844 1844 struct drx_scan_param *scan_param; 1845 - /**< scan parameters */ 1845 + /*< scan parameters */ 1846 1846 u16 scan_freq_plan_index; 1847 - /**< next index in freq plan */ 1847 + /*< next index in freq plan */ 1848 1848 s32 scan_next_frequency; 1849 - /**< next freq to scan */ 1850 - bool scan_ready; /**< scan ready flag */ 1851 - u32 scan_max_channels;/**< number of channels in freqplan */ 1849 + /*< next freq to scan */ 1850 + bool scan_ready; /*< scan ready flag */ 1851 + u32 scan_max_channels;/*< number of channels in freqplan */ 1852 1852 u32 scan_channels_scanned; 1853 - /**< number of channels scanned */ 1853 + /*< number of channels scanned */ 1854 1854 /* Channel scan - inner loop: demod related */ 1855 1855 drx_scan_func_t scan_function; 1856 - /**< function to check channel */ 1856 + /*< function to check channel */ 1857 1857 /* Channel scan - inner loop: SYSObj related */ 1858 - void *scan_context; /**< Context Pointer of SYSObj */ 1858 + void *scan_context; /*< Context Pointer of SYSObj */ 1859 1859 /* Channel scan - parameters for default DTV scan function in core driver */ 1860 1860 u16 scan_demod_lock_timeout; 1861 - /**< millisecs to wait for lock */ 1861 + /*< millisecs to wait for lock */ 1862 1862 enum drx_lock_status scan_desired_lock; 1863 - /**< lock requirement for channel found */ 1863 + /*< lock requirement for channel found */ 1864 1864 /* scan_active can be used by SetChannel to decide how to program the tuner, 1865 1865 fast or slow (but stable). Usually fast during scan. */ 1866 - bool scan_active; /**< true when scan routines are active */ 1866 + bool scan_active; /*< true when scan routines are active */ 1867 1867 1868 1868 /* Power management */ 1869 1869 enum drx_power_mode current_power_mode; 1870 - /**< current power management mode */ 1870 + /*< current power management mode */ 1871 1871 1872 1872 /* Tuner */ 1873 - u8 tuner_port_nr; /**< nr of I2C port to wich tuner is */ 1873 + u8 tuner_port_nr; /*< nr of I2C port to wich tuner is */ 1874 1874 s32 tuner_min_freq_rf; 1875 - /**< minimum RF input frequency, in kHz */ 1875 + /*< minimum RF input frequency, in kHz */ 1876 1876 s32 tuner_max_freq_rf; 1877 - /**< maximum RF input frequency, in kHz */ 1878 - bool tuner_rf_agc_pol; /**< if true invert RF AGC polarity */ 1879 - bool tuner_if_agc_pol; /**< if true invert IF AGC polarity */ 1880 - bool tuner_slow_mode; /**< if true invert IF AGC polarity */ 1877 + /*< maximum RF input frequency, in kHz */ 1878 + bool tuner_rf_agc_pol; /*< if true invert RF AGC polarity */ 1879 + bool tuner_if_agc_pol; /*< if true invert IF AGC polarity */ 1880 + bool tuner_slow_mode; /*< if true invert IF AGC polarity */ 1881 1881 1882 1882 struct drx_channel current_channel; 1883 - /**< current channel parameters */ 1883 + /*< current channel parameters */ 1884 1884 enum drx_standard current_standard; 1885 - /**< current standard selection */ 1885 + /*< current standard selection */ 1886 1886 enum drx_standard prev_standard; 1887 - /**< previous standard selection */ 1887 + /*< previous standard selection */ 1888 1888 enum drx_standard di_cache_standard; 1889 - /**< standard in DI cache if available */ 1890 - bool use_bootloader; /**< use bootloader in open */ 1891 - u32 capabilities; /**< capabilities flags */ 1892 - u32 product_id; /**< product ID inc. metal fix number */}; 1889 + /*< standard in DI cache if available */ 1890 + bool use_bootloader; /*< use bootloader in open */ 1891 + u32 capabilities; /*< capabilities flags */ 1892 + u32 product_id; /*< product ID inc. metal fix number */}; 1893 1893 1894 1894 /* 1895 1895 * Generic functions for DRX devices. ··· 1897 1897 1898 1898 struct drx_demod_instance; 1899 1899 1900 - /** 1900 + /* 1901 1901 * \struct struct drx_demod_instance * \brief Top structure of demodulator instance. 1902 1902 */ 1903 1903 struct drx_demod_instance { 1904 - /**< data access protocol functions */ 1904 + /*< data access protocol functions */ 1905 1905 struct i2c_device_addr *my_i2c_dev_addr; 1906 - /**< i2c address and device identifier */ 1906 + /*< i2c address and device identifier */ 1907 1907 struct drx_common_attr *my_common_attr; 1908 - /**< common DRX attributes */ 1909 - void *my_ext_attr; /**< device specific attributes */ 1908 + /*< common DRX attributes */ 1909 + void *my_ext_attr; /*< device specific attributes */ 1910 1910 /* generic demodulator data */ 1911 1911 1912 1912 struct i2c_adapter *i2c; ··· 2195 2195 Access macros 2196 2196 -------------------------------------------------------------------------*/ 2197 2197 2198 - /** 2198 + /* 2199 2199 * \brief Create a compilable reference to the microcode attribute 2200 2200 * \param d pointer to demod instance 2201 2201 * ··· 2229 2229 #define DRX_ATTR_I2CDEVID(d) ((d)->my_i2c_dev_addr->i2c_dev_id) 2230 2230 #define DRX_ISMCVERTYPE(x) ((x) == AUX_VER_RECORD) 2231 2231 2232 - /**************************/ 2232 + /*************************/ 2233 2233 2234 2234 /* Macros with device-specific handling are converted to CFG functions */ 2235 2235 ··· 2285 2285 #define DRX_GET_QAM_LOCKRANGE(d, x) DRX_ACCESSMACRO_GET((d), (x), \ 2286 2286 DRX_XS_CFG_QAM_LOCKRANGE, enum drx_qam_lock_range, DRX_UNKNOWN) 2287 2287 2288 - /** 2288 + /* 2289 2289 * \brief Macro to check if std is an ATV standard 2290 2290 * \retval true std is an ATV standard 2291 2291 * \retval false std is an ATV standard ··· 2298 2298 ((std) == DRX_STANDARD_NTSC) || \ 2299 2299 ((std) == DRX_STANDARD_FM)) 2300 2300 2301 - /** 2301 + /* 2302 2302 * \brief Macro to check if std is an QAM standard 2303 2303 * \retval true std is an QAM standards 2304 2304 * \retval false std is an QAM standards ··· 2308 2308 ((std) == DRX_STANDARD_ITU_C) || \ 2309 2309 ((std) == DRX_STANDARD_ITU_D)) 2310 2310 2311 - /** 2311 + /* 2312 2312 * \brief Macro to check if std is VSB standard 2313 2313 * \retval true std is VSB standard 2314 2314 * \retval false std is not VSB standard 2315 2315 */ 2316 2316 #define DRX_ISVSBSTD(std) ((std) == DRX_STANDARD_8VSB) 2317 2317 2318 - /** 2318 + /* 2319 2319 * \brief Macro to check if std is DVBT standard 2320 2320 * \retval true std is DVBT standard 2321 2321 * \retval false std is not DVBT standard
+124 -124
drivers/media/dvb-frontends/drx39xyj/drxj.c
··· 73 73 74 74 #define DRX39XX_MAIN_FIRMWARE "dvb-fe-drxj-mc-1.0.8.fw" 75 75 76 - /** 76 + /* 77 77 * \brief Maximum u32 value. 78 78 */ 79 79 #ifndef MAX_U32 ··· 100 100 #ifndef OOB_DRX_DRIVE_STRENGTH 101 101 #define OOB_DRX_DRIVE_STRENGTH 0x02 102 102 #endif 103 - /**** START DJCOMBO patches to DRXJ registermap constants *********************/ 104 - /**** registermap 200706071303 from drxj **************************************/ 103 + /*** START DJCOMBO patches to DRXJ registermap constants *********************/ 104 + /*** registermap 200706071303 from drxj **************************************/ 105 105 #define ATV_TOP_CR_AMP_TH_FM 0x0 106 106 #define ATV_TOP_CR_AMP_TH_L 0xA 107 107 #define ATV_TOP_CR_AMP_TH_LP 0xA ··· 188 188 #define IQM_RC_ADJ_SEL_B_OFF 0x0 189 189 #define IQM_RC_ADJ_SEL_B_QAM 0x1 190 190 #define IQM_RC_ADJ_SEL_B_VSB 0x2 191 - /**** END DJCOMBO patches to DRXJ registermap *********************************/ 191 + /*** END DJCOMBO patches to DRXJ registermap *********************************/ 192 192 193 193 #include "drx_driver_version.h" 194 194 ··· 208 208 #define DRXJ_WAKE_UP_KEY (demod->my_i2c_dev_addr->i2c_addr) 209 209 #endif 210 210 211 - /** 211 + /* 212 212 * \def DRXJ_DEF_I2C_ADDR 213 213 * \brief Default I2C address of a demodulator instance. 214 214 */ 215 215 #define DRXJ_DEF_I2C_ADDR (0x52) 216 216 217 - /** 217 + /* 218 218 * \def DRXJ_DEF_DEMOD_DEV_ID 219 219 * \brief Default device identifier of a demodultor instance. 220 220 */ 221 221 #define DRXJ_DEF_DEMOD_DEV_ID (1) 222 222 223 - /** 223 + /* 224 224 * \def DRXJ_SCAN_TIMEOUT 225 225 * \brief Timeout value for waiting on demod lock during channel scan (millisec). 226 226 */ 227 227 #define DRXJ_SCAN_TIMEOUT 1000 228 228 229 - /** 229 + /* 230 230 * \def HI_I2C_DELAY 231 231 * \brief HI timing delay for I2C timing (in nano seconds) 232 232 * ··· 234 234 */ 235 235 #define HI_I2C_DELAY 42 236 236 237 - /** 237 + /* 238 238 * \def HI_I2C_BRIDGE_DELAY 239 239 * \brief HI timing delay for I2C timing (in nano seconds) 240 240 * ··· 242 242 */ 243 243 #define HI_I2C_BRIDGE_DELAY 750 244 244 245 - /** 245 + /* 246 246 * \brief Time Window for MER and SER Measurement in Units of Segment duration. 247 247 */ 248 248 #define VSB_TOP_MEASUREMENT_PERIOD 64 249 249 #define SYMBOLS_PER_SEGMENT 832 250 250 251 - /** 251 + /* 252 252 * \brief bit rate and segment rate constants used for SER and BER. 253 253 */ 254 254 /* values taken from the QAM microcode */ ··· 260 260 #define DRXJ_QAM_SL_SIG_POWER_QAM64 43008 261 261 #define DRXJ_QAM_SL_SIG_POWER_QAM128 20992 262 262 #define DRXJ_QAM_SL_SIG_POWER_QAM256 43520 263 - /** 263 + /* 264 264 * \brief Min supported symbolrates. 265 265 */ 266 266 #ifndef DRXJ_QAM_SYMBOLRATE_MIN 267 267 #define DRXJ_QAM_SYMBOLRATE_MIN (520000) 268 268 #endif 269 269 270 - /** 270 + /* 271 271 * \brief Max supported symbolrates. 272 272 */ 273 273 #ifndef DRXJ_QAM_SYMBOLRATE_MAX 274 274 #define DRXJ_QAM_SYMBOLRATE_MAX (7233000) 275 275 #endif 276 276 277 - /** 277 + /* 278 278 * \def DRXJ_QAM_MAX_WAITTIME 279 279 * \brief Maximal wait time for QAM auto constellation in ms 280 280 */ ··· 290 290 #define DRXJ_QAM_DEMOD_LOCK_EXT_WAITTIME 200 291 291 #endif 292 292 293 - /** 293 + /* 294 294 * \def SCU status and results 295 295 * \brief SCU 296 296 */ ··· 299 299 #define FEC_RS_MEASUREMENT_PERIOD 12894 /* 1 sec */ 300 300 #define FEC_RS_MEASUREMENT_PRESCALE 1 /* n sec */ 301 301 302 - /** 302 + /* 303 303 * \def DRX_AUD_MAX_DEVIATION 304 304 * \brief Needed for calculation of prescale feature in AUD 305 305 */ ··· 307 307 #define DRXJ_AUD_MAX_FM_DEVIATION 100 /* kHz */ 308 308 #endif 309 309 310 - /** 310 + /* 311 311 * \brief Needed for calculation of NICAM prescale feature in AUD 312 312 */ 313 313 #ifndef DRXJ_AUD_MAX_NICAM_PRESCALE 314 314 #define DRXJ_AUD_MAX_NICAM_PRESCALE (9) /* dB */ 315 315 #endif 316 316 317 - /** 317 + /* 318 318 * \brief Needed for calculation of NICAM prescale feature in AUD 319 319 */ 320 320 #ifndef DRXJ_AUD_MAX_WAITTIME ··· 371 371 /*============================================================================*/ 372 372 /*=== GLOBAL VARIABLEs =======================================================*/ 373 373 /*============================================================================*/ 374 - /** 374 + /* 375 375 */ 376 376 377 - /** 377 + /* 378 378 * \brief Temporary register definitions. 379 379 * (register definitions that are not yet available in register master) 380 380 */ 381 381 382 - /******************************************************************************/ 382 + /*****************************************************************************/ 383 383 /* Audio block 0x103 is write only. To avoid shadowing in driver accessing */ 384 384 /* RAM adresses directly. This must be READ ONLY to avoid problems. */ 385 385 /* Writing to the interface adresses is more than only writing the RAM */ 386 386 /* locations */ 387 - /******************************************************************************/ 388 - /** 387 + /*****************************************************************************/ 388 + /* 389 389 * \brief RAM location of MODUS registers 390 390 */ 391 391 #define AUD_DEM_RAM_MODUS_HI__A 0x10204A3 ··· 394 394 #define AUD_DEM_RAM_MODUS_LO__A 0x10204A4 395 395 #define AUD_DEM_RAM_MODUS_LO__M 0x0FFF 396 396 397 - /** 397 + /* 398 398 * \brief RAM location of I2S config registers 399 399 */ 400 400 #define AUD_DEM_RAM_I2S_CONFIG1__A 0x10204B1 401 401 #define AUD_DEM_RAM_I2S_CONFIG2__A 0x10204B2 402 402 403 - /** 403 + /* 404 404 * \brief RAM location of DCO config registers 405 405 */ 406 406 #define AUD_DEM_RAM_DCO_B_HI__A 0x1020461 ··· 408 408 #define AUD_DEM_RAM_DCO_A_HI__A 0x1020463 409 409 #define AUD_DEM_RAM_DCO_A_LO__A 0x1020464 410 410 411 - /** 411 + /* 412 412 * \brief RAM location of Threshold registers 413 413 */ 414 414 #define AUD_DEM_RAM_NICAM_THRSHLD__A 0x102045A 415 415 #define AUD_DEM_RAM_A2_THRSHLD__A 0x10204BB 416 416 #define AUD_DEM_RAM_BTSC_THRSHLD__A 0x10204A6 417 417 418 - /** 418 + /* 419 419 * \brief RAM location of Carrier Threshold registers 420 420 */ 421 421 #define AUD_DEM_RAM_CM_A_THRSHLD__A 0x10204AF 422 422 #define AUD_DEM_RAM_CM_B_THRSHLD__A 0x10204B0 423 423 424 - /** 424 + /* 425 425 * \brief FM Matrix register fix 426 426 */ 427 427 #ifdef AUD_DEM_WR_FM_MATRIX__A ··· 430 430 #define AUD_DEM_WR_FM_MATRIX__A 0x105006F 431 431 432 432 /*============================================================================*/ 433 - /** 433 + /* 434 434 * \brief Defines required for audio 435 435 */ 436 436 #define AUD_VOLUME_ZERO_DB 115 ··· 443 443 #define AUD_I2S_FREQUENCY_MIN 12000UL 444 444 #define AUD_RDS_ARRAY_SIZE 18 445 445 446 - /** 446 + /* 447 447 * \brief Needed for calculation of prescale feature in AUD 448 448 */ 449 449 #ifndef DRX_AUD_MAX_FM_DEVIATION 450 450 #define DRX_AUD_MAX_FM_DEVIATION (100) /* kHz */ 451 451 #endif 452 452 453 - /** 453 + /* 454 454 * \brief Needed for calculation of NICAM prescale feature in AUD 455 455 */ 456 456 #ifndef DRX_AUD_MAX_NICAM_PRESCALE ··· 478 478 /*=== REGISTER ACCESS MACROS =================================================*/ 479 479 /*============================================================================*/ 480 480 481 - /** 481 + /* 482 482 * This macro is used to create byte arrays for block writes. 483 483 * Block writes speed up I2C traffic between host and demod. 484 484 * The macro takes care of the required byte order in a 16 bits word. ··· 486 486 */ 487 487 #define DRXJ_16TO8(x) ((u8) (((u16)x) & 0xFF)), \ 488 488 ((u8)((((u16)x)>>8)&0xFF)) 489 - /** 489 + /* 490 490 * This macro is used to convert byte array to 16 bit register value for block read. 491 491 * Block read speed up I2C traffic between host and demod. 492 492 * The macro takes care of the required byte order in a 16 bits word. ··· 501 501 /*=== HI COMMAND RELATED DEFINES =============================================*/ 502 502 /*============================================================================*/ 503 503 504 - /** 504 + /* 505 505 * \brief General maximum number of retries for ucode command interfaces 506 506 */ 507 507 #define DRXJ_MAX_RETRIES (100) ··· 807 807 }, 808 808 }; 809 809 810 - /** 810 + /* 811 811 * \var drxj_default_addr_g 812 812 * \brief Default I2C address and device identifier. 813 813 */ ··· 816 816 DRXJ_DEF_DEMOD_DEV_ID /* device id */ 817 817 }; 818 818 819 - /** 819 + /* 820 820 * \var drxj_default_comm_attr_g 821 821 * \brief Default common attributes of a drxj demodulator instance. 822 822 */ ··· 887 887 0 /* mfx */ 888 888 }; 889 889 890 - /** 890 + /* 891 891 * \var drxj_default_demod_g 892 892 * \brief Default drxj demodulator instance. 893 893 */ ··· 897 897 &drxj_data_g /* demod device specific attributes */ 898 898 }; 899 899 900 - /** 900 + /* 901 901 * \brief Default audio data structure for DRK demodulator instance. 902 902 * 903 903 * This structure is DRXK specific. ··· 997 997 /*=== MICROCODE RELATED STRUCTURES ===========================================*/ 998 998 /*============================================================================*/ 999 999 1000 - /** 1000 + /* 1001 1001 * struct drxu_code_block_hdr - Structure of the microcode block headers 1002 1002 * 1003 1003 * @addr: Destination address of the data in this block ··· 1086 1086 return Q1; 1087 1087 } 1088 1088 1089 - /** 1089 + /* 1090 1090 * \fn u32 log1_times100( u32 x) 1091 1091 * \brief Compute: 100*log10(x) 1092 1092 * \param x 32 bits ··· 1198 1198 1199 1199 } 1200 1200 1201 - /** 1201 + /* 1202 1202 * \fn u32 frac_times1e6( u16 N, u32 D) 1203 1203 * \brief Compute: (N/D) * 1000000. 1204 1204 * \param N nominator 16-bits. ··· 1235 1235 /*============================================================================*/ 1236 1236 1237 1237 1238 - /** 1238 + /* 1239 1239 * \brief Values for NICAM prescaler gain. Computed from dB to integer 1240 1240 * and rounded. For calc used formula: 16*10^(prescaleGain[dB]/20). 1241 1241 * ··· 1280 1280 #define DRXJ_DAP_AUDTRIF_TIMEOUT 80 /* millisec */ 1281 1281 /*============================================================================*/ 1282 1282 1283 - /** 1283 + /* 1284 1284 * \fn bool is_handled_by_aud_tr_if( u32 addr ) 1285 1285 * \brief Check if this address is handled by the audio token ring interface. 1286 1286 * \param addr ··· 1386 1386 1387 1387 /*============================================================================*/ 1388 1388 1389 - /****************************** 1389 + /***************************** 1390 1390 * 1391 1391 * int drxdap_fasi_read_block ( 1392 1392 * struct i2c_device_addr *dev_addr, -- address of I2C device ··· 1498 1498 } 1499 1499 1500 1500 1501 - /****************************** 1501 + /***************************** 1502 1502 * 1503 1503 * int drxdap_fasi_read_reg16 ( 1504 1504 * struct i2c_device_addr *dev_addr, -- address of I2C device ··· 1531 1531 return rc; 1532 1532 } 1533 1533 1534 - /****************************** 1534 + /***************************** 1535 1535 * 1536 1536 * int drxdap_fasi_read_reg32 ( 1537 1537 * struct i2c_device_addr *dev_addr, -- address of I2C device ··· 1566 1566 return rc; 1567 1567 } 1568 1568 1569 - /****************************** 1569 + /***************************** 1570 1570 * 1571 1571 * int drxdap_fasi_write_block ( 1572 1572 * struct i2c_device_addr *dev_addr, -- address of I2C device ··· 1705 1705 return first_err; 1706 1706 } 1707 1707 1708 - /****************************** 1708 + /***************************** 1709 1709 * 1710 1710 * int drxdap_fasi_write_reg16 ( 1711 1711 * struct i2c_device_addr *dev_addr, -- address of I2C device ··· 1734 1734 return drxdap_fasi_write_block(dev_addr, addr, sizeof(data), buf, flags); 1735 1735 } 1736 1736 1737 - /****************************** 1737 + /***************************** 1738 1738 * 1739 1739 * int drxdap_fasi_read_modify_write_reg16 ( 1740 1740 * struct i2c_device_addr *dev_addr, -- address of I2C device ··· 1778 1778 return rc; 1779 1779 } 1780 1780 1781 - /****************************** 1781 + /***************************** 1782 1782 * 1783 1783 * int drxdap_fasi_write_reg32 ( 1784 1784 * struct i2c_device_addr *dev_addr, -- address of I2C device ··· 1811 1811 1812 1812 /*============================================================================*/ 1813 1813 1814 - /** 1814 + /* 1815 1815 * \fn int drxj_dap_rm_write_reg16short 1816 1816 * \brief Read modify write 16 bits audio register using short format only. 1817 1817 * \param dev_addr ··· 1890 1890 1891 1891 /*============================================================================*/ 1892 1892 1893 - /** 1893 + /* 1894 1894 * \fn int drxj_dap_read_aud_reg16 1895 1895 * \brief Read 16 bits audio register 1896 1896 * \param dev_addr ··· 1997 1997 } 1998 1998 /*============================================================================*/ 1999 1999 2000 - /** 2000 + /* 2001 2001 * \fn int drxj_dap_write_aud_reg16 2002 2002 * \brief Write 16 bits audio register 2003 2003 * \param dev_addr ··· 2086 2086 #define DRXJ_HI_ATOMIC_READ SIO_HI_RA_RAM_PAR_3_ACP_RW_READ 2087 2087 #define DRXJ_HI_ATOMIC_WRITE SIO_HI_RA_RAM_PAR_3_ACP_RW_WRITE 2088 2088 2089 - /** 2089 + /* 2090 2090 * \fn int drxj_dap_atomic_read_write_block() 2091 2091 * \brief Basic access routine for atomic read or write access 2092 2092 * \param dev_addr pointer to i2c dev address ··· 2168 2168 2169 2169 /*============================================================================*/ 2170 2170 2171 - /** 2171 + /* 2172 2172 * \fn int drxj_dap_atomic_read_reg32() 2173 2173 * \brief Atomic read of 32 bits words 2174 2174 */ ··· 2215 2215 /*============================================================================*/ 2216 2216 /*============================================================================*/ 2217 2217 2218 - /** 2218 + /* 2219 2219 * \fn int hi_cfg_command() 2220 2220 * \brief Configure HI with settings stored in the demod structure. 2221 2221 * \param demod Demodulator. ··· 2258 2258 return rc; 2259 2259 } 2260 2260 2261 - /** 2261 + /* 2262 2262 * \fn int hi_command() 2263 2263 * \brief Configure HI with settings stored in the demod structure. 2264 2264 * \param dev_addr I2C address. ··· 2369 2369 return rc; 2370 2370 } 2371 2371 2372 - /** 2372 + /* 2373 2373 * \fn int init_hi( const struct drx_demod_instance *demod ) 2374 2374 * \brief Initialise and configurate HI. 2375 2375 * \param demod pointer to demod data. ··· 2450 2450 /*============================================================================*/ 2451 2451 /*============================================================================*/ 2452 2452 2453 - /** 2453 + /* 2454 2454 * \fn int get_device_capabilities() 2455 2455 * \brief Get and store device capabilities. 2456 2456 * \param demod Pointer to demodulator instance. ··· 2656 2656 return rc; 2657 2657 } 2658 2658 2659 - /** 2659 + /* 2660 2660 * \fn int power_up_device() 2661 2661 * \brief Power up device. 2662 2662 * \param demod Pointer to demodulator instance. ··· 2710 2710 /*----------------------------------------------------------------------------*/ 2711 2711 /* MPEG Output Configuration Functions - begin */ 2712 2712 /*----------------------------------------------------------------------------*/ 2713 - /** 2713 + /* 2714 2714 * \fn int ctrl_set_cfg_mpeg_output() 2715 2715 * \brief Set MPEG output configuration of the device. 2716 2716 * \param devmod Pointer to demodulator instance. ··· 3356 3356 /* miscellaneous configurations - begin */ 3357 3357 /*----------------------------------------------------------------------------*/ 3358 3358 3359 - /** 3359 + /* 3360 3360 * \fn int set_mpegtei_handling() 3361 3361 * \brief Activate MPEG TEI handling settings. 3362 3362 * \param devmod Pointer to demodulator instance. ··· 3429 3429 } 3430 3430 3431 3431 /*----------------------------------------------------------------------------*/ 3432 - /** 3432 + /* 3433 3433 * \fn int bit_reverse_mpeg_output() 3434 3434 * \brief Set MPEG output bit-endian settings. 3435 3435 * \param devmod Pointer to demodulator instance. ··· 3472 3472 } 3473 3473 3474 3474 /*----------------------------------------------------------------------------*/ 3475 - /** 3475 + /* 3476 3476 * \fn int set_mpeg_start_width() 3477 3477 * \brief Set MPEG start width. 3478 3478 * \param devmod Pointer to demodulator instance. ··· 3522 3522 /*----------------------------------------------------------------------------*/ 3523 3523 /* UIO Configuration Functions - begin */ 3524 3524 /*----------------------------------------------------------------------------*/ 3525 - /** 3525 + /* 3526 3526 * \fn int ctrl_set_uio_cfg() 3527 3527 * \brief Configure modus oprandi UIO. 3528 3528 * \param demod Pointer to demodulator instance. ··· 3659 3659 return rc; 3660 3660 } 3661 3661 3662 - /** 3662 + /* 3663 3663 * \fn int ctrl_uio_write() 3664 3664 * \brief Write to a UIO. 3665 3665 * \param demod Pointer to demodulator instance. ··· 3868 3868 /*----------------------------------------------------------------------------*/ 3869 3869 /* I2C Bridge Functions - begin */ 3870 3870 /*----------------------------------------------------------------------------*/ 3871 - /** 3871 + /* 3872 3872 * \fn int ctrl_i2c_bridge() 3873 3873 * \brief Open or close the I2C switch to tuner. 3874 3874 * \param demod Pointer to demodulator instance. ··· 3903 3903 /*----------------------------------------------------------------------------*/ 3904 3904 /* Smart antenna Functions - begin */ 3905 3905 /*----------------------------------------------------------------------------*/ 3906 - /** 3906 + /* 3907 3907 * \fn int smart_ant_init() 3908 3908 * \brief Initialize Smart Antenna. 3909 3909 * \param pointer to struct drx_demod_instance. ··· 4116 4116 return rc; 4117 4117 } 4118 4118 4119 - /** 4119 + /* 4120 4120 * \fn int DRXJ_DAP_SCUAtomicReadWriteBlock() 4121 4121 * \brief Basic access routine for SCU atomic read or write access 4122 4122 * \param dev_addr pointer to i2c dev address ··· 4188 4188 4189 4189 /*============================================================================*/ 4190 4190 4191 - /** 4191 + /* 4192 4192 * \fn int DRXJ_DAP_AtomicReadReg16() 4193 4193 * \brief Atomic read of 16 bits words 4194 4194 */ ··· 4216 4216 } 4217 4217 4218 4218 /*============================================================================*/ 4219 - /** 4219 + /* 4220 4220 * \fn int drxj_dap_scu_atomic_write_reg16() 4221 4221 * \brief Atomic read of 16 bits words 4222 4222 */ ··· 4237 4237 } 4238 4238 4239 4239 /* -------------------------------------------------------------------------- */ 4240 - /** 4240 + /* 4241 4241 * \brief Measure result of ADC synchronisation 4242 4242 * \param demod demod instance 4243 4243 * \param count (returned) count ··· 4297 4297 return rc; 4298 4298 } 4299 4299 4300 - /** 4300 + /* 4301 4301 * \brief Synchronize analog and digital clock domains 4302 4302 * \param demod demod instance 4303 4303 * \return int. ··· 4365 4365 /*== 8VSB & QAM COMMON DATAPATH FUNCTIONS ==*/ 4366 4366 /*============================================================================*/ 4367 4367 /*============================================================================*/ 4368 - /** 4368 + /* 4369 4369 * \fn int init_agc () 4370 4370 * \brief Initialize AGC for all standards. 4371 4371 * \param demod instance of demodulator. ··· 4741 4741 return rc; 4742 4742 } 4743 4743 4744 - /** 4744 + /* 4745 4745 * \fn int set_frequency () 4746 4746 * \brief Set frequency shift. 4747 4747 * \param demod instance of demodulator. ··· 4839 4839 return rc; 4840 4840 } 4841 4841 4842 - /** 4842 + /* 4843 4843 * \fn int get_acc_pkt_err() 4844 4844 * \brief Retrieve signal strength for VSB and QAM. 4845 4845 * \param demod Pointer to demod instance ··· 4891 4891 4892 4892 /*============================================================================*/ 4893 4893 4894 - /** 4894 + /* 4895 4895 * \fn int set_agc_rf () 4896 4896 * \brief Configure RF AGC 4897 4897 * \param demod instance of demodulator. ··· 5105 5105 return rc; 5106 5106 } 5107 5107 5108 - /** 5108 + /* 5109 5109 * \fn int set_agc_if () 5110 5110 * \brief Configure If AGC 5111 5111 * \param demod instance of demodulator. ··· 5334 5334 return rc; 5335 5335 } 5336 5336 5337 - /** 5337 + /* 5338 5338 * \fn int set_iqm_af () 5339 5339 * \brief Configure IQM AF registers 5340 5340 * \param demod instance of demodulator. ··· 5380 5380 /*============================================================================*/ 5381 5381 /*============================================================================*/ 5382 5382 5383 - /** 5383 + /* 5384 5384 * \fn int power_down_vsb () 5385 5385 * \brief Powr down QAM related blocks. 5386 5386 * \param demod instance of demodulator. ··· 5478 5478 return rc; 5479 5479 } 5480 5480 5481 - /** 5481 + /* 5482 5482 * \fn int set_vsb_leak_n_gain () 5483 5483 * \brief Set ATSC demod. 5484 5484 * \param demod instance of demodulator. ··· 5694 5694 return rc; 5695 5695 } 5696 5696 5697 - /** 5697 + /* 5698 5698 * \fn int set_vsb() 5699 5699 * \brief Set 8VSB demod. 5700 5700 * \param demod instance of demodulator. ··· 6200 6200 return rc; 6201 6201 } 6202 6202 6203 - /** 6203 + /* 6204 6204 * \fn static short get_vsb_post_rs_pck_err(struct i2c_device_addr *dev_addr, u16 *PckErrs) 6205 6205 * \brief Get the values of packet error in 8VSB mode 6206 6206 * \return Error code ··· 6239 6239 return rc; 6240 6240 } 6241 6241 6242 - /** 6242 + /* 6243 6243 * \fn static short GetVSBBer(struct i2c_device_addr *dev_addr, u32 *ber) 6244 6244 * \brief Get the values of ber in VSB mode 6245 6245 * \return Error code ··· 6284 6284 return rc; 6285 6285 } 6286 6286 6287 - /** 6287 + /* 6288 6288 * \fn static short get_vs_bpre_viterbi_ber(struct i2c_device_addr *dev_addr, u32 *ber) 6289 6289 * \brief Get the values of ber in VSB mode 6290 6290 * \return Error code ··· 6306 6306 return 0; 6307 6307 } 6308 6308 6309 - /** 6309 + /* 6310 6310 * \fn static int get_vsbmer(struct i2c_device_addr *dev_addr, u16 *mer) 6311 6311 * \brief Get the values of MER 6312 6312 * \return Error code ··· 6340 6340 /*============================================================================*/ 6341 6341 /*============================================================================*/ 6342 6342 6343 - /** 6343 + /* 6344 6344 * \fn int power_down_qam () 6345 6345 * \brief Powr down QAM related blocks. 6346 6346 * \param demod instance of demodulator. ··· 6444 6444 6445 6445 /*============================================================================*/ 6446 6446 6447 - /** 6447 + /* 6448 6448 * \fn int set_qam_measurement () 6449 6449 * \brief Setup of the QAM Measuremnt intervals for signal quality 6450 6450 * \param demod instance of demod. ··· 6656 6656 6657 6657 /*============================================================================*/ 6658 6658 6659 - /** 6659 + /* 6660 6660 * \fn int set_qam16 () 6661 6661 * \brief QAM16 specific setup 6662 6662 * \param demod instance of demod. ··· 6891 6891 6892 6892 /*============================================================================*/ 6893 6893 6894 - /** 6894 + /* 6895 6895 * \fn int set_qam32 () 6896 6896 * \brief QAM32 specific setup 6897 6897 * \param demod instance of demod. ··· 7126 7126 7127 7127 /*============================================================================*/ 7128 7128 7129 - /** 7129 + /* 7130 7130 * \fn int set_qam64 () 7131 7131 * \brief QAM64 specific setup 7132 7132 * \param demod instance of demod. ··· 7362 7362 7363 7363 /*============================================================================*/ 7364 7364 7365 - /** 7365 + /* 7366 7366 * \fn int set_qam128 () 7367 7367 * \brief QAM128 specific setup 7368 7368 * \param demod: instance of demod. ··· 7597 7597 7598 7598 /*============================================================================*/ 7599 7599 7600 - /** 7600 + /* 7601 7601 * \fn int set_qam256 () 7602 7602 * \brief QAM256 specific setup 7603 7603 * \param demod: instance of demod. ··· 7835 7835 #define QAM_SET_OP_CONSTELLATION 0x2 7836 7836 #define QAM_SET_OP_SPECTRUM 0X4 7837 7837 7838 - /** 7838 + /* 7839 7839 * \fn int set_qam () 7840 7840 * \brief Set QAM demod. 7841 7841 * \param demod: instance of demod. ··· 8845 8845 #define DEMOD_LOCKED 0x1 8846 8846 #define SYNC_FLIPPED 0x2 8847 8847 #define SPEC_MIRRORED 0x4 8848 - /** 8848 + /* 8849 8849 * \fn int qam64auto () 8850 8850 * \brief auto do sync pattern switching and mirroring. 8851 8851 * \param demod: instance of demod. ··· 8993 8993 return rc; 8994 8994 } 8995 8995 8996 - /** 8996 + /* 8997 8997 * \fn int qam256auto () 8998 8998 * \brief auto do sync pattern switching and mirroring. 8999 8999 * \param demod: instance of demod. ··· 9077 9077 return rc; 9078 9078 } 9079 9079 9080 - /** 9080 + /* 9081 9081 * \fn int set_qam_channel () 9082 9082 * \brief Set QAM channel according to the requested constellation. 9083 9083 * \param demod: instance of demod. ··· 9284 9284 9285 9285 /*============================================================================*/ 9286 9286 9287 - /** 9287 + /* 9288 9288 * \fn static short get_qamrs_err_count(struct i2c_device_addr *dev_addr) 9289 9289 * \brief Get RS error count in QAM mode (used for post RS BER calculation) 9290 9290 * \return Error code ··· 9355 9355 9356 9356 /*============================================================================*/ 9357 9357 9358 - /** 9358 + /* 9359 9359 * \fn int get_sig_strength() 9360 9360 * \brief Retrieve signal strength for VSB and QAM. 9361 9361 * \param demod Pointer to demod instance ··· 9435 9435 return rc; 9436 9436 } 9437 9437 9438 - /** 9438 + /* 9439 9439 * \fn int ctrl_get_qam_sig_quality() 9440 9440 * \brief Retrieve QAM signal quality from device. 9441 9441 * \param devmod Pointer to demodulator instance. ··· 9721 9721 */ 9722 9722 /* -------------------------------------------------------------------------- */ 9723 9723 9724 - /** 9724 + /* 9725 9725 * \fn int power_down_atv () 9726 9726 * \brief Power down ATV. 9727 9727 * \param demod instance of demodulator ··· 9822 9822 9823 9823 /*============================================================================*/ 9824 9824 9825 - /** 9825 + /* 9826 9826 * \brief Power up AUD. 9827 9827 * \param demod instance of demodulator 9828 9828 * \return int. ··· 9850 9850 return rc; 9851 9851 } 9852 9852 9853 - /** 9853 + /* 9854 9854 * \fn int set_orx_nsu_aox() 9855 9855 * \brief Configure OrxNsuAox for OOB 9856 9856 * \param demod instance of demodulator. ··· 9884 9884 return rc; 9885 9885 } 9886 9886 9887 - /** 9887 + /* 9888 9888 * \fn int ctrl_set_oob() 9889 9889 * \brief Set OOB channel to be used. 9890 9890 * \param demod instance of demodulator ··· 9986 9986 20; 9987 9987 } 9988 9988 9989 - /*********/ 9989 + /********/ 9990 9990 /* Stop */ 9991 - /*********/ 9991 + /********/ 9992 9992 rc = drxj_dap_write_reg16(dev_addr, ORX_COMM_EXEC__A, ORX_COMM_EXEC_STOP, 0); 9993 9993 if (rc != 0) { 9994 9994 pr_err("error %d\n", rc); ··· 10004 10004 pr_err("error %d\n", rc); 10005 10005 goto rw_error; 10006 10006 } 10007 - /*********/ 10007 + /********/ 10008 10008 /* Reset */ 10009 - /*********/ 10009 + /********/ 10010 10010 scu_cmd.command = SCU_RAM_COMMAND_STANDARD_OOB 10011 10011 | SCU_RAM_COMMAND_CMD_DEMOD_RESET; 10012 10012 scu_cmd.parameter_len = 0; ··· 10017 10017 pr_err("error %d\n", rc); 10018 10018 goto rw_error; 10019 10019 } 10020 - /***********/ 10020 + /**********/ 10021 10021 /* SET_ENV */ 10022 - /***********/ 10022 + /**********/ 10023 10023 /* set frequency, spectrum inversion and data rate */ 10024 10024 scu_cmd.command = SCU_RAM_COMMAND_STANDARD_OOB 10025 10025 | SCU_RAM_COMMAND_CMD_DEMOD_SET_ENV; ··· 10376 10376 pr_err("error %d\n", rc); 10377 10377 goto rw_error; 10378 10378 } 10379 - /*********/ 10379 + /********/ 10380 10380 /* Start */ 10381 - /*********/ 10381 + /********/ 10382 10382 scu_cmd.command = SCU_RAM_COMMAND_STANDARD_OOB 10383 10383 | SCU_RAM_COMMAND_CMD_DEMOD_START; 10384 10384 scu_cmd.parameter_len = 0; ··· 10419 10419 /*============================================================================= 10420 10420 ===== ctrl_set_channel() ========================================================== 10421 10421 ===========================================================================*/ 10422 - /** 10422 + /* 10423 10423 * \fn int ctrl_set_channel() 10424 10424 * \brief Select a new transmission channel. 10425 10425 * \param demod instance of demod. ··· 10652 10652 ===== SigQuality() ========================================================== 10653 10653 ===========================================================================*/ 10654 10654 10655 - /** 10655 + /* 10656 10656 * \fn int ctrl_sig_quality() 10657 10657 * \brief Retrieve signal quality form device. 10658 10658 * \param devmod Pointer to demodulator instance. ··· 10768 10768 10769 10769 /*============================================================================*/ 10770 10770 10771 - /** 10771 + /* 10772 10772 * \fn int ctrl_lock_status() 10773 10773 * \brief Retrieve lock status . 10774 10774 * \param dev_addr Pointer to demodulator device address. ··· 10856 10856 10857 10857 /*============================================================================*/ 10858 10858 10859 - /** 10859 + /* 10860 10860 * \fn int ctrl_set_standard() 10861 10861 * \brief Set modulation standard to be used. 10862 10862 * \param standard Modulation standard. ··· 11012 11012 ext_attr->vsb_pre_saw_cfg.use_pre_saw = true; 11013 11013 } 11014 11014 11015 - /** 11015 + /* 11016 11016 * \fn int ctrl_power_mode() 11017 11017 * \brief Set the power mode of the device to the specified power mode 11018 11018 * \param demod Pointer to demodulator instance. ··· 11171 11171 /*== CTRL Set/Get Config related functions ===================================*/ 11172 11172 /*============================================================================*/ 11173 11173 11174 - /** 11174 + /* 11175 11175 * \fn int ctrl_set_cfg_pre_saw() 11176 11176 * \brief Set Pre-saw reference. 11177 11177 * \param demod demod instance ··· 11234 11234 11235 11235 /*============================================================================*/ 11236 11236 11237 - /** 11237 + /* 11238 11238 * \fn int ctrl_set_cfg_afe_gain() 11239 11239 * \brief Set AFE Gain. 11240 11240 * \param demod demod instance ··· 11324 11324 enum drxu_code_action action); 11325 11325 static int drxj_set_lna_state(struct drx_demod_instance *demod, bool state); 11326 11326 11327 - /** 11327 + /* 11328 11328 * \fn drxj_open() 11329 11329 * \brief Open the demod instance, configure device, configure drxdriver 11330 11330 * \return Status_t Return status. ··· 11543 11543 } 11544 11544 11545 11545 /*============================================================================*/ 11546 - /** 11546 + /* 11547 11547 * \fn drxj_close() 11548 11548 * \brief Close the demod instance, power down the device 11549 11549 * \return Status_t Return status. ··· 11594 11594 * Microcode related functions 11595 11595 */ 11596 11596 11597 - /** 11597 + /* 11598 11598 * drx_u_code_compute_crc - Compute CRC of block of microcode data. 11599 11599 * @block_data: Pointer to microcode data. 11600 11600 * @nr_words: Size of microcode block (number of 16 bits words). ··· 11622 11622 return (u16)(crc_word >> 16); 11623 11623 } 11624 11624 11625 - /** 11625 + /* 11626 11626 * drx_check_firmware - checks if the loaded firmware is valid 11627 11627 * 11628 11628 * @demod: demod structure ··· 11708 11708 return -EINVAL; 11709 11709 } 11710 11710 11711 - /** 11711 + /* 11712 11712 * drx_ctrl_u_code - Handle microcode upload or verify. 11713 11713 * @dev_addr: Address of device. 11714 11714 * @mc_info: Pointer to information about microcode data.
+110 -110
drivers/media/dvb-frontends/drx39xyj/drxj.h
··· 69 69 70 70 struct drxjscu_cmd { 71 71 u16 command; 72 - /**< Command number */ 72 + /*< Command number */ 73 73 u16 parameter_len; 74 - /**< Data length in byte */ 74 + /*< Data length in byte */ 75 75 u16 result_len; 76 - /**< result length in byte */ 76 + /*< result length in byte */ 77 77 u16 *parameter; 78 - /**< General purpous param */ 78 + /*< General purpous param */ 79 79 u16 *result; 80 - /**< General purpous param */}; 80 + /*< General purpous param */}; 81 81 82 82 /*============================================================================*/ 83 83 /*============================================================================*/ ··· 130 130 131 131 DRXJ_CFG_MAX /* dummy, never to be used */}; 132 132 133 - /** 133 + /* 134 134 * /struct enum drxj_cfg_smart_ant_io * smart antenna i/o. 135 135 */ 136 136 enum drxj_cfg_smart_ant_io { ··· 138 138 DRXJ_SMT_ANT_INPUT 139 139 }; 140 140 141 - /** 141 + /* 142 142 * /struct struct drxj_cfg_smart_ant * Set smart antenna. 143 143 */ 144 144 struct drxj_cfg_smart_ant { ··· 146 146 u16 ctrl_data; 147 147 }; 148 148 149 - /** 149 + /* 150 150 * /struct DRXJAGCSTATUS_t 151 151 * AGC status information from the DRXJ-IQM-AF. 152 152 */ ··· 158 158 159 159 /* DRXJ_CFG_AGC_RF, DRXJ_CFG_AGC_IF */ 160 160 161 - /** 161 + /* 162 162 * /struct enum drxj_agc_ctrl_mode * Available AGCs modes in the DRXJ. 163 163 */ 164 164 enum drxj_agc_ctrl_mode { ··· 166 166 DRX_AGC_CTRL_USER, 167 167 DRX_AGC_CTRL_OFF}; 168 168 169 - /** 169 + /* 170 170 * /struct struct drxj_cfg_agc * Generic interface for all AGCs present on the DRXJ. 171 171 */ 172 172 struct drxj_cfg_agc { ··· 182 182 183 183 /* DRXJ_CFG_PRE_SAW */ 184 184 185 - /** 185 + /* 186 186 * /struct struct drxj_cfg_pre_saw * Interface to configure pre SAW sense. 187 187 */ 188 188 struct drxj_cfg_pre_saw { ··· 192 192 193 193 /* DRXJ_CFG_AFE_GAIN */ 194 194 195 - /** 195 + /* 196 196 * /struct struct drxj_cfg_afe_gain * Interface to configure gain of AFE (LNA + PGA). 197 197 */ 198 198 struct drxj_cfg_afe_gain { 199 199 enum drx_standard standard; /* standard to which these settings apply */ 200 200 u16 gain; /* gain in 0.1 dB steps, DRXJ range 140 .. 335 */}; 201 201 202 - /** 202 + /* 203 203 * /struct drxjrs_errors 204 204 * Available failure information in DRXJ_FEC_RS. 205 205 * ··· 208 208 */ 209 209 struct drxjrs_errors { 210 210 u16 nr_bit_errors; 211 - /**< no of pre RS bit errors */ 211 + /*< no of pre RS bit errors */ 212 212 u16 nr_symbol_errors; 213 - /**< no of pre RS symbol errors */ 213 + /*< no of pre RS symbol errors */ 214 214 u16 nr_packet_errors; 215 - /**< no of pre RS packet errors */ 215 + /*< no of pre RS packet errors */ 216 216 u16 nr_failures; 217 - /**< no of post RS failures to decode */ 217 + /*< no of post RS failures to decode */ 218 218 u16 nr_snc_par_fail_count; 219 - /**< no of post RS bit erros */ 219 + /*< no of post RS bit erros */ 220 220 }; 221 221 222 - /** 222 + /* 223 223 * /struct struct drxj_cfg_vsb_misc * symbol error rate 224 224 */ 225 225 struct drxj_cfg_vsb_misc { 226 226 u32 symb_error; 227 - /**< symbol error rate sps */}; 227 + /*< symbol error rate sps */}; 228 228 229 - /** 229 + /* 230 230 * /enum enum drxj_mpeg_output_clock_rate * Mpeg output clock rate. 231 231 * 232 232 */ ··· 234 234 DRXJ_MPEG_START_WIDTH_1CLKCYC, 235 235 DRXJ_MPEG_START_WIDTH_8CLKCYC}; 236 236 237 - /** 237 + /* 238 238 * /enum enum drxj_mpeg_output_clock_rate * Mpeg output clock rate. 239 239 * 240 240 */ ··· 247 247 DRXJ_MPEGOUTPUT_CLOCK_RATE_25313K, 248 248 DRXJ_MPEGOUTPUT_CLOCK_RATE_21696K}; 249 249 250 - /** 250 + /* 251 251 * /struct DRXJCfgMisc_t 252 252 * Change TEI bit of MPEG output 253 253 * reverse MPEG output bit order 254 254 * set MPEG output clock rate 255 255 */ 256 256 struct drxj_cfg_mpeg_output_misc { 257 - bool disable_tei_handling; /**< if true pass (not change) TEI bit */ 258 - bool bit_reverse_mpeg_outout; /**< if true, parallel: msb on MD0; serial: lsb out first */ 257 + bool disable_tei_handling; /*< if true pass (not change) TEI bit */ 258 + bool bit_reverse_mpeg_outout; /*< if true, parallel: msb on MD0; serial: lsb out first */ 259 259 enum drxj_mpeg_output_clock_rate mpeg_output_clock_rate; 260 - /**< set MPEG output clock rate that overwirtes the derived one from symbol rate */ 261 - enum drxj_mpeg_start_width mpeg_start_width; /**< set MPEG output start width */}; 260 + /*< set MPEG output clock rate that overwirtes the derived one from symbol rate */ 261 + enum drxj_mpeg_start_width mpeg_start_width; /*< set MPEG output start width */}; 262 262 263 - /** 263 + /* 264 264 * /enum enum drxj_xtal_freq * Supported external crystal reference frequency. 265 265 */ 266 266 enum drxj_xtal_freq { ··· 269 269 DRXJ_XTAL_FREQ_20P25MHZ, 270 270 DRXJ_XTAL_FREQ_4MHZ}; 271 271 272 - /** 272 + /* 273 273 * /enum enum drxj_xtal_freq * Supported external crystal reference frequency. 274 274 */ 275 275 enum drxji2c_speed { 276 276 DRXJ_I2C_SPEED_400KBPS, 277 277 DRXJ_I2C_SPEED_100KBPS}; 278 278 279 - /** 279 + /* 280 280 * /struct struct drxj_cfg_hw_cfg * Get hw configuration, such as crystal reference frequency, I2C speed, etc... 281 281 */ 282 282 struct drxj_cfg_hw_cfg { 283 283 enum drxj_xtal_freq xtal_freq; 284 - /**< crystal reference frequency */ 284 + /*< crystal reference frequency */ 285 285 enum drxji2c_speed i2c_speed; 286 - /**< 100 or 400 kbps */}; 286 + /*< 100 or 400 kbps */}; 287 287 288 288 /* 289 289 * DRXJ_CFG_ATV_MISC ··· 352 352 * DRXJ_CFG_ATV_OUTPUT 353 353 */ 354 354 355 - /** 355 + /* 356 356 * /enum DRXJAttenuation_t 357 357 * Attenuation setting for SIF AGC. 358 358 * ··· 363 363 DRXJ_SIF_ATTENUATION_6DB, 364 364 DRXJ_SIF_ATTENUATION_9DB}; 365 365 366 - /** 366 + /* 367 367 * /struct struct drxj_cfg_atv_output * SIF attenuation setting. 368 368 * 369 369 */ ··· 398 398 /*============================================================================*/ 399 399 400 400 /*========================================*/ 401 - /** 401 + /* 402 402 * /struct struct drxj_data * DRXJ specific attributes. 403 403 * 404 404 * Global data container for DRXJ specific data. ··· 406 406 */ 407 407 struct drxj_data { 408 408 /* device capabilties (determined during drx_open()) */ 409 - bool has_lna; /**< true if LNA (aka PGA) present */ 410 - bool has_oob; /**< true if OOB supported */ 411 - bool has_ntsc; /**< true if NTSC supported */ 412 - bool has_btsc; /**< true if BTSC supported */ 413 - bool has_smatx; /**< true if mat_tx is available */ 414 - bool has_smarx; /**< true if mat_rx is available */ 415 - bool has_gpio; /**< true if GPIO is available */ 416 - bool has_irqn; /**< true if IRQN is available */ 409 + bool has_lna; /*< true if LNA (aka PGA) present */ 410 + bool has_oob; /*< true if OOB supported */ 411 + bool has_ntsc; /*< true if NTSC supported */ 412 + bool has_btsc; /*< true if BTSC supported */ 413 + bool has_smatx; /*< true if mat_tx is available */ 414 + bool has_smarx; /*< true if mat_rx is available */ 415 + bool has_gpio; /*< true if GPIO is available */ 416 + bool has_irqn; /*< true if IRQN is available */ 417 417 /* A1/A2/A... */ 418 - u8 mfx; /**< metal fix */ 418 + u8 mfx; /*< metal fix */ 419 419 420 420 /* tuner settings */ 421 - bool mirror_freq_spect_oob;/**< tuner inversion (true = tuner mirrors the signal */ 421 + bool mirror_freq_spect_oob;/*< tuner inversion (true = tuner mirrors the signal */ 422 422 423 423 /* standard/channel settings */ 424 - enum drx_standard standard; /**< current standard information */ 424 + enum drx_standard standard; /*< current standard information */ 425 425 enum drx_modulation constellation; 426 - /**< current constellation */ 427 - s32 frequency; /**< center signal frequency in KHz */ 426 + /*< current constellation */ 427 + s32 frequency; /*< center signal frequency in KHz */ 428 428 enum drx_bandwidth curr_bandwidth; 429 - /**< current channel bandwidth */ 430 - enum drx_mirror mirror; /**< current channel mirror */ 429 + /*< current channel bandwidth */ 430 + enum drx_mirror mirror; /*< current channel mirror */ 431 431 432 432 /* signal quality information */ 433 - u32 fec_bits_desired; /**< BER accounting period */ 434 - u16 fec_vd_plen; /**< no of trellis symbols: VD SER measurement period */ 435 - u16 qam_vd_prescale; /**< Viterbi Measurement Prescale */ 436 - u16 qam_vd_period; /**< Viterbi Measurement period */ 437 - u16 fec_rs_plen; /**< defines RS BER measurement period */ 438 - u16 fec_rs_prescale; /**< ReedSolomon Measurement Prescale */ 439 - u16 fec_rs_period; /**< ReedSolomon Measurement period */ 440 - bool reset_pkt_err_acc; /**< Set a flag to reset accumulated packet error */ 441 - u16 pkt_err_acc_start; /**< Set a flag to reset accumulated packet error */ 433 + u32 fec_bits_desired; /*< BER accounting period */ 434 + u16 fec_vd_plen; /*< no of trellis symbols: VD SER measurement period */ 435 + u16 qam_vd_prescale; /*< Viterbi Measurement Prescale */ 436 + u16 qam_vd_period; /*< Viterbi Measurement period */ 437 + u16 fec_rs_plen; /*< defines RS BER measurement period */ 438 + u16 fec_rs_prescale; /*< ReedSolomon Measurement Prescale */ 439 + u16 fec_rs_period; /*< ReedSolomon Measurement period */ 440 + bool reset_pkt_err_acc; /*< Set a flag to reset accumulated packet error */ 441 + u16 pkt_err_acc_start; /*< Set a flag to reset accumulated packet error */ 442 442 443 443 /* HI configuration */ 444 - u16 hi_cfg_timing_div; /**< HI Configure() parameter 2 */ 445 - u16 hi_cfg_bridge_delay; /**< HI Configure() parameter 3 */ 446 - u16 hi_cfg_wake_up_key; /**< HI Configure() parameter 4 */ 447 - u16 hi_cfg_ctrl; /**< HI Configure() parameter 5 */ 448 - u16 hi_cfg_transmit; /**< HI Configure() parameter 6 */ 444 + u16 hi_cfg_timing_div; /*< HI Configure() parameter 2 */ 445 + u16 hi_cfg_bridge_delay; /*< HI Configure() parameter 3 */ 446 + u16 hi_cfg_wake_up_key; /*< HI Configure() parameter 4 */ 447 + u16 hi_cfg_ctrl; /*< HI Configure() parameter 5 */ 448 + u16 hi_cfg_transmit; /*< HI Configure() parameter 6 */ 449 449 450 450 /* UIO configuration */ 451 - enum drxuio_mode uio_sma_rx_mode;/**< current mode of SmaRx pin */ 452 - enum drxuio_mode uio_sma_tx_mode;/**< current mode of SmaTx pin */ 453 - enum drxuio_mode uio_gpio_mode; /**< current mode of ASEL pin */ 454 - enum drxuio_mode uio_irqn_mode; /**< current mode of IRQN pin */ 451 + enum drxuio_mode uio_sma_rx_mode;/*< current mode of SmaRx pin */ 452 + enum drxuio_mode uio_sma_tx_mode;/*< current mode of SmaTx pin */ 453 + enum drxuio_mode uio_gpio_mode; /*< current mode of ASEL pin */ 454 + enum drxuio_mode uio_irqn_mode; /*< current mode of IRQN pin */ 455 455 456 456 /* IQM fs frequecy shift and inversion */ 457 - u32 iqm_fs_rate_ofs; /**< frequency shifter setting after setchannel */ 458 - bool pos_image; /**< Ture: positive image */ 457 + u32 iqm_fs_rate_ofs; /*< frequency shifter setting after setchannel */ 458 + bool pos_image; /*< Ture: positive image */ 459 459 /* IQM RC frequecy shift */ 460 - u32 iqm_rc_rate_ofs; /**< frequency shifter setting after setchannel */ 460 + u32 iqm_rc_rate_ofs; /*< frequency shifter setting after setchannel */ 461 461 462 462 /* ATV configuration */ 463 - u32 atv_cfg_changed_flags; /**< flag: flags cfg changes */ 464 - s16 atv_top_equ0[DRXJ_COEF_IDX_MAX]; /**< shadow of ATV_TOP_EQU0__A */ 465 - s16 atv_top_equ1[DRXJ_COEF_IDX_MAX]; /**< shadow of ATV_TOP_EQU1__A */ 466 - s16 atv_top_equ2[DRXJ_COEF_IDX_MAX]; /**< shadow of ATV_TOP_EQU2__A */ 467 - s16 atv_top_equ3[DRXJ_COEF_IDX_MAX]; /**< shadow of ATV_TOP_EQU3__A */ 468 - bool phase_correction_bypass;/**< flag: true=bypass */ 469 - s16 atv_top_vid_peak; /**< shadow of ATV_TOP_VID_PEAK__A */ 470 - u16 atv_top_noise_th; /**< shadow of ATV_TOP_NOISE_TH__A */ 471 - bool enable_cvbs_output; /**< flag CVBS ouput enable */ 472 - bool enable_sif_output; /**< flag SIF ouput enable */ 463 + u32 atv_cfg_changed_flags; /*< flag: flags cfg changes */ 464 + s16 atv_top_equ0[DRXJ_COEF_IDX_MAX]; /*< shadow of ATV_TOP_EQU0__A */ 465 + s16 atv_top_equ1[DRXJ_COEF_IDX_MAX]; /*< shadow of ATV_TOP_EQU1__A */ 466 + s16 atv_top_equ2[DRXJ_COEF_IDX_MAX]; /*< shadow of ATV_TOP_EQU2__A */ 467 + s16 atv_top_equ3[DRXJ_COEF_IDX_MAX]; /*< shadow of ATV_TOP_EQU3__A */ 468 + bool phase_correction_bypass;/*< flag: true=bypass */ 469 + s16 atv_top_vid_peak; /*< shadow of ATV_TOP_VID_PEAK__A */ 470 + u16 atv_top_noise_th; /*< shadow of ATV_TOP_NOISE_TH__A */ 471 + bool enable_cvbs_output; /*< flag CVBS ouput enable */ 472 + bool enable_sif_output; /*< flag SIF ouput enable */ 473 473 enum drxjsif_attenuation sif_attenuation; 474 - /**< current SIF att setting */ 474 + /*< current SIF att setting */ 475 475 /* Agc configuration for QAM and VSB */ 476 - struct drxj_cfg_agc qam_rf_agc_cfg; /**< qam RF AGC config */ 477 - struct drxj_cfg_agc qam_if_agc_cfg; /**< qam IF AGC config */ 478 - struct drxj_cfg_agc vsb_rf_agc_cfg; /**< vsb RF AGC config */ 479 - struct drxj_cfg_agc vsb_if_agc_cfg; /**< vsb IF AGC config */ 476 + struct drxj_cfg_agc qam_rf_agc_cfg; /*< qam RF AGC config */ 477 + struct drxj_cfg_agc qam_if_agc_cfg; /*< qam IF AGC config */ 478 + struct drxj_cfg_agc vsb_rf_agc_cfg; /*< vsb RF AGC config */ 479 + struct drxj_cfg_agc vsb_if_agc_cfg; /*< vsb IF AGC config */ 480 480 481 481 /* PGA gain configuration for QAM and VSB */ 482 - u16 qam_pga_cfg; /**< qam PGA config */ 483 - u16 vsb_pga_cfg; /**< vsb PGA config */ 482 + u16 qam_pga_cfg; /*< qam PGA config */ 483 + u16 vsb_pga_cfg; /*< vsb PGA config */ 484 484 485 485 /* Pre SAW configuration for QAM and VSB */ 486 486 struct drxj_cfg_pre_saw qam_pre_saw_cfg; 487 - /**< qam pre SAW config */ 487 + /*< qam pre SAW config */ 488 488 struct drxj_cfg_pre_saw vsb_pre_saw_cfg; 489 - /**< qam pre SAW config */ 489 + /*< qam pre SAW config */ 490 490 491 491 /* Version information */ 492 - char v_text[2][12]; /**< allocated text versions */ 493 - struct drx_version v_version[2]; /**< allocated versions structs */ 492 + char v_text[2][12]; /*< allocated text versions */ 493 + struct drx_version v_version[2]; /*< allocated versions structs */ 494 494 struct drx_version_list v_list_elements[2]; 495 - /**< allocated version list */ 495 + /*< allocated version list */ 496 496 497 497 /* smart antenna configuration */ 498 498 bool smart_ant_inverted; ··· 502 502 bool oob_power_on; 503 503 504 504 /* MPEG static bitrate setting */ 505 - u32 mpeg_ts_static_bitrate; /**< bitrate static MPEG output */ 506 - bool disable_te_ihandling; /**< MPEG TS TEI handling */ 507 - bool bit_reverse_mpeg_outout;/**< MPEG output bit order */ 505 + u32 mpeg_ts_static_bitrate; /*< bitrate static MPEG output */ 506 + bool disable_te_ihandling; /*< MPEG TS TEI handling */ 507 + bool bit_reverse_mpeg_outout;/*< MPEG output bit order */ 508 508 enum drxj_mpeg_output_clock_rate mpeg_output_clock_rate; 509 - /**< MPEG output clock rate */ 509 + /*< MPEG output clock rate */ 510 510 enum drxj_mpeg_start_width mpeg_start_width; 511 - /**< MPEG Start width */ 511 + /*< MPEG Start width */ 512 512 513 513 /* Pre SAW & Agc configuration for ATV */ 514 514 struct drxj_cfg_pre_saw atv_pre_saw_cfg; 515 - /**< atv pre SAW config */ 516 - struct drxj_cfg_agc atv_rf_agc_cfg; /**< atv RF AGC config */ 517 - struct drxj_cfg_agc atv_if_agc_cfg; /**< atv IF AGC config */ 518 - u16 atv_pga_cfg; /**< atv pga config */ 515 + /*< atv pre SAW config */ 516 + struct drxj_cfg_agc atv_rf_agc_cfg; /*< atv RF AGC config */ 517 + struct drxj_cfg_agc atv_if_agc_cfg; /*< atv IF AGC config */ 518 + u16 atv_pga_cfg; /*< atv pga config */ 519 519 520 520 u32 curr_symbol_rate; 521 521 522 522 /* pin-safe mode */ 523 - bool pdr_safe_mode; /**< PDR safe mode activated */ 523 + bool pdr_safe_mode; /*< PDR safe mode activated */ 524 524 u16 pdr_safe_restore_val_gpio; 525 525 u16 pdr_safe_restore_val_v_sync; 526 526 u16 pdr_safe_restore_val_sma_rx; ··· 531 531 enum drxj_cfg_oob_lo_power oob_lo_pow; 532 532 533 533 struct drx_aud_data aud_data; 534 - /**< audio storage */}; 534 + /*< audio storage */}; 535 535 536 536 /*------------------------------------------------------------------------- 537 537 Access MACROS 538 538 -------------------------------------------------------------------------*/ 539 - /** 539 + /* 540 540 * \brief Compilable references to attributes 541 541 * \param d pointer to demod instance 542 542 * ··· 554 554 DEFINES 555 555 -------------------------------------------------------------------------*/ 556 556 557 - /** 557 + /* 558 558 * \def DRXJ_NTSC_CARRIER_FREQ_OFFSET 559 559 * \brief Offset from picture carrier to centre frequency in kHz, in RF domain 560 560 * ··· 569 569 */ 570 570 #define DRXJ_NTSC_CARRIER_FREQ_OFFSET ((s32)(1750)) 571 571 572 - /** 572 + /* 573 573 * \def DRXJ_PAL_SECAM_BG_CARRIER_FREQ_OFFSET 574 574 * \brief Offset from picture carrier to centre frequency in kHz, in RF domain 575 575 * ··· 585 585 */ 586 586 #define DRXJ_PAL_SECAM_BG_CARRIER_FREQ_OFFSET ((s32)(2375)) 587 587 588 - /** 588 + /* 589 589 * \def DRXJ_PAL_SECAM_DKIL_CARRIER_FREQ_OFFSET 590 590 * \brief Offset from picture carrier to centre frequency in kHz, in RF domain 591 591 * ··· 601 601 */ 602 602 #define DRXJ_PAL_SECAM_DKIL_CARRIER_FREQ_OFFSET ((s32)(2775)) 603 603 604 - /** 604 + /* 605 605 * \def DRXJ_PAL_SECAM_LP_CARRIER_FREQ_OFFSET 606 606 * \brief Offset from picture carrier to centre frequency in kHz, in RF domain 607 607 * ··· 616 616 */ 617 617 #define DRXJ_PAL_SECAM_LP_CARRIER_FREQ_OFFSET ((s32)(-3255)) 618 618 619 - /** 619 + /* 620 620 * \def DRXJ_FM_CARRIER_FREQ_OFFSET 621 621 * \brief Offset from sound carrier to centre frequency in kHz, in RF domain 622 622 *
+11 -2
drivers/media/dvb-frontends/drxk.h
··· 20 20 * @antenna_dvbt: GPIO bit for changing antenna to DVB-C. A value of 1 21 21 * means that 1=DVBC, 0 = DVBT. Zero means the opposite. 22 22 * @mpeg_out_clk_strength: DRXK Mpeg output clock drive strength. 23 + * @chunk_size: maximum size for I2C messages 23 24 * @microcode_name: Name of the firmware file with the microcode 24 25 * @qam_demod_parameter_count: The number of parameters used for the command 25 26 * to set the demodulator parameters. All 26 27 * firmwares are using the 2-parameter commmand. 27 - * An exception is the "drxk_a3.mc" firmware, 28 + * An exception is the ``drxk_a3.mc`` firmware, 28 29 * which uses the 4-parameter command. 29 30 * A value of 0 (default) or lower indicates that 30 31 * the correct number of parameters will be 31 32 * automatically detected. 32 33 * 33 - * On the *_gpio vars, bit 0 is UIO-1, bit 1 is UIO-2 and bit 2 is 34 + * On the ``*_gpio`` vars, bit 0 is UIO-1, bit 1 is UIO-2 and bit 2 is 34 35 * UIO-3. 35 36 */ 36 37 struct drxk_config { ··· 53 52 }; 54 53 55 54 #if IS_REACHABLE(CONFIG_DVB_DRXK) 55 + /** 56 + * Attach a drxk demod 57 + * 58 + * @config: pointer to &struct drxk_config with demod configuration. 59 + * @i2c: i2c adapter to use. 60 + * 61 + * return: FE pointer on success, NULL on failure. 62 + */ 56 63 extern struct dvb_frontend *drxk_attach(const struct drxk_config *config, 57 64 struct i2c_adapter *i2c); 58 65 #else
+16 -16
drivers/media/dvb-frontends/drxk_hard.c
··· 207 207 return (100L * intlog10(value)) >> 24; 208 208 } 209 209 210 - /****************************************************************************/ 210 + /***************************************************************************/ 211 211 /* I2C **********************************************************************/ 212 - /****************************************************************************/ 212 + /***************************************************************************/ 213 213 214 214 static int drxk_i2c_lock(struct drxk_state *state) 215 215 { ··· 3444 3444 3445 3445 /*============================================================================*/ 3446 3446 3447 - /** 3447 + /* 3448 3448 * \brief Activate DVBT specific presets 3449 3449 * \param demod instance of demodulator. 3450 3450 * \return DRXStatus_t. ··· 3484 3484 3485 3485 /*============================================================================*/ 3486 3486 3487 - /** 3487 + /* 3488 3488 * \brief Initialize channelswitch-independent settings for DVBT. 3489 3489 * \param demod instance of demodulator. 3490 3490 * \return DRXStatus_t. ··· 3696 3696 } 3697 3697 3698 3698 /*============================================================================*/ 3699 - /** 3699 + /* 3700 3700 * \brief start dvbt demodulating for channel. 3701 3701 * \param demod instance of demodulator. 3702 3702 * \return DRXStatus_t. ··· 3732 3732 3733 3733 /*============================================================================*/ 3734 3734 3735 - /** 3735 + /* 3736 3736 * \brief Set up dvbt demodulator for channel. 3737 3737 * \param demod instance of demodulator. 3738 3738 * \return DRXStatus_t. ··· 4086 4086 4087 4087 /*============================================================================*/ 4088 4088 4089 - /** 4089 + /* 4090 4090 * \brief Retrieve lock status . 4091 4091 * \param demod Pointer to demodulator instance. 4092 4092 * \param lockStat Pointer to lock status structure. ··· 4148 4148 } 4149 4149 4150 4150 4151 - /** Power Down QAM */ 4151 + /* Power Down QAM */ 4152 4152 static int power_down_qam(struct drxk_state *state) 4153 4153 { 4154 4154 u16 data = 0; ··· 4186 4186 4187 4187 /*============================================================================*/ 4188 4188 4189 - /** 4189 + /* 4190 4190 * \brief Setup of the QAM Measurement intervals for signal quality 4191 4191 * \param demod instance of demod. 4192 4192 * \param modulation current modulation. ··· 4461 4461 4462 4462 /*============================================================================*/ 4463 4463 4464 - /** 4464 + /* 4465 4465 * \brief QAM32 specific setup 4466 4466 * \param demod instance of demod. 4467 4467 * \return DRXStatus_t. ··· 4657 4657 4658 4658 /*============================================================================*/ 4659 4659 4660 - /** 4660 + /* 4661 4661 * \brief QAM64 specific setup 4662 4662 * \param demod instance of demod. 4663 4663 * \return DRXStatus_t. ··· 4852 4852 4853 4853 /*============================================================================*/ 4854 4854 4855 - /** 4855 + /* 4856 4856 * \brief QAM128 specific setup 4857 4857 * \param demod: instance of demod. 4858 4858 * \return DRXStatus_t. ··· 5049 5049 5050 5050 /*============================================================================*/ 5051 5051 5052 - /** 5052 + /* 5053 5053 * \brief QAM256 specific setup 5054 5054 * \param demod: instance of demod. 5055 5055 * \return DRXStatus_t. ··· 5244 5244 5245 5245 5246 5246 /*============================================================================*/ 5247 - /** 5247 + /* 5248 5248 * \brief Reset QAM block. 5249 5249 * \param demod: instance of demod. 5250 5250 * \param channel: pointer to channel data. ··· 5272 5272 5273 5273 /*============================================================================*/ 5274 5274 5275 - /** 5275 + /* 5276 5276 * \brief Set QAM symbolrate. 5277 5277 * \param demod: instance of demod. 5278 5278 * \param channel: pointer to channel data. ··· 5341 5341 5342 5342 /*============================================================================*/ 5343 5343 5344 - /** 5344 + /* 5345 5345 * \brief Get QAM lock status. 5346 5346 * \param demod: instance of demod. 5347 5347 * \param channel: pointer to channel data.
+7 -6
drivers/media/dvb-frontends/dvb-pll.h
··· 30 30 #define DVB_PLL_TDEE4 18 31 31 #define DVB_PLL_THOMSON_DTT7520X 19 32 32 33 + #if IS_REACHABLE(CONFIG_DVB_PLL) 33 34 /** 34 35 * Attach a dvb-pll to the supplied frontend structure. 35 36 * 36 - * @param fe Frontend to attach to. 37 - * @param pll_addr i2c address of the PLL (if used). 38 - * @param i2c i2c adapter to use (set to NULL if not used). 39 - * @param pll_desc_id dvb_pll_desc to use. 40 - * @return Frontend pointer on success, NULL on failure 37 + * @fe: Frontend to attach to. 38 + * @pll_addr: i2c address of the PLL (if used). 39 + * @i2c: i2c adapter to use (set to NULL if not used). 40 + * @pll_desc_id: dvb_pll_desc to use. 41 + * 42 + * return: Frontend pointer on success, NULL on failure 41 43 */ 42 - #if IS_REACHABLE(CONFIG_DVB_PLL) 43 44 extern struct dvb_frontend *dvb_pll_attach(struct dvb_frontend *fe, 44 45 int pll_addr, 45 46 struct i2c_adapter *i2c,
+23 -7
drivers/media/dvb-frontends/helene.h
··· 38 38 * @set_tuner_priv: Callback function private context 39 39 * @set_tuner_callback: Callback function that notifies the parent driver 40 40 * which tuner is active now 41 + * @xtal: Cristal frequency as described by &enum helene_xtal 41 42 */ 42 43 struct helene_config { 43 44 u8 i2c_address; ··· 49 48 }; 50 49 51 50 #if IS_REACHABLE(CONFIG_DVB_HELENE) 51 + /** 52 + * Attach a helene tuner (terrestrial and cable standards) 53 + * 54 + * @fe: frontend to be attached 55 + * @config: pointer to &struct helene_config with tuner configuration. 56 + * @i2c: i2c adapter to use. 57 + * 58 + * return: FE pointer on success, NULL on failure. 59 + */ 52 60 extern struct dvb_frontend *helene_attach(struct dvb_frontend *fe, 61 + const struct helene_config *config, 62 + struct i2c_adapter *i2c); 63 + 64 + /** 65 + * Attach a helene tuner (satellite standards) 66 + * 67 + * @fe: frontend to be attached 68 + * @config: pointer to &struct helene_config with tuner configuration. 69 + * @i2c: i2c adapter to use. 70 + * 71 + * return: FE pointer on success, NULL on failure. 72 + */ 73 + extern struct dvb_frontend *helene_attach_s(struct dvb_frontend *fe, 53 74 const struct helene_config *config, 54 75 struct i2c_adapter *i2c); 55 76 #else ··· 82 59 pr_warn("%s: driver disabled by Kconfig\n", __func__); 83 60 return NULL; 84 61 } 85 - #endif 86 - 87 - #if IS_REACHABLE(CONFIG_DVB_HELENE) 88 - extern struct dvb_frontend *helene_attach_s(struct dvb_frontend *fe, 89 - const struct helene_config *config, 90 - struct i2c_adapter *i2c); 91 - #else 92 62 static inline struct dvb_frontend *helene_attach_s(struct dvb_frontend *fe, 93 63 const struct helene_config *config, 94 64 struct i2c_adapter *i2c)
+9
drivers/media/dvb-frontends/horus3a.h
··· 41 41 }; 42 42 43 43 #if IS_REACHABLE(CONFIG_DVB_HORUS3A) 44 + /** 45 + * Attach a horus3a tuner 46 + * 47 + * @fe: frontend to be attached 48 + * @config: pointer to &struct helene_config with tuner configuration. 49 + * @i2c: i2c adapter to use. 50 + * 51 + * return: FE pointer on success, NULL on failure. 52 + */ 44 53 extern struct dvb_frontend *horus3a_attach(struct dvb_frontend *fe, 45 54 const struct horus3a_config *config, 46 55 struct i2c_adapter *i2c);
+3 -3
drivers/media/dvb-frontends/ix2505v.c
··· 1 - /** 1 + /* 2 2 * Driver for Sharp IX2505V (marked B0017) DVB-S silicon tuner 3 3 * 4 4 * Copyright (C) 2010 Malcolm Priestley ··· 36 36 u32 frequency; 37 37 }; 38 38 39 - /** 39 + /* 40 40 * Data read format of the Sharp IX2505V B0017 41 41 * 42 42 * byte1: 1 | 1 | 0 | 0 | 0 | MA1 | MA0 | 1 ··· 99 99 100 100 } 101 101 102 - /** 102 + /* 103 103 * Data write format of the Sharp IX2505V B0017 104 104 * 105 105 * byte1: 1 | 1 | 0 | 0 | 0 | 0(MA1)| 0(MA0)| 0
+15 -13
drivers/media/dvb-frontends/ix2505v.h
··· 20 20 #include "dvb_frontend.h" 21 21 22 22 /** 23 - * Attach a ix2505v tuner to the supplied frontend structure. 23 + * struct ix2505v_config - ix2505 attachment configuration 24 24 * 25 - * @param fe Frontend to attach to. 26 - * @param config ix2505v_config structure 27 - * @return FE pointer on success, NULL on failure. 25 + * @tuner_address: tuner address 26 + * @tuner_gain: Baseband AMP gain control 0/1=0dB(default) 2=-2bB 3=-4dB 27 + * @tuner_chargepump: Charge pump output +/- 0=120 1=260 2=555 3=1200(default) 28 + * @min_delay_ms: delay after tune 29 + * @tuner_write_only: disables reads 28 30 */ 29 - 30 31 struct ix2505v_config { 31 32 u8 tuner_address; 32 - 33 - /*Baseband AMP gain control 0/1=0dB(default) 2=-2bB 3=-4dB */ 34 33 u8 tuner_gain; 35 - 36 - /*Charge pump output +/- 0=120 1=260 2=555 3=1200(default) */ 37 34 u8 tuner_chargepump; 38 - 39 - /* delay after tune */ 40 35 int min_delay_ms; 41 - 42 - /* disables reads*/ 43 36 u8 tuner_write_only; 44 37 45 38 }; 46 39 47 40 #if IS_REACHABLE(CONFIG_DVB_IX2505V) 41 + /** 42 + * Attach a ix2505v tuner to the supplied frontend structure. 43 + * 44 + * @fe: Frontend to attach to. 45 + * @config: pointer to &struct ix2505v_config 46 + * @i2c: pointer to &struct i2c_adapter. 47 + * 48 + * return: FE pointer on success, NULL on failure. 49 + */ 48 50 extern struct dvb_frontend *ix2505v_attach(struct dvb_frontend *fe, 49 51 const struct ix2505v_config *config, struct i2c_adapter *i2c); 50 52 #else
+1 -1
drivers/media/dvb-frontends/l64781.c
··· 517 517 state->i2c = i2c; 518 518 state->first = 1; 519 519 520 - /** 520 + /* 521 521 * the L64781 won't show up before we send the reset_and_configure() 522 522 * broadcast. If nothing responds there is no L64781 on the bus... 523 523 */
+65 -90
drivers/media/dvb-frontends/m88ds3103.h
··· 25 25 */ 26 26 27 27 /** 28 + * enum m88ds3103_ts_mode - TS connection mode 29 + * @M88DS3103_TS_SERIAL: TS output pin D0, normal 30 + * @M88DS3103_TS_SERIAL_D7: TS output pin D7 31 + * @M88DS3103_TS_PARALLEL: TS Parallel mode 32 + * @M88DS3103_TS_CI: TS CI Mode 33 + */ 34 + enum m88ds3103_ts_mode { 35 + M88DS3103_TS_SERIAL, 36 + M88DS3103_TS_SERIAL_D7, 37 + M88DS3103_TS_PARALLEL, 38 + M88DS3103_TS_CI 39 + }; 40 + 41 + /** 42 + * enum m88ds3103_clock_out 43 + * @M88DS3103_CLOCK_OUT_DISABLED: Clock output is disabled 44 + * @M88DS3103_CLOCK_OUT_ENABLED: Clock output is enabled with crystal 45 + * clock. 46 + * @M88DS3103_CLOCK_OUT_ENABLED_DIV2: Clock output is enabled with half 47 + * crystal clock. 48 + */ 49 + enum m88ds3103_clock_out { 50 + M88DS3103_CLOCK_OUT_DISABLED, 51 + M88DS3103_CLOCK_OUT_ENABLED, 52 + M88DS3103_CLOCK_OUT_ENABLED_DIV2 53 + }; 54 + 55 + /** 28 56 * struct m88ds3103_platform_data - Platform data for the m88ds3103 driver 29 57 * @clk: Clock frequency. 30 58 * @i2c_wr_max: Max bytes I2C adapter can write at once. ··· 72 44 * @get_dvb_frontend: Get DVB frontend. 73 45 * @get_i2c_adapter: Get I2C adapter. 74 46 */ 75 - 76 47 struct m88ds3103_platform_data { 77 48 u32 clk; 78 49 u16 i2c_wr_max; 79 - #define M88DS3103_TS_SERIAL 0 /* TS output pin D0, normal */ 80 - #define M88DS3103_TS_SERIAL_D7 1 /* TS output pin D7 */ 81 - #define M88DS3103_TS_PARALLEL 2 /* TS Parallel mode */ 82 - #define M88DS3103_TS_CI 3 /* TS CI Mode */ 83 - u8 ts_mode:2; 50 + enum m88ds3103_ts_mode ts_mode; 84 51 u32 ts_clk; 52 + enum m88ds3103_clock_out clk_out; 85 53 u8 ts_clk_pol:1; 86 54 u8 spec_inv:1; 87 55 u8 agc; 88 56 u8 agc_inv:1; 89 - #define M88DS3103_CLOCK_OUT_DISABLED 0 90 - #define M88DS3103_CLOCK_OUT_ENABLED 1 91 - #define M88DS3103_CLOCK_OUT_ENABLED_DIV2 2 92 - u8 clk_out:2; 93 57 u8 envelope_mode:1; 94 58 u8 lnb_hv_pol:1; 95 59 u8 lnb_en_pol:1; ··· 93 73 u8 attach_in_use:1; 94 74 }; 95 75 96 - /* 97 - * Do not add new m88ds3103_attach() users! Use I2C bindings instead. 76 + /** 77 + * struct m88ds3103_config - m88ds3102 configuration 78 + * 79 + * @i2c_addr: I2C address. Default: none, must set. Example: 0x68, ... 80 + * @clock: Device's clock. Default: none, must set. Example: 27000000 81 + * @i2c_wr_max: Max bytes I2C provider is asked to write at once. 82 + * Default: none, must set. Example: 33, 65, ... 83 + * @ts_mode: TS output mode, as defined by &enum m88ds3103_ts_mode. 84 + * Default: M88DS3103_TS_SERIAL. 85 + * @ts_clk: TS clk in KHz. Default: 0. 86 + * @ts_clk_pol: TS clk polarity.Default: 0. 87 + * 1-active at falling edge; 0-active at rising edge. 88 + * @spec_inv: Spectrum inversion. Default: 0. 89 + * @agc_inv: AGC polarity. Default: 0. 90 + * @clock_out: Clock output, as defined by &enum m88ds3103_clock_out. 91 + * Default: M88DS3103_CLOCK_OUT_DISABLED. 92 + * @envelope_mode: DiSEqC envelope mode. Default: 0. 93 + * @agc: AGC configuration. Default: none, must set. 94 + * @lnb_hv_pol: LNB H/V pin polarity. Default: 0. Values: 95 + * 1: pin high set to VOLTAGE_13, pin low to set VOLTAGE_18; 96 + * 0: pin high set to VOLTAGE_18, pin low to set VOLTAGE_13. 97 + * @lnb_en_pol: LNB enable pin polarity. Default: 0. Values: 98 + * 1: pin high to enable, pin low to disable; 99 + * 0: pin high to disable, pin low to enable. 98 100 */ 99 101 struct m88ds3103_config { 100 - /* 101 - * I2C address 102 - * Default: none, must set 103 - * 0x68, ... 104 - */ 105 102 u8 i2c_addr; 106 - 107 - /* 108 - * clock 109 - * Default: none, must set 110 - * 27000000 111 - */ 112 103 u32 clock; 113 - 114 - /* 115 - * max bytes I2C provider is asked to write at once 116 - * Default: none, must set 117 - * 33, 65, ... 118 - */ 119 104 u16 i2c_wr_max; 120 - 121 - /* 122 - * TS output mode 123 - * Default: M88DS3103_TS_SERIAL 124 - */ 125 - #define M88DS3103_TS_SERIAL 0 /* TS output pin D0, normal */ 126 - #define M88DS3103_TS_SERIAL_D7 1 /* TS output pin D7 */ 127 - #define M88DS3103_TS_PARALLEL 2 /* TS Parallel mode */ 128 - #define M88DS3103_TS_CI 3 /* TS CI Mode */ 129 105 u8 ts_mode; 130 - 131 - /* 132 - * TS clk in KHz 133 - * Default: 0. 134 - */ 135 106 u32 ts_clk; 136 - 137 - /* 138 - * TS clk polarity. 139 - * Default: 0. 1-active at falling edge; 0-active at rising edge. 140 - */ 141 107 u8 ts_clk_pol:1; 142 - 143 - /* 144 - * spectrum inversion 145 - * Default: 0 146 - */ 147 108 u8 spec_inv:1; 148 - 149 - /* 150 - * AGC polarity 151 - * Default: 0 152 - */ 153 109 u8 agc_inv:1; 154 - 155 - /* 156 - * clock output 157 - * Default: M88DS3103_CLOCK_OUT_DISABLED 158 - */ 159 - #define M88DS3103_CLOCK_OUT_DISABLED 0 160 - #define M88DS3103_CLOCK_OUT_ENABLED 1 161 - #define M88DS3103_CLOCK_OUT_ENABLED_DIV2 2 162 110 u8 clock_out; 163 - 164 - /* 165 - * DiSEqC envelope mode 166 - * Default: 0 167 - */ 168 111 u8 envelope_mode:1; 169 - 170 - /* 171 - * AGC configuration 172 - * Default: none, must set 173 - */ 174 112 u8 agc; 175 - 176 - /* 177 - * LNB H/V pin polarity 178 - * Default: 0. 179 - * 1: pin high set to VOLTAGE_13, pin low to set VOLTAGE_18. 180 - * 0: pin high set to VOLTAGE_18, pin low to set VOLTAGE_13. 181 - */ 182 113 u8 lnb_hv_pol:1; 183 - 184 - /* 185 - * LNB enable pin polarity 186 - * Default: 0. 187 - * 1: pin high to enable, pin low to disable. 188 - * 0: pin high to disable, pin low to enable. 189 - */ 190 114 u8 lnb_en_pol:1; 191 115 }; 192 116 193 117 #if defined(CONFIG_DVB_M88DS3103) || \ 194 118 (defined(CONFIG_DVB_M88DS3103_MODULE) && defined(MODULE)) 119 + /** 120 + * Attach a m88ds3103 demod 121 + * 122 + * @config: pointer to &struct m88ds3103_config with demod configuration. 123 + * @i2c: i2c adapter to use. 124 + * @tuner_i2c: on success, returns the I2C adapter associated with 125 + * m88ds3103 tuner. 126 + * 127 + * return: FE pointer on success, NULL on failure. 128 + * Note: Do not add new m88ds3103_attach() users! Use I2C bindings instead. 129 + */ 195 130 extern struct dvb_frontend *m88ds3103_attach( 196 131 const struct m88ds3103_config *config, 197 132 struct i2c_adapter *i2c,
+9 -8
drivers/media/dvb-frontends/mb86a20s.h
··· 26 26 * @demod_address: the demodulator's i2c address 27 27 * @is_serial: if true, TS is serial. Otherwise, TS is parallel 28 28 */ 29 - 30 29 struct mb86a20s_config { 31 30 u32 fclk; 32 31 u8 demod_address; ··· 33 34 }; 34 35 35 36 #if IS_REACHABLE(CONFIG_DVB_MB86A20S) 37 + /** 38 + * Attach a mb86a20s demod 39 + * 40 + * @config: pointer to &struct mb86a20s_config with demod configuration. 41 + * @i2c: i2c adapter to use. 42 + * 43 + * return: FE pointer on success, NULL on failure. 44 + */ 36 45 extern struct dvb_frontend *mb86a20s_attach(const struct mb86a20s_config *config, 37 46 struct i2c_adapter *i2c); 38 - extern struct i2c_adapter *mb86a20s_get_tuner_i2c_adapter(struct dvb_frontend *); 47 + 39 48 #else 40 49 static inline struct dvb_frontend *mb86a20s_attach( 41 50 const struct mb86a20s_config *config, struct i2c_adapter *i2c) 42 - { 43 - printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); 44 - return NULL; 45 - } 46 - static inline struct i2c_adapter * 47 - mb86a20s_get_tuner_i2c_adapter(struct dvb_frontend *fe) 48 51 { 49 52 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); 50 53 return NULL;
+9 -9
drivers/media/dvb-frontends/mn88472.h
··· 19 19 20 20 #include <linux/dvb/frontend.h> 21 21 22 - /** 23 - * struct mn88472_config - Platform data for the mn88472 driver 24 - * @xtal: Clock frequency. 25 - * @ts_mode: TS mode. 26 - * @ts_clock: TS clock config. 27 - * @i2c_wr_max: Max number of bytes driver writes to I2C at once. 28 - * @get_dvb_frontend: Get DVB frontend. 29 - */ 30 - 31 22 /* Define old names for backward compatibility */ 32 23 #define VARIABLE_TS_CLOCK MN88472_TS_CLK_VARIABLE 33 24 #define FIXED_TS_CLOCK MN88472_TS_CLK_FIXED 34 25 #define SERIAL_TS_MODE MN88472_TS_MODE_SERIAL 35 26 #define PARALLEL_TS_MODE MN88472_TS_MODE_PARALLEL 36 27 28 + /** 29 + * struct mn88472_config - Platform data for the mn88472 driver 30 + * @xtal: Clock frequency. 31 + * @ts_mode: TS mode. 32 + * @ts_clock: TS clock config. 33 + * @i2c_wr_max: Max number of bytes driver writes to I2C at once. 34 + * @fe: pointer to a frontend pointer 35 + * @get_dvb_frontend: Get DVB frontend callback. 36 + */ 37 37 struct mn88472_config { 38 38 unsigned int xtal; 39 39
-1
drivers/media/dvb-frontends/rtl2830.h
··· 32 32 * @pid_filter: Set PID to PID filter. 33 33 * @pid_filter_ctrl: Control PID filter. 34 34 */ 35 - 36 35 struct rtl2830_platform_data { 37 36 u32 clk; 38 37 bool spec_inv;
-1
drivers/media/dvb-frontends/rtl2832.h
··· 35 35 * @pid_filter: Set PID to PID filter. 36 36 * @pid_filter_ctrl: Control PID filter. 37 37 */ 38 - 39 38 struct rtl2832_platform_data { 40 39 u32 clk; 41 40 /*
+1 -5
drivers/media/dvb-frontends/rtl2832_sdr.h
··· 33 33 * struct rtl2832_sdr_platform_data - Platform data for the rtl2832_sdr driver 34 34 * @clk: Clock frequency (4000000, 16000000, 25000000, 28800000). 35 35 * @tuner: Used tuner model. 36 - * @i2c_client: rtl2832 demod driver I2C client. 37 - * @bulk_read: rtl2832 driver private I/O interface. 38 - * @bulk_write: rtl2832 driver private I/O interface. 39 - * @update_bits: rtl2832 driver private I/O interface. 36 + * @regmap: pointer to &struct regmap. 40 37 * @dvb_frontend: rtl2832 DVB frontend. 41 38 * @v4l2_subdev: Tuner v4l2 controls. 42 39 * @dvb_usb_device: DVB USB interface for USB streaming. 43 40 */ 44 - 45 41 struct rtl2832_sdr_platform_data { 46 42 u32 clk; 47 43 /*
+3 -3
drivers/media/dvb-frontends/sp887x.c
··· 57 57 int ret; 58 58 59 59 if ((ret = i2c_transfer(state->i2c, &msg, 1)) != 1) { 60 - /** 60 + /* 61 61 * in case of soft reset we ignore ACK errors... 62 62 */ 63 63 if (!(reg == 0xf1a && data == 0x000 && ··· 130 130 131 131 #define BLOCKSIZE 30 132 132 #define FW_SIZE 0x4000 133 - /** 133 + /* 134 134 * load firmware and setup MPEG interface... 135 135 */ 136 136 static int sp887x_initial_setup (struct dvb_frontend* fe, const struct firmware *fw) ··· 279 279 return 0; 280 280 } 281 281 282 - /** 282 + /* 283 283 * estimates division of two 24bit numbers, 284 284 * derived from the ves1820/stv0299 driver code 285 285 */
+6 -5
drivers/media/dvb-frontends/stb6000.h
··· 26 26 #include <linux/i2c.h> 27 27 #include "dvb_frontend.h" 28 28 29 + #if IS_REACHABLE(CONFIG_DVB_STB6000) 29 30 /** 30 31 * Attach a stb6000 tuner to the supplied frontend structure. 31 32 * 32 - * @param fe Frontend to attach to. 33 - * @param addr i2c address of the tuner. 34 - * @param i2c i2c adapter to use. 35 - * @return FE pointer on success, NULL on failure. 33 + * @fe: Frontend to attach to. 34 + * @addr: i2c address of the tuner. 35 + * @i2c: i2c adapter to use. 36 + * 37 + * return: FE pointer on success, NULL on failure. 36 38 */ 37 - #if IS_REACHABLE(CONFIG_DVB_STB6000) 38 39 extern struct dvb_frontend *stb6000_attach(struct dvb_frontend *fe, int addr, 39 40 struct i2c_adapter *i2c); 40 41 #else
+1 -1
drivers/media/dvb-frontends/stv0299.c
··· 368 368 reg0x08 = stv0299_readreg (state, 0x08); 369 369 reg0x0c = stv0299_readreg (state, 0x0c); 370 370 371 - /** 371 + /* 372 372 * H/V switching over OP0, OP1 and OP2 are LNB power enable bits 373 373 */ 374 374 reg0x0c &= 0x0f;
-1
drivers/media/dvb-frontends/tda10071.h
··· 38 38 * @tuner_i2c_addr: CX24118A tuner I2C address (0x14, 0x54, ...). 39 39 * @get_dvb_frontend: Get DVB frontend. 40 40 */ 41 - 42 41 struct tda10071_platform_data { 43 42 u32 clk; 44 43 u16 i2c_wr_max;
+6 -5
drivers/media/dvb-frontends/tda826x.h
··· 29 29 /** 30 30 * Attach a tda826x tuner to the supplied frontend structure. 31 31 * 32 - * @param fe Frontend to attach to. 33 - * @param addr i2c address of the tuner. 34 - * @param i2c i2c adapter to use. 35 - * @param has_loopthrough Set to 1 if the card has a loopthrough RF connector. 36 - * @return FE pointer on success, NULL on failure. 32 + * @fe: Frontend to attach to. 33 + * @addr: i2c address of the tuner. 34 + * @i2c: i2c adapter to use. 35 + * @has_loopthrough: Set to 1 if the card has a loopthrough RF connector. 36 + * 37 + * return: FE pointer on success, NULL on failure. 37 38 */ 38 39 #if IS_REACHABLE(CONFIG_DVB_TDA826X) 39 40 extern struct dvb_frontend* tda826x_attach(struct dvb_frontend *fe, int addr,
+1 -1
drivers/media/dvb-frontends/tua6100.c
··· 1 - /** 1 + /* 2 2 * Driver for Infineon tua6100 pll. 3 3 * 4 4 * (c) 2006 Andrew de Quincey
+1 -1
drivers/media/dvb-frontends/tua6100.h
··· 1 - /** 1 + /* 2 2 * Driver for Infineon tua6100 PLL. 3 3 * 4 4 * (c) 2006 Andrew de Quincey
+8 -5
drivers/media/dvb-frontends/zd1301_demod.h
··· 27 27 * @reg_read: Register read callback. 28 28 * @reg_write: Register write callback. 29 29 */ 30 - 31 30 struct zd1301_demod_platform_data { 32 31 void *reg_priv; 33 32 int (*reg_read)(void *, u16, u8 *); ··· 40 41 * 41 42 * Return: Pointer to DVB frontend which given platform device owns. 42 43 */ 43 - 44 - struct dvb_frontend *zd1301_demod_get_dvb_frontend(struct platform_device *); 44 + struct dvb_frontend *zd1301_demod_get_dvb_frontend(struct platform_device *pdev); 45 45 46 46 /** 47 47 * zd1301_demod_get_i2c_adapter() - Get pointer to I2C adapter ··· 48 50 * 49 51 * Return: Pointer to I2C adapter which given platform device owns. 50 52 */ 51 - 52 - struct i2c_adapter *zd1301_demod_get_i2c_adapter(struct platform_device *); 53 + struct i2c_adapter *zd1301_demod_get_i2c_adapter(struct platform_device *pdev); 53 54 54 55 #else 55 56 57 + /** 58 + * zd1301_demod_get_dvb_frontend() - Attach a zd1301 frontend 59 + * @dev: Pointer to platform device 60 + * 61 + * Return: Pointer to %struct dvb_frontend or NULL if attach fails. 62 + */ 56 63 static inline struct dvb_frontend *zd1301_demod_get_dvb_frontend(struct platform_device *dev) 57 64 { 58 65 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+4 -4
drivers/media/dvb-frontends/zl10036.c
··· 1 - /** 1 + /* 2 2 * Driver for Zarlink zl10036 DVB-S silicon tuner 3 3 * 4 4 * Copyright (C) 2006 Tino Reichardt ··· 157 157 return ret; 158 158 } 159 159 160 - /** 160 + /* 161 161 * register map of the ZL10036/ZL10038 162 162 * 163 163 * reg[default] content ··· 219 219 if (fbw <= 28820) { 220 220 br = _BR_MAXIMUM; 221 221 } else { 222 - /** 222 + /* 223 223 * f(bw)=34,6MHz f(xtal)=10.111MHz 224 224 * br = (10111/34600) * 63 * 1/K = 14; 225 225 */ ··· 315 315 || (frequency > fe->ops.info.frequency_max)) 316 316 return -EINVAL; 317 317 318 - /** 318 + /* 319 319 * alpha = 1.35 for dvb-s 320 320 * fBW = (alpha*symbolrate)/(2*0.8) 321 321 * 1.35 / (2*0.8) = 27 / 32
+8 -8
drivers/media/dvb-frontends/zl10036.h
··· 20 20 #include <linux/i2c.h> 21 21 #include "dvb_frontend.h" 22 22 23 - /** 24 - * Attach a zl10036 tuner to the supplied frontend structure. 25 - * 26 - * @param fe Frontend to attach to. 27 - * @param config zl10036_config structure 28 - * @return FE pointer on success, NULL on failure. 29 - */ 30 - 31 23 struct zl10036_config { 32 24 u8 tuner_address; 33 25 int rf_loop_enable; 34 26 }; 35 27 36 28 #if IS_REACHABLE(CONFIG_DVB_ZL10036) 29 + /** 30 + * Attach a zl10036 tuner to the supplied frontend structure. 31 + * 32 + * @fe: Frontend to attach to. 33 + * @config: zl10036_config structure. 34 + * @i2c: pointer to struct i2c_adapter. 35 + * return: FE pointer on success, NULL on failure. 36 + */ 37 37 extern struct dvb_frontend *zl10036_attach(struct dvb_frontend *fe, 38 38 const struct zl10036_config *config, struct i2c_adapter *i2c); 39 39 #else
+1
drivers/media/i2c/Kconfig
··· 676 676 tristate "OmniVision OV13858 sensor support" 677 677 depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API 678 678 depends on MEDIA_CAMERA_SUPPORT 679 + select V4L2_FWNODE 679 680 ---help--- 680 681 This is a Video4Linux2 sensor-level driver for the OmniVision 681 682 OV13858 camera.
+1
drivers/media/i2c/et8ek8/Kconfig
··· 1 1 config VIDEO_ET8EK8 2 2 tristate "ET8EK8 camera sensor support" 3 3 depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API 4 + select V4L2_FWNODE 4 5 ---help--- 5 6 This is a driver for the Toshiba ET8EK8 5 MP camera sensor. 6 7 It is used for example in Nokia N900 (RX-51).
+2 -3
drivers/media/i2c/imx274.c
··· 1770 1770 return 0; 1771 1771 1772 1772 err_ctrls: 1773 - v4l2_async_unregister_subdev(sd); 1774 - v4l2_ctrl_handler_free(sd->ctrl_handler); 1773 + v4l2_ctrl_handler_free(&imx274->ctrls.handler); 1775 1774 err_me: 1776 1775 media_entity_cleanup(&sd->entity); 1777 1776 err_regmap: ··· 1787 1788 imx274_write_table(imx274, mode_table[IMX274_MODE_STOP_STREAM]); 1788 1789 1789 1790 v4l2_async_unregister_subdev(sd); 1790 - v4l2_ctrl_handler_free(sd->ctrl_handler); 1791 + v4l2_ctrl_handler_free(&imx274->ctrls.handler); 1791 1792 media_entity_cleanup(&sd->entity); 1792 1793 mutex_destroy(&imx274->lock); 1793 1794 return 0;
+1
drivers/media/i2c/lm3560.c
··· 50 50 /** 51 51 * struct lm3560_flash 52 52 * 53 + * @dev: pointer to &struct device 53 54 * @pdata: platform data 54 55 * @regmap: reg. map for i2c 55 56 * @lock: muxtex for serial access.
+5
drivers/media/i2c/m5mols/m5mols_capture.c
··· 33 33 34 34 /** 35 35 * m5mols_read_rational - I2C read of a rational number 36 + * @sd: sub-device, as pointed by struct v4l2_subdev 37 + * @addr_num: numerator register 38 + * @addr_den: denominator register 39 + * @val: place to store the division result 36 40 * 37 41 * Read numerator and denominator from registers @addr_num and @addr_den 38 42 * respectively and return the division result in @val. ··· 57 53 58 54 /** 59 55 * m5mols_capture_info - Gather captured image information 56 + * @info: M-5MOLS driver data structure 60 57 * 61 58 * For now it gathers only EXIF information and file size. 62 59 */
+1
drivers/media/i2c/m5mols/m5mols_controls.c
··· 126 126 127 127 /** 128 128 * m5mols_do_scenemode() - Change current scenemode 129 + * @info: M-5MOLS driver data structure 129 130 * @mode: Desired mode of the scenemode 130 131 * 131 132 * WARNING: The execution order is important. Do not change the order.
+18 -2
drivers/media/i2c/m5mols/m5mols_core.c
··· 114 114 115 115 /** 116 116 * m5mols_swap_byte - an byte array to integer conversion function 117 - * @size: size in bytes of I2C packet defined in the M-5MOLS datasheet 117 + * @data: byte array 118 + * @length: size in bytes of I2C packet defined in the M-5MOLS datasheet 118 119 * 119 120 * Convert I2C data byte array with performing any required byte 120 121 * reordering to assure proper values for each data type, regardless ··· 133 132 134 133 /** 135 134 * m5mols_read - I2C read function 136 - * @reg: combination of size, category and command for the I2C packet 135 + * @sd: sub-device, as pointed by struct v4l2_subdev 137 136 * @size: desired size of I2C packet 137 + * @reg: combination of size, category and command for the I2C packet 138 138 * @val: read value 139 139 * 140 140 * Returns 0 on success, or else negative errno. ··· 234 232 235 233 /** 236 234 * m5mols_write - I2C command write function 235 + * @sd: sub-device, as pointed by struct v4l2_subdev 237 236 * @reg: combination of size, category and command for the I2C packet 238 237 * @val: value to write 239 238 * ··· 287 284 288 285 /** 289 286 * m5mols_busy_wait - Busy waiting with I2C register polling 287 + * @sd: sub-device, as pointed by struct v4l2_subdev 290 288 * @reg: the I2C_REG() address of an 8-bit status register to check 291 289 * @value: expected status register value 292 290 * @mask: bit mask for the read status register value ··· 320 316 321 317 /** 322 318 * m5mols_enable_interrupt - Clear interrupt pending bits and unmask interrupts 319 + * @sd: sub-device, as pointed by struct v4l2_subdev 320 + * @reg: combination of size, category and command for the I2C packet 323 321 * 324 322 * Before writing desired interrupt value the INT_FACTOR register should 325 323 * be read to clear pending interrupts. ··· 355 349 356 350 /** 357 351 * m5mols_reg_mode - Write the mode and check busy status 352 + * @sd: sub-device, as pointed by struct v4l2_subdev 353 + * @mode: the required operation mode 358 354 * 359 355 * It always accompanies a little delay changing the M-5MOLS mode, so it is 360 356 * needed checking current busy status to guarantee right mode. ··· 372 364 373 365 /** 374 366 * m5mols_set_mode - set the M-5MOLS controller mode 367 + * @info: M-5MOLS driver data structure 375 368 * @mode: the required operation mode 376 369 * 377 370 * The commands of M-5MOLS are grouped into specific modes. Each functionality ··· 430 421 431 422 /** 432 423 * m5mols_get_version - retrieve full revisions information of M-5MOLS 424 + * @sd: sub-device, as pointed by struct v4l2_subdev 433 425 * 434 426 * The version information includes revisions of hardware and firmware, 435 427 * AutoFocus alghorithm version and the version string. ··· 499 489 500 490 /** 501 491 * __find_resolution - Lookup preset and type of M-5MOLS's resolution 492 + * @sd: sub-device, as pointed by struct v4l2_subdev 502 493 * @mf: pixel format to find/negotiate the resolution preset for 503 494 * @type: M-5MOLS resolution type 504 495 * @resolution: M-5MOLS resolution preset register value ··· 673 662 674 663 /** 675 664 * m5mols_restore_controls - Apply current control values to the registers 665 + * @info: M-5MOLS driver data structure 676 666 * 677 667 * m5mols_do_scenemode() handles all parameters for which there is yet no 678 668 * individual control. It should be replaced at some point by setting each ··· 698 686 699 687 /** 700 688 * m5mols_start_monitor - Start the monitor mode 689 + * @info: M-5MOLS driver data structure 701 690 * 702 691 * Before applying the controls setup the resolution and frame rate 703 692 * in PARAMETER mode, and then switch over to MONITOR mode. ··· 802 789 803 790 /** 804 791 * m5mols_fw_start - M-5MOLS internal ARM controller initialization 792 + * @sd: sub-device, as pointed by struct v4l2_subdev 805 793 * 806 794 * Execute the M-5MOLS internal ARM controller initialization sequence. 807 795 * This function should be called after the supply voltage has been ··· 858 844 859 845 /** 860 846 * m5mols_s_power - Main sensor power control function 847 + * @sd: sub-device, as pointed by struct v4l2_subdev 848 + * @on: if true, powers on the device; powers off otherwise. 861 849 * 862 850 * To prevent breaking the lens when the sensor is powered off the Soft-Landing 863 851 * algorithm is called where available. The Soft-Landing algorithm availability
+2 -2
drivers/media/i2c/ov5647.c
··· 428 428 } 429 429 #endif 430 430 431 - /** 432 - * @short Subdev core operations registration 431 + /* 432 + * Subdev core operations registration 433 433 */ 434 434 static const struct v4l2_subdev_core_ops ov5647_subdev_core_ops = { 435 435 .s_power = ov5647_sensor_power,
+3
drivers/media/i2c/s5k6a3.c
··· 53 53 * @gpio_reset: GPIO connected to the sensor's reset pin 54 54 * @lock: mutex protecting the structure's members below 55 55 * @format: media bus format at the sensor's source pad 56 + * @clock: pointer to &struct clk. 57 + * @clock_frequency: clock frequency 58 + * @power_count: stores state if device is powered 56 59 */ 57 60 struct s5k6a3 { 58 61 struct device *dev;
+5
drivers/media/i2c/s5k6aa.c
··· 421 421 422 422 /** 423 423 * s5k6aa_configure_pixel_clock - apply ISP main clock/PLL configuration 424 + * @s5k6aa: pointer to &struct s5k6aa describing the device 424 425 * 425 426 * Configure the internal ISP PLL for the required output frequency. 426 427 * Locking: called with s5k6aa.lock mutex held. ··· 670 669 671 670 /** 672 671 * s5k6aa_configure_video_bus - configure the video output interface 672 + * @s5k6aa: pointer to &struct s5k6aa describing the device 673 673 * @bus_type: video bus type: parallel or MIPI-CSI 674 674 * @nlanes: number of MIPI lanes to be used (MIPI-CSI only) 675 675 * ··· 726 724 727 725 /** 728 726 * s5k6aa_set_prev_config - write user preview register set 727 + * @s5k6aa: pointer to &struct s5k6aa describing the device 728 + * @preset: s5kaa preset to be applied 729 729 * 730 730 * Configure output resolution and color fromat, pixel clock 731 731 * frequency range, device frame rate type and frame period range. ··· 781 777 782 778 /** 783 779 * s5k6aa_initialize_isp - basic ISP MCU initialization 780 + * @sd: pointer to V4L2 sub-device descriptor 784 781 * 785 782 * Configure AHB addresses for registers read/write; configure PLLs for 786 783 * required output pixel clock. The ISP power supply needs to be already
+8 -4
drivers/media/i2c/tvp514x.c
··· 86 86 /** 87 87 * struct tvp514x_decoder - TVP5146/47 decoder object 88 88 * @sd: Subdevice Slave handle 89 + * @hdl: embedded &struct v4l2_ctrl_handler 89 90 * @tvp514x_regs: copy of hw's regs with preset values. 90 91 * @pdata: Board specific 91 92 * @ver: Chip version ··· 99 98 * @std_list: Standards list 100 99 * @input: Input routing at chip level 101 100 * @output: Output routing at chip level 101 + * @pad: subdev media pad associated with the decoder 102 + * @format: media bus frame format 103 + * @int_seq: driver's register init sequence 102 104 */ 103 105 struct tvp514x_decoder { 104 106 struct v4l2_subdev sd; ··· 215 211 {TOK_TERM, 0, 0}, 216 212 }; 217 213 218 - /** 214 + /* 219 215 * List of image formats supported by TVP5146/47 decoder 220 216 * Currently we are using 8 bit mode only, but can be 221 217 * extended to 10/20 bit mode. ··· 230 226 }, 231 227 }; 232 228 233 - /** 229 + /* 234 230 * Supported standards - 235 231 * 236 232 * Currently supports two standards only, need to add support for rest of the ··· 935 931 * tvp514x_set_pad_format() - V4L2 decoder interface handler for set pad format 936 932 * @sd: pointer to standard V4L2 sub-device structure 937 933 * @cfg: pad configuration 938 - * @format: pointer to v4l2_subdev_format structure 934 + * @fmt: pointer to v4l2_subdev_format structure 939 935 * 940 936 * Set pad format for the output pad 941 937 */ ··· 1203 1199 {TOK_TERM, 0, 0}, 1204 1200 }; 1205 1201 1206 - /** 1202 + /* 1207 1203 * I2C Device Table - 1208 1204 * 1209 1205 * name - Name of the actual device/chip.
+4 -4
drivers/media/pci/netup_unidvb/netup_unidvb_core.c
··· 82 82 * @start_addr_lo: DMA ring buffer start address, lower part 83 83 * @start_addr_hi: DMA ring buffer start address, higher part 84 84 * @size: DMA ring buffer size register 85 - Bits [0-7]: DMA packet size, 188 bytes 86 - Bits [16-23]: packets count in block, 128 packets 87 - Bits [24-31]: blocks count, 8 blocks 85 + * * Bits [0-7]: DMA packet size, 188 bytes 86 + * * Bits [16-23]: packets count in block, 128 packets 87 + * * Bits [24-31]: blocks count, 8 blocks 88 88 * @timeout: DMA timeout in units of 8ns 89 - For example, value of 375000000 equals to 3 sec 89 + * For example, value of 375000000 equals to 3 sec 90 90 * @curr_addr_lo: Current ring buffer head address, lower part 91 91 * @curr_addr_hi: Current ring buffer head address, higher part 92 92 * @stat_pkt_received: Statistic register, not tested
+1 -1
drivers/media/pci/solo6x10/solo6x10-enc.c
··· 175 175 return 0; 176 176 } 177 177 178 - /** 178 + /* 179 179 * Set channel Quality Profile (0-3). 180 180 */ 181 181 void solo_s_jpeg_qp(struct solo_dev *solo_dev, unsigned int ch,
+11
drivers/media/pci/sta2x11/sta2x11_vip.c
··· 404 404 * vidioc_querycap - return capabilities of device 405 405 * @file: descriptor of device 406 406 * @cap: contains return values 407 + * @priv: unused 407 408 * 408 409 * the capabilities of the device are returned 409 410 * ··· 430 429 * vidioc_s_std - set video standard 431 430 * @file: descriptor of device 432 431 * @std: contains standard to be set 432 + * @priv: unused 433 433 * 434 434 * the video standard is set 435 435 * ··· 468 466 /** 469 467 * vidioc_g_std - get video standard 470 468 * @file: descriptor of device 469 + * @priv: unused 471 470 * @std: contains return values 472 471 * 473 472 * the current video standard is returned ··· 486 483 /** 487 484 * vidioc_querystd - get possible video standards 488 485 * @file: descriptor of device 486 + * @priv: unused 489 487 * @std: contains return values 490 488 * 491 489 * all possible video standards are returned ··· 516 512 /** 517 513 * vidioc_s_input - set input line 518 514 * @file: descriptor of device 515 + * @priv: unused 519 516 * @i: new input line number 520 517 * 521 518 * the current active input line is set ··· 543 538 /** 544 539 * vidioc_g_input - return input line 545 540 * @file: descriptor of device 541 + * @priv: unused 546 542 * @i: returned input line number 547 543 * 548 544 * the current active input line is returned ··· 560 554 561 555 /** 562 556 * vidioc_enum_fmt_vid_cap - return video capture format 557 + * @file: descriptor of device 558 + * @priv: unused 563 559 * @f: returned format information 564 560 * 565 561 * returns name and format of video capture ··· 585 577 /** 586 578 * vidioc_try_fmt_vid_cap - set video capture format 587 579 * @file: descriptor of device 580 + * @priv: unused 588 581 * @f: new format 589 582 * 590 583 * new video format is set which includes width and ··· 648 639 /** 649 640 * vidioc_s_fmt_vid_cap - set current video format parameters 650 641 * @file: descriptor of device 642 + * @priv: unused 651 643 * @f: returned format information 652 644 * 653 645 * set new capture format ··· 716 706 /** 717 707 * vidioc_g_fmt_vid_cap - get current video format parameters 718 708 * @file: descriptor of device 709 + * @priv: unused 719 710 * @f: contains format information 720 711 * 721 712 * returns current video format parameters
+17 -16
drivers/media/pci/tw68/tw68-risc.c
··· 29 29 #include "tw68.h" 30 30 31 31 /** 32 - * @rp pointer to current risc program position 33 - * @sglist pointer to "scatter-gather list" of buffer pointers 34 - * @offset offset to target memory buffer 35 - * @sync_line 0 -> no sync, 1 -> odd sync, 2 -> even sync 36 - * @bpl number of bytes per scan line 37 - * @padding number of bytes of padding to add 38 - * @lines number of lines in field 39 - * @jump insert a jump at the start 32 + * tw68_risc_field 33 + * @rp: pointer to current risc program position 34 + * @sglist: pointer to "scatter-gather list" of buffer pointers 35 + * @offset: offset to target memory buffer 36 + * @sync_line: 0 -> no sync, 1 -> odd sync, 2 -> even sync 37 + * @bpl: number of bytes per scan line 38 + * @padding: number of bytes of padding to add 39 + * @lines: number of lines in field 40 + * @jump: insert a jump at the start 40 41 */ 41 42 static __le32 *tw68_risc_field(__le32 *rp, struct scatterlist *sglist, 42 43 unsigned int offset, u32 sync_line, ··· 121 120 * memory for the dma controller "program" and then fills in that 122 121 * memory with the appropriate "instructions". 123 122 * 124 - * @pci_dev structure with info about the pci 123 + * @pci: structure with info about the pci 125 124 * slot which our device is in. 126 - * @risc structure with info about the memory 125 + * @buf: structure with info about the memory 127 126 * used for our controller program. 128 - * @sglist scatter-gather list entry 129 - * @top_offset offset within the risc program area for the 127 + * @sglist: scatter-gather list entry 128 + * @top_offset: offset within the risc program area for the 130 129 * first odd frame line 131 - * @bottom_offset offset within the risc program area for the 130 + * @bottom_offset: offset within the risc program area for the 132 131 * first even frame line 133 - * @bpl number of data bytes per scan line 134 - * @padding number of extra bytes to add at end of line 135 - * @lines number of scan lines 132 + * @bpl: number of data bytes per scan line 133 + * @padding: number of extra bytes to add at end of line 134 + * @lines: number of scan lines 136 135 */ 137 136 int tw68_risc_buffer(struct pci_dev *pci, 138 137 struct tw68_buf *buf,
+2 -1
drivers/media/platform/davinci/vpif.c
··· 47 47 void __iomem *vpif_base; 48 48 EXPORT_SYMBOL_GPL(vpif_base); 49 49 50 - /** 50 + /* 51 51 * vpif_ch_params: video standard configuration parameters for vpif 52 + * 52 53 * The table must include all presets from supported subdevices. 53 54 */ 54 55 const struct vpif_channel_config_params vpif_ch_params[] = {
+14 -13
drivers/media/platform/davinci/vpif_capture.c
··· 109 109 * @vq: vb2_queue ptr 110 110 * @nbuffers: ptr to number of buffers requested by application 111 111 * @nplanes:: contains number of distinct video planes needed to hold a frame 112 - * @sizes[]: contains the size (in bytes) of each plane. 112 + * @sizes: contains the size (in bytes) of each plane. 113 113 * @alloc_devs: ptr to allocation context 114 114 * 115 115 * This callback function is called when reqbuf() is called to adjust ··· 167 167 168 168 /** 169 169 * vpif_start_streaming : Starts the DMA engine for streaming 170 - * @vb: ptr to vb2_buffer 170 + * @vq: ptr to vb2_buffer 171 171 * @count: number of buffers 172 172 */ 173 173 static int vpif_start_streaming(struct vb2_queue *vq, unsigned int count) ··· 629 629 630 630 /** 631 631 * vpif_get_default_field() - Get default field type based on interface 632 - * @vpif_params - ptr to vpif params 632 + * @iface: ptr to vpif interface 633 633 */ 634 634 static inline enum v4l2_field vpif_get_default_field( 635 635 struct vpif_interface *iface) ··· 640 640 641 641 /** 642 642 * vpif_config_addr() - function to configure buffer address in vpif 643 - * @ch - channel ptr 644 - * @muxmode - channel mux mode 643 + * @ch: channel ptr 644 + * @muxmode: channel mux mode 645 645 */ 646 646 static void vpif_config_addr(struct channel_obj *ch, int muxmode) 647 647 { ··· 661 661 662 662 /** 663 663 * vpif_input_to_subdev() - Maps input to sub device 664 - * @vpif_cfg - global config ptr 665 - * @chan_cfg - channel config ptr 666 - * @input_index - Given input index from application 664 + * @vpif_cfg: global config ptr 665 + * @chan_cfg: channel config ptr 666 + * @input_index: Given input index from application 667 667 * 668 668 * lookup the sub device information for a given input index. 669 669 * we report all the inputs to application. inputs table also ··· 699 699 700 700 /** 701 701 * vpif_set_input() - Select an input 702 - * @vpif_cfg - global config ptr 703 - * @ch - channel 704 - * @_index - Given input index from application 702 + * @vpif_cfg: global config ptr 703 + * @ch: channel 704 + * @index: Given input index from application 705 705 * 706 706 * Select the given input. 707 707 */ ··· 792 792 * vpif_g_std() - get STD handler 793 793 * @file: file ptr 794 794 * @priv: file handle 795 - * @std_id: ptr to std id 795 + * @std: ptr to std id 796 796 */ 797 797 static int vpif_g_std(struct file *file, void *priv, v4l2_std_id *std) 798 798 { ··· 933 933 * vpif_enum_fmt_vid_cap() - ENUM_FMT handler 934 934 * @file: file ptr 935 935 * @priv: file handle 936 - * @index: input index 936 + * @fmt: ptr to V4L2 format descriptor 937 937 */ 938 938 static int vpif_enum_fmt_vid_cap(struct file *file, void *priv, 939 939 struct v4l2_fmtdesc *fmt) ··· 1745 1745 #ifdef CONFIG_PM_SLEEP 1746 1746 /** 1747 1747 * vpif_suspend: vpif device suspend 1748 + * @dev: pointer to &struct device 1748 1749 */ 1749 1750 static int vpif_suspend(struct device *dev) 1750 1751 {
+8 -8
drivers/media/platform/davinci/vpif_display.c
··· 102 102 * @vq: vb2_queue ptr 103 103 * @nbuffers: ptr to number of buffers requested by application 104 104 * @nplanes:: contains number of distinct video planes needed to hold a frame 105 - * @sizes[]: contains the size (in bytes) of each plane. 105 + * @sizes: contains the size (in bytes) of each plane. 106 106 * @alloc_devs: ptr to allocation context 107 107 * 108 108 * This callback function is called when reqbuf() is called to adjust ··· 158 158 159 159 /** 160 160 * vpif_start_streaming : Starts the DMA engine for streaming 161 - * @vb: ptr to vb2_buffer 161 + * @vq: ptr to vb2_buffer 162 162 * @count: number of buffers 163 163 */ 164 164 static int vpif_start_streaming(struct vb2_queue *vq, unsigned int count) ··· 766 766 767 767 /** 768 768 * vpif_output_to_subdev() - Maps output to sub device 769 - * @vpif_cfg - global config ptr 770 - * @chan_cfg - channel config ptr 771 - * @index - Given output index from application 769 + * @vpif_cfg: global config ptr 770 + * @chan_cfg: channel config ptr 771 + * @index: Given output index from application 772 772 * 773 773 * lookup the sub device information for a given output index. 774 774 * we report all the output to application. output table also ··· 802 802 803 803 /** 804 804 * vpif_set_output() - Select an output 805 - * @vpif_cfg - global config ptr 806 - * @ch - channel 807 - * @index - Given output index from application 805 + * @vpif_cfg: global config ptr 806 + * @ch: channel 807 + * @index: Given output index from application 808 808 * 809 809 * Select the given output. 810 810 */
+3
drivers/media/platform/exynos4-is/fimc-capture.c
··· 146 146 147 147 /** 148 148 * fimc_capture_config_update - apply the camera interface configuration 149 + * @ctx: FIMC capture context 149 150 * 150 151 * To be called from within the interrupt handler with fimc.slock 151 152 * spinlock held. It updates the camera pixel crop, rotation and ··· 859 858 * fimc_get_sensor_frame_desc - query the sensor for media bus frame parameters 860 859 * @sensor: pointer to the sensor subdev 861 860 * @plane_fmt: provides plane sizes corresponding to the frame layout entries 861 + * @num_planes: number of planes 862 862 * @try: true to set the frame parameters, false to query only 863 863 * 864 864 * This function is used by this driver only for compressed/blob data formats. ··· 1103 1101 /** 1104 1102 * fimc_pipeline_validate - check for formats inconsistencies 1105 1103 * between source and sink pad of each link 1104 + * @fimc: the FIMC device this context applies to 1106 1105 * 1107 1106 * Return 0 if all formats match or -EPIPE otherwise. 1108 1107 */
+7 -4
drivers/media/platform/exynos4-is/media-dev.c
··· 60 60 61 61 /** 62 62 * fimc_pipeline_prepare - update pipeline information with subdevice pointers 63 + * @p: fimc pipeline 63 64 * @me: media entity terminating the pipeline 64 65 * 65 66 * Caller holds the graph mutex. ··· 152 151 153 152 /** 154 153 * fimc_pipeline_s_power - change power state of all pipeline subdevs 155 - * @fimc: fimc device terminating the pipeline 156 - * @state: true to power on, false to power off 154 + * @p: fimc device terminating the pipeline 155 + * @on: true to power on, false to power off 157 156 * 158 157 * Needs to be called with the graph mutex held. 159 158 */ ··· 220 219 /** 221 220 * __fimc_pipeline_open - update the pipeline information, enable power 222 221 * of all pipeline subdevs and the sensor clock 222 + * @ep: fimc device terminating the pipeline 223 223 * @me: media entity to start graph walk with 224 224 * @prepare: true to walk the current pipeline and acquire all subdevs 225 225 * ··· 254 252 255 253 /** 256 254 * __fimc_pipeline_close - disable the sensor clock and pipeline power 257 - * @fimc: fimc device terminating the pipeline 255 + * @ep: fimc device terminating the pipeline 258 256 * 259 257 * Disable power of all subdevs and turn the external sensor clock off. 260 258 */ ··· 283 281 284 282 /** 285 283 * __fimc_pipeline_s_stream - call s_stream() on pipeline subdevs 286 - * @pipeline: video pipeline structure 284 + * @ep: video pipeline structure 287 285 * @on: passed as the s_stream() callback argument 288 286 */ 289 287 static int __fimc_pipeline_s_stream(struct exynos_media_pipeline *ep, bool on) ··· 904 902 905 903 /** 906 904 * fimc_md_create_links - create default links between registered entities 905 + * @fmd: fimc media device 907 906 * 908 907 * Parallel interface sensor entities are connected directly to FIMC capture 909 908 * entities. The sensors using MIPI CSIS bus are connected through immutable
+1 -1
drivers/media/platform/exynos4-is/mipi-csis.c
··· 189 189 * @irq: requested s5p-mipi-csis irq number 190 190 * @interrupt_mask: interrupt mask of the all used interrupts 191 191 * @flags: the state variable for power and streaming control 192 - * @clock_frequency: device bus clock frequency 192 + * @clk_frequency: device bus clock frequency 193 193 * @hs_settle: HS-RX settle time 194 194 * @num_lanes: number of MIPI-CSI data lanes used 195 195 * @max_num_lanes: maximum number of MIPI-CSI data lanes supported
+1
drivers/media/platform/mtk-vcodec/vdec/vdec_h264_if.c
··· 59 59 * @read_idx : read index 60 60 * @write_idx : write index 61 61 * @count : buffer count in list 62 + * @reserved : for 8 bytes alignment 62 63 */ 63 64 struct h264_ring_fb_list { 64 65 struct h264_fb fb_list[H264_MAX_FB_NUM];
-1
drivers/media/platform/mtk-vcodec/vdec/vdec_vp8_if.c
··· 155 155 * @reg_base : HW register base address 156 156 * @frm_cnt : decode frame count 157 157 * @ctx : V4L2 context 158 - * @dev : platform device 159 158 * @vpu : VPU instance for decoder 160 159 * @vsi : VPU share information 161 160 */
+2 -2
drivers/media/platform/mtk-vcodec/venc/venc_h264_if.c
··· 34 34 #define H264_FILLER_MARKER_SIZE ARRAY_SIZE(h264_filler_marker) 35 35 #define VENC_PIC_BITSTREAM_BYTE_CNT 0x0098 36 36 37 - /** 37 + /* 38 38 * enum venc_h264_vpu_work_buf - h264 encoder buffer index 39 39 */ 40 40 enum venc_h264_vpu_work_buf { ··· 50 50 VENC_H264_VPU_WORK_BUF_MAX, 51 51 }; 52 52 53 - /** 53 + /* 54 54 * enum venc_h264_bs_mode - for bs_mode argument in h264_enc_vpu_encode 55 55 */ 56 56 enum venc_h264_bs_mode {
+1 -1
drivers/media/platform/mtk-vcodec/venc/venc_vp8_if.c
··· 34 34 /* This ac_tag is vp8 frame tag. */ 35 35 #define MAX_AC_TAG_SIZE 10 36 36 37 - /** 37 + /* 38 38 * enum venc_vp8_vpu_work_buf - vp8 encoder buffer index 39 39 */ 40 40 enum venc_vp8_vpu_work_buf {
+2 -1
drivers/media/platform/mtk-vpu/mtk_vpu.c
··· 181 181 * @extmem: VPU extended memory information 182 182 * @reg: VPU TCM and configuration registers 183 183 * @run: VPU initialization status 184 + * @wdt: VPU watchdog workqueue 184 185 * @ipi_desc: VPU IPI descriptor 185 186 * @recv_buf: VPU DTCM share buffer for receiving. The 186 187 * receive buffer is only accessed in interrupt context. ··· 195 194 * suppose a client is using VPU to decode VP8. 196 195 * If the other client wants to encode VP8, 197 196 * it has to wait until VP8 decode completes. 198 - * @wdt_refcnt WDT reference count to make sure the watchdog can be 197 + * @wdt_refcnt: WDT reference count to make sure the watchdog can be 199 198 * disabled if no other client is using VPU service 200 199 * @ack_wq: The wait queue for each codec and mdp. When sleeping 201 200 * processes wake up, they will check the condition
+6 -3
drivers/media/platform/pxa_camera.c
··· 235 235 * stored in memory in the following way: 236 236 * @packing: Type of sample-packing, that has to be used 237 237 * @order: Sample order when storing in memory 238 + * @layout: Planes layout in memory 238 239 * @bits_per_sample: How many bits the bridge has to sample 239 240 */ 240 241 struct pxa_mbus_pixelfmt { ··· 853 852 /** 854 853 * pxa_init_dma_channel - init dma descriptors 855 854 * @pcdev: pxa camera device 856 - * @vb: videobuffer2 buffer 857 - * @dma: dma video buffer 855 + * @buf: pxa camera buffer 858 856 * @channel: dma channel (0 => 'Y', 1 => 'U', 2 => 'V') 859 - * @cibr: camera Receive Buffer Register 857 + * @sg: dma scatter list 858 + * @sglen: dma scatter list length 860 859 * 861 860 * Prepares the pxa dma descriptors to transfer one camera channel. 862 861 * ··· 1011 1010 /** 1012 1011 * pxa_camera_check_link_miss - check missed DMA linking 1013 1012 * @pcdev: camera device 1013 + * @last_submitted: an opaque DMA cookie for last submitted 1014 + * @last_issued: an opaque DMA cookie for last issued 1014 1015 * 1015 1016 * The DMA chaining is done with DMA running. This means a tiny temporal window 1016 1017 * remains, where a buffer is queued on the chain, while the chain is already
+1 -1
drivers/media/platform/rcar_fdp1.c
··· 1132 1132 * mem2mem callbacks 1133 1133 */ 1134 1134 1135 - /** 1135 + /* 1136 1136 * job_ready() - check whether an instance is ready to be scheduled to run 1137 1137 */ 1138 1138 static int fdp1_m2m_job_ready(void *priv)
+2 -2
drivers/media/platform/rcar_jpu.c
··· 257 257 }; 258 258 259 259 /** 260 - * jpu_q_data - parameters of one queue 260 + * struct jpu_q_data - parameters of one queue 261 261 * @fmtinfo: driver-specific format of this queue 262 262 * @format: multiplanar format of this queue 263 263 * @sequence: sequence number ··· 269 269 }; 270 270 271 271 /** 272 - * jpu_ctx - the device context data 272 + * struct jpu_ctx - the device context data 273 273 * @jpu: JPEG IP device for this context 274 274 * @encoder: compression (encode) operation or decompression (decode) 275 275 * @compr_quality: destination image quality in compression (encode) mode
+1
drivers/media/platform/s3c-camif/camif-core.c
··· 103 103 104 104 /** 105 105 * s3c_camif_find_format() - lookup camif color format by fourcc or an index 106 + * @vp: video path (DMA) description (codec/preview) 106 107 * @pixelformat: fourcc to match, ignored if null 107 108 * @index: index to the camif_formats array, ignored if negative 108 109 */
+1 -1
drivers/media/platform/sh_veu.c
··· 267 267 sh_veu_reg_write(veu, VEU_EIER, 1); /* enable interrupt in VEU */ 268 268 } 269 269 270 - /** 270 + /* 271 271 * sh_veu_device_run() - prepares and starts the device 272 272 * 273 273 * This will be called by the framework when it decides to schedule a particular
+11 -10
drivers/media/platform/soc_camera/soc_scale_crop.c
··· 306 306 } 307 307 308 308 /** 309 - * @icd - soc-camera device 310 - * @rect - camera cropping window 311 - * @subrect - part of rect, sent to the user 312 - * @mf - in- / output camera output window 313 - * @width - on input: max host input width 314 - * on output: user width, mapped back to input 315 - * @height - on input: max host input height 316 - * on output: user height, mapped back to input 317 - * @host_can_scale - host can scale this pixel format 318 - * @shift - shift, used for scaling 309 + * soc_camera_client_scale 310 + * @icd: soc-camera device 311 + * @rect: camera cropping window 312 + * @subrect: part of rect, sent to the user 313 + * @mf: in- / output camera output window 314 + * @width: on input: max host input width; 315 + * on output: user width, mapped back to input 316 + * @height: on input: max host input height; 317 + * on output: user height, mapped back to input 318 + * @host_can_scale: host can scale this pixel format 319 + * @shift: shift, used for scaling 319 320 */ 320 321 int soc_camera_client_scale(struct soc_camera_device *icd, 321 322 struct v4l2_rect *rect, struct v4l2_rect *subrect,
+13 -5
drivers/media/platform/sti/hva/hva-h264.c
··· 134 134 SEI_FRAME_PACKING_ARRANGEMENT = 45 135 135 }; 136 136 137 - /** 137 + /* 138 138 * stereo Video Info struct 139 139 */ 140 140 struct hva_h264_stereo_video_sei { ··· 146 146 u8 right_view_self_contained_flag; 147 147 }; 148 148 149 - /** 149 + /* 150 + * struct hva_h264_td 151 + * 150 152 * @frame_width: width in pixels of the buffer containing the input frame 151 153 * @frame_height: height in pixels of the buffer containing the input frame 152 154 * @frame_num: the parameter to be written in the slice header ··· 354 352 u32 addr_brc_in_out_parameter; 355 353 }; 356 354 357 - /** 355 + /* 356 + * struct hva_h264_slice_po 357 + * 358 358 * @ slice_size: slice size 359 359 * @ slice_start_time: start time 360 360 * @ slice_stop_time: stop time ··· 369 365 u32 slice_num; 370 366 }; 371 367 372 - /** 368 + /* 369 + * struct hva_h264_po 370 + * 373 371 * @ bitstream_size: bitstream size 374 372 * @ dct_bitstream_size: dtc bitstream size 375 373 * @ stuffing_bits: number of stuffing bits inserted by the encoder ··· 397 391 struct hva_h264_po po; 398 392 }; 399 393 400 - /** 394 + /* 395 + * struct hva_h264_ctx 396 + * 401 397 * @seq_info: sequence information buffer 402 398 * @ref_frame: reference frame buffer 403 399 * @rec_frame: reconstructed frame buffer
+1 -1
drivers/media/platform/ti-vpe/vpe.c
··· 926 926 * mem2mem callbacks 927 927 */ 928 928 929 - /** 929 + /* 930 930 * job_ready() - check whether an instance is ready to be scheduled to run 931 931 */ 932 932 static int job_ready(void *priv)
+1 -1
drivers/media/platform/vim2m.c
··· 343 343 * mem2mem callbacks 344 344 */ 345 345 346 - /** 346 + /* 347 347 * job_ready() - check whether an instance is ready to be scheduled to run 348 348 */ 349 349 static int job_ready(void *priv)
+1
drivers/media/platform/vsp1/vsp1_dl.c
··· 70 70 * @dma: DMA address for the header 71 71 * @body0: first display list body 72 72 * @fragments: list of extra display list bodies 73 + * @has_chain: if true, indicates that there's a partition chain 73 74 * @chain: entry in the display list partition chain 74 75 */ 75 76 struct vsp1_dl_list {
+11 -7
drivers/media/radio/radio-si476x.c
··· 158 158 }; 159 159 static struct v4l2_ctrl_config si476x_ctrls[] = { 160 160 161 - /** 161 + /* 162 162 * SI476X during its station seeking(or tuning) process uses several 163 163 * parameters to detrmine if "the station" is valid: 164 164 * ··· 197 197 .step = 2, 198 198 }, 199 199 200 - /** 200 + /* 201 201 * #V4L2_CID_SI476X_HARMONICS_COUNT -- number of harmonics 202 202 * built-in power-line noise supression filter is to reject 203 203 * during AM-mode operation. ··· 213 213 .step = 1, 214 214 }, 215 215 216 - /** 216 + /* 217 217 * #V4L2_CID_SI476X_DIVERSITY_MODE -- configuration which 218 218 * two tuners working in diversity mode are to work in. 219 219 * ··· 237 237 .max = ARRAY_SIZE(phase_diversity_modes) - 1, 238 238 }, 239 239 240 - /** 240 + /* 241 241 * #V4L2_CID_SI476X_INTERCHIP_LINK -- inter-chip link in 242 242 * diversity mode indicator. Allows user to determine if two 243 243 * chips working in diversity mode have established a link ··· 296 296 /** 297 297 * struct si476x_radio - radio device 298 298 * 299 - * @core: Pointer to underlying core device 299 + * @v4l2dev: Pointer to V4L2 device created by V4L2 subsystem 300 300 * @videodev: Pointer to video device created by V4L2 subsystem 301 + * @ctrl_handler: V4L2 controls handler 302 + * @core: Pointer to underlying core device 301 303 * @ops: Vtable of functions. See struct si476x_radio_ops for details 302 - * @kref: Reference counter 303 - * @core_lock: An r/w semaphore to brebvent the deletion of underlying 304 + * @debugfs: pointer to &strucd dentry for debugfs 305 + * @audmode: audio mode, as defined for the rxsubchans field 306 + * at videodev2.h 307 + * 304 308 * core structure is the radio device is being used 305 309 */ 306 310 struct si476x_radio {
+1 -1
drivers/media/radio/radio-wl1273.c
··· 1330 1330 1331 1331 /** 1332 1332 * wl1273_fm_set_tx_power() - Set the transmission power value. 1333 - * @core: A pointer to the device struct. 1333 + * @radio: A pointer to the device struct. 1334 1334 * @power: The new power value. 1335 1335 */ 1336 1336 static int wl1273_fm_set_tx_power(struct wl1273_device *radio, u16 power)
+1 -1
drivers/media/rc/img-ir/img-ir-hw.c
··· 339 339 /** 340 340 * img_ir_decoder_convert() - Generate internal timings in decoder. 341 341 * @decoder: Decoder to be converted to internal timings. 342 - * @timings: Timing register values. 342 + * @reg_timings: Timing register values. 343 343 * @clock_hz: IR clock rate in Hz. 344 344 * 345 345 * Fills out the repeat timings and timing register values for a specific clock
+20 -20
drivers/media/rc/imon.c
··· 492 492 dev_dbg(dev, "%s: iMON context freed\n", __func__); 493 493 } 494 494 495 - /** 495 + /* 496 496 * Called when the Display device (e.g. /dev/lcd0) 497 497 * is opened by the application. 498 498 */ ··· 542 542 return retval; 543 543 } 544 544 545 - /** 545 + /* 546 546 * Called when the display device (e.g. /dev/lcd0) 547 547 * is closed by the application. 548 548 */ ··· 575 575 return retval; 576 576 } 577 577 578 - /** 578 + /* 579 579 * Sends a packet to the device -- this function must be called with 580 580 * ictx->lock held, or its unlock/lock sequence while waiting for tx 581 581 * to complete can/will lead to a deadlock. ··· 664 664 return retval; 665 665 } 666 666 667 - /** 667 + /* 668 668 * Sends an associate packet to the iMON 2.4G. 669 669 * 670 670 * This might not be such a good idea, since it has an id collision with ··· 694 694 return retval; 695 695 } 696 696 697 - /** 697 + /* 698 698 * Sends packets to setup and show clock on iMON display 699 699 * 700 700 * Arguments: year - last 2 digits of year, month - 1..12, ··· 781 781 return retval; 782 782 } 783 783 784 - /** 784 + /* 785 785 * These are the sysfs functions to handle the association on the iMON 2.4G LT. 786 786 */ 787 787 static ssize_t show_associate_remote(struct device *d, ··· 823 823 return count; 824 824 } 825 825 826 - /** 826 + /* 827 827 * sysfs functions to control internal imon clock 828 828 */ 829 829 static ssize_t show_imon_clock(struct device *d, ··· 923 923 .attrs = imon_rf_sysfs_entries 924 924 }; 925 925 926 - /** 926 + /* 927 927 * Writes data to the VFD. The iMON VFD is 2x16 characters 928 928 * and requires data in 5 consecutive USB interrupt packets, 929 929 * each packet but the last carrying 7 bytes. ··· 1008 1008 return (!retval) ? n_bytes : retval; 1009 1009 } 1010 1010 1011 - /** 1011 + /* 1012 1012 * Writes data to the LCD. The iMON OEM LCD screen expects 8-byte 1013 1013 * packets. We accept data as 16 hexadecimal digits, followed by a 1014 1014 * newline (to make it easy to drive the device from a command-line ··· 1066 1066 return (!retval) ? n_bytes : retval; 1067 1067 } 1068 1068 1069 - /** 1069 + /* 1070 1070 * Callback function for USB core API: transmit data 1071 1071 */ 1072 1072 static void usb_tx_callback(struct urb *urb) ··· 1087 1087 complete(&ictx->tx.finished); 1088 1088 } 1089 1089 1090 - /** 1090 + /* 1091 1091 * report touchscreen input 1092 1092 */ 1093 1093 static void imon_touch_display_timeout(struct timer_list *t) ··· 1103 1103 input_sync(ictx->touch); 1104 1104 } 1105 1105 1106 - /** 1106 + /* 1107 1107 * iMON IR receivers support two different signal sets -- those used by 1108 1108 * the iMON remotes, and those used by the Windows MCE remotes (which is 1109 1109 * really just RC-6), but only one or the other at a time, as the signals ··· 1191 1191 return sec; 1192 1192 } 1193 1193 1194 - /** 1194 + /* 1195 1195 * The directional pad behaves a bit differently, depending on whether this is 1196 1196 * one of the older ffdc devices or a newer device. Newer devices appear to 1197 1197 * have a higher resolution matrix for more precise mouse movement, but it ··· 1543 1543 } 1544 1544 } 1545 1545 1546 - /** 1546 + /* 1547 1547 * figure out if these is a press or a release. We don't actually 1548 1548 * care about repeats, as those will be auto-generated within the IR 1549 1549 * subsystem for repeating scancodes. ··· 1592 1592 return press_type; 1593 1593 } 1594 1594 1595 - /** 1595 + /* 1596 1596 * Process the incoming packet 1597 1597 */ 1598 - /** 1598 + /* 1599 1599 * Convert bit count to time duration (in us) and submit 1600 1600 * the value to lirc_dev. 1601 1601 */ ··· 1608 1608 ir_raw_event_store_with_filter(context->rdev, &ev); 1609 1609 } 1610 1610 1611 - /** 1611 + /* 1612 1612 * Process the incoming packet 1613 1613 */ 1614 1614 static void imon_incoming_ir_raw(struct imon_context *context, ··· 1831 1831 } 1832 1832 } 1833 1833 1834 - /** 1834 + /* 1835 1835 * Callback function for USB core API: receive data 1836 1836 */ 1837 1837 static void usb_rx_callback_intf0(struct urb *urb) ··· 2485 2485 2486 2486 } 2487 2487 2488 - /** 2488 + /* 2489 2489 * Callback function for USB core API: Probe 2490 2490 */ 2491 2491 static int imon_probe(struct usb_interface *interface, ··· 2583 2583 return ret; 2584 2584 } 2585 2585 2586 - /** 2586 + /* 2587 2587 * Callback function for USB core API: disconnect 2588 2588 */ 2589 2589 static void imon_disconnect(struct usb_interface *interface)
+1 -1
drivers/media/rc/ir-jvc-decoder.c
··· 39 39 /** 40 40 * ir_jvc_decode() - Decode one JVC pulse or space 41 41 * @dev: the struct rc_dev descriptor of the device 42 - * @duration: the struct ir_raw_event descriptor of the pulse/space 42 + * @ev: the struct ir_raw_event descriptor of the pulse/space 43 43 * 44 44 * This function returns -EINVAL if the pulse violates the state machine 45 45 */
+2 -2
drivers/media/rc/ir-lirc-codec.c
··· 25 25 /** 26 26 * ir_lirc_decode() - Send raw IR data to lirc_dev to be relayed to the 27 27 * lircd userspace daemon for decoding. 28 - * @input_dev: the struct rc_dev descriptor of the device 29 - * @duration: the struct ir_raw_event descriptor of the pulse/space 28 + * @dev: the struct rc_dev descriptor of the device 29 + * @ev: the struct ir_raw_event descriptor of the pulse/space 30 30 * 31 31 * This function returns -EINVAL if the lirc interfaces aren't wired up. 32 32 */
+1 -2
drivers/media/rc/ir-nec-decoder.c
··· 41 41 /** 42 42 * ir_nec_decode() - Decode one NEC pulse or space 43 43 * @dev: the struct rc_dev descriptor of the device 44 - * @duration: the struct ir_raw_event descriptor of the pulse/space 44 + * @ev: the struct ir_raw_event descriptor of the pulse/space 45 45 * 46 46 * This function returns -EINVAL if the pulse violates the state machine 47 47 */ ··· 183 183 * ir_nec_scancode_to_raw() - encode an NEC scancode ready for modulation. 184 184 * @protocol: specific protocol to use 185 185 * @scancode: a single NEC scancode. 186 - * @raw: raw data to be modulated. 187 186 */ 188 187 static u32 ir_nec_scancode_to_raw(enum rc_proto protocol, u32 scancode) 189 188 {
+1 -1
drivers/media/rc/ir-sanyo-decoder.c
··· 48 48 /** 49 49 * ir_sanyo_decode() - Decode one SANYO pulse or space 50 50 * @dev: the struct rc_dev descriptor of the device 51 - * @duration: the struct ir_raw_event descriptor of the pulse/space 51 + * @ev: the struct ir_raw_event descriptor of the pulse/space 52 52 * 53 53 * This function returns -EINVAL if the pulse violates the state machine 54 54 */
+1 -1
drivers/media/rc/ir-sharp-decoder.c
··· 39 39 /** 40 40 * ir_sharp_decode() - Decode one Sharp pulse or space 41 41 * @dev: the struct rc_dev descriptor of the device 42 - * @duration: the struct ir_raw_event descriptor of the pulse/space 42 + * @ev: the struct ir_raw_event descriptor of the pulse/space 43 43 * 44 44 * This function returns -EINVAL if the pulse violates the state machine 45 45 */
+1 -1
drivers/media/rc/ir-xmp-decoder.c
··· 35 35 /** 36 36 * ir_xmp_decode() - Decode one XMP pulse or space 37 37 * @dev: the struct rc_dev descriptor of the device 38 - * @duration: the struct ir_raw_event descriptor of the pulse/space 38 + * @ev: the struct ir_raw_event descriptor of the pulse/space 39 39 * 40 40 * This function returns -EINVAL if the pulse violates the state machine 41 41 */
+1 -1
drivers/media/rc/rc-ir-raw.c
··· 128 128 /** 129 129 * ir_raw_event_store_with_filter() - pass next pulse/space to decoders with some processing 130 130 * @dev: the struct rc_dev device descriptor 131 - * @type: the type of the event that has occurred 131 + * @ev: the event that has occurred 132 132 * 133 133 * This routine (which may be called from an interrupt context) works 134 134 * in similar manner to ir_raw_event_store_edge.
+44 -34
drivers/media/rc/rc-main.c
··· 39 39 [RC_PROTO_UNKNOWN] = { .name = "unknown", .repeat_period = 250 }, 40 40 [RC_PROTO_OTHER] = { .name = "other", .repeat_period = 250 }, 41 41 [RC_PROTO_RC5] = { .name = "rc-5", 42 - .scancode_bits = 0x1f7f, .repeat_period = 164 }, 42 + .scancode_bits = 0x1f7f, .repeat_period = 250 }, 43 43 [RC_PROTO_RC5X_20] = { .name = "rc-5x-20", 44 - .scancode_bits = 0x1f7f3f, .repeat_period = 164 }, 44 + .scancode_bits = 0x1f7f3f, .repeat_period = 250 }, 45 45 [RC_PROTO_RC5_SZ] = { .name = "rc-5-sz", 46 - .scancode_bits = 0x2fff, .repeat_period = 164 }, 46 + .scancode_bits = 0x2fff, .repeat_period = 250 }, 47 47 [RC_PROTO_JVC] = { .name = "jvc", 48 48 .scancode_bits = 0xffff, .repeat_period = 250 }, 49 49 [RC_PROTO_SONY12] = { .name = "sony-12", 50 - .scancode_bits = 0x1f007f, .repeat_period = 100 }, 50 + .scancode_bits = 0x1f007f, .repeat_period = 250 }, 51 51 [RC_PROTO_SONY15] = { .name = "sony-15", 52 - .scancode_bits = 0xff007f, .repeat_period = 100 }, 52 + .scancode_bits = 0xff007f, .repeat_period = 250 }, 53 53 [RC_PROTO_SONY20] = { .name = "sony-20", 54 - .scancode_bits = 0x1fff7f, .repeat_period = 100 }, 54 + .scancode_bits = 0x1fff7f, .repeat_period = 250 }, 55 55 [RC_PROTO_NEC] = { .name = "nec", 56 - .scancode_bits = 0xffff, .repeat_period = 160 }, 56 + .scancode_bits = 0xffff, .repeat_period = 250 }, 57 57 [RC_PROTO_NECX] = { .name = "nec-x", 58 - .scancode_bits = 0xffffff, .repeat_period = 160 }, 58 + .scancode_bits = 0xffffff, .repeat_period = 250 }, 59 59 [RC_PROTO_NEC32] = { .name = "nec-32", 60 - .scancode_bits = 0xffffffff, .repeat_period = 160 }, 60 + .scancode_bits = 0xffffffff, .repeat_period = 250 }, 61 61 [RC_PROTO_SANYO] = { .name = "sanyo", 62 62 .scancode_bits = 0x1fffff, .repeat_period = 250 }, 63 63 [RC_PROTO_MCIR2_KBD] = { .name = "mcir2-kbd", 64 - .scancode_bits = 0xffff, .repeat_period = 150 }, 64 + .scancode_bits = 0xffff, .repeat_period = 250 }, 65 65 [RC_PROTO_MCIR2_MSE] = { .name = "mcir2-mse", 66 - .scancode_bits = 0x1fffff, .repeat_period = 150 }, 66 + .scancode_bits = 0x1fffff, .repeat_period = 250 }, 67 67 [RC_PROTO_RC6_0] = { .name = "rc-6-0", 68 - .scancode_bits = 0xffff, .repeat_period = 164 }, 68 + .scancode_bits = 0xffff, .repeat_period = 250 }, 69 69 [RC_PROTO_RC6_6A_20] = { .name = "rc-6-6a-20", 70 - .scancode_bits = 0xfffff, .repeat_period = 164 }, 70 + .scancode_bits = 0xfffff, .repeat_period = 250 }, 71 71 [RC_PROTO_RC6_6A_24] = { .name = "rc-6-6a-24", 72 - .scancode_bits = 0xffffff, .repeat_period = 164 }, 72 + .scancode_bits = 0xffffff, .repeat_period = 250 }, 73 73 [RC_PROTO_RC6_6A_32] = { .name = "rc-6-6a-32", 74 - .scancode_bits = 0xffffffff, .repeat_period = 164 }, 74 + .scancode_bits = 0xffffffff, .repeat_period = 250 }, 75 75 [RC_PROTO_RC6_MCE] = { .name = "rc-6-mce", 76 - .scancode_bits = 0xffff7fff, .repeat_period = 164 }, 76 + .scancode_bits = 0xffff7fff, .repeat_period = 250 }, 77 77 [RC_PROTO_SHARP] = { .name = "sharp", 78 78 .scancode_bits = 0x1fff, .repeat_period = 250 }, 79 79 [RC_PROTO_XMP] = { .name = "xmp", .repeat_period = 250 }, ··· 170 170 * @name: name to assign to the table 171 171 * @rc_proto: ir type to assign to the new table 172 172 * @size: initial size of the table 173 - * @return: zero on success or a negative error code 174 173 * 175 174 * This routine will initialize the rc_map and will allocate 176 175 * memory to hold at least the specified number of elements. 176 + * 177 + * return: zero on success or a negative error code 177 178 */ 178 179 static int ir_create_table(struct rc_map *rc_map, 179 180 const char *name, u64 rc_proto, size_t size) ··· 217 216 * ir_resize_table() - resizes a scancode table if necessary 218 217 * @rc_map: the rc_map to resize 219 218 * @gfp_flags: gfp flags to use when allocating memory 220 - * @return: zero on success or a negative error code 221 219 * 222 220 * This routine will shrink the rc_map if it has lots of 223 221 * unused entries and grow it if it is full. 222 + * 223 + * return: zero on success or a negative error code 224 224 */ 225 225 static int ir_resize_table(struct rc_map *rc_map, gfp_t gfp_flags) 226 226 { ··· 267 265 * @dev: the struct rc_dev device descriptor 268 266 * @rc_map: scancode table to be adjusted 269 267 * @index: index of the mapping that needs to be updated 270 - * @keycode: the desired keycode 271 - * @return: previous keycode assigned to the mapping 268 + * @new_keycode: the desired keycode 272 269 * 273 270 * This routine is used to update scancode->keycode mapping at given 274 271 * position. 272 + * 273 + * return: previous keycode assigned to the mapping 274 + * 275 275 */ 276 276 static unsigned int ir_update_mapping(struct rc_dev *dev, 277 277 struct rc_map *rc_map, ··· 324 320 * @scancode: the desired scancode 325 321 * @resize: controls whether we allowed to resize the table to 326 322 * accommodate not yet present scancodes 327 - * @return: index of the mapping containing scancode in question 328 - * or -1U in case of failure. 329 323 * 330 324 * This routine is used to locate given scancode in rc_map. 331 325 * If scancode is not yet present the routine will allocate a new slot 332 326 * for it. 327 + * 328 + * return: index of the mapping containing scancode in question 329 + * or -1U in case of failure. 333 330 */ 334 331 static unsigned int ir_establish_scancode(struct rc_dev *dev, 335 332 struct rc_map *rc_map, ··· 380 375 /** 381 376 * ir_setkeycode() - set a keycode in the scancode->keycode table 382 377 * @idev: the struct input_dev device descriptor 383 - * @scancode: the desired scancode 384 - * @keycode: result 385 - * @return: -EINVAL if the keycode could not be inserted, otherwise zero. 378 + * @ke: Input keymap entry 379 + * @old_keycode: result 386 380 * 387 381 * This routine is used to handle evdev EVIOCSKEY ioctl. 382 + * 383 + * return: -EINVAL if the keycode could not be inserted, otherwise zero. 388 384 */ 389 385 static int ir_setkeycode(struct input_dev *idev, 390 386 const struct input_keymap_entry *ke, ··· 428 422 /** 429 423 * ir_setkeytable() - sets several entries in the scancode->keycode table 430 424 * @dev: the struct rc_dev device descriptor 431 - * @to: the struct rc_map to copy entries to 432 425 * @from: the struct rc_map to copy entries from 433 - * @return: -ENOMEM if all keycodes could not be inserted, otherwise zero. 434 426 * 435 427 * This routine is used to handle table initialization. 428 + * 429 + * return: -ENOMEM if all keycodes could not be inserted, otherwise zero. 436 430 */ 437 431 static int ir_setkeytable(struct rc_dev *dev, 438 432 const struct rc_map *from) ··· 480 474 * ir_lookup_by_scancode() - locate mapping by scancode 481 475 * @rc_map: the struct rc_map to search 482 476 * @scancode: scancode to look for in the table 483 - * @return: index in the table, -1U if not found 484 477 * 485 478 * This routine performs binary search in RC keykeymap table for 486 479 * given scancode. 480 + * 481 + * return: index in the table, -1U if not found 487 482 */ 488 483 static unsigned int ir_lookup_by_scancode(const struct rc_map *rc_map, 489 484 unsigned int scancode) ··· 502 495 /** 503 496 * ir_getkeycode() - get a keycode from the scancode->keycode table 504 497 * @idev: the struct input_dev device descriptor 505 - * @scancode: the desired scancode 506 - * @keycode: used to return the keycode, if found, or KEY_RESERVED 507 - * @return: always returns zero. 498 + * @ke: Input keymap entry 508 499 * 509 500 * This routine is used to handle evdev EVIOCGKEY ioctl. 501 + * 502 + * return: always returns zero. 510 503 */ 511 504 static int ir_getkeycode(struct input_dev *idev, 512 505 struct input_keymap_entry *ke) ··· 563 556 * rc_g_keycode_from_table() - gets the keycode that corresponds to a scancode 564 557 * @dev: the struct rc_dev descriptor of the device 565 558 * @scancode: the scancode to look for 566 - * @return: the corresponding keycode, or KEY_RESERVED 567 559 * 568 560 * This routine is used by drivers which need to convert a scancode to a 569 561 * keycode. Normally it should not be used since drivers should have no 570 562 * interest in keycodes. 563 + * 564 + * return: the corresponding keycode, or KEY_RESERVED 571 565 */ 572 566 u32 rc_g_keycode_from_table(struct rc_dev *dev, u32 scancode) 573 567 { ··· 633 625 634 626 /** 635 627 * ir_timer_keyup() - generates a keyup event after a timeout 636 - * @cookie: a pointer to the struct rc_dev for the device 628 + * 629 + * @t: a pointer to the struct timer_list 637 630 * 638 631 * This routine will generate a keyup event some time after a keydown event 639 632 * is generated when no further activity has been detected. ··· 789 780 * provides sensible defaults 790 781 * @dev: the struct rc_dev descriptor of the device 791 782 * @filter: the scancode and mask 792 - * @return: 0 or -EINVAL if the filter is not valid 783 + * 784 + * return: 0 or -EINVAL if the filter is not valid 793 785 */ 794 786 static int rc_validate_filter(struct rc_dev *dev, 795 787 struct rc_scancode_filter *filter)
+36 -4
drivers/media/rc/sir_ir.c
··· 57 57 static irqreturn_t sir_interrupt(int irq, void *dev_id); 58 58 static void send_space(unsigned long len); 59 59 static void send_pulse(unsigned long len); 60 - static void init_hardware(void); 60 + static int init_hardware(void); 61 61 static void drop_hardware(void); 62 62 /* Initialisation */ 63 63 ··· 263 263 } 264 264 } 265 265 266 - static void init_hardware(void) 266 + static int init_hardware(void) 267 267 { 268 + u8 scratch, scratch2, scratch3; 268 269 unsigned long flags; 269 270 270 271 spin_lock_irqsave(&hardware_lock, flags); 272 + 273 + /* 274 + * This is a simple port existence test, borrowed from the autoconfig 275 + * function in drivers/tty/serial/8250/8250_port.c 276 + */ 277 + scratch = sinp(UART_IER); 278 + soutp(UART_IER, 0); 279 + #ifdef __i386__ 280 + outb(0xff, 0x080); 281 + #endif 282 + scratch2 = sinp(UART_IER) & 0x0f; 283 + soutp(UART_IER, 0x0f); 284 + #ifdef __i386__ 285 + outb(0x00, 0x080); 286 + #endif 287 + scratch3 = sinp(UART_IER) & 0x0f; 288 + soutp(UART_IER, scratch); 289 + if (scratch2 != 0 || scratch3 != 0x0f) { 290 + /* we fail, there's nothing here */ 291 + spin_unlock_irqrestore(&hardware_lock, flags); 292 + pr_err("port existence test failed, cannot continue\n"); 293 + return -ENODEV; 294 + } 295 + 271 296 /* reset UART */ 272 297 outb(0, io + UART_MCR); 273 298 outb(0, io + UART_IER); ··· 310 285 /* turn on UART */ 311 286 outb(UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2, io + UART_MCR); 312 287 spin_unlock_irqrestore(&hardware_lock, flags); 288 + 289 + return 0; 313 290 } 314 291 315 292 static void drop_hardware(void) ··· 361 334 pr_err("IRQ %d already in use.\n", irq); 362 335 return retval; 363 336 } 337 + 338 + retval = init_hardware(); 339 + if (retval) { 340 + del_timer_sync(&timerlist); 341 + return retval; 342 + } 343 + 364 344 pr_info("I/O port 0x%.4x, IRQ %d.\n", io, irq); 365 345 366 346 retval = devm_rc_register_device(&sir_ir_dev->dev, rcdev); 367 347 if (retval < 0) 368 348 return retval; 369 - 370 - init_hardware(); 371 349 372 350 return 0; 373 351 }
+3 -3
drivers/media/rc/st_rc.c
··· 49 49 #define IRB_RX_NOISE_SUPPR 0x5c /* noise suppression */ 50 50 #define IRB_RX_POLARITY_INV 0x68 /* polarity inverter */ 51 51 52 - /** 52 + /* 53 53 * IRQ set: Enable full FIFO 1 -> bit 3; 54 54 * Enable overrun IRQ 1 -> bit 2; 55 55 * Enable last symbol IRQ 1 -> bit 1: ··· 72 72 ir_raw_event_store(rdev, &ev); 73 73 } 74 74 75 - /** 75 + /* 76 76 * RX graphical example to better understand the difference between ST IR block 77 77 * output and standard definition used by LIRC (and most of the world!) 78 78 * ··· 317 317 device_init_wakeup(dev, true); 318 318 dev_pm_set_wake_irq(dev, rc_dev->irq); 319 319 320 - /** 320 + /* 321 321 * for LIRC_MODE_MODE2 or LIRC_MODE_PULSE or LIRC_MODE_RAW 322 322 * lircd expects a long space first before a signal train to sync. 323 323 */
+3 -3
drivers/media/rc/streamzap.c
··· 191 191 sz_push_full_space(sz, value & SZ_SPACE_MASK); 192 192 } 193 193 194 - /** 194 + /* 195 195 * streamzap_callback - usb IRQ handler callback 196 196 * 197 197 * This procedure is invoked on reception of data from ··· 321 321 return NULL; 322 322 } 323 323 324 - /** 324 + /* 325 325 * streamzap_probe 326 326 * 327 327 * Called by usb-core to associated with a candidate device ··· 450 450 return retval; 451 451 } 452 452 453 - /** 453 + /* 454 454 * streamzap_disconnect 455 455 * 456 456 * Called by the usb core when the device is removed from the system.
+2 -4
drivers/media/tuners/mt2063.c
··· 1397 1397 * risk of overflow. It accurately calculates 1398 1398 * f_ref * num / denom to within 1 HZ with fixed math. 1399 1399 * 1400 - * @num : Fractional portion of the multiplier 1400 + * @f_ref: SRO frequency. 1401 + * @num: Fractional portion of the multiplier 1401 1402 * @denom: denominator portion of the ratio 1402 - * @f_Ref: SRO frequency. 1403 1403 * 1404 1404 * This calculation handles f_ref as two separate 14-bit fields. 1405 1405 * Therefore, a maximum value of 2^28-1 may safely be used for f_ref. ··· 1464 1464 * @f_LO: desired LO frequency. 1465 1465 * @f_LO_Step: Minimum step size for the LO (in Hz). 1466 1466 * @f_Ref: SRO frequency. 1467 - * @f_Avoid: Range of PLL frequencies to avoid near 1468 - * integer multiples of f_Ref (in Hz). 1469 1467 * 1470 1468 * Returns: Recalculated LO frequency. 1471 1469 */
+1 -1
drivers/media/usb/dvb-usb/cinergyT2-fe.c
··· 26 26 #include "cinergyT2.h" 27 27 28 28 29 - /** 29 + /* 30 30 * convert linux-dvb frontend parameter set into TPS. 31 31 * See ETSI ETS-300744, section 4.6.2, table 9 for details. 32 32 *
+4 -4
drivers/media/usb/dvb-usb/dib0700_devices.c
··· 1677 1677 return -EINVAL; 1678 1678 } 1679 1679 1680 - /** Update PLL if needed ratio **/ 1680 + /* Update PLL if needed ratio */ 1681 1681 state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, 0); 1682 1682 1683 - /** Get optimize PLL ratio to remove spurious **/ 1683 + /* Get optimize PLL ratio to remove spurious */ 1684 1684 pll_ratio = dib8090_compute_pll_parameters(fe); 1685 1685 if (pll_ratio == 17) 1686 1686 timf = 21387946; ··· 1691 1691 else 1692 1692 timf = 18179756; 1693 1693 1694 - /** Update ratio **/ 1694 + /* Update ratio */ 1695 1695 state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, pll_ratio); 1696 1696 1697 1697 state->dib8000_ops.ctrl_timf(fe, DEMOD_TIMF_SET, timf); ··· 3357 3357 return state->sleep(fe); 3358 3358 } 3359 3359 3360 - /** 3360 + /* 3361 3361 * novatd_frontend_attach - Nova-TD specific attach 3362 3362 * 3363 3363 * Nova-TD has GPIO0, 1 and 2 for LEDs. So do not fiddle with them except for
+14 -2
drivers/media/usb/dvb-usb/dibusb-common.c
··· 223 223 224 224 int dibusb_read_eeprom_byte(struct dvb_usb_device *d, u8 offs, u8 *val) 225 225 { 226 - u8 wbuf[1] = { offs }; 227 - return dibusb_i2c_msg(d, 0x50, wbuf, 1, val, 1); 226 + u8 *buf; 227 + int rc; 228 + 229 + buf = kmalloc(2, GFP_KERNEL); 230 + if (!buf) 231 + return -ENOMEM; 232 + 233 + buf[0] = offs; 234 + 235 + rc = dibusb_i2c_msg(d, 0x50, &buf[0], 1, &buf[1], 1); 236 + *val = buf[1]; 237 + kfree(buf); 238 + 239 + return rc; 228 240 } 229 241 EXPORT_SYMBOL(dibusb_read_eeprom_byte); 230 242
+1 -1
drivers/media/usb/dvb-usb/friio-fe.c
··· 297 297 } 298 298 299 299 300 - /** 300 + /* 301 301 * (reg, val) commad list to initialize this module. 302 302 * captured on a Windows box. 303 303 */
+1 -1
drivers/media/usb/dvb-usb/friio.c
··· 21 21 22 22 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); 23 23 24 - /** 24 + /* 25 25 * Indirect I2C access to the PLL via FE. 26 26 * whole I2C protocol data to the PLL is sent via the FE's I2C register. 27 27 * This is done by a control msg to the FE with the I2C data accompanied, and
+1 -1
drivers/media/usb/gspca/ov519.c
··· 1 - /** 1 + /* 2 2 * OV519 driver 3 3 * 4 4 * Copyright (C) 2008-2011 Jean-François Moine <moinejf@free.fr>
+3 -4
drivers/media/usb/pwc/pwc-dec23.c
··· 649 649 } 650 650 651 651 /** 652 - * 653 652 * Uncompress a pwc23 buffer. 654 - * 655 - * src: raw data 656 - * dst: image output 653 + * @pdev: pointer to pwc device's internal struct 654 + * @src: raw data 655 + * @dst: image output 657 656 */ 658 657 void pwc_dec23_decompress(struct pwc_device *pdev, 659 658 const void *src,
+2 -2
drivers/media/usb/siano/smsusb.c
··· 74 74 static int smsusb_submit_urb(struct smsusb_device_t *dev, 75 75 struct smsusb_urb_t *surb); 76 76 77 - /** 77 + /* 78 78 * Completing URB's callback handler - bottom half (proccess context) 79 79 * submits the URB prepared on smsusb_onresponse() 80 80 */ ··· 86 86 smsusb_submit_urb(dev, surb); 87 87 } 88 88 89 - /** 89 + /* 90 90 * Completing URB's callback handler - top half (interrupt context) 91 91 * adds completing sms urb to the global surbs list and activtes the worker 92 92 * thread the surb
+3 -3
drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c
··· 76 76 #define TTUSB_REV_2_2 0x22 77 77 #define TTUSB_BUDGET_NAME "ttusb_stc_fw" 78 78 79 - /** 79 + /* 80 80 * since we're casting (struct ttusb*) <-> (struct dvb_demux*) around 81 81 * the dvb_demux field must be the first in struct!! 82 82 */ ··· 713 713 } 714 714 } 715 715 716 - /** 716 + /* 717 717 * if length is valid and we reached the end: 718 718 * goto next muxpack 719 719 */ ··· 729 729 /* maximum bytes, until we know the length */ 730 730 ttusb->muxpack_len = 2; 731 731 732 - /** 732 + /* 733 733 * no muxpacks left? 734 734 * return to search-sync state 735 735 */
+1
drivers/media/usb/usbtv/usbtv-core.c
··· 144 144 145 145 static const struct usb_device_id usbtv_id_table[] = { 146 146 { USB_DEVICE(0x1b71, 0x3002) }, 147 + { USB_DEVICE(0x1f71, 0x3301) }, 147 148 {} 148 149 }; 149 150 MODULE_DEVICE_TABLE(usb, usbtv_id_table);
+3 -1
drivers/media/v4l2-core/tuner-core.c
··· 239 239 * @type: type of the tuner (e. g. tuner number) 240 240 * @new_mode_mask: Indicates if tuner supports TV and/or Radio 241 241 * @new_config: an optional parameter used by a few tuners to adjust 242 - internal parameters, like LNA mode 242 + * internal parameters, like LNA mode 243 243 * @tuner_callback: an optional function to be called when switching 244 244 * to analog mode 245 245 * ··· 750 750 /** 751 751 * check_mode - Verify if tuner supports the requested mode 752 752 * @t: a pointer to the module's internal struct_tuner 753 + * @mode: mode of the tuner, as defined by &enum v4l2_tuner_type. 753 754 * 754 755 * This function checks if the tuner is capable of tuning analog TV, 755 756 * digital TV or radio, depending on what the caller wants. If the ··· 758 757 * returns 0. 759 758 * This function is needed for boards that have a separate tuner for 760 759 * radio (like devices with tea5767). 760 + * 761 761 * NOTE: mt20xx uses V4L2_TUNER_DIGITAL_TV and calls set_tv_freq to 762 762 * select a TV frequency. So, t_mode = T_ANALOG_TV could actually 763 763 * be used to represent a Digital TV too.
+1 -2
drivers/media/v4l2-core/v4l2-async.c
··· 558 558 if (!asd) 559 559 continue; 560 560 561 - ret = v4l2_async_match_notify(notifier, notifier->v4l2_dev, sd, 562 - asd); 561 + ret = v4l2_async_match_notify(notifier, v4l2_dev, sd, asd); 563 562 if (ret) 564 563 goto err_unbind; 565 564
+5 -5
drivers/media/v4l2-core/v4l2-dv-timings.c
··· 245 245 246 246 /** 247 247 * v4l2_match_dv_timings - check if two timings match 248 - * @t1 - compare this v4l2_dv_timings struct... 249 - * @t2 - with this struct. 250 - * @pclock_delta - the allowed pixelclock deviation. 251 - * @match_reduced_fps - if true, then fail if V4L2_DV_FL_REDUCED_FPS does not 252 - * match. 248 + * @t1: compare this v4l2_dv_timings struct... 249 + * @t2: with this struct. 250 + * @pclock_delta: the allowed pixelclock deviation. 251 + * @match_reduced_fps: if true, then fail if V4L2_DV_FL_REDUCED_FPS does not 252 + * match. 253 253 * 254 254 * Compare t1 with t2 with a given margin of error for the pixelclock. 255 255 */
+5 -5
drivers/media/v4l2-core/v4l2-fwnode.c
··· 458 458 if (!is_available) 459 459 continue; 460 460 461 - if (WARN_ON(notifier->num_subdevs >= notifier->max_subdevs)) { 462 - ret = -EINVAL; 463 - break; 464 - } 465 - 466 461 if (has_port) { 467 462 struct fwnode_endpoint ep; 468 463 ··· 467 472 468 473 if (ep.port != port) 469 474 continue; 475 + } 476 + 477 + if (WARN_ON(notifier->num_subdevs >= notifier->max_subdevs)) { 478 + ret = -EINVAL; 479 + break; 470 480 } 471 481 472 482 ret = v4l2_async_notifier_fwnode_parse_endpoint(
+2
drivers/media/v4l2-core/v4l2-mem2mem.c
··· 183 183 184 184 /** 185 185 * v4l2_m2m_try_run() - select next job to perform and run it if possible 186 + * @m2m_dev: per-device context 186 187 * 187 188 * Get next transaction (if present) from the waiting jobs list and run it. 188 189 */ ··· 282 281 283 282 /** 284 283 * v4l2_m2m_cancel_job() - cancel pending jobs for the context 284 + * @m2m_ctx: m2m context with jobs to be canceled 285 285 * 286 286 * In case of streamoff or release called on any context, 287 287 * 1] If the context is currently running, then abort job will be called
+1 -1
drivers/media/v4l2-core/videobuf-core.c
··· 222 222 } 223 223 EXPORT_SYMBOL_GPL(videobuf_queue_is_busy); 224 224 225 - /** 225 + /* 226 226 * __videobuf_free() - free all the buffers and their control structures 227 227 * 228 228 * This function can only be called if streaming/reading is off, i.e. no buffers
+28 -28
drivers/media/v4l2-core/videobuf2-core.c
··· 188 188 static void __vb2_queue_cancel(struct vb2_queue *q); 189 189 static void __enqueue_in_driver(struct vb2_buffer *vb); 190 190 191 - /** 191 + /* 192 192 * __vb2_buf_mem_alloc() - allocate video memory for the given buffer 193 193 */ 194 194 static int __vb2_buf_mem_alloc(struct vb2_buffer *vb) ··· 229 229 return ret; 230 230 } 231 231 232 - /** 232 + /* 233 233 * __vb2_buf_mem_free() - free memory of the given buffer 234 234 */ 235 235 static void __vb2_buf_mem_free(struct vb2_buffer *vb) ··· 243 243 } 244 244 } 245 245 246 - /** 246 + /* 247 247 * __vb2_buf_userptr_put() - release userspace memory associated with 248 248 * a USERPTR buffer 249 249 */ ··· 258 258 } 259 259 } 260 260 261 - /** 261 + /* 262 262 * __vb2_plane_dmabuf_put() - release memory associated with 263 263 * a DMABUF shared plane 264 264 */ ··· 277 277 p->dbuf_mapped = 0; 278 278 } 279 279 280 - /** 280 + /* 281 281 * __vb2_buf_dmabuf_put() - release memory associated with 282 282 * a DMABUF shared buffer 283 283 */ ··· 289 289 __vb2_plane_dmabuf_put(vb, &vb->planes[plane]); 290 290 } 291 291 292 - /** 292 + /* 293 293 * __setup_offsets() - setup unique offsets ("cookies") for every plane in 294 294 * the buffer. 295 295 */ ··· 317 317 } 318 318 } 319 319 320 - /** 320 + /* 321 321 * __vb2_queue_alloc() - allocate videobuf buffer structures and (for MMAP type) 322 322 * video buffer memory for all buffers/planes on the queue and initializes the 323 323 * queue ··· 386 386 return buffer; 387 387 } 388 388 389 - /** 389 + /* 390 390 * __vb2_free_mem() - release all video buffer memory for a given queue 391 391 */ 392 392 static void __vb2_free_mem(struct vb2_queue *q, unsigned int buffers) ··· 410 410 } 411 411 } 412 412 413 - /** 413 + /* 414 414 * __vb2_queue_free() - free buffers at the end of the queue - video memory and 415 415 * related information, if no buffers are left return the queue to an 416 416 * uninitialized state. Might be called even if the queue has already been freed. ··· 544 544 } 545 545 EXPORT_SYMBOL(vb2_buffer_in_use); 546 546 547 - /** 547 + /* 548 548 * __buffers_in_use() - return true if any buffers on the queue are in use and 549 549 * the queue cannot be freed (by the means of REQBUFS(0)) call 550 550 */ ··· 564 564 } 565 565 EXPORT_SYMBOL_GPL(vb2_core_querybuf); 566 566 567 - /** 567 + /* 568 568 * __verify_userptr_ops() - verify that all memory operations required for 569 569 * USERPTR queue type have been provided 570 570 */ ··· 577 577 return 0; 578 578 } 579 579 580 - /** 580 + /* 581 581 * __verify_mmap_ops() - verify that all memory operations required for 582 582 * MMAP queue type have been provided 583 583 */ ··· 590 590 return 0; 591 591 } 592 592 593 - /** 593 + /* 594 594 * __verify_dmabuf_ops() - verify that all memory operations required for 595 595 * DMABUF queue type have been provided 596 596 */ ··· 953 953 } 954 954 EXPORT_SYMBOL_GPL(vb2_discard_done); 955 955 956 - /** 956 + /* 957 957 * __prepare_mmap() - prepare an MMAP buffer 958 958 */ 959 959 static int __prepare_mmap(struct vb2_buffer *vb, const void *pb) ··· 966 966 return ret ? ret : call_vb_qop(vb, buf_prepare, vb); 967 967 } 968 968 969 - /** 969 + /* 970 970 * __prepare_userptr() - prepare a USERPTR buffer 971 971 */ 972 972 static int __prepare_userptr(struct vb2_buffer *vb, const void *pb) ··· 1082 1082 return ret; 1083 1083 } 1084 1084 1085 - /** 1085 + /* 1086 1086 * __prepare_dmabuf() - prepare a DMABUF buffer 1087 1087 */ 1088 1088 static int __prepare_dmabuf(struct vb2_buffer *vb, const void *pb) ··· 1215 1215 return ret; 1216 1216 } 1217 1217 1218 - /** 1218 + /* 1219 1219 * __enqueue_in_driver() - enqueue a vb2_buffer in driver for processing 1220 1220 */ 1221 1221 static void __enqueue_in_driver(struct vb2_buffer *vb) ··· 1298 1298 } 1299 1299 EXPORT_SYMBOL_GPL(vb2_core_prepare_buf); 1300 1300 1301 - /** 1301 + /* 1302 1302 * vb2_start_streaming() - Attempt to start streaming. 1303 1303 * @q: videobuf2 queue 1304 1304 * ··· 1427 1427 } 1428 1428 EXPORT_SYMBOL_GPL(vb2_core_qbuf); 1429 1429 1430 - /** 1430 + /* 1431 1431 * __vb2_wait_for_done_vb() - wait for a buffer to become available 1432 1432 * for dequeuing 1433 1433 * ··· 1502 1502 return 0; 1503 1503 } 1504 1504 1505 - /** 1505 + /* 1506 1506 * __vb2_get_done_vb() - get a buffer ready for dequeuing 1507 1507 * 1508 1508 * Will sleep if required for nonblocking == false. ··· 1553 1553 } 1554 1554 EXPORT_SYMBOL_GPL(vb2_wait_for_all_buffers); 1555 1555 1556 - /** 1556 + /* 1557 1557 * __vb2_dqbuf() - bring back the buffer to the DEQUEUED state 1558 1558 */ 1559 1559 static void __vb2_dqbuf(struct vb2_buffer *vb) ··· 1625 1625 } 1626 1626 EXPORT_SYMBOL_GPL(vb2_core_dqbuf); 1627 1627 1628 - /** 1628 + /* 1629 1629 * __vb2_queue_cancel() - cancel and stop (pause) streaming 1630 1630 * 1631 1631 * Removes all queued buffers from driver's queue and all buffers queued by ··· 1773 1773 } 1774 1774 EXPORT_SYMBOL_GPL(vb2_core_streamoff); 1775 1775 1776 - /** 1776 + /* 1777 1777 * __find_plane_by_offset() - find plane associated with the given offset off 1778 1778 */ 1779 1779 static int __find_plane_by_offset(struct vb2_queue *q, unsigned long off, ··· 2104 2104 } 2105 2105 EXPORT_SYMBOL_GPL(vb2_core_poll); 2106 2106 2107 - /** 2107 + /* 2108 2108 * struct vb2_fileio_buf - buffer context used by file io emulator 2109 2109 * 2110 2110 * vb2 provides a compatibility layer and emulator of file io (read and ··· 2118 2118 unsigned int queued:1; 2119 2119 }; 2120 2120 2121 - /** 2121 + /* 2122 2122 * struct vb2_fileio_data - queue context used by file io emulator 2123 2123 * 2124 2124 * @cur_index: the index of the buffer currently being read from or ··· 2155 2155 unsigned write_immediately:1; 2156 2156 }; 2157 2157 2158 - /** 2158 + /* 2159 2159 * __vb2_init_fileio() - initialize file io emulator 2160 2160 * @q: videobuf2 queue 2161 2161 * @read: mode selector (1 means read, 0 means write) ··· 2274 2274 return ret; 2275 2275 } 2276 2276 2277 - /** 2277 + /* 2278 2278 * __vb2_cleanup_fileio() - free resourced used by file io emulator 2279 2279 * @q: videobuf2 queue 2280 2280 */ ··· 2293 2293 return 0; 2294 2294 } 2295 2295 2296 - /** 2296 + /* 2297 2297 * __vb2_perform_fileio() - perform a single file io (read or write) operation 2298 2298 * @q: videobuf2 queue 2299 2299 * @data: pointed to target userspace buffer
+1 -1
drivers/media/v4l2-core/videobuf2-memops.c
··· 120 120 h->put(h->arg); 121 121 } 122 122 123 - /** 123 + /* 124 124 * vb2_common_vm_ops - common vm_ops used for tracking refcount of mmaped 125 125 * video buffers 126 126 */
+5 -5
drivers/media/v4l2-core/videobuf2-v4l2.c
··· 49 49 #define V4L2_BUFFER_OUT_FLAGS (V4L2_BUF_FLAG_PFRAME | V4L2_BUF_FLAG_BFRAME | \ 50 50 V4L2_BUF_FLAG_KEYFRAME | V4L2_BUF_FLAG_TIMECODE) 51 51 52 - /** 52 + /* 53 53 * __verify_planes_array() - verify that the planes array passed in struct 54 54 * v4l2_buffer from userspace can be safely used 55 55 */ ··· 78 78 return __verify_planes_array(vb, pb); 79 79 } 80 80 81 - /** 81 + /* 82 82 * __verify_length() - Verify that the bytesused value for each plane fits in 83 83 * the plane length and that the data offset doesn't exceed the bytesused value. 84 84 */ ··· 181 181 return __verify_planes_array(q->bufs[b->index], b); 182 182 } 183 183 184 - /** 184 + /* 185 185 * __fill_v4l2_buffer() - fill in a struct v4l2_buffer with information to be 186 186 * returned to userspace 187 187 */ ··· 286 286 q->last_buffer_dequeued = true; 287 287 } 288 288 289 - /** 289 + /* 290 290 * __fill_vb2_buffer() - fill a vb2_buffer with information provided in a 291 291 * v4l2_buffer by the userspace. It also verifies that struct 292 292 * v4l2_buffer has a valid number of planes. ··· 446 446 .copy_timestamp = __copy_timestamp, 447 447 }; 448 448 449 - /** 449 + /* 450 450 * vb2_querybuf() - query video buffer information 451 451 * @q: videobuf queue 452 452 * @b: buffer struct passed from userspace to vidioc_querybuf handler
+17 -17
drivers/staging/media/atomisp/include/linux/atomisp.h
··· 208 208 }; 209 209 210 210 211 - /** DVS 2.0 Coefficient types. This structure contains 4 pointers to 211 + /* DVS 2.0 Coefficient types. This structure contains 4 pointers to 212 212 * arrays that contain the coeffients for each type. 213 213 */ 214 214 struct atomisp_dvs2_coef_types { 215 - short __user *odd_real; /**< real part of the odd coefficients*/ 216 - short __user *odd_imag; /**< imaginary part of the odd coefficients*/ 217 - short __user *even_real;/**< real part of the even coefficients*/ 218 - short __user *even_imag;/**< imaginary part of the even coefficients*/ 215 + short __user *odd_real; /** real part of the odd coefficients*/ 216 + short __user *odd_imag; /** imaginary part of the odd coefficients*/ 217 + short __user *even_real;/** real part of the even coefficients*/ 218 + short __user *even_imag;/** imaginary part of the even coefficients*/ 219 219 }; 220 220 221 221 /* ··· 223 223 * arrays that contain the statistics for each type. 224 224 */ 225 225 struct atomisp_dvs2_stat_types { 226 - int __user *odd_real; /**< real part of the odd statistics*/ 227 - int __user *odd_imag; /**< imaginary part of the odd statistics*/ 228 - int __user *even_real;/**< real part of the even statistics*/ 229 - int __user *even_imag;/**< imaginary part of the even statistics*/ 226 + int __user *odd_real; /** real part of the odd statistics*/ 227 + int __user *odd_imag; /** imaginary part of the odd statistics*/ 228 + int __user *even_real;/** real part of the even statistics*/ 229 + int __user *even_imag;/** imaginary part of the even statistics*/ 230 230 }; 231 231 232 232 struct atomisp_dis_coefficients { ··· 390 390 * Generic resolution structure. 391 391 */ 392 392 struct atomisp_resolution { 393 - uint32_t width; /**< Width */ 394 - uint32_t height; /**< Height */ 393 + uint32_t width; /** Width */ 394 + uint32_t height; /** Height */ 395 395 }; 396 396 397 397 /* 398 398 * This specifies the coordinates (x,y) 399 399 */ 400 400 struct atomisp_zoom_point { 401 - int32_t x; /**< x coordinate */ 402 - int32_t y; /**< y coordinate */ 401 + int32_t x; /** x coordinate */ 402 + int32_t y; /** y coordinate */ 403 403 }; 404 404 405 405 /* ··· 411 411 }; 412 412 413 413 struct atomisp_dz_config { 414 - uint32_t dx; /**< Horizontal zoom factor */ 415 - uint32_t dy; /**< Vertical zoom factor */ 416 - struct atomisp_zoom_region zoom_region; /**< region for zoom */ 414 + uint32_t dx; /** Horizontal zoom factor */ 415 + uint32_t dy; /** Vertical zoom factor */ 416 + struct atomisp_zoom_region zoom_region; /** region for zoom */ 417 417 }; 418 418 419 419 struct atomisp_parm { ··· 758 758 ATOMISP_ACC_ARG_FRAME /* Frame argument */ 759 759 }; 760 760 761 - /** ISP memories, isp2400 */ 761 + /* ISP memories, isp2400 */ 762 762 enum atomisp_acc_memory { 763 763 ATOMISP_ACC_MEMORY_PMEM0 = 0, 764 764 ATOMISP_ACC_MEMORY_DMEM0,
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c
··· 5187 5187 return 0; 5188 5188 } 5189 5189 5190 - /** 5190 + /* 5191 5191 * Resets CSS parameters that depend on input resolution. 5192 5192 * 5193 5193 * Update params like CSS RAW binning, 2ppc mode and pp_input
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.c
··· 4051 4051 int atomisp_css_get_zoom_factor(struct atomisp_sub_device *asd, 4052 4052 unsigned int *zoom) 4053 4053 { 4054 - struct ia_css_dz_config dz_config; /**< Digital Zoom */ 4054 + struct ia_css_dz_config dz_config; /** Digital Zoom */ 4055 4055 struct ia_css_isp_config isp_config; 4056 4056 struct atomisp_device *isp = asd->isp; 4057 4057
+8 -8
drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.h
··· 28 28 }; 29 29 30 30 struct atomisp_dvs2_stat_types32 { 31 - compat_uptr_t odd_real; /**< real part of the odd statistics*/ 32 - compat_uptr_t odd_imag; /**< imaginary part of the odd statistics*/ 33 - compat_uptr_t even_real;/**< real part of the even statistics*/ 34 - compat_uptr_t even_imag;/**< imaginary part of the even statistics*/ 31 + compat_uptr_t odd_real; /** real part of the odd statistics*/ 32 + compat_uptr_t odd_imag; /** imaginary part of the odd statistics*/ 33 + compat_uptr_t even_real;/** real part of the even statistics*/ 34 + compat_uptr_t even_imag;/** imaginary part of the even statistics*/ 35 35 }; 36 36 37 37 struct atomisp_dvs2_coef_types32 { 38 - compat_uptr_t odd_real; /**< real part of the odd coefficients*/ 39 - compat_uptr_t odd_imag; /**< imaginary part of the odd coefficients*/ 40 - compat_uptr_t even_real;/**< real part of the even coefficients*/ 41 - compat_uptr_t even_imag;/**< imaginary part of the even coefficients*/ 38 + compat_uptr_t odd_real; /** real part of the odd coefficients*/ 39 + compat_uptr_t odd_imag; /** imaginary part of the odd coefficients*/ 40 + compat_uptr_t even_real;/** real part of the even coefficients*/ 41 + compat_uptr_t even_imag;/** imaginary part of the even coefficients*/ 42 42 }; 43 43 44 44 struct atomisp_dvs2_statistics32 {
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.h
··· 223 223 224 224 bool dis_proj_data_valid; 225 225 226 - struct ia_css_dz_config dz_config; /**< Digital Zoom */ 226 + struct ia_css_dz_config dz_config; /** Digital Zoom */ 227 227 struct ia_css_capture_config capture_config; 228 228 229 229 struct atomisp_css_isp_config config;
+13 -13
drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/src/circbuf.c
··· 21 21 * Forward declarations. 22 22 * 23 23 **********************************************************************/ 24 - /** 24 + /* 25 25 * @brief Read the oldest element from the circular buffer. 26 26 * Read the oldest element WITHOUT checking whehter the 27 27 * circular buffer is empty or not. The oldest element is ··· 34 34 static inline ia_css_circbuf_elem_t 35 35 ia_css_circbuf_read(ia_css_circbuf_t *cb); 36 36 37 - /** 37 + /* 38 38 * @brief Shift a chunk of elements in the circular buffer. 39 39 * A chunk of elements (i.e. the ones from the "start" position 40 40 * to the "chunk_src" position) are shifted in the circular buffer, ··· 48 48 uint32_t chunk_src, 49 49 uint32_t chunk_dest); 50 50 51 - /** 51 + /* 52 52 * @brief Get the "val" field in the element. 53 53 * 54 54 * @param elem The pointer to the element. ··· 63 63 * Non-inline functions. 64 64 * 65 65 **********************************************************************/ 66 - /** 66 + /* 67 67 * @brief Create the circular buffer. 68 68 * Refer to "ia_css_circbuf.h" for details. 69 69 */ ··· 88 88 cb->elems = elems; 89 89 } 90 90 91 - /** 91 + /* 92 92 * @brief Destroy the circular buffer. 93 93 * Refer to "ia_css_circbuf.h" for details. 94 94 */ ··· 99 99 cb->elems = NULL; 100 100 } 101 101 102 - /** 102 + /* 103 103 * @brief Pop a value out of the circular buffer. 104 104 * Refer to "ia_css_circbuf.h" for details. 105 105 */ ··· 116 116 return ret; 117 117 } 118 118 119 - /** 119 + /* 120 120 * @brief Extract a value out of the circular buffer. 121 121 * Refer to "ia_css_circbuf.h" for details. 122 122 */ ··· 166 166 return val; 167 167 } 168 168 169 - /** 169 + /* 170 170 * @brief Peek an element from the circular buffer. 171 171 * Refer to "ia_css_circbuf.h" for details. 172 172 */ ··· 180 180 return cb->elems[pos].val; 181 181 } 182 182 183 - /** 183 + /* 184 184 * @brief Get the value of an element from the circular buffer. 185 185 * Refer to "ia_css_circbuf.h" for details. 186 186 */ ··· 194 194 return cb->elems[pos].val; 195 195 } 196 196 197 - /** @brief increase size of a circular buffer. 197 + /* @brief increase size of a circular buffer. 198 198 * Use 'CAUTION' before using this function. This was added to 199 199 * support / fix issue with increasing size for tagger only 200 200 * Please refer to "ia_css_circbuf.h" for details. ··· 252 252 * Inline functions. 253 253 * 254 254 ****************************************************************/ 255 - /** 255 + /* 256 256 * @brief Get the "val" field in the element. 257 257 * Refer to "Forward declarations" for details. 258 258 */ ··· 262 262 return elem->val; 263 263 } 264 264 265 - /** 265 + /* 266 266 * @brief Read the oldest element from the circular buffer. 267 267 * Refer to "Forward declarations" for details. 268 268 */ ··· 282 282 return elem; 283 283 } 284 284 285 - /** 285 + /* 286 286 * @brief Shift a chunk of elements in the circular buffer. 287 287 * Refer to "Forward declarations" for details. 288 288 */
+17 -17
drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_binarydesc.h
··· 19 19 #include <ia_css_frame_public.h> /* ia_css_frame_info */ 20 20 #include <ia_css_binary.h> /* ia_css_binary_descr */ 21 21 22 - /** @brief Get a binary descriptor for copy. 22 + /* @brief Get a binary descriptor for copy. 23 23 * 24 24 * @param[in] pipe 25 25 * @param[out] copy_desc ··· 36 36 struct ia_css_frame_info *out_info, 37 37 struct ia_css_frame_info *vf_info); 38 38 39 - /** @brief Get a binary descriptor for vfpp. 39 + /* @brief Get a binary descriptor for vfpp. 40 40 * 41 41 * @param[in] pipe 42 42 * @param[out] vfpp_descr ··· 51 51 struct ia_css_frame_info *in_info, 52 52 struct ia_css_frame_info *out_info); 53 53 54 - /** @brief Get numerator and denominator of bayer downscaling factor. 54 + /* @brief Get numerator and denominator of bayer downscaling factor. 55 55 * 56 56 * @param[in] bds_factor: The bayer downscaling factor. 57 57 * (= The bds_factor member in the sh_css_bds_factor structure.) ··· 67 67 unsigned int *bds_factor_numerator, 68 68 unsigned int *bds_factor_denominator); 69 69 70 - /** @brief Get a binary descriptor for preview stage. 70 + /* @brief Get a binary descriptor for preview stage. 71 71 * 72 72 * @param[in] pipe 73 73 * @param[out] preview_descr ··· 86 86 struct ia_css_frame_info *out_info, 87 87 struct ia_css_frame_info *vf_info); 88 88 89 - /** @brief Get a binary descriptor for video stage. 89 + /* @brief Get a binary descriptor for video stage. 90 90 * 91 91 * @param[in/out] pipe 92 92 * @param[out] video_descr ··· 105 105 struct ia_css_frame_info *vf_info, 106 106 int stream_config_left_padding); 107 107 108 - /** @brief Get a binary descriptor for yuv scaler stage. 108 + /* @brief Get a binary descriptor for yuv scaler stage. 109 109 * 110 110 * @param[in/out] pipe 111 111 * @param[out] yuv_scaler_descr ··· 124 124 struct ia_css_frame_info *internal_out_info, 125 125 struct ia_css_frame_info *vf_info); 126 126 127 - /** @brief Get a binary descriptor for capture pp stage. 127 + /* @brief Get a binary descriptor for capture pp stage. 128 128 * 129 129 * @param[in/out] pipe 130 130 * @param[out] capture_pp_descr ··· 140 140 struct ia_css_frame_info *out_info, 141 141 struct ia_css_frame_info *vf_info); 142 142 143 - /** @brief Get a binary descriptor for primary capture. 143 + /* @brief Get a binary descriptor for primary capture. 144 144 * 145 145 * @param[in] pipe 146 146 * @param[out] prim_descr ··· 158 158 struct ia_css_frame_info *vf_info, 159 159 unsigned int stage_idx); 160 160 161 - /** @brief Get a binary descriptor for pre gdc stage. 161 + /* @brief Get a binary descriptor for pre gdc stage. 162 162 * 163 163 * @param[in] pipe 164 164 * @param[out] pre_gdc_descr ··· 173 173 struct ia_css_frame_info *in_info, 174 174 struct ia_css_frame_info *out_info); 175 175 176 - /** @brief Get a binary descriptor for gdc stage. 176 + /* @brief Get a binary descriptor for gdc stage. 177 177 * 178 178 * @param[in] pipe 179 179 * @param[out] gdc_descr ··· 188 188 struct ia_css_frame_info *in_info, 189 189 struct ia_css_frame_info *out_info); 190 190 191 - /** @brief Get a binary descriptor for post gdc. 191 + /* @brief Get a binary descriptor for post gdc. 192 192 * 193 193 * @param[in] pipe 194 194 * @param[out] post_gdc_descr ··· 205 205 struct ia_css_frame_info *out_info, 206 206 struct ia_css_frame_info *vf_info); 207 207 208 - /** @brief Get a binary descriptor for de. 208 + /* @brief Get a binary descriptor for de. 209 209 * 210 210 * @param[in] pipe 211 211 * @param[out] pre_de_descr ··· 220 220 struct ia_css_frame_info *in_info, 221 221 struct ia_css_frame_info *out_info); 222 222 223 - /** @brief Get a binary descriptor for pre anr stage. 223 + /* @brief Get a binary descriptor for pre anr stage. 224 224 * 225 225 * @param[in] pipe 226 226 * @param[out] pre_anr_descr ··· 235 235 struct ia_css_frame_info *in_info, 236 236 struct ia_css_frame_info *out_info); 237 237 238 - /** @brief Get a binary descriptor for ANR stage. 238 + /* @brief Get a binary descriptor for ANR stage. 239 239 * 240 240 * @param[in] pipe 241 241 * @param[out] anr_descr ··· 250 250 struct ia_css_frame_info *in_info, 251 251 struct ia_css_frame_info *out_info); 252 252 253 - /** @brief Get a binary descriptor for post anr stage. 253 + /* @brief Get a binary descriptor for post anr stage. 254 254 * 255 255 * @param[in] pipe 256 256 * @param[out] post_anr_descr ··· 267 267 struct ia_css_frame_info *out_info, 268 268 struct ia_css_frame_info *vf_info); 269 269 270 - /** @brief Get a binary descriptor for ldc stage. 270 + /* @brief Get a binary descriptor for ldc stage. 271 271 * 272 272 * @param[in/out] pipe 273 273 * @param[out] capture_pp_descr ··· 282 282 struct ia_css_frame_info *in_info, 283 283 struct ia_css_frame_info *out_info); 284 284 285 - /** @brief Calculates the required BDS factor 285 + /* @brief Calculates the required BDS factor 286 286 * 287 287 * @param[in] input_res 288 288 * @param[in] output_res
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_util.h
··· 18 18 #include <ia_css_types.h> 19 19 #include <ia_css_frame_public.h> 20 20 21 - /** @brief Get Input format bits per pixel based on stream configuration of this 21 + /* @brief Get Input format bits per pixel based on stream configuration of this 22 22 * pipe. 23 23 * 24 24 * @param[in] pipe
+9 -9
drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/interface/ia_css_util.h
··· 22 22 #include <ia_css_stream_public.h> 23 23 #include <ia_css_stream_format.h> 24 24 25 - /** @brief convert "errno" error code to "ia_css_err" error code 25 + /* @brief convert "errno" error code to "ia_css_err" error code 26 26 * 27 27 * @param[in] "errno" error code 28 28 * @return "ia_css_err" error code ··· 31 31 enum ia_css_err ia_css_convert_errno( 32 32 int in_err); 33 33 34 - /** @brief check vf frame info. 34 + /* @brief check vf frame info. 35 35 * 36 36 * @param[in] info 37 37 * @return IA_CSS_SUCCESS or error code upon error. ··· 40 40 extern enum ia_css_err ia_css_util_check_vf_info( 41 41 const struct ia_css_frame_info * const info); 42 42 43 - /** @brief check input configuration. 43 + /* @brief check input configuration. 44 44 * 45 45 * @param[in] stream_config 46 46 * @param[in] must_be_raw ··· 52 52 bool must_be_raw, 53 53 bool must_be_yuv); 54 54 55 - /** @brief check vf and out frame info. 55 + /* @brief check vf and out frame info. 56 56 * 57 57 * @param[in] out_info 58 58 * @param[in] vf_info ··· 63 63 const struct ia_css_frame_info * const out_info, 64 64 const struct ia_css_frame_info * const vf_info); 65 65 66 - /** @brief check width and height 66 + /* @brief check width and height 67 67 * 68 68 * @param[in] width 69 69 * @param[in] height ··· 75 75 unsigned int height); 76 76 77 77 #ifdef ISP2401 78 - /** @brief compare resolutions (less or equal) 78 + /* @brief compare resolutions (less or equal) 79 79 * 80 80 * @param[in] a resolution 81 81 * @param[in] b resolution ··· 108 108 const struct ia_css_resolution resolution); 109 109 110 110 #endif 111 - /** @brief check width and height 111 + /* @brief check width and height 112 112 * 113 113 * @param[in] stream_format 114 114 * @param[in] two_ppc ··· 119 119 enum ia_css_stream_format stream_format, 120 120 bool two_ppc); 121 121 122 - /** @brief check if input format it raw 122 + /* @brief check if input format it raw 123 123 * 124 124 * @param[in] stream_format 125 125 * @return true if the input format is raw or false otherwise ··· 128 128 extern bool ia_css_util_is_input_format_raw( 129 129 enum ia_css_stream_format stream_format); 130 130 131 - /** @brief check if input format it yuv 131 + /* @brief check if input format it yuv 132 132 * 133 133 * @param[in] stream_format 134 134 * @return true if the input format is yuv or false otherwise
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_private.h
··· 277 277 278 278 ia_css_device_store_uint32(CSI_RX_BE_CTRL_BASE[ID] + reg*sizeof(hrt_data), value); 279 279 } 280 - /** end of DLI */ 280 + /* end of DLI */ 281 281 282 282 #endif /* __CSI_RX_PRIVATE_H_INCLUDED__ */
+2 -2
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl_private.h
··· 192 192 ia_css_print("IBUF controller ID %d Process ID %d isp_sync_state 0x%x\n", ID, i, state->proc_state[i].isp_sync_state); 193 193 } 194 194 } 195 - /** end of NCI */ 195 + /* end of NCI */ 196 196 197 197 /***************************************************** 198 198 * ··· 227 227 228 228 ia_css_device_store_uint32(IBUF_CTRL_BASE[ID] + reg*sizeof(hrt_data), value); 229 229 } 230 - /** end of DLI */ 230 + /* end of DLI */ 231 231 232 232 233 233 #endif /* __IBUF_CTRL_PRIVATE_H_INCLUDED__ */
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq.c
··· 26 26 #include "isys_irq_private.h" 27 27 #endif 28 28 29 - /** Public interface */ 29 + /* Public interface */ 30 30 STORAGE_CLASS_ISYS2401_IRQ_C void isys_irqc_status_enable( 31 31 const isys_irq_ID_t isys_irqc_id) 32 32 {
+2 -2
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_private.h
··· 59 59 state->status, state->edge, state->mask, state->enable, state->level_no); 60 60 } 61 61 62 - /** end of NCI */ 62 + /* end of NCI */ 63 63 64 64 /* -------------------------------------------------------+ 65 65 | Device level interface (DLI) | ··· 101 101 return value; 102 102 } 103 103 104 - /** end of DLI */ 104 + /* end of DLI */ 105 105 106 106 #endif /* defined(USE_INPUT_SYSTEM_VERSION_2401) */ 107 107
+2 -2
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_private.h
··· 122 122 stream2mmio_print_sid_state(&(state->sid_state[i])); 123 123 } 124 124 } 125 - /** end of NCI */ 125 + /* end of NCI */ 126 126 127 127 /***************************************************** 128 128 * ··· 163 163 ia_css_device_store_uint32(STREAM2MMIO_CTRL_BASE[ID] + 164 164 reg * sizeof(hrt_data), value); 165 165 } 166 - /** end of DLI */ 166 + /* end of DLI */ 167 167 168 168 #endif /* __ISYS_STREAM2MMIO_PRIVATE_H_INCLUDED__ */
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_private.h
··· 160 160 161 161 ia_css_device_store_uint32(PIXELGEN_CTRL_BASE[ID] + reg*sizeof(hrt_data), value); 162 162 } 163 - /** end of DLI */ 163 + /* end of DLI */ 164 164 #endif /* __PIXELGEN_PRIVATE_H_INCLUDED__ */
+2 -2
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_dma_global.h
··· 46 46 uint32_t cropping; 47 47 uint32_t width; 48 48 }; 49 - /** end of DMA Port */ 49 + /* end of DMA Port */ 50 50 51 51 /************************************************ 52 52 * ··· 79 79 isys2401_dma_extension extension; 80 80 uint32_t height; 81 81 }; 82 - /** end of DMA Device */ 82 + /* end of DMA Device */ 83 83 84 84 /* isys2401_dma_channel limits per DMA ID */ 85 85 extern const isys2401_dma_channel N_ISYS2401_DMA_CHANNEL_PROCS[N_ISYS2401_DMA_ID];
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/pixelgen_global.h
··· 86 86 sync_generator_cfg_t sync_gen_cfg; 87 87 }; 88 88 89 - /** end of Pixel-generator: TPG. ("pixelgen_global.h") */ 89 + /* end of Pixel-generator: TPG. ("pixelgen_global.h") */ 90 90 #endif /* __PIXELGEN_GLOBAL_H_INCLUDED__ */ 91 91
+4 -4
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/system_global.h
··· 331 331 IBUF_CTRL2_ID, /* map ISYS2401_IBUF_CNTRL_C */ 332 332 N_IBUF_CTRL_ID 333 333 } ibuf_ctrl_ID_t; 334 - /** end of Input-buffer Controller */ 334 + /* end of Input-buffer Controller */ 335 335 336 336 /* 337 337 * Stream2MMIO. ··· 364 364 STREAM2MMIO_SID7_ID, 365 365 N_STREAM2MMIO_SID_ID 366 366 } stream2mmio_sid_ID_t; 367 - /** end of Stream2MMIO */ 367 + /* end of Stream2MMIO */ 368 368 369 369 /** 370 370 * Input System 2401: CSI-MIPI recevier. ··· 390 390 CSI_RX_DLANE3_ID, /* map to DLANE3 in CSI RX */ 391 391 N_CSI_RX_DLANE_ID 392 392 } csi_rx_fe_dlane_ID_t; 393 - /** end of CSI-MIPI receiver */ 393 + /* end of CSI-MIPI receiver */ 394 394 395 395 typedef enum { 396 396 ISYS2401_DMA0_ID = 0, ··· 406 406 PIXELGEN2_ID, 407 407 N_PIXELGEN_ID 408 408 } pixelgen_ID_t; 409 - /** end of pixel-generator. ("system_global.h") */ 409 + /* end of pixel-generator. ("system_global.h") */ 410 410 411 411 typedef enum { 412 412 INPUT_SYSTEM_CSI_PORT0_ID = 0,
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_api_version.h
··· 31 31 #ifndef __CSS_API_VERSION_H 32 32 #define __CSS_API_VERSION_H 33 33 34 - /** @file 34 + /* @file 35 35 * CSS API version file. This file contains the version number of the CSS-API. 36 36 * 37 37 * This file is generated from a set of input files describing the CSS-API
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer.c
··· 21 21 #endif /* __INLINE_GP_TIMER__ */ 22 22 #include "system_local.h" 23 23 24 - /** FIXME: not sure if reg_load(), reg_store() should be API. 24 + /* FIXME: not sure if reg_load(), reg_store() should be API. 25 25 */ 26 26 static uint32_t 27 27 gp_timer_reg_load(uint32_t reg);
+2 -2
drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/csi_rx_public.h
··· 73 73 extern void csi_rx_be_ctrl_dump_state( 74 74 const csi_rx_backend_ID_t ID, 75 75 csi_rx_be_ctrl_state_t *state); 76 - /** end of NCI */ 76 + /* end of NCI */ 77 77 78 78 /***************************************************** 79 79 * ··· 130 130 const csi_rx_backend_ID_t ID, 131 131 const hrt_address reg, 132 132 const hrt_data value); 133 - /** end of DLI */ 133 + /* end of DLI */ 134 134 #endif /* USE_INPUT_SYSTEM_VERSION_2401 */ 135 135 #endif /* __CSI_RX_PUBLIC_H_INCLUDED__ */
+2 -2
drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/ibuf_ctrl_public.h
··· 54 54 STORAGE_CLASS_IBUF_CTRL_H void ibuf_ctrl_dump_state( 55 55 const ibuf_ctrl_ID_t ID, 56 56 ibuf_ctrl_state_t *state); 57 - /** end of NCI */ 57 + /* end of NCI */ 58 58 59 59 /***************************************************** 60 60 * ··· 87 87 const ibuf_ctrl_ID_t ID, 88 88 const hrt_address reg, 89 89 const hrt_data value); 90 - /** end of DLI */ 90 + /* end of DLI */ 91 91 92 92 #endif /* USE_INPUT_SYSTEM_VERSION_2401 */ 93 93 #endif /* __IBUF_CTRL_PUBLIC_H_INCLUDED__ */
+49 -49
drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isp_op1w.h
··· 49 49 50 50 /* Arithmetic */ 51 51 52 - /** @brief bitwise AND 52 + /* @brief bitwise AND 53 53 * 54 54 * @param[in] _a first argument 55 55 * @param[in] _b second argument ··· 63 63 const tvector1w _a, 64 64 const tvector1w _b); 65 65 66 - /** @brief bitwise OR 66 + /* @brief bitwise OR 67 67 * 68 68 * @param[in] _a first argument 69 69 * @param[in] _b second argument ··· 77 77 const tvector1w _a, 78 78 const tvector1w _b); 79 79 80 - /** @brief bitwise XOR 80 + /* @brief bitwise XOR 81 81 * 82 82 * @param[in] _a first argument 83 83 * @param[in] _b second argument ··· 91 91 const tvector1w _a, 92 92 const tvector1w _b); 93 93 94 - /** @brief bitwise inverse 94 + /* @brief bitwise inverse 95 95 * 96 96 * @param[in] _a first argument 97 97 * ··· 105 105 106 106 /* Additive */ 107 107 108 - /** @brief addition 108 + /* @brief addition 109 109 * 110 110 * @param[in] _a first argument 111 111 * @param[in] _b second argument ··· 120 120 const tvector1w _a, 121 121 const tvector1w _b); 122 122 123 - /** @brief subtraction 123 + /* @brief subtraction 124 124 * 125 125 * @param[in] _a first argument 126 126 * @param[in] _b second argument ··· 135 135 const tvector1w _a, 136 136 const tvector1w _b); 137 137 138 - /** @brief saturated addition 138 + /* @brief saturated addition 139 139 * 140 140 * @param[in] _a first argument 141 141 * @param[in] _b second argument ··· 150 150 const tvector1w _a, 151 151 const tvector1w _b); 152 152 153 - /** @brief saturated subtraction 153 + /* @brief saturated subtraction 154 154 * 155 155 * @param[in] _a first argument 156 156 * @param[in] _b second argument ··· 166 166 const tvector1w _b); 167 167 168 168 #ifdef ISP2401 169 - /** @brief Unsigned saturated subtraction 169 + /* @brief Unsigned saturated subtraction 170 170 * 171 171 * @param[in] _a first argument 172 172 * @param[in] _b second argument ··· 182 182 const tvector1w_unsigned _b); 183 183 184 184 #endif 185 - /** @brief subtraction with shift right and rounding 185 + /* @brief subtraction with shift right and rounding 186 186 * 187 187 * @param[in] _a first argument 188 188 * @param[in] _b second argument ··· 202 202 const tvector1w _a, 203 203 const tvector1w _b); 204 204 205 - /** @brief Subtraction with shift right and rounding 205 + /* @brief Subtraction with shift right and rounding 206 206 * 207 207 * @param[in] _a first operand 208 208 * @param[in] _b second operand ··· 217 217 const tvector1w _a, 218 218 const tvector1w _b); 219 219 220 - /** @brief Subtraction with shift right and no rounding 220 + /* @brief Subtraction with shift right and no rounding 221 221 * 222 222 * @param[in] _a first operand 223 223 * @param[in] _b second operand ··· 233 233 const tvector1w _b); 234 234 235 235 236 - /** @brief saturated absolute value 236 + /* @brief saturated absolute value 237 237 * 238 238 * @param[in] _a input 239 239 * ··· 247 247 STORAGE_CLASS_ISP_OP1W_FUNC_H tvector1w OP_1w_abs( 248 248 const tvector1w _a); 249 249 250 - /** @brief saturated absolute difference 250 + /* @brief saturated absolute difference 251 251 * 252 252 * @param[in] _a first argument 253 253 * @param[in] _b second argument ··· 264 264 265 265 /* Multiplicative */ 266 266 267 - /** @brief doubling multiply 267 + /* @brief doubling multiply 268 268 * 269 269 * @param[in] _a first argument 270 270 * @param[in] _b second argument ··· 281 281 const tvector1w _a, 282 282 const tvector1w _b); 283 283 284 - /** @brief integer multiply 284 + /* @brief integer multiply 285 285 * 286 286 * @param[in] _a first argument 287 287 * @param[in] _b second argument ··· 298 298 const tvector1w _a, 299 299 const tvector1w _b); 300 300 301 - /** @brief fractional saturating multiply 301 + /* @brief fractional saturating multiply 302 302 * 303 303 * @param[in] _a first argument 304 304 * @param[in] _b second argument ··· 316 316 const tvector1w _a, 317 317 const tvector1w _b); 318 318 319 - /** @brief fractional saturating multiply with rounding 319 + /* @brief fractional saturating multiply with rounding 320 320 * 321 321 * @param[in] _a first argument 322 322 * @param[in] _b second argument ··· 337 337 338 338 /* Comparative */ 339 339 340 - /** @brief equal 340 + /* @brief equal 341 341 * 342 342 * @param[in] _a first argument 343 343 * @param[in] _b second argument ··· 351 351 const tvector1w _a, 352 352 const tvector1w _b); 353 353 354 - /** @brief not equal 354 + /* @brief not equal 355 355 * 356 356 * @param[in] _a first argument 357 357 * @param[in] _b second argument ··· 365 365 const tvector1w _a, 366 366 const tvector1w _b); 367 367 368 - /** @brief less or equal 368 + /* @brief less or equal 369 369 * 370 370 * @param[in] _a first argument 371 371 * @param[in] _b second argument ··· 379 379 const tvector1w _a, 380 380 const tvector1w _b); 381 381 382 - /** @brief less then 382 + /* @brief less then 383 383 * 384 384 * @param[in] _a first argument 385 385 * @param[in] _b second argument ··· 393 393 const tvector1w _a, 394 394 const tvector1w _b); 395 395 396 - /** @brief greater or equal 396 + /* @brief greater or equal 397 397 * 398 398 * @param[in] _a first argument 399 399 * @param[in] _b second argument ··· 407 407 const tvector1w _a, 408 408 const tvector1w _b); 409 409 410 - /** @brief greater than 410 + /* @brief greater than 411 411 * 412 412 * @param[in] _a first argument 413 413 * @param[in] _b second argument ··· 423 423 424 424 /* Shift */ 425 425 426 - /** @brief aritmetic shift right 426 + /* @brief aritmetic shift right 427 427 * 428 428 * @param[in] _a input 429 429 * @param[in] _b shift amount ··· 441 441 const tvector1w _a, 442 442 const tvector1w _b); 443 443 444 - /** @brief aritmetic shift right with rounding 444 + /* @brief aritmetic shift right with rounding 445 445 * 446 446 * @param[in] _a input 447 447 * @param[in] _b shift amount ··· 460 460 const tvector1w _a, 461 461 const tvector1w _b); 462 462 463 - /** @brief saturating arithmetic shift left 463 + /* @brief saturating arithmetic shift left 464 464 * 465 465 * @param[in] _a input 466 466 * @param[in] _b shift amount ··· 480 480 const tvector1w _a, 481 481 const tvector1w _b); 482 482 483 - /** @brief saturating aritmetic shift left 483 + /* @brief saturating aritmetic shift left 484 484 * 485 485 * @param[in] _a input 486 486 * @param[in] _b shift amount ··· 493 493 const tvector1w _a, 494 494 const tvector1w _b); 495 495 496 - /** @brief logical shift left 496 + /* @brief logical shift left 497 497 * 498 498 * @param[in] _a input 499 499 * @param[in] _b shift amount ··· 510 510 const tvector1w _a, 511 511 const tvector1w _b); 512 512 513 - /** @brief logical shift right 513 + /* @brief logical shift right 514 514 * 515 515 * @param[in] _a input 516 516 * @param[in] _b shift amount ··· 528 528 const tvector1w _b); 529 529 530 530 #ifdef ISP2401 531 - /** @brief bidirectional saturating arithmetic shift 531 + /* @brief bidirectional saturating arithmetic shift 532 532 * 533 533 * @param[in] _a input 534 534 * @param[in] _b shift amount ··· 546 546 const tvector1w _a, 547 547 const tvector1w _b); 548 548 549 - /** @brief bidirectional non-saturating arithmetic shift 549 + /* @brief bidirectional non-saturating arithmetic shift 550 550 * 551 551 * @param[in] _a input 552 552 * @param[in] _b shift amount ··· 565 565 const tvector1w _b); 566 566 567 567 568 - /** @brief bidirectional logical shift 568 + /* @brief bidirectional logical shift 569 569 * 570 570 * @param[in] _a input 571 571 * @param[in] _b shift amount ··· 588 588 #endif 589 589 /* Cast */ 590 590 591 - /** @brief Cast from int to 1w 591 + /* @brief Cast from int to 1w 592 592 * 593 593 * @param[in] _a input 594 594 * ··· 601 601 STORAGE_CLASS_ISP_OP1W_FUNC_H tvector1w OP_int_cast_to_1w( 602 602 const int _a); 603 603 604 - /** @brief Cast from 1w to int 604 + /* @brief Cast from 1w to int 605 605 * 606 606 * @param[in] _a input 607 607 * ··· 614 614 STORAGE_CLASS_ISP_OP1W_FUNC_H int OP_1w_cast_to_int( 615 615 const tvector1w _a); 616 616 617 - /** @brief Cast from 1w to 2w 617 + /* @brief Cast from 1w to 2w 618 618 * 619 619 * @param[in] _a input 620 620 * ··· 627 627 STORAGE_CLASS_ISP_OP1W_FUNC_H tvector2w OP_1w_cast_to_2w( 628 628 const tvector1w _a); 629 629 630 - /** @brief Cast from 2w to 1w 630 + /* @brief Cast from 2w to 1w 631 631 * 632 632 * @param[in] _a input 633 633 * ··· 641 641 const tvector2w _a); 642 642 643 643 644 - /** @brief Cast from 2w to 1w with saturation 644 + /* @brief Cast from 2w to 1w with saturation 645 645 * 646 646 * @param[in] _a input 647 647 * ··· 657 657 658 658 /* clipping */ 659 659 660 - /** @brief Clip asymmetrical 660 + /* @brief Clip asymmetrical 661 661 * 662 662 * @param[in] _a first argument 663 663 * @param[in] _b second argument ··· 673 673 const tvector1w _a, 674 674 const tvector1w _b); 675 675 676 - /** @brief Clip zero 676 + /* @brief Clip zero 677 677 * 678 678 * @param[in] _a first argument 679 679 * @param[in] _b second argument ··· 691 691 692 692 /* division */ 693 693 694 - /** @brief Truncated division 694 + /* @brief Truncated division 695 695 * 696 696 * @param[in] _a first argument 697 697 * @param[in] _b second argument ··· 708 708 const tvector1w _a, 709 709 const tvector1w _b); 710 710 711 - /** @brief Fractional saturating divide 711 + /* @brief Fractional saturating divide 712 712 * 713 713 * @param[in] _a first argument 714 714 * @param[in] _b second argument ··· 726 726 const tvector1w _a, 727 727 const tvector1w _b); 728 728 729 - /** @brief Modulo 729 + /* @brief Modulo 730 730 * 731 731 * @param[in] _a first argument 732 732 * @param[in] _b second argument ··· 741 741 const tvector1w _a, 742 742 const tvector1w _b); 743 743 744 - /** @brief Unsigned integer Square root 744 + /* @brief Unsigned integer Square root 745 745 * 746 746 * @param[in] _a input 747 747 * ··· 754 754 755 755 /* Miscellaneous */ 756 756 757 - /** @brief Multiplexer 757 + /* @brief Multiplexer 758 758 * 759 759 * @param[in] _a first argument 760 760 * @param[in] _b second argument ··· 770 770 const tvector1w _b, 771 771 const tflags _c); 772 772 773 - /** @brief Average without rounding 773 + /* @brief Average without rounding 774 774 * 775 775 * @param[in] _a first operand 776 776 * @param[in] _b second operand ··· 786 786 const tvector1w _a, 787 787 const tvector1w _b); 788 788 789 - /** @brief Average with rounding 789 + /* @brief Average with rounding 790 790 * 791 791 * @param[in] _a first argument 792 792 * @param[in] _b second argument ··· 802 802 const tvector1w _a, 803 803 const tvector1w _b); 804 804 805 - /** @brief Minimum 805 + /* @brief Minimum 806 806 * 807 807 * @param[in] _a first argument 808 808 * @param[in] _b second argument ··· 816 816 const tvector1w _a, 817 817 const tvector1w _b); 818 818 819 - /** @brief Maximum 819 + /* @brief Maximum 820 820 * 821 821 * @param[in] _a first argument 822 822 * @param[in] _b second argument
+39 -39
drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isp_op2w.h
··· 48 48 49 49 /* Arithmetic */ 50 50 51 - /** @brief bitwise AND 51 + /* @brief bitwise AND 52 52 * 53 53 * @param[in] _a first argument 54 54 * @param[in] _b second argument ··· 62 62 const tvector2w _a, 63 63 const tvector2w _b); 64 64 65 - /** @brief bitwise OR 65 + /* @brief bitwise OR 66 66 * 67 67 * @param[in] _a first argument 68 68 * @param[in] _b second argument ··· 76 76 const tvector2w _a, 77 77 const tvector2w _b); 78 78 79 - /** @brief bitwise XOR 79 + /* @brief bitwise XOR 80 80 * 81 81 * @param[in] _a first argument 82 82 * @param[in] _b second argument ··· 90 90 const tvector2w _a, 91 91 const tvector2w _b); 92 92 93 - /** @brief bitwise inverse 93 + /* @brief bitwise inverse 94 94 * 95 95 * @param[in] _a first argument 96 96 * ··· 104 104 105 105 /* Additive */ 106 106 107 - /** @brief addition 107 + /* @brief addition 108 108 * 109 109 * @param[in] _a first argument 110 110 * @param[in] _b second argument ··· 119 119 const tvector2w _a, 120 120 const tvector2w _b); 121 121 122 - /** @brief subtraction 122 + /* @brief subtraction 123 123 * 124 124 * @param[in] _a first argument 125 125 * @param[in] _b second argument ··· 134 134 const tvector2w _a, 135 135 const tvector2w _b); 136 136 137 - /** @brief saturated addition 137 + /* @brief saturated addition 138 138 * 139 139 * @param[in] _a first argument 140 140 * @param[in] _b second argument ··· 149 149 const tvector2w _a, 150 150 const tvector2w _b); 151 151 152 - /** @brief saturated subtraction 152 + /* @brief saturated subtraction 153 153 * 154 154 * @param[in] _a first argument 155 155 * @param[in] _b second argument ··· 164 164 const tvector2w _a, 165 165 const tvector2w _b); 166 166 167 - /** @brief subtraction with shift right and rounding 167 + /* @brief subtraction with shift right and rounding 168 168 * 169 169 * @param[in] _a first argument 170 170 * @param[in] _b second argument ··· 184 184 const tvector2w _a, 185 185 const tvector2w _b); 186 186 187 - /** @brief Subtraction with shift right and rounding 187 + /* @brief Subtraction with shift right and rounding 188 188 * 189 189 * @param[in] _a first operand 190 190 * @param[in] _b second operand ··· 199 199 const tvector2w _a, 200 200 const tvector2w _b); 201 201 202 - /** @brief Subtraction with shift right and no rounding 202 + /* @brief Subtraction with shift right and no rounding 203 203 * 204 204 * @param[in] _a first operand 205 205 * @param[in] _b second operand ··· 214 214 const tvector2w _a, 215 215 const tvector2w _b); 216 216 217 - /** @brief saturated absolute value 217 + /* @brief saturated absolute value 218 218 * 219 219 * @param[in] _a input 220 220 * ··· 228 228 STORAGE_CLASS_ISP_OP2W_FUNC_H tvector2w OP_2w_abs( 229 229 const tvector2w _a); 230 230 231 - /** @brief saturated absolute difference 231 + /* @brief saturated absolute difference 232 232 * 233 233 * @param[in] _a first argument 234 234 * @param[in] _b second argument ··· 245 245 246 246 /* Multiplicative */ 247 247 248 - /** @brief integer multiply 248 + /* @brief integer multiply 249 249 * 250 250 * @param[in] _a first argument 251 251 * @param[in] _b second argument ··· 262 262 const tvector2w _a, 263 263 const tvector2w _b); 264 264 265 - /** @brief fractional saturating multiply 265 + /* @brief fractional saturating multiply 266 266 * 267 267 * @param[in] _a first argument 268 268 * @param[in] _b second argument ··· 279 279 const tvector2w _a, 280 280 const tvector2w _b); 281 281 282 - /** @brief fractional saturating multiply with rounding 282 + /* @brief fractional saturating multiply with rounding 283 283 * 284 284 * @param[in] _a first argument 285 285 * @param[in] _b second argument ··· 301 301 302 302 /* Comparative */ 303 303 304 - /** @brief equal 304 + /* @brief equal 305 305 * 306 306 * @param[in] _a first argument 307 307 * @param[in] _b second argument ··· 315 315 const tvector2w _a, 316 316 const tvector2w _b); 317 317 318 - /** @brief not equal 318 + /* @brief not equal 319 319 * 320 320 * @param[in] _a first argument 321 321 * @param[in] _b second argument ··· 329 329 const tvector2w _a, 330 330 const tvector2w _b); 331 331 332 - /** @brief less or equal 332 + /* @brief less or equal 333 333 * 334 334 * @param[in] _a first argument 335 335 * @param[in] _b second argument ··· 343 343 const tvector2w _a, 344 344 const tvector2w _b); 345 345 346 - /** @brief less then 346 + /* @brief less then 347 347 * 348 348 * @param[in] _a first argument 349 349 * @param[in] _b second argument ··· 357 357 const tvector2w _a, 358 358 const tvector2w _b); 359 359 360 - /** @brief greater or equal 360 + /* @brief greater or equal 361 361 * 362 362 * @param[in] _a first argument 363 363 * @param[in] _b second argument ··· 371 371 const tvector2w _a, 372 372 const tvector2w _b); 373 373 374 - /** @brief greater than 374 + /* @brief greater than 375 375 * 376 376 * @param[in] _a first argument 377 377 * @param[in] _b second argument ··· 387 387 388 388 /* Shift */ 389 389 390 - /** @brief aritmetic shift right 390 + /* @brief aritmetic shift right 391 391 * 392 392 * @param[in] _a input 393 393 * @param[in] _b shift amount ··· 404 404 const tvector2w _a, 405 405 const tvector2w _b); 406 406 407 - /** @brief aritmetic shift right with rounding 407 + /* @brief aritmetic shift right with rounding 408 408 * 409 409 * @param[in] _a input 410 410 * @param[in] _b shift amount ··· 423 423 const tvector2w _a, 424 424 const tvector2w _b); 425 425 426 - /** @brief saturating aritmetic shift left 426 + /* @brief saturating aritmetic shift left 427 427 * 428 428 * @param[in] _a input 429 429 * @param[in] _b shift amount ··· 443 443 const tvector2w _a, 444 444 const tvector2w _b); 445 445 446 - /** @brief saturating aritmetic shift left 446 + /* @brief saturating aritmetic shift left 447 447 * 448 448 * @param[in] _a input 449 449 * @param[in] _b shift amount ··· 456 456 const tvector2w _a, 457 457 const tvector2w _b); 458 458 459 - /** @brief logical shift left 459 + /* @brief logical shift left 460 460 * 461 461 * @param[in] _a input 462 462 * @param[in] _b shift amount ··· 473 473 const tvector2w _a, 474 474 const tvector2w _b); 475 475 476 - /** @brief logical shift right 476 + /* @brief logical shift right 477 477 * 478 478 * @param[in] _a input 479 479 * @param[in] _b shift amount ··· 492 492 493 493 /* clipping */ 494 494 495 - /** @brief Clip asymmetrical 495 + /* @brief Clip asymmetrical 496 496 * 497 497 * @param[in] _a first argument 498 498 * @param[in] _b second argument ··· 507 507 const tvector2w _a, 508 508 const tvector2w _b); 509 509 510 - /** @brief Clip zero 510 + /* @brief Clip zero 511 511 * 512 512 * @param[in] _a first argument 513 513 * @param[in] _b second argument ··· 524 524 525 525 /* division */ 526 526 527 - /** @brief Truncated division 527 + /* @brief Truncated division 528 528 * 529 529 * @param[in] _a first argument 530 530 * @param[in] _b second argument ··· 541 541 const tvector2w _a, 542 542 const tvector2w _b); 543 543 544 - /** @brief Saturating truncated division 544 + /* @brief Saturating truncated division 545 545 * 546 546 * @param[in] _a first argument 547 547 * @param[in] _b second argument ··· 559 559 const tvector2w _a, 560 560 const tvector1w _b); 561 561 562 - /** @brief Modulo 562 + /* @brief Modulo 563 563 * 564 564 * @param[in] _a first argument 565 565 * @param[in] _b second argument ··· 572 572 const tvector2w _a, 573 573 const tvector2w _b); 574 574 575 - /** @brief Unsigned Integer Square root 575 + /* @brief Unsigned Integer Square root 576 576 * 577 577 * @param[in] _a input 578 578 * ··· 585 585 586 586 /* Miscellaneous */ 587 587 588 - /** @brief Multiplexer 588 + /* @brief Multiplexer 589 589 * 590 590 * @param[in] _a first argument 591 591 * @param[in] _b second argument ··· 601 601 const tvector2w _b, 602 602 const tflags _c); 603 603 604 - /** @brief Average without rounding 604 + /* @brief Average without rounding 605 605 * 606 606 * @param[in] _a first operand 607 607 * @param[in] _b second operand ··· 617 617 const tvector2w _a, 618 618 const tvector2w _b); 619 619 620 - /** @brief Average with rounding 620 + /* @brief Average with rounding 621 621 * 622 622 * @param[in] _a first argument 623 623 * @param[in] _b second argument ··· 633 633 const tvector2w _a, 634 634 const tvector2w _b); 635 635 636 - /** @brief Minimum 636 + /* @brief Minimum 637 637 * 638 638 * @param[in] _a first argument 639 639 * @param[in] _b second argument ··· 647 647 const tvector2w _a, 648 648 const tvector2w _b); 649 649 650 - /** @brief Maximum 650 + /* @brief Maximum 651 651 * 652 652 * @param[in] _a first argument 653 653 * @param[in] _b second argument
+2 -2
drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isys_stream2mmio_public.h
··· 43 43 const stream2mmio_ID_t ID, 44 44 const stream2mmio_sid_ID_t sid_id, 45 45 stream2mmio_sid_state_t *state); 46 - /** end of NCI */ 46 + /* end of NCI */ 47 47 48 48 /***************************************************** 49 49 * ··· 96 96 const stream2mmio_ID_t ID, 97 97 const hrt_address reg, 98 98 const hrt_data value); 99 - /** end of DLI */ 99 + /* end of DLI */ 100 100 101 101 #endif /* __ISYS_STREAM2MMIO_PUBLIC_H_INCLUDED__ */
+2 -2
drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/pixelgen_public.h
··· 41 41 STORAGE_CLASS_PIXELGEN_H void pixelgen_ctrl_dump_state( 42 42 const pixelgen_ID_t ID, 43 43 pixelgen_ctrl_state_t *state); 44 - /** end of NCI */ 44 + /* end of NCI */ 45 45 46 46 /***************************************************** 47 47 * ··· 73 73 const pixelgen_ID_t ID, 74 74 const hrt_address reg, 75 75 const hrt_data value); 76 - /** end of DLI */ 76 + /* end of DLI */ 77 77 78 78 #endif /* USE_INPUT_SYSTEM_VERSION_2401 */ 79 79 #endif /* __PIXELGEN_PUBLIC_H_INCLUDED__ */
+72 -72
drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/ref_vector_func.h
··· 27 27 28 28 #include "ref_vector_func_types.h" 29 29 30 - /** @brief Doubling multiply accumulate with saturation 30 + /* @brief Doubling multiply accumulate with saturation 31 31 * 32 32 * @param[in] acc accumulator 33 33 * @param[in] a multiply input ··· 44 44 tvector1w a, 45 45 tvector1w b ); 46 46 47 - /** @brief Doubling multiply accumulate 47 + /* @brief Doubling multiply accumulate 48 48 * 49 49 * @param[in] acc accumulator 50 50 * @param[in] a multiply input ··· 61 61 tvector1w a, 62 62 tvector1w b ); 63 63 64 - /** @brief Re-aligning multiply 64 + /* @brief Re-aligning multiply 65 65 * 66 66 * @param[in] a multiply input 67 67 * @param[in] b multiply input ··· 78 78 tvector1w b, 79 79 tscalar1w shift ); 80 80 81 - /** @brief Leading bit index 81 + /* @brief Leading bit index 82 82 * 83 83 * @param[in] a input 84 84 * ··· 92 92 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w OP_1w_lod( 93 93 tvector1w a); 94 94 95 - /** @brief Config Unit Input Processing 95 + /* @brief Config Unit Input Processing 96 96 * 97 97 * @param[in] a input 98 98 * @param[in] input_scale input scaling factor ··· 111 111 tscalar1w_5bit_signed input_scale, 112 112 tscalar1w_5bit_signed input_offset); 113 113 114 - /** @brief Config Unit Output Processing 114 + /* @brief Config Unit Output Processing 115 115 * 116 116 * @param[in] a output 117 117 * @param[in] output_scale output scaling factor ··· 127 127 tvector1w a, 128 128 tscalar1w_5bit_signed output_scale); 129 129 130 - /** @brief Config Unit Piecewiselinear estimation 130 + /* @brief Config Unit Piecewiselinear estimation 131 131 * 132 132 * @param[in] a input 133 133 * @param[in] config_points config parameter structure ··· 143 143 tvector1w a, 144 144 ref_config_points config_points); 145 145 146 - /** @brief Fast Config Unit 146 + /* @brief Fast Config Unit 147 147 * 148 148 * @param[in] x input 149 149 * @param[in] init_vectors LUT data structure ··· 161 161 xcu_ref_init_vectors init_vectors); 162 162 163 163 164 - /** @brief LXCU 164 + /* @brief LXCU 165 165 * 166 166 * @param[in] x input 167 167 * @param[in] init_vectors LUT data structure ··· 180 180 tvector1w x, 181 181 xcu_ref_init_vectors init_vectors); 182 182 183 - /** @brief Coring 183 + /* @brief Coring 184 184 * 185 185 * @param[in] coring_vec Amount of coring based on brightness level 186 186 * @param[in] filt_input Vector of input pixels on which Coring is applied ··· 196 196 tvector1w filt_input, 197 197 tscalar1w m_CnrCoring0 ); 198 198 199 - /** @brief Normalised FIR with coefficients [3,4,1] 199 + /* @brief Normalised FIR with coefficients [3,4,1] 200 200 * 201 201 * @param[in] m 1x3 matrix with pixels 202 202 * ··· 209 209 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w fir1x3m_5dB_m90_nrm ( 210 210 const s_1w_1x3_matrix m); 211 211 212 - /** @brief Normalised FIR with coefficients [1,4,3] 212 + /* @brief Normalised FIR with coefficients [1,4,3] 213 213 * 214 214 * @param[in] m 1x3 matrix with pixels 215 215 * ··· 222 222 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w fir1x3m_5dB_p90_nrm ( 223 223 const s_1w_1x3_matrix m); 224 224 225 - /** @brief Normalised FIR with coefficients [1,2,1] 225 + /* @brief Normalised FIR with coefficients [1,2,1] 226 226 * 227 227 * @param[in] m 1x3 matrix with pixels 228 228 * ··· 234 234 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w fir1x3m_6dB_nrm ( 235 235 const s_1w_1x3_matrix m); 236 236 237 - /** @brief Normalised FIR with coefficients [13,16,3] 237 + /* @brief Normalised FIR with coefficients [13,16,3] 238 238 * 239 239 * @param[in] m 1x3 matrix with pixels 240 240 * ··· 246 246 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w fir1x3m_6dB_nrm_ph0 ( 247 247 const s_1w_1x3_matrix m); 248 248 249 - /** @brief Normalised FIR with coefficients [9,16,7] 249 + /* @brief Normalised FIR with coefficients [9,16,7] 250 250 * 251 251 * @param[in] m 1x3 matrix with pixels 252 252 * ··· 258 258 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w fir1x3m_6dB_nrm_ph1 ( 259 259 const s_1w_1x3_matrix m); 260 260 261 - /** @brief Normalised FIR with coefficients [5,16,11] 261 + /* @brief Normalised FIR with coefficients [5,16,11] 262 262 * 263 263 * @param[in] m 1x3 matrix with pixels 264 264 * ··· 270 270 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w fir1x3m_6dB_nrm_ph2 ( 271 271 const s_1w_1x3_matrix m); 272 272 273 - /** @brief Normalised FIR with coefficients [1,16,15] 273 + /* @brief Normalised FIR with coefficients [1,16,15] 274 274 * 275 275 * @param[in] m 1x3 matrix with pixels 276 276 * ··· 282 282 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w fir1x3m_6dB_nrm_ph3 ( 283 283 const s_1w_1x3_matrix m); 284 284 285 - /** @brief Normalised FIR with programable phase shift 285 + /* @brief Normalised FIR with programable phase shift 286 286 * 287 287 * @param[in] m 1x3 matrix with pixels 288 288 * @param[in] coeff phase shift ··· 295 295 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w fir1x3m_6dB_nrm_calc_coeff ( 296 296 const s_1w_1x3_matrix m, tscalar1w_3bit coeff); 297 297 298 - /** @brief 3 tap FIR with coefficients [1,1,1] 298 + /* @brief 3 tap FIR with coefficients [1,1,1] 299 299 * 300 300 * @param[in] m 1x3 matrix with pixels 301 301 * ··· 308 308 const s_1w_1x3_matrix m); 309 309 310 310 #ifdef ISP2401 311 - /** @brief symmetric 3 tap FIR acts as LPF or BSF 311 + /* @brief symmetric 3 tap FIR acts as LPF or BSF 312 312 * 313 313 * @param[in] m 1x3 matrix with pixels 314 314 * @param[in] k filter coefficient shift ··· 336 336 tscalar_bool bsf_flag); 337 337 #endif 338 338 339 - /** @brief Normalised 2D FIR with coefficients [1;2;1] * [1,2,1] 339 + /* @brief Normalised 2D FIR with coefficients [1;2;1] * [1,2,1] 340 340 * 341 341 * @param[in] m 3x3 matrix with pixels 342 342 * ··· 353 353 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w fir3x3m_6dB_nrm ( 354 354 const s_1w_3x3_matrix m); 355 355 356 - /** @brief Normalised 2D FIR with coefficients [1;1;1] * [1,1,1] 356 + /* @brief Normalised 2D FIR with coefficients [1;1;1] * [1,1,1] 357 357 * 358 358 * @param[in] m 3x3 matrix with pixels 359 359 * ··· 371 371 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w fir3x3m_9dB_nrm ( 372 372 const s_1w_3x3_matrix m); 373 373 374 - /** @brief Normalised dual output 2D FIR with coefficients [1;2;1] * [1,2,1] 374 + /* @brief Normalised dual output 2D FIR with coefficients [1;2;1] * [1,2,1] 375 375 * 376 376 * @param[in] m 4x3 matrix with pixels 377 377 * ··· 391 391 STORAGE_CLASS_REF_VECTOR_FUNC_H s_1w_2x1_matrix fir3x3m_6dB_out2x1_nrm ( 392 392 const s_1w_4x3_matrix m); 393 393 394 - /** @brief Normalised dual output 2D FIR with coefficients [1;1;1] * [1,1,1] 394 + /* @brief Normalised dual output 2D FIR with coefficients [1;1;1] * [1,1,1] 395 395 * 396 396 * @param[in] m 4x3 matrix with pixels 397 397 * ··· 411 411 STORAGE_CLASS_REF_VECTOR_FUNC_H s_1w_2x1_matrix fir3x3m_9dB_out2x1_nrm ( 412 412 const s_1w_4x3_matrix m); 413 413 414 - /** @brief Normalised 2D FIR 5x5 414 + /* @brief Normalised 2D FIR 5x5 415 415 * 416 416 * @param[in] m 5x5 matrix with pixels 417 417 * ··· 429 429 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w fir5x5m_15dB_nrm ( 430 430 const s_1w_5x5_matrix m); 431 431 432 - /** @brief Normalised FIR 1x5 432 + /* @brief Normalised FIR 1x5 433 433 * 434 434 * @param[in] m 1x5 matrix with pixels 435 435 * ··· 447 447 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w fir1x5m_12dB_nrm ( 448 448 const s_1w_1x5_matrix m); 449 449 450 - /** @brief Normalised 2D FIR 5x5 450 + /* @brief Normalised 2D FIR 5x5 451 451 * 452 452 * @param[in] m 5x5 matrix with pixels 453 453 * ··· 465 465 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w fir5x5m_12dB_nrm ( 466 466 const s_1w_5x5_matrix m); 467 467 468 - /** @brief Approximate averaging FIR 1x5 468 + /* @brief Approximate averaging FIR 1x5 469 469 * 470 470 * @param[in] m 1x5 matrix with pixels 471 471 * ··· 479 479 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w fir1x5m_box ( 480 480 s_1w_1x5_matrix m); 481 481 482 - /** @brief Approximate averaging FIR 1x9 482 + /* @brief Approximate averaging FIR 1x9 483 483 * 484 484 * @param[in] m 1x9 matrix with pixels 485 485 * ··· 493 493 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w fir1x9m_box ( 494 494 s_1w_1x9_matrix m); 495 495 496 - /** @brief Approximate averaging FIR 1x11 496 + /* @brief Approximate averaging FIR 1x11 497 497 * 498 498 * @param[in] m 1x11 matrix with pixels 499 499 * ··· 507 507 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w fir1x11m_box ( 508 508 s_1w_1x11_matrix m); 509 509 510 - /** @brief Symmetric 7 tap filter with normalization 510 + /* @brief Symmetric 7 tap filter with normalization 511 511 * 512 512 * @param[in] in 1x7 matrix with pixels 513 513 * @param[in] coeff 1x4 matrix with coefficients ··· 528 528 s_1w_1x4_matrix coeff, 529 529 tvector1w out_shift); 530 530 531 - /** @brief Symmetric 7 tap filter with normalization at input side 531 + /* @brief Symmetric 7 tap filter with normalization at input side 532 532 * 533 533 * @param[in] in 1x7 matrix with pixels 534 534 * @param[in] coeff 1x4 matrix with coefficients ··· 549 549 fir1x7m_sym_innrm_approx(s_1w_1x7_matrix in, 550 550 s_1w_1x4_matrix coeff); 551 551 552 - /** @brief Symmetric 7 tap filter with normalization at output side 552 + /* @brief Symmetric 7 tap filter with normalization at output side 553 553 * 554 554 * @param[in] in 1x7 matrix with pixels 555 555 * @param[in] coeff 1x4 matrix with coefficients ··· 571 571 fir1x7m_sym_outnrm_approx(s_1w_1x7_matrix in, 572 572 s_1w_1x4_matrix coeff); 573 573 574 - /** @brief 4 tap filter with normalization 574 + /* @brief 4 tap filter with normalization 575 575 * 576 576 * @param[in] in 1x4 matrix with pixels 577 577 * @param[in] coeff 1x4 matrix with coefficients ··· 588 588 s_1w_1x4_matrix coeff, 589 589 tvector1w out_shift); 590 590 591 - /** @brief 4 tap filter with normalization for half pixel interpolation 591 + /* @brief 4 tap filter with normalization for half pixel interpolation 592 592 * 593 593 * @param[in] in 1x4 matrix with pixels 594 594 * ··· 604 604 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w 605 605 fir1x4m_bicubic_bezier_half(s_1w_1x4_matrix in); 606 606 607 - /** @brief 4 tap filter with normalization for quarter pixel interpolation 607 + /* @brief 4 tap filter with normalization for quarter pixel interpolation 608 608 * 609 609 * @param[in] in 1x4 matrix with pixels 610 610 * @param[in] coeff 1x4 matrix with coefficients ··· 626 626 s_1w_1x4_matrix coeff); 627 627 628 628 629 - /** @brief Symmetric 3 tap filter with normalization 629 + /* @brief Symmetric 3 tap filter with normalization 630 630 * 631 631 * @param[in] in 1x3 matrix with pixels 632 632 * @param[in] coeff 1x2 matrix with coefficients ··· 646 646 s_1w_1x2_matrix coeff, 647 647 tvector1w out_shift); 648 648 649 - /** @brief Symmetric 3 tap filter with normalization 649 + /* @brief Symmetric 3 tap filter with normalization 650 650 * 651 651 * @param[in] in 1x3 matrix with pixels 652 652 * @param[in] coeff 1x2 matrix with coefficients ··· 666 666 fir1x3m_sym_nrm_approx(s_1w_1x3_matrix in, 667 667 s_1w_1x2_matrix coeff); 668 668 669 - /** @brief Mean of 1x3 matrix 669 + /* @brief Mean of 1x3 matrix 670 670 * 671 671 * @param[in] m 1x3 matrix with pixels 672 672 * ··· 678 678 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w mean1x3m( 679 679 s_1w_1x3_matrix m); 680 680 681 - /** @brief Mean of 3x3 matrix 681 + /* @brief Mean of 3x3 matrix 682 682 * 683 683 * @param[in] m 3x3 matrix with pixels 684 684 * ··· 690 690 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w mean3x3m( 691 691 s_1w_3x3_matrix m); 692 692 693 - /** @brief Mean of 1x4 matrix 693 + /* @brief Mean of 1x4 matrix 694 694 * 695 695 * @param[in] m 1x4 matrix with pixels 696 696 * ··· 701 701 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w mean1x4m( 702 702 s_1w_1x4_matrix m); 703 703 704 - /** @brief Mean of 4x4 matrix 704 + /* @brief Mean of 4x4 matrix 705 705 * 706 706 * @param[in] m 4x4 matrix with pixels 707 707 * ··· 712 712 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w mean4x4m( 713 713 s_1w_4x4_matrix m); 714 714 715 - /** @brief Mean of 2x3 matrix 715 + /* @brief Mean of 2x3 matrix 716 716 * 717 717 * @param[in] m 2x3 matrix with pixels 718 718 * ··· 724 724 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w mean2x3m( 725 725 s_1w_2x3_matrix m); 726 726 727 - /** @brief Mean of 1x5 matrix 727 + /* @brief Mean of 1x5 matrix 728 728 * 729 729 * @param[in] m 1x5 matrix with pixels 730 730 * ··· 735 735 */ 736 736 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w mean1x5m(s_1w_1x5_matrix m); 737 737 738 - /** @brief Mean of 1x6 matrix 738 + /* @brief Mean of 1x6 matrix 739 739 * 740 740 * @param[in] m 1x6 matrix with pixels 741 741 * ··· 747 747 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w mean1x6m( 748 748 s_1w_1x6_matrix m); 749 749 750 - /** @brief Mean of 5x5 matrix 750 + /* @brief Mean of 5x5 matrix 751 751 * 752 752 * @param[in] m 5x5 matrix with pixels 753 753 * ··· 759 759 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w mean5x5m( 760 760 s_1w_5x5_matrix m); 761 761 762 - /** @brief Mean of 6x6 matrix 762 + /* @brief Mean of 6x6 matrix 763 763 * 764 764 * @param[in] m 6x6 matrix with pixels 765 765 * ··· 771 771 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w mean6x6m( 772 772 s_1w_6x6_matrix m); 773 773 774 - /** @brief Minimum of 4x4 matrix 774 + /* @brief Minimum of 4x4 matrix 775 775 * 776 776 * @param[in] m 4x4 matrix with pixels 777 777 * ··· 783 783 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w min4x4m( 784 784 s_1w_4x4_matrix m); 785 785 786 - /** @brief Maximum of 4x4 matrix 786 + /* @brief Maximum of 4x4 matrix 787 787 * 788 788 * @param[in] m 4x4 matrix with pixels 789 789 * ··· 795 795 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w max4x4m( 796 796 s_1w_4x4_matrix m); 797 797 798 - /** @brief SAD between two 3x3 matrices 798 + /* @brief SAD between two 3x3 matrices 799 799 * 800 800 * @param[in] a 3x3 matrix with pixels 801 801 * ··· 813 813 s_1w_3x3_matrix a, 814 814 s_1w_3x3_matrix b); 815 815 816 - /** @brief SAD between two 3x3 matrices 816 + /* @brief SAD between two 3x3 matrices 817 817 * 818 818 * @param[in] a 3x3 matrix with pixels 819 819 * ··· 833 833 s_1w_3x3_matrix a, 834 834 s_1w_3x3_matrix b); 835 835 836 - /** @brief SAD between two 5x5 matrices 836 + /* @brief SAD between two 5x5 matrices 837 837 * 838 838 * @param[in] a 5x5 matrix with pixels 839 839 * ··· 847 847 s_1w_5x5_matrix a, 848 848 s_1w_5x5_matrix b); 849 849 850 - /** @brief Absolute gradient between two sets of 1x5 matrices 850 + /* @brief Absolute gradient between two sets of 1x5 matrices 851 851 * 852 852 * @param[in] m0 first set of 1x5 matrix with pixels 853 853 * @param[in] m1 second set of 1x5 matrix with pixels ··· 860 860 STORAGE_CLASS_REF_VECTOR_FUNC_H tvector1w 861 861 absgrad1x5m(s_1w_1x5_matrix m0, s_1w_1x5_matrix m1); 862 862 863 - /** @brief Bi-linear Interpolation optimized(approximate) 863 + /* @brief Bi-linear Interpolation optimized(approximate) 864 864 * 865 865 * @param[in] a input0 866 866 * @param[in] b input1 ··· 882 882 tvector1w b, 883 883 tscalar1w_weight c); 884 884 885 - /** @brief Bi-linear Interpolation optimized(approximate) 885 + /* @brief Bi-linear Interpolation optimized(approximate) 886 886 * 887 887 * @param[in] a input0 888 888 * @param[in] b input1 ··· 904 904 tvector1w b, 905 905 tvector1w_weight c); 906 906 907 - /** @brief Bi-linear Interpolation 907 + /* @brief Bi-linear Interpolation 908 908 * 909 909 * @param[in] a input0 910 910 * @param[in] b input1 ··· 925 925 tvector1w b, 926 926 tscalar1w_weight c); 927 927 928 - /** @brief Generic Block Matching Algorithm 928 + /* @brief Generic Block Matching Algorithm 929 929 * @param[in] search_window pointer to input search window of 16x16 pixels 930 930 * @param[in] ref_block pointer to input reference block of 8x8 pixels, where N<=M 931 931 * @param[in] output pointer to output sads ··· 954 954 tscalar1w_4bit_bma_shift shift); 955 955 956 956 #ifndef ISP2401 957 - /** @brief OP_1w_asp_bma_16_1_32way 957 + /* @brief OP_1w_asp_bma_16_1_32way 958 958 #else 959 - /** @brief OP_1w_asp_bma_16_1_32way_nomask 959 + /* @brief OP_1w_asp_bma_16_1_32way_nomask 960 960 #endif 961 961 * 962 962 * @param[in] search_area input search window of 16x16 pixels ··· 984 984 tscalar1w_4bit_bma_shift shift); 985 985 986 986 #ifndef ISP2401 987 - /** @brief OP_1w_asp_bma_16_2_32way 987 + /* @brief OP_1w_asp_bma_16_2_32way 988 988 #else 989 - /** @brief OP_1w_asp_bma_16_2_32way_nomask 989 + /* @brief OP_1w_asp_bma_16_2_32way_nomask 990 990 #endif 991 991 * 992 992 * @param[in] search_area input search window of 16x16 pixels ··· 1011 1011 ref_block_8x8 input_block, 1012 1012 tscalar1w_4bit_bma_shift shift); 1013 1013 #ifndef ISP2401 1014 - /** @brief OP_1w_asp_bma_14_1_32way 1014 + /* @brief OP_1w_asp_bma_14_1_32way 1015 1015 #else 1016 - /** @brief OP_1w_asp_bma_14_1_32way_nomask 1016 + /* @brief OP_1w_asp_bma_14_1_32way_nomask 1017 1017 #endif 1018 1018 * 1019 1019 * @param[in] search_area input search block of 16x16 pixels with search window of 14x14 pixels ··· 1041 1041 tscalar1w_4bit_bma_shift shift); 1042 1042 1043 1043 #ifndef ISP2401 1044 - /** @brief OP_1w_asp_bma_14_2_32way 1044 + /* @brief OP_1w_asp_bma_14_2_32way 1045 1045 #else 1046 - /** @brief OP_1w_asp_bma_14_2_32way_nomask 1046 + /* @brief OP_1w_asp_bma_14_2_32way_nomask 1047 1047 #endif 1048 1048 * 1049 1049 * @param[in] search_area input search block of 16x16 pixels with search window of 14x14 pixels ··· 1069 1069 tscalar1w_4bit_bma_shift shift); 1070 1070 1071 1071 #ifdef ISP2401 1072 - /** @brief multiplex addition and passing 1072 + /* @brief multiplex addition and passing 1073 1073 * 1074 1074 * @param[in] _a first pixel 1075 1075 * @param[in] _b second pixel ··· 1087 1087 1088 1088 #endif 1089 1089 #ifdef HAS_bfa_unit 1090 - /** @brief OP_1w_single_bfa_7x7 1090 + /* @brief OP_1w_single_bfa_7x7 1091 1091 * 1092 1092 * @param[in] weights - spatial and range weight lut 1093 1093 * @param[in] threshold - threshold plane, for range weight scaling ··· 1115 1115 tvector1w central_pix, 1116 1116 s_1w_7x7_matrix src_plane); 1117 1117 1118 - /** @brief OP_1w_joint_bfa_7x7 1118 + /* @brief OP_1w_joint_bfa_7x7 1119 1119 * 1120 1120 * @param[in] weights - spatial and range weight lut 1121 1121 * @param[in] threshold0 - 1st threshold plane, for range weight scaling ··· 1149 1149 tvector1w central_pix1, 1150 1150 s_1w_7x7_matrix src1_plane); 1151 1151 1152 - /** @brief bbb_bfa_gen_spatial_weight_lut 1152 + /* @brief bbb_bfa_gen_spatial_weight_lut 1153 1153 * 1154 1154 * @param[in] in - 7x7 matrix of spatial weights 1155 1155 * @param[in] out - generated LUT ··· 1163 1163 s_1w_7x7_matrix in, 1164 1164 tvector1w out[BFA_MAX_KWAY]); 1165 1165 1166 - /** @brief bbb_bfa_gen_range_weight_lut 1166 + /* @brief bbb_bfa_gen_range_weight_lut 1167 1167 * 1168 1168 * @param[in] in - input range weight, 1169 1169 * @param[in] out - generated LUT ··· 1184 1184 #endif 1185 1185 1186 1186 #ifdef ISP2401 1187 - /** @brief OP_1w_imax32 1187 + /* @brief OP_1w_imax32 1188 1188 * 1189 1189 * @param[in] src - structure that holds an array of 32 elements. 1190 1190 * ··· 1195 1195 STORAGE_CLASS_REF_VECTOR_FUNC_H int OP_1w_imax32( 1196 1196 imax32_ref_in_vector src); 1197 1197 1198 - /** @brief OP_1w_imaxidx32 1198 + /* @brief OP_1w_imaxidx32 1199 1199 * 1200 1200 * @param[in] src - structure that holds a vector of elements. 1201 1201 *
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/math_support.h
··· 168 168 } 169 169 #endif 170 170 171 - /** @brief Next Power of Two 171 + /* @brief Next Power of Two 172 172 * 173 173 * @param[in] unsigned number 174 174 *
+4 -4
drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/string_support.h
··· 23 23 */ 24 24 25 25 26 - /** @brief Copy from src_buf to dest_buf. 26 + /* @brief Copy from src_buf to dest_buf. 27 27 * 28 28 * @param[out] dest_buf. Destination buffer to copy to 29 29 * @param[in] dest_size. The size of the destination buffer in bytes ··· 53 53 return 0; 54 54 } 55 55 56 - /** @brief Get the length of the string, excluding the null terminator 56 + /* @brief Get the length of the string, excluding the null terminator 57 57 * 58 58 * @param[in] src_str. The source string 59 59 * @param[in] max_len. Look only for max_len bytes in the string ··· 78 78 return ix; 79 79 } 80 80 81 - /** @brief Copy string from src_str to dest_str 81 + /* @brief Copy string from src_str to dest_str 82 82 * 83 83 * @param[out] dest_str. Destination buffer to copy to 84 84 * @param[in] dest_size. The size of the destination buffer in bytes ··· 120 120 return 0; 121 121 } 122 122 123 - /** @brief Copy string from src_str to dest_str 123 + /* @brief Copy string from src_str to dest_str 124 124 * 125 125 * @param[out] dest_str. Destination buffer to copy to 126 126 * @param[in] dest_size. The size of the destination buffer in bytes
+2 -2
drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/tag.c
··· 17 17 #include <assert_support.h> 18 18 #include "tag_local.h" 19 19 20 - /** 20 + /* 21 21 * @brief Creates the tag description from the given parameters. 22 22 * @param[in] num_captures 23 23 * @param[in] skip ··· 39 39 tag_descr->exp_id = exp_id; 40 40 } 41 41 42 - /** 42 + /* 43 43 * @brief Encodes the members of tag description into a 32-bit value. 44 44 * @param[in] tag Pointer to the tag description 45 45 * @return (unsigned int) Encoded 32-bit tag-info
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css.h
··· 16 16 #ifndef _IA_CSS_H_ 17 17 #define _IA_CSS_H_ 18 18 19 - /** @file 19 + /* @file 20 20 * This file is the starting point of the CSS-API. It includes all CSS-API 21 21 * header files. 22 22 */
+19 -19
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_3a.h
··· 15 15 #ifndef __IA_CSS_3A_H 16 16 #define __IA_CSS_3A_H 17 17 18 - /** @file 18 + /* @file 19 19 * This file contains types used for 3A statistics 20 20 */ 21 21 ··· 31 31 IA_CSS_NUM_3A_TABLES 32 32 }; 33 33 34 - /** Structure that holds 3A statistics in the ISP internal 34 + /* Structure that holds 3A statistics in the ISP internal 35 35 * format. Use ia_css_get_3a_statistics() to translate 36 36 * this to the format used on the host (3A library). 37 37 * */ ··· 48 48 struct { 49 49 ia_css_ptr rgby_tbl; 50 50 } data_hmem; 51 - uint32_t exp_id; /**< exposure id, to match statistics to a frame, 51 + uint32_t exp_id; /** exposure id, to match statistics to a frame, 52 52 see ia_css_event_public.h for more detail. */ 53 - uint32_t isp_config_id;/**< Unique ID to track which config was actually applied to a particular frame */ 54 - ia_css_ptr data_ptr; /**< pointer to base of all data */ 55 - uint32_t size; /**< total size of all data */ 53 + uint32_t isp_config_id;/** Unique ID to track which config was actually applied to a particular frame */ 54 + ia_css_ptr data_ptr; /** pointer to base of all data */ 55 + uint32_t size; /** total size of all data */ 56 56 uint32_t dmem_size; 57 - uint32_t vmem_size; /**< both lo and hi have this size */ 57 + uint32_t vmem_size; /** both lo and hi have this size */ 58 58 uint32_t hmem_size; 59 59 }; 60 60 #define SIZE_OF_DMEM_STRUCT \ ··· 77 77 SIZE_OF_IA_CSS_PTR + \ 78 78 4 * sizeof(uint32_t)) 79 79 80 - /** Map with host-side pointers to ISP-format statistics. 80 + /* Map with host-side pointers to ISP-format statistics. 81 81 * These pointers can either be copies of ISP data or memory mapped 82 82 * ISP pointers. 83 83 * All of the data behind these pointers is allocated contiguously, the ··· 85 85 * point into this one block of data. 86 86 */ 87 87 struct ia_css_isp_3a_statistics_map { 88 - void *data_ptr; /**< Pointer to start of memory */ 88 + void *data_ptr; /** Pointer to start of memory */ 89 89 struct ia_css_3a_output *dmem_stats; 90 90 uint16_t *vmem_stats_hi; 91 91 uint16_t *vmem_stats_lo; 92 92 struct ia_css_bh_table *hmem_stats; 93 - uint32_t size; /**< total size in bytes of data_ptr */ 94 - uint32_t data_allocated; /**< indicate whether data_ptr 93 + uint32_t size; /** total size in bytes of data_ptr */ 94 + uint32_t data_allocated; /** indicate whether data_ptr 95 95 was allocated or not. */ 96 96 }; 97 97 98 - /** @brief Copy and translate 3A statistics from an ISP buffer to a host buffer 98 + /* @brief Copy and translate 3A statistics from an ISP buffer to a host buffer 99 99 * @param[out] host_stats Host buffer. 100 100 * @param[in] isp_stats ISP buffer. 101 101 * @return error value if temporary memory cannot be allocated ··· 109 109 ia_css_get_3a_statistics(struct ia_css_3a_statistics *host_stats, 110 110 const struct ia_css_isp_3a_statistics *isp_stats); 111 111 112 - /** @brief Translate 3A statistics from ISP format to host format. 112 + /* @brief Translate 3A statistics from ISP format to host format. 113 113 * @param[out] host_stats host-format statistics 114 114 * @param[in] isp_stats ISP-format statistics 115 115 * @return None ··· 125 125 126 126 /* Convenience functions for alloc/free of certain datatypes */ 127 127 128 - /** @brief Allocate memory for the 3a statistics on the ISP 128 + /* @brief Allocate memory for the 3a statistics on the ISP 129 129 * @param[in] grid The grid. 130 130 * @return Pointer to the allocated 3a statistics buffer on the ISP 131 131 */ 132 132 struct ia_css_isp_3a_statistics * 133 133 ia_css_isp_3a_statistics_allocate(const struct ia_css_3a_grid_info *grid); 134 134 135 - /** @brief Free the 3a statistics memory on the isp 135 + /* @brief Free the 3a statistics memory on the isp 136 136 * @param[in] me Pointer to the 3a statistics buffer on the ISP. 137 137 * @return None 138 138 */ 139 139 void 140 140 ia_css_isp_3a_statistics_free(struct ia_css_isp_3a_statistics *me); 141 141 142 - /** @brief Allocate memory for the 3a statistics on the host 142 + /* @brief Allocate memory for the 3a statistics on the host 143 143 * @param[in] grid The grid. 144 144 * @return Pointer to the allocated 3a statistics buffer on the host 145 145 */ 146 146 struct ia_css_3a_statistics * 147 147 ia_css_3a_statistics_allocate(const struct ia_css_3a_grid_info *grid); 148 148 149 - /** @brief Free the 3a statistics memory on the host 149 + /* @brief Free the 3a statistics memory on the host 150 150 * @param[in] me Pointer to the 3a statistics buffer on the host. 151 151 * @return None 152 152 */ 153 153 void 154 154 ia_css_3a_statistics_free(struct ia_css_3a_statistics *me); 155 155 156 - /** @brief Allocate a 3a statistics map structure 156 + /* @brief Allocate a 3a statistics map structure 157 157 * @param[in] isp_stats pointer to ISP 3a statistis struct 158 158 * @param[in] data_ptr host-side pointer to ISP 3a statistics. 159 159 * @return Pointer to the allocated 3a statistics map ··· 174 174 const struct ia_css_isp_3a_statistics *isp_stats, 175 175 void *data_ptr); 176 176 177 - /** @brief Free the 3a statistics map 177 + /* @brief Free the 3a statistics map 178 178 * @param[in] me Pointer to the 3a statistics map 179 179 * @return None 180 180 *
+108 -108
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_acc_types.h
··· 15 15 #ifndef _IA_CSS_ACC_TYPES_H 16 16 #define _IA_CSS_ACC_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * This file contains types used for acceleration 20 20 */ 21 21 ··· 40 40 * in the kernel and HAL. 41 41 */ 42 42 43 - /** Type of acceleration. 43 + /* Type of acceleration. 44 44 */ 45 45 enum ia_css_acc_type { 46 - IA_CSS_ACC_NONE, /**< Normal binary */ 47 - IA_CSS_ACC_OUTPUT, /**< Accelerator stage on output frame */ 48 - IA_CSS_ACC_VIEWFINDER, /**< Accelerator stage on viewfinder frame */ 49 - IA_CSS_ACC_STANDALONE, /**< Stand-alone acceleration */ 46 + IA_CSS_ACC_NONE, /** Normal binary */ 47 + IA_CSS_ACC_OUTPUT, /** Accelerator stage on output frame */ 48 + IA_CSS_ACC_VIEWFINDER, /** Accelerator stage on viewfinder frame */ 49 + IA_CSS_ACC_STANDALONE, /** Stand-alone acceleration */ 50 50 }; 51 51 52 - /** Cells types 52 + /* Cells types 53 53 */ 54 54 enum ia_css_cell_type { 55 55 IA_CSS_SP0 = 0, ··· 58 58 MAX_NUM_OF_CELLS 59 59 }; 60 60 61 - /** Firmware types. 61 + /* Firmware types. 62 62 */ 63 63 enum ia_css_fw_type { 64 - ia_css_sp_firmware, /**< Firmware for the SP */ 65 - ia_css_isp_firmware, /**< Firmware for the ISP */ 66 - ia_css_bootloader_firmware, /**< Firmware for the BootLoader */ 67 - ia_css_acc_firmware /**< Firmware for accelrations */ 64 + ia_css_sp_firmware, /** Firmware for the SP */ 65 + ia_css_isp_firmware, /** Firmware for the ISP */ 66 + ia_css_bootloader_firmware, /** Firmware for the BootLoader */ 67 + ia_css_acc_firmware /** Firmware for accelrations */ 68 68 }; 69 69 70 70 struct ia_css_blob_descr; 71 71 72 - /** Blob descriptor. 72 + /* Blob descriptor. 73 73 * This structure describes an SP or ISP blob. 74 74 * It describes the test, data and bss sections as well as position in a 75 75 * firmware file. 76 76 * For convenience, it contains dynamic data after loading. 77 77 */ 78 78 struct ia_css_blob_info { 79 - /**< Static blob data */ 80 - uint32_t offset; /**< Blob offset in fw file */ 81 - struct ia_css_isp_param_memory_offsets memory_offsets; /**< offset wrt hdr in bytes */ 82 - uint32_t prog_name_offset; /**< offset wrt hdr in bytes */ 83 - uint32_t size; /**< Size of blob */ 84 - uint32_t padding_size; /**< total cummulative of bytes added due to section alignment */ 85 - uint32_t icache_source; /**< Position of icache in blob */ 86 - uint32_t icache_size; /**< Size of icache section */ 87 - uint32_t icache_padding;/**< bytes added due to icache section alignment */ 88 - uint32_t text_source; /**< Position of text in blob */ 89 - uint32_t text_size; /**< Size of text section */ 90 - uint32_t text_padding; /**< bytes added due to text section alignment */ 91 - uint32_t data_source; /**< Position of data in blob */ 92 - uint32_t data_target; /**< Start of data in SP dmem */ 93 - uint32_t data_size; /**< Size of text section */ 94 - uint32_t data_padding; /**< bytes added due to data section alignment */ 95 - uint32_t bss_target; /**< Start position of bss in SP dmem */ 96 - uint32_t bss_size; /**< Size of bss section */ 97 - /**< Dynamic data filled by loader */ 98 - CSS_ALIGN(const void *code, 8); /**< Code section absolute pointer within fw, code = icache + text */ 99 - CSS_ALIGN(const void *data, 8); /**< Data section absolute pointer within fw, data = data + bss */ 79 + /** Static blob data */ 80 + uint32_t offset; /** Blob offset in fw file */ 81 + struct ia_css_isp_param_memory_offsets memory_offsets; /** offset wrt hdr in bytes */ 82 + uint32_t prog_name_offset; /** offset wrt hdr in bytes */ 83 + uint32_t size; /** Size of blob */ 84 + uint32_t padding_size; /** total cummulative of bytes added due to section alignment */ 85 + uint32_t icache_source; /** Position of icache in blob */ 86 + uint32_t icache_size; /** Size of icache section */ 87 + uint32_t icache_padding;/** bytes added due to icache section alignment */ 88 + uint32_t text_source; /** Position of text in blob */ 89 + uint32_t text_size; /** Size of text section */ 90 + uint32_t text_padding; /** bytes added due to text section alignment */ 91 + uint32_t data_source; /** Position of data in blob */ 92 + uint32_t data_target; /** Start of data in SP dmem */ 93 + uint32_t data_size; /** Size of text section */ 94 + uint32_t data_padding; /** bytes added due to data section alignment */ 95 + uint32_t bss_target; /** Start position of bss in SP dmem */ 96 + uint32_t bss_size; /** Size of bss section */ 97 + /** Dynamic data filled by loader */ 98 + CSS_ALIGN(const void *code, 8); /** Code section absolute pointer within fw, code = icache + text */ 99 + CSS_ALIGN(const void *data, 8); /** Data section absolute pointer within fw, data = data + bss */ 100 100 }; 101 101 102 102 struct ia_css_binary_input_info { ··· 140 140 uint32_t fixed_s3a_deci_log; 141 141 }; 142 142 143 - /** DPC related binary info */ 143 + /* DPC related binary info */ 144 144 struct ia_css_binary_dpc_info { 145 - uint32_t bnr_lite; /**< bnr lite enable flag */ 145 + uint32_t bnr_lite; /** bnr lite enable flag */ 146 146 }; 147 147 148 148 struct ia_css_binary_iterator_info { ··· 193 193 uint32_t output_block_height; 194 194 }; 195 195 196 - /** Structure describing an ISP binary. 196 + /* Structure describing an ISP binary. 197 197 * It describes the capabilities of a binary, like the maximum resolution, 198 198 * support features, dma channels, uds features, etc. 199 199 * This part is to be used by the SP. ··· 210 210 struct ia_css_binary_dvs_info dvs; 211 211 struct ia_css_binary_vf_dec_info vf_dec; 212 212 struct ia_css_binary_s3a_info s3a; 213 - struct ia_css_binary_dpc_info dpc_bnr; /**< DPC related binary info */ 213 + struct ia_css_binary_dpc_info dpc_bnr; /** DPC related binary info */ 214 214 struct ia_css_binary_iterator_info iterator; 215 215 struct ia_css_binary_address_info addresses; 216 216 struct ia_css_binary_uds_info uds; ··· 269 269 } dma; 270 270 }; 271 271 272 - /** Structure describing an ISP binary. 272 + /* Structure describing an ISP binary. 273 273 * It describes the capabilities of a binary, like the maximum resolution, 274 274 * support features, dma channels, uds features, etc. 275 275 */ ··· 281 281 enum ia_css_acc_type type; 282 282 CSS_ALIGN(int32_t num_output_formats, 8); 283 283 enum ia_css_frame_format output_formats[IA_CSS_FRAME_FORMAT_NUM]; 284 - CSS_ALIGN(int32_t num_vf_formats, 8); /**< number of supported vf formats */ 285 - enum ia_css_frame_format vf_formats[IA_CSS_FRAME_FORMAT_NUM]; /**< types of supported vf formats */ 284 + CSS_ALIGN(int32_t num_vf_formats, 8); /** number of supported vf formats */ 285 + enum ia_css_frame_format vf_formats[IA_CSS_FRAME_FORMAT_NUM]; /** types of supported vf formats */ 286 286 uint8_t num_output_pins; 287 287 ia_css_ptr xmem_addr; 288 288 CSS_ALIGN(const struct ia_css_blob_descr *blob, 8); ··· 291 291 CSS_ALIGN(struct ia_css_binary_xinfo *next, 8); 292 292 }; 293 293 294 - /** Structure describing the Bootloader (an ISP binary). 294 + /* Structure describing the Bootloader (an ISP binary). 295 295 * It contains several address, either in ddr, isp_dmem or 296 296 * the entry function in icache. 297 297 */ 298 298 struct ia_css_bl_info { 299 - uint32_t num_dma_cmds; /**< Number of cmds sent by CSS */ 300 - uint32_t dma_cmd_list; /**< Dma command list sent by CSS */ 301 - uint32_t sw_state; /**< Polled from css */ 299 + uint32_t num_dma_cmds; /** Number of cmds sent by CSS */ 300 + uint32_t dma_cmd_list; /** Dma command list sent by CSS */ 301 + uint32_t sw_state; /** Polled from css */ 302 302 /* Entry functions */ 303 - uint32_t bl_entry; /**< The SP entry function */ 303 + uint32_t bl_entry; /** The SP entry function */ 304 304 }; 305 305 306 - /** Structure describing the SP binary. 306 + /* Structure describing the SP binary. 307 307 * It contains several address, either in ddr, sp_dmem or 308 308 * the entry function in pmem. 309 309 */ 310 310 struct ia_css_sp_info { 311 - uint32_t init_dmem_data; /**< data sect config, stored to dmem */ 312 - uint32_t per_frame_data; /**< Per frame data, stored to dmem */ 313 - uint32_t group; /**< Per pipeline data, loaded by dma */ 314 - uint32_t output; /**< SP output data, loaded by dmem */ 315 - uint32_t host_sp_queue; /**< Host <-> SP queues */ 316 - uint32_t host_sp_com;/**< Host <-> SP commands */ 317 - uint32_t isp_started; /**< Polled from sensor thread, csim only */ 318 - uint32_t sw_state; /**< Polled from css */ 319 - uint32_t host_sp_queues_initialized; /**< Polled from the SP */ 320 - uint32_t sleep_mode; /**< different mode to halt SP */ 321 - uint32_t invalidate_tlb; /**< inform SP to invalidate mmu TLB */ 311 + uint32_t init_dmem_data; /** data sect config, stored to dmem */ 312 + uint32_t per_frame_data; /** Per frame data, stored to dmem */ 313 + uint32_t group; /** Per pipeline data, loaded by dma */ 314 + uint32_t output; /** SP output data, loaded by dmem */ 315 + uint32_t host_sp_queue; /** Host <-> SP queues */ 316 + uint32_t host_sp_com;/** Host <-> SP commands */ 317 + uint32_t isp_started; /** Polled from sensor thread, csim only */ 318 + uint32_t sw_state; /** Polled from css */ 319 + uint32_t host_sp_queues_initialized; /** Polled from the SP */ 320 + uint32_t sleep_mode; /** different mode to halt SP */ 321 + uint32_t invalidate_tlb; /** inform SP to invalidate mmu TLB */ 322 322 #ifndef ISP2401 323 - uint32_t stop_copy_preview; /**< suspend copy and preview pipe when capture */ 323 + uint32_t stop_copy_preview; /** suspend copy and preview pipe when capture */ 324 324 #endif 325 - uint32_t debug_buffer_ddr_address; /**< inform SP the address 325 + uint32_t debug_buffer_ddr_address; /** inform SP the address 326 326 of DDR debug queue */ 327 - uint32_t perf_counter_input_system_error; /**< input system perf 327 + uint32_t perf_counter_input_system_error; /** input system perf 328 328 counter array */ 329 329 #ifdef HAS_WATCHDOG_SP_THREAD_DEBUG 330 - uint32_t debug_wait; /**< thread/pipe post mortem debug */ 331 - uint32_t debug_stage; /**< thread/pipe post mortem debug */ 332 - uint32_t debug_stripe; /**< thread/pipe post mortem debug */ 330 + uint32_t debug_wait; /** thread/pipe post mortem debug */ 331 + uint32_t debug_stage; /** thread/pipe post mortem debug */ 332 + uint32_t debug_stripe; /** thread/pipe post mortem debug */ 333 333 #endif 334 - uint32_t threads_stack; /**< sp thread's stack pointers */ 335 - uint32_t threads_stack_size; /**< sp thread's stack sizes */ 336 - uint32_t curr_binary_id; /**< current binary id */ 337 - uint32_t raw_copy_line_count; /**< raw copy line counter */ 338 - uint32_t ddr_parameter_address; /**< acc param ddrptr, sp dmem */ 339 - uint32_t ddr_parameter_size; /**< acc param size, sp dmem */ 334 + uint32_t threads_stack; /** sp thread's stack pointers */ 335 + uint32_t threads_stack_size; /** sp thread's stack sizes */ 336 + uint32_t curr_binary_id; /** current binary id */ 337 + uint32_t raw_copy_line_count; /** raw copy line counter */ 338 + uint32_t ddr_parameter_address; /** acc param ddrptr, sp dmem */ 339 + uint32_t ddr_parameter_size; /** acc param size, sp dmem */ 340 340 /* Entry functions */ 341 - uint32_t sp_entry; /**< The SP entry function */ 342 - uint32_t tagger_frames_addr; /**< Base address of tagger state */ 341 + uint32_t sp_entry; /** The SP entry function */ 342 + uint32_t tagger_frames_addr; /** Base address of tagger state */ 343 343 }; 344 344 345 345 /* The following #if is there because this header file is also included ··· 348 348 More permanent solution will be to refactor this include. 349 349 */ 350 350 #if !defined(__ISP) 351 - /** Accelerator firmware information. 351 + /* Accelerator firmware information. 352 352 */ 353 353 struct ia_css_acc_info { 354 - uint32_t per_frame_data; /**< Dummy for now */ 354 + uint32_t per_frame_data; /** Dummy for now */ 355 355 }; 356 356 357 - /** Firmware information. 357 + /* Firmware information. 358 358 */ 359 359 union ia_css_fw_union { 360 - struct ia_css_binary_xinfo isp; /**< ISP info */ 361 - struct ia_css_sp_info sp; /**< SP info */ 362 - struct ia_css_bl_info bl; /**< Bootloader info */ 363 - struct ia_css_acc_info acc; /**< Accelerator info */ 360 + struct ia_css_binary_xinfo isp; /** ISP info */ 361 + struct ia_css_sp_info sp; /** SP info */ 362 + struct ia_css_bl_info bl; /** Bootloader info */ 363 + struct ia_css_acc_info acc; /** Accelerator info */ 364 364 }; 365 365 366 - /** Firmware information. 366 + /* Firmware information. 367 367 */ 368 368 struct ia_css_fw_info { 369 - size_t header_size; /**< size of fw header */ 369 + size_t header_size; /** size of fw header */ 370 370 CSS_ALIGN(uint32_t type, 8); 371 - union ia_css_fw_union info; /**< Binary info */ 372 - struct ia_css_blob_info blob; /**< Blob info */ 371 + union ia_css_fw_union info; /** Binary info */ 372 + struct ia_css_blob_info blob; /** Blob info */ 373 373 /* Dynamic part */ 374 374 struct ia_css_fw_info *next; 375 - CSS_ALIGN(uint32_t loaded, 8); /**< Firmware has been loaded */ 376 - CSS_ALIGN(const uint8_t *isp_code, 8); /**< ISP pointer to code */ 377 - /**< Firmware handle between user space and kernel */ 375 + CSS_ALIGN(uint32_t loaded, 8); /** Firmware has been loaded */ 376 + CSS_ALIGN(const uint8_t *isp_code, 8); /** ISP pointer to code */ 377 + /** Firmware handle between user space and kernel */ 378 378 CSS_ALIGN(uint32_t handle, 8); 379 - /**< Sections to copy from/to ISP */ 379 + /** Sections to copy from/to ISP */ 380 380 struct ia_css_isp_param_css_segments mem_initializers; 381 - /**< Initializer for local ISP memories */ 381 + /** Initializer for local ISP memories */ 382 382 }; 383 383 384 384 struct ia_css_blob_descr { ··· 390 390 391 391 struct ia_css_acc_fw; 392 392 393 - /** Structure describing the SP binary of a stand-alone accelerator. 393 + /* Structure describing the SP binary of a stand-alone accelerator. 394 394 */ 395 395 struct ia_css_acc_sp { 396 - void (*init)(struct ia_css_acc_fw *); /**< init for crun */ 397 - uint32_t sp_prog_name_offset; /**< program name offset wrt hdr in bytes */ 398 - uint32_t sp_blob_offset; /**< blob offset wrt hdr in bytes */ 399 - void *entry; /**< Address of sp entry point */ 400 - uint32_t *css_abort; /**< SP dmem abort flag */ 401 - void *isp_code; /**< SP dmem address holding xmem 396 + void (*init)(struct ia_css_acc_fw *); /** init for crun */ 397 + uint32_t sp_prog_name_offset; /** program name offset wrt hdr in bytes */ 398 + uint32_t sp_blob_offset; /** blob offset wrt hdr in bytes */ 399 + void *entry; /** Address of sp entry point */ 400 + uint32_t *css_abort; /** SP dmem abort flag */ 401 + void *isp_code; /** SP dmem address holding xmem 402 402 address of isp code */ 403 - struct ia_css_fw_info fw; /**< SP fw descriptor */ 404 - const uint8_t *code; /**< ISP pointer of allocated SP code */ 403 + struct ia_css_fw_info fw; /** SP fw descriptor */ 404 + const uint8_t *code; /** ISP pointer of allocated SP code */ 405 405 }; 406 406 407 - /** Acceleration firmware descriptor. 407 + /* Acceleration firmware descriptor. 408 408 * This descriptor descibes either SP code (stand-alone), or 409 409 * ISP code (a separate pipeline stage). 410 410 */ 411 411 struct ia_css_acc_fw_hdr { 412 - enum ia_css_acc_type type; /**< Type of accelerator */ 413 - uint32_t isp_prog_name_offset; /**< program name offset wrt 412 + enum ia_css_acc_type type; /** Type of accelerator */ 413 + uint32_t isp_prog_name_offset; /** program name offset wrt 414 414 header in bytes */ 415 - uint32_t isp_blob_offset; /**< blob offset wrt header 415 + uint32_t isp_blob_offset; /** blob offset wrt header 416 416 in bytes */ 417 - uint32_t isp_size; /**< Size of isp blob */ 418 - const uint8_t *isp_code; /**< ISP pointer to code */ 419 - struct ia_css_acc_sp sp; /**< Standalone sp code */ 420 - /**< Firmware handle between user space and kernel */ 417 + uint32_t isp_size; /** Size of isp blob */ 418 + const uint8_t *isp_code; /** ISP pointer to code */ 419 + struct ia_css_acc_sp sp; /** Standalone sp code */ 420 + /** Firmware handle between user space and kernel */ 421 421 uint32_t handle; 422 - struct ia_css_data parameters; /**< Current SP parameters */ 422 + struct ia_css_data parameters; /** Current SP parameters */ 423 423 }; 424 424 425 - /** Firmware structure. 425 + /* Firmware structure. 426 426 * This contains the header and actual blobs. 427 427 * For standalone, it contains SP and ISP blob. 428 428 * For a pipeline stage accelerator, it contains ISP code only. ··· 430 430 * header and computed using the access macros below. 431 431 */ 432 432 struct ia_css_acc_fw { 433 - struct ia_css_acc_fw_hdr header; /**< firmware header */ 433 + struct ia_css_acc_fw_hdr header; /** firmware header */ 434 434 /* 435 435 int8_t isp_progname[]; **< ISP program name 436 436 int8_t sp_progname[]; **< SP program name, stand-alone only
+16 -16
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_buffer.h
··· 15 15 #ifndef __IA_CSS_BUFFER_H 16 16 #define __IA_CSS_BUFFER_H 17 17 18 - /** @file 18 + /* @file 19 19 * This file contains datastructures and types for buffers used in CSS 20 20 */ 21 21 ··· 23 23 #include "ia_css_types.h" 24 24 #include "ia_css_timer.h" 25 25 26 - /** Enumeration of buffer types. Buffers can be queued and de-queued 26 + /* Enumeration of buffer types. Buffers can be queued and de-queued 27 27 * to hand them over between IA and ISP. 28 28 */ 29 29 enum ia_css_buffer_type { ··· 48 48 49 49 /* Driver API is not SP/ISP visible, 64 bit types not supported on hivecc */ 50 50 #if !defined(__ISP) 51 - /** Buffer structure. This is a container structure that enables content 51 + /* Buffer structure. This is a container structure that enables content 52 52 * independent buffer queues and access functions. 53 53 */ 54 54 struct ia_css_buffer { 55 - enum ia_css_buffer_type type; /**< Buffer type. */ 55 + enum ia_css_buffer_type type; /** Buffer type. */ 56 56 unsigned int exp_id; 57 - /**< exposure id for this buffer; 0 = not available 57 + /** exposure id for this buffer; 0 = not available 58 58 see ia_css_event_public.h for more detail. */ 59 59 union { 60 - struct ia_css_isp_3a_statistics *stats_3a; /**< 3A statistics & optionally RGBY statistics. */ 61 - struct ia_css_isp_dvs_statistics *stats_dvs; /**< DVS statistics. */ 62 - struct ia_css_isp_skc_dvs_statistics *stats_skc_dvs; /**< SKC DVS statistics. */ 63 - struct ia_css_frame *frame; /**< Frame buffer. */ 64 - struct ia_css_acc_param *custom_data; /**< Custom buffer. */ 65 - struct ia_css_metadata *metadata; /**< Sensor metadata. */ 66 - } data; /**< Buffer data pointer. */ 67 - uint64_t driver_cookie; /**< cookie for the driver */ 68 - struct ia_css_time_meas timing_data; /**< timing data (readings from the timer) */ 69 - struct ia_css_clock_tick isys_eof_clock_tick; /**< ISYS's end of frame timer tick*/ 60 + struct ia_css_isp_3a_statistics *stats_3a; /** 3A statistics & optionally RGBY statistics. */ 61 + struct ia_css_isp_dvs_statistics *stats_dvs; /** DVS statistics. */ 62 + struct ia_css_isp_skc_dvs_statistics *stats_skc_dvs; /** SKC DVS statistics. */ 63 + struct ia_css_frame *frame; /** Frame buffer. */ 64 + struct ia_css_acc_param *custom_data; /** Custom buffer. */ 65 + struct ia_css_metadata *metadata; /** Sensor metadata. */ 66 + } data; /** Buffer data pointer. */ 67 + uint64_t driver_cookie; /** cookie for the driver */ 68 + struct ia_css_time_meas timing_data; /** timing data (readings from the timer) */ 69 + struct ia_css_clock_tick isys_eof_clock_tick; /** ISYS's end of frame timer tick*/ 70 70 }; 71 71 72 - /** @brief Dequeue param buffers from sp2host_queue 72 + /* @brief Dequeue param buffers from sp2host_queue 73 73 * 74 74 * @return None 75 75 *
+11 -11
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_control.h
··· 15 15 #ifndef __IA_CSS_CONTROL_H 16 16 #define __IA_CSS_CONTROL_H 17 17 18 - /** @file 18 + /* @file 19 19 * This file contains functionality for starting and controlling CSS 20 20 */ 21 21 ··· 24 24 #include <ia_css_firmware.h> 25 25 #include <ia_css_irq.h> 26 26 27 - /** @brief Initialize the CSS API. 27 + /* @brief Initialize the CSS API. 28 28 * @param[in] env Environment, provides functions to access the 29 29 * environment in which the CSS code runs. This is 30 30 * used for host side memory access and message ··· 51 51 uint32_t l1_base, 52 52 enum ia_css_irq_type irq_type); 53 53 54 - /** @brief Un-initialize the CSS API. 54 + /* @brief Un-initialize the CSS API. 55 55 * @return None 56 56 * 57 57 * This function deallocates all memory that has been allocated by the CSS API ··· 66 66 void 67 67 ia_css_uninit(void); 68 68 69 - /** @brief Suspend CSS API for power down 69 + /* @brief Suspend CSS API for power down 70 70 * @return success or faulure code 71 71 * 72 72 * suspend shuts down the system by: ··· 80 80 enum ia_css_err 81 81 ia_css_suspend(void); 82 82 83 - /** @brief Resume CSS API from power down 83 + /* @brief Resume CSS API from power down 84 84 * @return success or failure code 85 85 * 86 86 * After a power cycle, this function will bring the CSS API back into ··· 91 91 enum ia_css_err 92 92 ia_css_resume(void); 93 93 94 - /** @brief Enable use of a separate queue for ISYS events. 94 + /* @brief Enable use of a separate queue for ISYS events. 95 95 * 96 96 * @param[in] enable: enable or disable use of separate ISYS event queues. 97 97 * @return error if called when SP is running. ··· 105 105 enum ia_css_err 106 106 ia_css_enable_isys_event_queue(bool enable); 107 107 108 - /** @brief Test whether the ISP has started. 108 + /* @brief Test whether the ISP has started. 109 109 * 110 110 * @return Boolean flag true if the ISP has started or false otherwise. 111 111 * ··· 114 114 bool 115 115 ia_css_isp_has_started(void); 116 116 117 - /** @brief Test whether the SP has initialized. 117 + /* @brief Test whether the SP has initialized. 118 118 * 119 119 * @return Boolean flag true if the SP has initialized or false otherwise. 120 120 * ··· 123 123 bool 124 124 ia_css_sp_has_initialized(void); 125 125 126 - /** @brief Test whether the SP has terminated. 126 + /* @brief Test whether the SP has terminated. 127 127 * 128 128 * @return Boolean flag true if the SP has terminated or false otherwise. 129 129 * ··· 132 132 bool 133 133 ia_css_sp_has_terminated(void); 134 134 135 - /** @brief start SP hardware 135 + /* @brief start SP hardware 136 136 * 137 137 * @return IA_CSS_SUCCESS or error code upon error. 138 138 * ··· 144 144 ia_css_start_sp(void); 145 145 146 146 147 - /** @brief stop SP hardware 147 + /* @brief stop SP hardware 148 148 * 149 149 * @return IA_CSS_SUCCESS or error code upon error. 150 150 *
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_device_access.h
··· 15 15 #ifndef _IA_CSS_DEVICE_ACCESS_H 16 16 #define _IA_CSS_DEVICE_ACCESS_H 17 17 18 - /** @file 18 + /* @file 19 19 * File containing internal functions for the CSS-API to access the CSS device. 20 20 */ 21 21
+26 -26
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_dvs.h
··· 15 15 #ifndef __IA_CSS_DVS_H 16 16 #define __IA_CSS_DVS_H 17 17 18 - /** @file 18 + /* @file 19 19 * This file contains types for DVS statistics 20 20 */ 21 21 ··· 31 31 }; 32 32 33 33 34 - /** Structure that holds DVS statistics in the ISP internal 34 + /* Structure that holds DVS statistics in the ISP internal 35 35 * format. Use ia_css_get_dvs_statistics() to translate 36 36 * this to the format used on the host (DVS engine). 37 37 * */ ··· 40 40 ia_css_ptr ver_proj; 41 41 uint32_t hor_size; 42 42 uint32_t ver_size; 43 - uint32_t exp_id; /**< see ia_css_event_public.h for more detail */ 43 + uint32_t exp_id; /** see ia_css_event_public.h for more detail */ 44 44 ia_css_ptr data_ptr; /* base pointer containing all memory */ 45 45 uint32_t size; /* size of allocated memory in data_ptr */ 46 46 }; 47 47 48 - /** Structure that holds SKC DVS statistics in the ISP internal 48 + /* Structure that holds SKC DVS statistics in the ISP internal 49 49 * format. Use ia_css_dvs_statistics_get() to translate this to 50 50 * the format used on the host. 51 51 * */ ··· 82 82 struct ia_css_skc_dvs_statistics *p_skc_dvs_statistics_host; 83 83 }; 84 84 85 - /** @brief Copy DVS statistics from an ISP buffer to a host buffer. 85 + /* @brief Copy DVS statistics from an ISP buffer to a host buffer. 86 86 * @param[in] host_stats Host buffer 87 87 * @param[in] isp_stats ISP buffer 88 88 * @return error value if temporary memory cannot be allocated ··· 100 100 ia_css_get_dvs_statistics(struct ia_css_dvs_statistics *host_stats, 101 101 const struct ia_css_isp_dvs_statistics *isp_stats); 102 102 103 - /** @brief Translate DVS statistics from ISP format to host format 103 + /* @brief Translate DVS statistics from ISP format to host format 104 104 * @param[in] host_stats Host buffer 105 105 * @param[in] isp_stats ISP buffer 106 106 * @return None ··· 116 116 struct ia_css_dvs_statistics *host_stats, 117 117 const struct ia_css_isp_dvs_statistics_map *isp_stats); 118 118 119 - /** @brief Copy DVS 2.0 statistics from an ISP buffer to a host buffer. 119 + /* @brief Copy DVS 2.0 statistics from an ISP buffer to a host buffer. 120 120 * @param[in] host_stats Host buffer 121 121 * @param[in] isp_stats ISP buffer 122 122 * @return error value if temporary memory cannot be allocated ··· 134 134 ia_css_get_dvs2_statistics(struct ia_css_dvs2_statistics *host_stats, 135 135 const struct ia_css_isp_dvs_statistics *isp_stats); 136 136 137 - /** @brief Translate DVS2 statistics from ISP format to host format 137 + /* @brief Translate DVS2 statistics from ISP format to host format 138 138 * @param[in] host_stats Host buffer 139 139 * @param[in] isp_stats ISP buffer 140 140 * @return None ··· 150 150 struct ia_css_dvs2_statistics *host_stats, 151 151 const struct ia_css_isp_dvs_statistics_map *isp_stats); 152 152 153 - /** @brief Copy DVS statistics from an ISP buffer to a host buffer. 153 + /* @brief Copy DVS statistics from an ISP buffer to a host buffer. 154 154 * @param[in] type - DVS statistics type 155 155 * @param[in] host_stats Host buffer 156 156 * @param[in] isp_stats ISP buffer ··· 161 161 union ia_css_dvs_statistics_host *host_stats, 162 162 const union ia_css_dvs_statistics_isp *isp_stats); 163 163 164 - /** @brief Allocate the DVS statistics memory on the ISP 164 + /* @brief Allocate the DVS statistics memory on the ISP 165 165 * @param[in] grid The grid. 166 166 * @return Pointer to the allocated DVS statistics buffer on the ISP 167 167 */ 168 168 struct ia_css_isp_dvs_statistics * 169 169 ia_css_isp_dvs_statistics_allocate(const struct ia_css_dvs_grid_info *grid); 170 170 171 - /** @brief Free the DVS statistics memory on the ISP 171 + /* @brief Free the DVS statistics memory on the ISP 172 172 * @param[in] me Pointer to the DVS statistics buffer on the ISP. 173 173 * @return None 174 174 */ 175 175 void 176 176 ia_css_isp_dvs_statistics_free(struct ia_css_isp_dvs_statistics *me); 177 177 178 - /** @brief Allocate the DVS 2.0 statistics memory 178 + /* @brief Allocate the DVS 2.0 statistics memory 179 179 * @param[in] grid The grid. 180 180 * @return Pointer to the allocated DVS statistics buffer on the ISP 181 181 */ 182 182 struct ia_css_isp_dvs_statistics * 183 183 ia_css_isp_dvs2_statistics_allocate(const struct ia_css_dvs_grid_info *grid); 184 184 185 - /** @brief Free the DVS 2.0 statistics memory 185 + /* @brief Free the DVS 2.0 statistics memory 186 186 * @param[in] me Pointer to the DVS statistics buffer on the ISP. 187 187 * @return None 188 188 */ 189 189 void 190 190 ia_css_isp_dvs2_statistics_free(struct ia_css_isp_dvs_statistics *me); 191 191 192 - /** @brief Allocate the DVS statistics memory on the host 192 + /* @brief Allocate the DVS statistics memory on the host 193 193 * @param[in] grid The grid. 194 194 * @return Pointer to the allocated DVS statistics buffer on the host 195 195 */ 196 196 struct ia_css_dvs_statistics * 197 197 ia_css_dvs_statistics_allocate(const struct ia_css_dvs_grid_info *grid); 198 198 199 - /** @brief Free the DVS statistics memory on the host 199 + /* @brief Free the DVS statistics memory on the host 200 200 * @param[in] me Pointer to the DVS statistics buffer on the host. 201 201 * @return None 202 202 */ 203 203 void 204 204 ia_css_dvs_statistics_free(struct ia_css_dvs_statistics *me); 205 205 206 - /** @brief Allocate the DVS coefficients memory 206 + /* @brief Allocate the DVS coefficients memory 207 207 * @param[in] grid The grid. 208 208 * @return Pointer to the allocated DVS coefficients buffer 209 209 */ 210 210 struct ia_css_dvs_coefficients * 211 211 ia_css_dvs_coefficients_allocate(const struct ia_css_dvs_grid_info *grid); 212 212 213 - /** @brief Free the DVS coefficients memory 213 + /* @brief Free the DVS coefficients memory 214 214 * @param[in] me Pointer to the DVS coefficients buffer. 215 215 * @return None 216 216 */ 217 217 void 218 218 ia_css_dvs_coefficients_free(struct ia_css_dvs_coefficients *me); 219 219 220 - /** @brief Allocate the DVS 2.0 statistics memory on the host 220 + /* @brief Allocate the DVS 2.0 statistics memory on the host 221 221 * @param[in] grid The grid. 222 222 * @return Pointer to the allocated DVS 2.0 statistics buffer on the host 223 223 */ 224 224 struct ia_css_dvs2_statistics * 225 225 ia_css_dvs2_statistics_allocate(const struct ia_css_dvs_grid_info *grid); 226 226 227 - /** @brief Free the DVS 2.0 statistics memory 227 + /* @brief Free the DVS 2.0 statistics memory 228 228 * @param[in] me Pointer to the DVS 2.0 statistics buffer on the host. 229 229 * @return None 230 230 */ 231 231 void 232 232 ia_css_dvs2_statistics_free(struct ia_css_dvs2_statistics *me); 233 233 234 - /** @brief Allocate the DVS 2.0 coefficients memory 234 + /* @brief Allocate the DVS 2.0 coefficients memory 235 235 * @param[in] grid The grid. 236 236 * @return Pointer to the allocated DVS 2.0 coefficients buffer 237 237 */ 238 238 struct ia_css_dvs2_coefficients * 239 239 ia_css_dvs2_coefficients_allocate(const struct ia_css_dvs_grid_info *grid); 240 240 241 - /** @brief Free the DVS 2.0 coefficients memory 241 + /* @brief Free the DVS 2.0 coefficients memory 242 242 * @param[in] me Pointer to the DVS 2.0 coefficients buffer. 243 243 * @return None 244 244 */ 245 245 void 246 246 ia_css_dvs2_coefficients_free(struct ia_css_dvs2_coefficients *me); 247 247 248 - /** @brief Allocate the DVS 2.0 6-axis config memory 248 + /* @brief Allocate the DVS 2.0 6-axis config memory 249 249 * @param[in] stream The stream. 250 250 * @return Pointer to the allocated DVS 6axis configuration buffer 251 251 */ 252 252 struct ia_css_dvs_6axis_config * 253 253 ia_css_dvs2_6axis_config_allocate(const struct ia_css_stream *stream); 254 254 255 - /** @brief Free the DVS 2.0 6-axis config memory 255 + /* @brief Free the DVS 2.0 6-axis config memory 256 256 * @param[in] dvs_6axis_config Pointer to the DVS 6axis configuration buffer 257 257 * @return None 258 258 */ 259 259 void 260 260 ia_css_dvs2_6axis_config_free(struct ia_css_dvs_6axis_config *dvs_6axis_config); 261 261 262 - /** @brief Allocate a dvs statistics map structure 262 + /* @brief Allocate a dvs statistics map structure 263 263 * @param[in] isp_stats pointer to ISP dvs statistis struct 264 264 * @param[in] data_ptr host-side pointer to ISP dvs statistics. 265 265 * @return Pointer to the allocated dvs statistics map ··· 280 280 const struct ia_css_isp_dvs_statistics *isp_stats, 281 281 void *data_ptr); 282 282 283 - /** @brief Free the dvs statistics map 283 + /* @brief Free the dvs statistics map 284 284 * @param[in] me Pointer to the dvs statistics map 285 285 * @return None 286 286 * ··· 291 291 void 292 292 ia_css_isp_dvs_statistics_map_free(struct ia_css_isp_dvs_statistics_map *me); 293 293 294 - /** @brief Allocate memory for the SKC DVS statistics on the ISP 294 + /* @brief Allocate memory for the SKC DVS statistics on the ISP 295 295 * @return Pointer to the allocated ACC DVS statistics buffer on the ISP 296 296 */ 297 297 struct ia_css_isp_skc_dvs_statistics *ia_css_skc_dvs_statistics_allocate(void);
+20 -20
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_env.h
··· 20 20 #include "ia_css_types.h" 21 21 #include "ia_css_acc_types.h" 22 22 23 - /** @file 23 + /* @file 24 24 * This file contains prototypes for functions that need to be provided to the 25 25 * CSS-API host-code by the environment in which the CSS-API code runs. 26 26 */ 27 27 28 - /** Memory allocation attributes, for use in ia_css_css_mem_env. */ 28 + /* Memory allocation attributes, for use in ia_css_css_mem_env. */ 29 29 enum ia_css_mem_attr { 30 30 IA_CSS_MEM_ATTR_CACHED = 1 << 0, 31 31 IA_CSS_MEM_ATTR_ZEROED = 1 << 1, ··· 33 33 IA_CSS_MEM_ATTR_CONTIGUOUS = 1 << 3, 34 34 }; 35 35 36 - /** Environment with function pointers for local IA memory allocation. 36 + /* Environment with function pointers for local IA memory allocation. 37 37 * This provides the CSS code with environment specific functionality 38 38 * for memory allocation of small local buffers such as local data structures. 39 39 * This is never expected to allocate more than one page of memory (4K bytes). 40 40 */ 41 41 struct ia_css_cpu_mem_env { 42 42 void (*flush)(struct ia_css_acc_fw *fw); 43 - /**< Flush function to flush the cache for given accelerator. */ 43 + /** Flush function to flush the cache for given accelerator. */ 44 44 }; 45 45 46 - /** Environment with function pointers to access the CSS hardware. This includes 46 + /* Environment with function pointers to access the CSS hardware. This includes 47 47 * registers and local memories. 48 48 */ 49 49 struct ia_css_hw_access_env { 50 50 void (*store_8)(hrt_address addr, uint8_t data); 51 - /**< Store an 8 bit value into an address in the CSS HW address space. 51 + /** Store an 8 bit value into an address in the CSS HW address space. 52 52 The address must be an 8 bit aligned address. */ 53 53 void (*store_16)(hrt_address addr, uint16_t data); 54 - /**< Store a 16 bit value into an address in the CSS HW address space. 54 + /** Store a 16 bit value into an address in the CSS HW address space. 55 55 The address must be a 16 bit aligned address. */ 56 56 void (*store_32)(hrt_address addr, uint32_t data); 57 - /**< Store a 32 bit value into an address in the CSS HW address space. 57 + /** Store a 32 bit value into an address in the CSS HW address space. 58 58 The address must be a 32 bit aligned address. */ 59 59 uint8_t (*load_8)(hrt_address addr); 60 - /**< Load an 8 bit value from an address in the CSS HW address 60 + /** Load an 8 bit value from an address in the CSS HW address 61 61 space. The address must be an 8 bit aligned address. */ 62 62 uint16_t (*load_16)(hrt_address addr); 63 - /**< Load a 16 bit value from an address in the CSS HW address 63 + /** Load a 16 bit value from an address in the CSS HW address 64 64 space. The address must be a 16 bit aligned address. */ 65 65 uint32_t (*load_32)(hrt_address addr); 66 - /**< Load a 32 bit value from an address in the CSS HW address 66 + /** Load a 32 bit value from an address in the CSS HW address 67 67 space. The address must be a 32 bit aligned address. */ 68 68 void (*store)(hrt_address addr, const void *data, uint32_t bytes); 69 - /**< Store a number of bytes into a byte-aligned address in the CSS HW address space. */ 69 + /** Store a number of bytes into a byte-aligned address in the CSS HW address space. */ 70 70 void (*load)(hrt_address addr, void *data, uint32_t bytes); 71 - /**< Load a number of bytes from a byte-aligned address in the CSS HW address space. */ 71 + /** Load a number of bytes from a byte-aligned address in the CSS HW address space. */ 72 72 }; 73 73 74 - /** Environment with function pointers to print error and debug messages. 74 + /* Environment with function pointers to print error and debug messages. 75 75 */ 76 76 struct ia_css_print_env { 77 77 int (*debug_print)(const char *fmt, va_list args); 78 - /**< Print a debug message. */ 78 + /** Print a debug message. */ 79 79 int (*error_print)(const char *fmt, va_list args); 80 - /**< Print an error message.*/ 80 + /** Print an error message.*/ 81 81 }; 82 82 83 - /** Environment structure. This includes function pointers to access several 83 + /* Environment structure. This includes function pointers to access several 84 84 * features provided by the environment in which the CSS API is used. 85 85 * This is used to run the camera IP in multiple platforms such as Linux, 86 86 * Windows and several simulation environments. 87 87 */ 88 88 struct ia_css_env { 89 - struct ia_css_cpu_mem_env cpu_mem_env; /**< local flush. */ 90 - struct ia_css_hw_access_env hw_access_env; /**< CSS HW access functions */ 91 - struct ia_css_print_env print_env; /**< Message printing env. */ 89 + struct ia_css_cpu_mem_env cpu_mem_env; /** local flush. */ 90 + struct ia_css_hw_access_env hw_access_env; /** CSS HW access functions */ 91 + struct ia_css_print_env print_env; /** Message printing env. */ 92 92 }; 93 93 94 94 #endif /* __IA_CSS_ENV_H */
+9 -9
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_err.h
··· 15 15 #ifndef __IA_CSS_ERR_H 16 16 #define __IA_CSS_ERR_H 17 17 18 - /** @file 18 + /* @file 19 19 * This file contains possible return values for most 20 20 * functions in the CSS-API. 21 21 */ 22 22 23 - /** Errors, these values are used as the return value for most 23 + /* Errors, these values are used as the return value for most 24 24 * functions in this API. 25 25 */ 26 26 enum ia_css_err { ··· 41 41 IA_CSS_ERR_NOT_SUPPORTED 42 42 }; 43 43 44 - /** FW warnings. This enum contains a value for each warning that 44 + /* FW warnings. This enum contains a value for each warning that 45 45 * the SP FW could indicate potential performance issue 46 46 */ 47 47 enum ia_css_fw_warning { 48 48 IA_CSS_FW_WARNING_NONE, 49 - IA_CSS_FW_WARNING_ISYS_QUEUE_FULL, /** < CSS system delayed because of insufficient space in the ISys queue. 49 + IA_CSS_FW_WARNING_ISYS_QUEUE_FULL, /* < CSS system delayed because of insufficient space in the ISys queue. 50 50 This warning can be avoided by de-queing ISYS buffers more timely. */ 51 - IA_CSS_FW_WARNING_PSYS_QUEUE_FULL, /** < CSS system delayed because of insufficient space in the PSys queue. 51 + IA_CSS_FW_WARNING_PSYS_QUEUE_FULL, /* < CSS system delayed because of insufficient space in the PSys queue. 52 52 This warning can be avoided by de-queing PSYS buffers more timely. */ 53 - IA_CSS_FW_WARNING_CIRCBUF_ALL_LOCKED, /** < CSS system delayed because of insufficient available buffers. 53 + IA_CSS_FW_WARNING_CIRCBUF_ALL_LOCKED, /* < CSS system delayed because of insufficient available buffers. 54 54 This warning can be avoided by unlocking locked frame-buffers more timely. */ 55 - IA_CSS_FW_WARNING_EXP_ID_LOCKED, /** < Exposure ID skipped because the frame associated to it was still locked. 55 + IA_CSS_FW_WARNING_EXP_ID_LOCKED, /* < Exposure ID skipped because the frame associated to it was still locked. 56 56 This warning can be avoided by unlocking locked frame-buffers more timely. */ 57 - IA_CSS_FW_WARNING_TAG_EXP_ID_FAILED, /** < Exposure ID cannot be found on the circular buffer. 57 + IA_CSS_FW_WARNING_TAG_EXP_ID_FAILED, /* < Exposure ID cannot be found on the circular buffer. 58 58 This warning can be avoided by unlocking locked frame-buffers more timely. */ 59 - IA_CSS_FW_WARNING_FRAME_PARAM_MISMATCH, /** < Frame and param pair mismatched in tagger. 59 + IA_CSS_FW_WARNING_FRAME_PARAM_MISMATCH, /* < Frame and param pair mismatched in tagger. 60 60 This warning can be avoided by providing a param set for each frame. */ 61 61 }; 62 62
+34 -34
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_event_public.h
··· 15 15 #ifndef __IA_CSS_EVENT_PUBLIC_H 16 16 #define __IA_CSS_EVENT_PUBLIC_H 17 17 18 - /** @file 18 + /* @file 19 19 * This file contains CSS-API events functionality 20 20 */ 21 21 ··· 24 24 #include <ia_css_types.h> /* ia_css_pipe */ 25 25 #include <ia_css_timer.h> /* ia_css_timer */ 26 26 27 - /** The event type, distinguishes the kind of events that 27 + /* The event type, distinguishes the kind of events that 28 28 * can are generated by the CSS system. 29 29 * 30 30 * !!!IMPORTANT!!! KEEP THE FOLLOWING IN SYNC: ··· 35 35 */ 36 36 enum ia_css_event_type { 37 37 IA_CSS_EVENT_TYPE_OUTPUT_FRAME_DONE = 1 << 0, 38 - /**< Output frame ready. */ 38 + /** Output frame ready. */ 39 39 IA_CSS_EVENT_TYPE_SECOND_OUTPUT_FRAME_DONE = 1 << 1, 40 - /**< Second output frame ready. */ 40 + /** Second output frame ready. */ 41 41 IA_CSS_EVENT_TYPE_VF_OUTPUT_FRAME_DONE = 1 << 2, 42 - /**< Viewfinder Output frame ready. */ 42 + /** Viewfinder Output frame ready. */ 43 43 IA_CSS_EVENT_TYPE_SECOND_VF_OUTPUT_FRAME_DONE = 1 << 3, 44 - /**< Second viewfinder Output frame ready. */ 44 + /** Second viewfinder Output frame ready. */ 45 45 IA_CSS_EVENT_TYPE_3A_STATISTICS_DONE = 1 << 4, 46 - /**< Indication that 3A statistics are available. */ 46 + /** Indication that 3A statistics are available. */ 47 47 IA_CSS_EVENT_TYPE_DIS_STATISTICS_DONE = 1 << 5, 48 - /**< Indication that DIS statistics are available. */ 48 + /** Indication that DIS statistics are available. */ 49 49 IA_CSS_EVENT_TYPE_PIPELINE_DONE = 1 << 6, 50 - /**< Pipeline Done event, sent after last pipeline stage. */ 50 + /** Pipeline Done event, sent after last pipeline stage. */ 51 51 IA_CSS_EVENT_TYPE_FRAME_TAGGED = 1 << 7, 52 - /**< Frame tagged. */ 52 + /** Frame tagged. */ 53 53 IA_CSS_EVENT_TYPE_INPUT_FRAME_DONE = 1 << 8, 54 - /**< Input frame ready. */ 54 + /** Input frame ready. */ 55 55 IA_CSS_EVENT_TYPE_METADATA_DONE = 1 << 9, 56 - /**< Metadata ready. */ 56 + /** Metadata ready. */ 57 57 IA_CSS_EVENT_TYPE_LACE_STATISTICS_DONE = 1 << 10, 58 - /**< Indication that LACE statistics are available. */ 58 + /** Indication that LACE statistics are available. */ 59 59 IA_CSS_EVENT_TYPE_ACC_STAGE_COMPLETE = 1 << 11, 60 - /**< Extension stage complete. */ 60 + /** Extension stage complete. */ 61 61 IA_CSS_EVENT_TYPE_TIMER = 1 << 12, 62 - /**< Timer event for measuring the SP side latencies. It contains the 62 + /** Timer event for measuring the SP side latencies. It contains the 63 63 32-bit timer value from the SP */ 64 64 IA_CSS_EVENT_TYPE_PORT_EOF = 1 << 13, 65 - /**< End Of Frame event, sent when in buffered sensor mode. */ 65 + /** End Of Frame event, sent when in buffered sensor mode. */ 66 66 IA_CSS_EVENT_TYPE_FW_WARNING = 1 << 14, 67 - /**< Performance warning encounter by FW */ 67 + /** Performance warning encounter by FW */ 68 68 IA_CSS_EVENT_TYPE_FW_ASSERT = 1 << 15, 69 - /**< Assertion hit by FW */ 69 + /** Assertion hit by FW */ 70 70 }; 71 71 72 72 #define IA_CSS_EVENT_TYPE_NONE 0 73 73 74 - /** IA_CSS_EVENT_TYPE_ALL is a mask for all pipe related events. 74 + /* IA_CSS_EVENT_TYPE_ALL is a mask for all pipe related events. 75 75 * The other events (such as PORT_EOF) cannot be enabled/disabled 76 76 * and are hence excluded from this macro. 77 77 */ ··· 89 89 IA_CSS_EVENT_TYPE_LACE_STATISTICS_DONE | \ 90 90 IA_CSS_EVENT_TYPE_ACC_STAGE_COMPLETE) 91 91 92 - /** The event struct, container for the event type and its related values. 92 + /* The event struct, container for the event type and its related values. 93 93 * Depending on the event type, either pipe or port will be filled. 94 94 * Pipeline related events (like buffer/frame events) will return a valid and filled pipe handle. 95 95 * For non pipeline related events (but i.e. stream specific, like EOF event), the port will be ··· 97 97 */ 98 98 struct ia_css_event { 99 99 struct ia_css_pipe *pipe; 100 - /**< Pipe handle on which event happened, NULL for non pipe related 100 + /** Pipe handle on which event happened, NULL for non pipe related 101 101 events. */ 102 102 enum ia_css_event_type type; 103 - /**< Type of Event, always valid/filled. */ 103 + /** Type of Event, always valid/filled. */ 104 104 uint8_t port; 105 - /**< Port number for EOF event (not valid for other events). */ 105 + /** Port number for EOF event (not valid for other events). */ 106 106 uint8_t exp_id; 107 - /**< Exposure id for EOF/FRAME_TAGGED/FW_WARNING event (not valid for other events) 107 + /** Exposure id for EOF/FRAME_TAGGED/FW_WARNING event (not valid for other events) 108 108 The exposure ID is unique only within a logical stream and it is 109 109 only generated on systems that have an input system (such as 2400 110 110 and 2401). ··· 120 120 in the exposure IDs. Therefor applications should not use this 121 121 to detect frame drops. */ 122 122 uint32_t fw_handle; 123 - /**< Firmware Handle for ACC_STAGE_COMPLETE event (not valid for other 123 + /** Firmware Handle for ACC_STAGE_COMPLETE event (not valid for other 124 124 events). */ 125 125 enum ia_css_fw_warning fw_warning; 126 - /**< Firmware warning code, only for WARNING events. */ 126 + /** Firmware warning code, only for WARNING events. */ 127 127 uint8_t fw_assert_module_id; 128 - /**< Firmware module id, only for ASSERT events, should be logged by driver. */ 128 + /** Firmware module id, only for ASSERT events, should be logged by driver. */ 129 129 uint16_t fw_assert_line_no; 130 - /**< Firmware line number, only for ASSERT events, should be logged by driver. */ 130 + /** Firmware line number, only for ASSERT events, should be logged by driver. */ 131 131 clock_value_t timer_data; 132 - /**< For storing the full 32-bit of the timer value. Valid only for TIMER 132 + /** For storing the full 32-bit of the timer value. Valid only for TIMER 133 133 event */ 134 134 uint8_t timer_code; 135 - /**< For storing the code of the TIMER event. Valid only for 135 + /** For storing the code of the TIMER event. Valid only for 136 136 TIMER event */ 137 137 uint8_t timer_subcode; 138 - /**< For storing the subcode of the TIMER event. Valid only 138 + /** For storing the subcode of the TIMER event. Valid only 139 139 for TIMER event */ 140 140 }; 141 141 142 - /** @brief Dequeue a PSYS event from the CSS system. 142 + /* @brief Dequeue a PSYS event from the CSS system. 143 143 * 144 144 * @param[out] event Pointer to the event struct which will be filled by 145 145 * this function if an event is available. ··· 156 156 enum ia_css_err 157 157 ia_css_dequeue_psys_event(struct ia_css_event *event); 158 158 159 - /** @brief Dequeue an event from the CSS system. 159 + /* @brief Dequeue an event from the CSS system. 160 160 * 161 161 * @param[out] event Pointer to the event struct which will be filled by 162 162 * this function if an event is available. ··· 171 171 enum ia_css_err 172 172 ia_css_dequeue_event(struct ia_css_event *event); 173 173 174 - /** @brief Dequeue an ISYS event from the CSS system. 174 + /* @brief Dequeue an ISYS event from the CSS system. 175 175 * 176 176 * @param[out] event Pointer to the event struct which will be filled by 177 177 * this function if an event is available.
+7 -7
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_firmware.h
··· 15 15 #ifndef __IA_CSS_FIRMWARE_H 16 16 #define __IA_CSS_FIRMWARE_H 17 17 18 - /** @file 18 + /* @file 19 19 * This file contains firmware loading/unloading support functionality 20 20 */ 21 21 22 22 #include "ia_css_err.h" 23 23 #include "ia_css_env.h" 24 24 25 - /** CSS firmware package structure. 25 + /* CSS firmware package structure. 26 26 */ 27 27 struct ia_css_fw { 28 - void *data; /**< pointer to the firmware data */ 29 - unsigned int bytes; /**< length in bytes of firmware data */ 28 + void *data; /** pointer to the firmware data */ 29 + unsigned int bytes; /** length in bytes of firmware data */ 30 30 }; 31 31 32 - /** @brief Loads the firmware 32 + /* @brief Loads the firmware 33 33 * @param[in] env Environment, provides functions to access the 34 34 * environment in which the CSS code runs. This is 35 35 * used for host side memory access and message ··· 51 51 ia_css_load_firmware(const struct ia_css_env *env, 52 52 const struct ia_css_fw *fw); 53 53 54 - /** @brief Unloads the firmware 54 + /* @brief Unloads the firmware 55 55 * @return None 56 56 * 57 57 * This function unloads the firmware loaded by ia_css_load_firmware. ··· 61 61 void 62 62 ia_css_unload_firmware(void); 63 63 64 - /** @brief Checks firmware version 64 + /* @brief Checks firmware version 65 65 * @param[in] fw Firmware package containing the firmware for all 66 66 * predefined ISP binaries. 67 67 * @return Returns true when the firmware version matches with the CSS
+5 -5
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frac.h
··· 15 15 #ifndef _IA_CSS_FRAC_H 16 16 #define _IA_CSS_FRAC_H 17 17 18 - /** @file 18 + /* @file 19 19 * This file contains typedefs used for fractional numbers 20 20 */ 21 21 ··· 25 25 * NOTE: the 16 bit fixed point types actually occupy 32 bits 26 26 * to save on extension operations in the ISP code. 27 27 */ 28 - /** Unsigned fixed point value, 0 integer bits, 16 fractional bits */ 28 + /* Unsigned fixed point value, 0 integer bits, 16 fractional bits */ 29 29 typedef uint32_t ia_css_u0_16; 30 - /** Unsigned fixed point value, 5 integer bits, 11 fractional bits */ 30 + /* Unsigned fixed point value, 5 integer bits, 11 fractional bits */ 31 31 typedef uint32_t ia_css_u5_11; 32 - /** Unsigned fixed point value, 8 integer bits, 8 fractional bits */ 32 + /* Unsigned fixed point value, 8 integer bits, 8 fractional bits */ 33 33 typedef uint32_t ia_css_u8_8; 34 - /** Signed fixed point value, 0 integer bits, 15 fractional bits */ 34 + /* Signed fixed point value, 0 integer bits, 15 fractional bits */ 35 35 typedef int32_t ia_css_s0_15; 36 36 37 37 #endif /* _IA_CSS_FRAC_H */
+31 -31
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frame_format.h
··· 15 15 #ifndef __IA_CSS_FRAME_FORMAT_H 16 16 #define __IA_CSS_FRAME_FORMAT_H 17 17 18 - /** @file 18 + /* @file 19 19 * This file contains information about formats supported in the ISP 20 20 */ 21 21 22 - /** Frame formats, some of these come from fourcc.org, others are 22 + /* Frame formats, some of these come from fourcc.org, others are 23 23 better explained by video4linux2. The NV11 seems to be described only 24 24 on MSDN pages, but even those seem to be gone now. 25 25 Frames can come in many forms, the main categories are RAW, RGB and YUV ··· 48 48 - css/bxt_sandbox/isysapi/interface/ia_css_isysapi_fw_types.h 49 49 */ 50 50 enum ia_css_frame_format { 51 - IA_CSS_FRAME_FORMAT_NV11 = 0, /**< 12 bit YUV 411, Y, UV plane */ 52 - IA_CSS_FRAME_FORMAT_NV12, /**< 12 bit YUV 420, Y, UV plane */ 53 - IA_CSS_FRAME_FORMAT_NV12_16, /**< 16 bit YUV 420, Y, UV plane */ 54 - IA_CSS_FRAME_FORMAT_NV12_TILEY, /**< 12 bit YUV 420, Intel proprietary tiled format, TileY */ 55 - IA_CSS_FRAME_FORMAT_NV16, /**< 16 bit YUV 422, Y, UV plane */ 56 - IA_CSS_FRAME_FORMAT_NV21, /**< 12 bit YUV 420, Y, VU plane */ 57 - IA_CSS_FRAME_FORMAT_NV61, /**< 16 bit YUV 422, Y, VU plane */ 58 - IA_CSS_FRAME_FORMAT_YV12, /**< 12 bit YUV 420, Y, V, U plane */ 59 - IA_CSS_FRAME_FORMAT_YV16, /**< 16 bit YUV 422, Y, V, U plane */ 60 - IA_CSS_FRAME_FORMAT_YUV420, /**< 12 bit YUV 420, Y, U, V plane */ 61 - IA_CSS_FRAME_FORMAT_YUV420_16, /**< yuv420, 16 bits per subpixel */ 62 - IA_CSS_FRAME_FORMAT_YUV422, /**< 16 bit YUV 422, Y, U, V plane */ 63 - IA_CSS_FRAME_FORMAT_YUV422_16, /**< yuv422, 16 bits per subpixel */ 64 - IA_CSS_FRAME_FORMAT_UYVY, /**< 16 bit YUV 422, UYVY interleaved */ 65 - IA_CSS_FRAME_FORMAT_YUYV, /**< 16 bit YUV 422, YUYV interleaved */ 66 - IA_CSS_FRAME_FORMAT_YUV444, /**< 24 bit YUV 444, Y, U, V plane */ 67 - IA_CSS_FRAME_FORMAT_YUV_LINE, /**< Internal format, 2 y lines followed 51 + IA_CSS_FRAME_FORMAT_NV11 = 0, /** 12 bit YUV 411, Y, UV plane */ 52 + IA_CSS_FRAME_FORMAT_NV12, /** 12 bit YUV 420, Y, UV plane */ 53 + IA_CSS_FRAME_FORMAT_NV12_16, /** 16 bit YUV 420, Y, UV plane */ 54 + IA_CSS_FRAME_FORMAT_NV12_TILEY, /** 12 bit YUV 420, Intel proprietary tiled format, TileY */ 55 + IA_CSS_FRAME_FORMAT_NV16, /** 16 bit YUV 422, Y, UV plane */ 56 + IA_CSS_FRAME_FORMAT_NV21, /** 12 bit YUV 420, Y, VU plane */ 57 + IA_CSS_FRAME_FORMAT_NV61, /** 16 bit YUV 422, Y, VU plane */ 58 + IA_CSS_FRAME_FORMAT_YV12, /** 12 bit YUV 420, Y, V, U plane */ 59 + IA_CSS_FRAME_FORMAT_YV16, /** 16 bit YUV 422, Y, V, U plane */ 60 + IA_CSS_FRAME_FORMAT_YUV420, /** 12 bit YUV 420, Y, U, V plane */ 61 + IA_CSS_FRAME_FORMAT_YUV420_16, /** yuv420, 16 bits per subpixel */ 62 + IA_CSS_FRAME_FORMAT_YUV422, /** 16 bit YUV 422, Y, U, V plane */ 63 + IA_CSS_FRAME_FORMAT_YUV422_16, /** yuv422, 16 bits per subpixel */ 64 + IA_CSS_FRAME_FORMAT_UYVY, /** 16 bit YUV 422, UYVY interleaved */ 65 + IA_CSS_FRAME_FORMAT_YUYV, /** 16 bit YUV 422, YUYV interleaved */ 66 + IA_CSS_FRAME_FORMAT_YUV444, /** 24 bit YUV 444, Y, U, V plane */ 67 + IA_CSS_FRAME_FORMAT_YUV_LINE, /** Internal format, 2 y lines followed 68 68 by a uvinterleaved line */ 69 - IA_CSS_FRAME_FORMAT_RAW, /**< RAW, 1 plane */ 70 - IA_CSS_FRAME_FORMAT_RGB565, /**< 16 bit RGB, 1 plane. Each 3 sub 69 + IA_CSS_FRAME_FORMAT_RAW, /** RAW, 1 plane */ 70 + IA_CSS_FRAME_FORMAT_RGB565, /** 16 bit RGB, 1 plane. Each 3 sub 71 71 pixels are packed into one 16 bit 72 72 value, 5 bits for R, 6 bits for G 73 73 and 5 bits for B. */ 74 - IA_CSS_FRAME_FORMAT_PLANAR_RGB888, /**< 24 bit RGB, 3 planes */ 75 - IA_CSS_FRAME_FORMAT_RGBA888, /**< 32 bit RGBA, 1 plane, A=Alpha 74 + IA_CSS_FRAME_FORMAT_PLANAR_RGB888, /** 24 bit RGB, 3 planes */ 75 + IA_CSS_FRAME_FORMAT_RGBA888, /** 32 bit RGBA, 1 plane, A=Alpha 76 76 (alpha is unused) */ 77 - IA_CSS_FRAME_FORMAT_QPLANE6, /**< Internal, for advanced ISP */ 78 - IA_CSS_FRAME_FORMAT_BINARY_8, /**< byte stream, used for jpeg. For 77 + IA_CSS_FRAME_FORMAT_QPLANE6, /** Internal, for advanced ISP */ 78 + IA_CSS_FRAME_FORMAT_BINARY_8, /** byte stream, used for jpeg. For 79 79 frames of this type, we set the 80 80 height to 1 and the width to the 81 81 number of allocated bytes. */ 82 - IA_CSS_FRAME_FORMAT_MIPI, /**< MIPI frame, 1 plane */ 83 - IA_CSS_FRAME_FORMAT_RAW_PACKED, /**< RAW, 1 plane, packed */ 84 - IA_CSS_FRAME_FORMAT_CSI_MIPI_YUV420_8, /**< 8 bit per Y/U/V. 82 + IA_CSS_FRAME_FORMAT_MIPI, /** MIPI frame, 1 plane */ 83 + IA_CSS_FRAME_FORMAT_RAW_PACKED, /** RAW, 1 plane, packed */ 84 + IA_CSS_FRAME_FORMAT_CSI_MIPI_YUV420_8, /** 8 bit per Y/U/V. 85 85 Y odd line; UYVY 86 86 interleaved even line */ 87 - IA_CSS_FRAME_FORMAT_CSI_MIPI_LEGACY_YUV420_8, /**< Legacy YUV420. UY odd 87 + IA_CSS_FRAME_FORMAT_CSI_MIPI_LEGACY_YUV420_8, /** Legacy YUV420. UY odd 88 88 line; VY even line */ 89 - IA_CSS_FRAME_FORMAT_CSI_MIPI_YUV420_10 /**< 10 bit per Y/U/V. Y odd 89 + IA_CSS_FRAME_FORMAT_CSI_MIPI_YUV420_10 /** 10 bit per Y/U/V. Y odd 90 90 line; UYVY interleaved 91 91 even line */ 92 92 }; ··· 95 95 /* because of issues this would cause with the Clockwork code checking tool. */ 96 96 #define IA_CSS_FRAME_FORMAT_NUM (IA_CSS_FRAME_FORMAT_CSI_MIPI_YUV420_10 + 1) 97 97 98 - /** Number of valid output frame formats for ISP **/ 98 + /* Number of valid output frame formats for ISP **/ 99 99 #define IA_CSS_FRAME_OUT_FORMAT_NUM (IA_CSS_FRAME_FORMAT_RGBA888 + 1) 100 100 101 101 #endif /* __IA_CSS_FRAME_FORMAT_H */
+60 -60
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frame_public.h
··· 15 15 #ifndef __IA_CSS_FRAME_PUBLIC_H 16 16 #define __IA_CSS_FRAME_PUBLIC_H 17 17 18 - /** @file 18 + /* @file 19 19 * This file contains structs to describe various frame-formats supported by the ISP. 20 20 */ 21 21 ··· 25 25 #include "ia_css_frame_format.h" 26 26 #include "ia_css_buffer.h" 27 27 28 - /** For RAW input, the bayer order needs to be specified separately. There 28 + /* For RAW input, the bayer order needs to be specified separately. There 29 29 * are 4 possible orders. The name is constructed by taking the first two 30 30 * colors on the first line and the first two colors from the second line. 31 31 */ 32 32 enum ia_css_bayer_order { 33 - IA_CSS_BAYER_ORDER_GRBG, /**< GRGRGRGRGR .. BGBGBGBGBG */ 34 - IA_CSS_BAYER_ORDER_RGGB, /**< RGRGRGRGRG .. GBGBGBGBGB */ 35 - IA_CSS_BAYER_ORDER_BGGR, /**< BGBGBGBGBG .. GRGRGRGRGR */ 36 - IA_CSS_BAYER_ORDER_GBRG, /**< GBGBGBGBGB .. RGRGRGRGRG */ 33 + IA_CSS_BAYER_ORDER_GRBG, /** GRGRGRGRGR .. BGBGBGBGBG */ 34 + IA_CSS_BAYER_ORDER_RGGB, /** RGRGRGRGRG .. GBGBGBGBGB */ 35 + IA_CSS_BAYER_ORDER_BGGR, /** BGBGBGBGBG .. GRGRGRGRGR */ 36 + IA_CSS_BAYER_ORDER_GBRG, /** GBGBGBGBGB .. RGRGRGRGRG */ 37 37 }; 38 38 #define IA_CSS_BAYER_ORDER_NUM (IA_CSS_BAYER_ORDER_GBRG + 1) 39 39 40 - /** Frame plane structure. This describes one plane in an image 40 + /* Frame plane structure. This describes one plane in an image 41 41 * frame buffer. 42 42 */ 43 43 struct ia_css_frame_plane { 44 - unsigned int height; /**< height of a plane in lines */ 45 - unsigned int width; /**< width of a line, in DMA elements, note that 44 + unsigned int height; /** height of a plane in lines */ 45 + unsigned int width; /** width of a line, in DMA elements, note that 46 46 for RGB565 the three subpixels are stored in 47 47 one element. For all other formats this is 48 48 the number of subpixels per line. */ 49 - unsigned int stride; /**< stride of a line in bytes */ 50 - unsigned int offset; /**< offset in bytes to start of frame data. 49 + unsigned int stride; /** stride of a line in bytes */ 50 + unsigned int offset; /** offset in bytes to start of frame data. 51 51 offset is wrt data field in ia_css_frame */ 52 52 }; 53 53 54 - /** Binary "plane". This is used to story binary streams such as jpeg 54 + /* Binary "plane". This is used to story binary streams such as jpeg 55 55 * images. This is not actually a real plane. 56 56 */ 57 57 struct ia_css_frame_binary_plane { 58 - unsigned int size; /**< number of bytes in the stream */ 59 - struct ia_css_frame_plane data; /**< plane */ 58 + unsigned int size; /** number of bytes in the stream */ 59 + struct ia_css_frame_plane data; /** plane */ 60 60 }; 61 61 62 - /** Container for planar YUV frames. This contains 3 planes. 62 + /* Container for planar YUV frames. This contains 3 planes. 63 63 */ 64 64 struct ia_css_frame_yuv_planes { 65 - struct ia_css_frame_plane y; /**< Y plane */ 66 - struct ia_css_frame_plane u; /**< U plane */ 67 - struct ia_css_frame_plane v; /**< V plane */ 65 + struct ia_css_frame_plane y; /** Y plane */ 66 + struct ia_css_frame_plane u; /** U plane */ 67 + struct ia_css_frame_plane v; /** V plane */ 68 68 }; 69 69 70 - /** Container for semi-planar YUV frames. 70 + /* Container for semi-planar YUV frames. 71 71 */ 72 72 struct ia_css_frame_nv_planes { 73 - struct ia_css_frame_plane y; /**< Y plane */ 74 - struct ia_css_frame_plane uv; /**< UV plane */ 73 + struct ia_css_frame_plane y; /** Y plane */ 74 + struct ia_css_frame_plane uv; /** UV plane */ 75 75 }; 76 76 77 - /** Container for planar RGB frames. Each color has its own plane. 77 + /* Container for planar RGB frames. Each color has its own plane. 78 78 */ 79 79 struct ia_css_frame_rgb_planes { 80 - struct ia_css_frame_plane r; /**< Red plane */ 81 - struct ia_css_frame_plane g; /**< Green plane */ 82 - struct ia_css_frame_plane b; /**< Blue plane */ 80 + struct ia_css_frame_plane r; /** Red plane */ 81 + struct ia_css_frame_plane g; /** Green plane */ 82 + struct ia_css_frame_plane b; /** Blue plane */ 83 83 }; 84 84 85 - /** Container for 6-plane frames. These frames are used internally 85 + /* Container for 6-plane frames. These frames are used internally 86 86 * in the advanced ISP only. 87 87 */ 88 88 struct ia_css_frame_plane6_planes { 89 - struct ia_css_frame_plane r; /**< Red plane */ 90 - struct ia_css_frame_plane r_at_b; /**< Red at blue plane */ 91 - struct ia_css_frame_plane gr; /**< Red-green plane */ 92 - struct ia_css_frame_plane gb; /**< Blue-green plane */ 93 - struct ia_css_frame_plane b; /**< Blue plane */ 94 - struct ia_css_frame_plane b_at_r; /**< Blue at red plane */ 89 + struct ia_css_frame_plane r; /** Red plane */ 90 + struct ia_css_frame_plane r_at_b; /** Red at blue plane */ 91 + struct ia_css_frame_plane gr; /** Red-green plane */ 92 + struct ia_css_frame_plane gb; /** Blue-green plane */ 93 + struct ia_css_frame_plane b; /** Blue plane */ 94 + struct ia_css_frame_plane b_at_r; /** Blue at red plane */ 95 95 }; 96 96 97 97 /* Crop info struct - stores the lines to be cropped in isp */ ··· 103 103 unsigned int start_line; 104 104 }; 105 105 106 - /** Frame info struct. This describes the contents of an image frame buffer. 106 + /* Frame info struct. This describes the contents of an image frame buffer. 107 107 */ 108 108 struct ia_css_frame_info { 109 - struct ia_css_resolution res; /**< Frame resolution (valid data) */ 110 - unsigned int padded_width; /**< stride of line in memory (in pixels) */ 111 - enum ia_css_frame_format format; /**< format of the frame data */ 112 - unsigned int raw_bit_depth; /**< number of valid bits per pixel, 109 + struct ia_css_resolution res; /** Frame resolution (valid data) */ 110 + unsigned int padded_width; /** stride of line in memory (in pixels) */ 111 + enum ia_css_frame_format format; /** format of the frame data */ 112 + unsigned int raw_bit_depth; /** number of valid bits per pixel, 113 113 only valid for RAW bayer frames */ 114 - enum ia_css_bayer_order raw_bayer_order; /**< bayer order, only valid 114 + enum ia_css_bayer_order raw_bayer_order; /** bayer order, only valid 115 115 for RAW bayer frames */ 116 116 /* the params below are computed based on bayer_order 117 117 * we can remove the raw_bayer_order if it is redundant ··· 136 136 * Specifies the DVS loop delay in "frame periods" 137 137 */ 138 138 enum ia_css_frame_delay { 139 - IA_CSS_FRAME_DELAY_0, /**< Frame delay = 0 */ 140 - IA_CSS_FRAME_DELAY_1, /**< Frame delay = 1 */ 141 - IA_CSS_FRAME_DELAY_2 /**< Frame delay = 2 */ 139 + IA_CSS_FRAME_DELAY_0, /** Frame delay = 0 */ 140 + IA_CSS_FRAME_DELAY_1, /** Frame delay = 1 */ 141 + IA_CSS_FRAME_DELAY_2 /** Frame delay = 2 */ 142 142 }; 143 143 144 144 enum ia_css_frame_flash_state { ··· 147 147 IA_CSS_FRAME_FLASH_STATE_FULL 148 148 }; 149 149 150 - /** Frame structure. This structure describes an image buffer or frame. 150 + /* Frame structure. This structure describes an image buffer or frame. 151 151 * This is the main structure used for all input and output images. 152 152 */ 153 153 struct ia_css_frame { 154 - struct ia_css_frame_info info; /**< info struct describing the frame */ 155 - ia_css_ptr data; /**< pointer to start of image data */ 156 - unsigned int data_bytes; /**< size of image data in bytes */ 154 + struct ia_css_frame_info info; /** info struct describing the frame */ 155 + ia_css_ptr data; /** pointer to start of image data */ 156 + unsigned int data_bytes; /** size of image data in bytes */ 157 157 /* LA: move this to ia_css_buffer */ 158 158 /* 159 159 * -1 if data address is static during life time of pipeline ··· 171 171 enum ia_css_buffer_type buf_type; 172 172 enum ia_css_frame_flash_state flash_state; 173 173 unsigned int exp_id; 174 - /**< exposure id, see ia_css_event_public.h for more detail */ 175 - uint32_t isp_config_id; /**< Unique ID to track which config was actually applied to a particular frame */ 176 - bool valid; /**< First video output frame is not valid */ 177 - bool contiguous; /**< memory is allocated physically contiguously */ 174 + /** exposure id, see ia_css_event_public.h for more detail */ 175 + uint32_t isp_config_id; /** Unique ID to track which config was actually applied to a particular frame */ 176 + bool valid; /** First video output frame is not valid */ 177 + bool contiguous; /** memory is allocated physically contiguously */ 178 178 union { 179 179 unsigned int _initialisation_dummy; 180 180 struct ia_css_frame_plane raw; ··· 185 185 struct ia_css_frame_nv_planes nv; 186 186 struct ia_css_frame_plane6_planes plane6; 187 187 struct ia_css_frame_binary_plane binary; 188 - } planes; /**< frame planes, select the right one based on 188 + } planes; /** frame planes, select the right one based on 189 189 info.format */ 190 190 }; 191 191 ··· 204 204 { 0 } /* planes */ \ 205 205 } 206 206 207 - /** @brief Fill a frame with zeros 207 + /* @brief Fill a frame with zeros 208 208 * 209 209 * @param frame The frame. 210 210 * @return None ··· 213 213 */ 214 214 void ia_css_frame_zero(struct ia_css_frame *frame); 215 215 216 - /** @brief Allocate a CSS frame structure 216 + /* @brief Allocate a CSS frame structure 217 217 * 218 218 * @param frame The allocated frame. 219 219 * @param width The width (in pixels) of the frame. ··· 234 234 unsigned int stride, 235 235 unsigned int raw_bit_depth); 236 236 237 - /** @brief Allocate a CSS frame structure using a frame info structure. 237 + /* @brief Allocate a CSS frame structure using a frame info structure. 238 238 * 239 239 * @param frame The allocated frame. 240 240 * @param[in] info The frame info structure. ··· 247 247 enum ia_css_err 248 248 ia_css_frame_allocate_from_info(struct ia_css_frame **frame, 249 249 const struct ia_css_frame_info *info); 250 - /** @brief Free a CSS frame structure. 250 + /* @brief Free a CSS frame structure. 251 251 * 252 252 * @param[in] frame Pointer to the frame. 253 253 * @return None ··· 258 258 void 259 259 ia_css_frame_free(struct ia_css_frame *frame); 260 260 261 - /** @brief Allocate a contiguous CSS frame structure 261 + /* @brief Allocate a contiguous CSS frame structure 262 262 * 263 263 * @param frame The allocated frame. 264 264 * @param width The width (in pixels) of the frame. ··· 280 280 unsigned int stride, 281 281 unsigned int raw_bit_depth); 282 282 283 - /** @brief Allocate a contiguous CSS frame from a frame info structure. 283 + /* @brief Allocate a contiguous CSS frame from a frame info structure. 284 284 * 285 285 * @param frame The allocated frame. 286 286 * @param[in] info The frame info structure. ··· 296 296 ia_css_frame_allocate_contiguous_from_info(struct ia_css_frame **frame, 297 297 const struct ia_css_frame_info *info); 298 298 299 - /** @brief Allocate a CSS frame structure using a frame info structure. 299 + /* @brief Allocate a CSS frame structure using a frame info structure. 300 300 * 301 301 * @param frame The allocated frame. 302 302 * @param[in] info The frame info structure. ··· 309 309 ia_css_frame_create_from_info(struct ia_css_frame **frame, 310 310 const struct ia_css_frame_info *info); 311 311 312 - /** @brief Set a mapped data buffer to a CSS frame 312 + /* @brief Set a mapped data buffer to a CSS frame 313 313 * 314 314 * @param[in] frame Valid CSS frame pointer 315 315 * @param[in] mapped_data Mapped data buffer to be assigned to the CSS frame ··· 327 327 const ia_css_ptr mapped_data, 328 328 size_t data_size_bytes); 329 329 330 - /** @brief Map an existing frame data pointer to a CSS frame. 330 + /* @brief Map an existing frame data pointer to a CSS frame. 331 331 * 332 332 * @param frame Pointer to the frame to be initialized 333 333 * @param[in] info The frame info. ··· 350 350 uint16_t attribute, 351 351 void *context); 352 352 353 - /** @brief Unmap a CSS frame structure. 353 + /* @brief Unmap a CSS frame structure. 354 354 * 355 355 * @param[in] frame Pointer to the CSS frame. 356 356 * @return None
+16 -16
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_input_port.h
··· 15 15 #ifndef __IA_CSS_INPUT_PORT_H 16 16 #define __IA_CSS_INPUT_PORT_H 17 17 18 - /** @file 18 + /* @file 19 19 * This file contains information about the possible input ports for CSS 20 20 */ 21 21 22 - /** Enumeration of the physical input ports on the CSS hardware. 22 + /* Enumeration of the physical input ports on the CSS hardware. 23 23 * There are 3 MIPI CSI-2 ports. 24 24 */ 25 25 enum ia_css_csi2_port { ··· 28 28 IA_CSS_CSI2_PORT2 /* Implicitly map to MIPI_PORT2_ID */ 29 29 }; 30 30 31 - /** Backward compatible for CSS API 2.0 only 31 + /* Backward compatible for CSS API 2.0 only 32 32 * TO BE REMOVED when all drivers move to CSS API 2.1 33 33 */ 34 34 #define IA_CSS_CSI2_PORT_4LANE IA_CSS_CSI2_PORT0 35 35 #define IA_CSS_CSI2_PORT_1LANE IA_CSS_CSI2_PORT1 36 36 #define IA_CSS_CSI2_PORT_2LANE IA_CSS_CSI2_PORT2 37 37 38 - /** The CSI2 interface supports 2 types of compression or can 38 + /* The CSI2 interface supports 2 types of compression or can 39 39 * be run without compression. 40 40 */ 41 41 enum ia_css_csi2_compression_type { 42 - IA_CSS_CSI2_COMPRESSION_TYPE_NONE, /**< No compression */ 43 - IA_CSS_CSI2_COMPRESSION_TYPE_1, /**< Compression scheme 1 */ 44 - IA_CSS_CSI2_COMPRESSION_TYPE_2 /**< Compression scheme 2 */ 42 + IA_CSS_CSI2_COMPRESSION_TYPE_NONE, /** No compression */ 43 + IA_CSS_CSI2_COMPRESSION_TYPE_1, /** Compression scheme 1 */ 44 + IA_CSS_CSI2_COMPRESSION_TYPE_2 /** Compression scheme 2 */ 45 45 }; 46 46 47 47 struct ia_css_csi2_compression { 48 48 enum ia_css_csi2_compression_type type; 49 - /**< Compression used */ 49 + /** Compression used */ 50 50 unsigned int compressed_bits_per_pixel; 51 - /**< Compressed bits per pixel (only when compression is enabled) */ 51 + /** Compressed bits per pixel (only when compression is enabled) */ 52 52 unsigned int uncompressed_bits_per_pixel; 53 - /**< Uncompressed bits per pixel (only when compression is enabled) */ 53 + /** Uncompressed bits per pixel (only when compression is enabled) */ 54 54 }; 55 55 56 - /** Input port structure. 56 + /* Input port structure. 57 57 */ 58 58 struct ia_css_input_port { 59 - enum ia_css_csi2_port port; /**< Physical CSI-2 port */ 60 - unsigned int num_lanes; /**< Number of lanes used (4-lane port only) */ 61 - unsigned int timeout; /**< Timeout value */ 62 - unsigned int rxcount; /**< Register value, should include all lanes */ 63 - struct ia_css_csi2_compression compression; /**< Compression used */ 59 + enum ia_css_csi2_port port; /** Physical CSI-2 port */ 60 + unsigned int num_lanes; /** Number of lanes used (4-lane port only) */ 61 + unsigned int timeout; /** Timeout value */ 62 + unsigned int rxcount; /** Register value, should include all lanes */ 63 + struct ia_css_csi2_compression compression; /** Compression used */ 64 64 }; 65 65 66 66 #endif /* __IA_CSS_INPUT_PORT_H */
+56 -56
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_irq.h
··· 15 15 #ifndef __IA_CSS_IRQ_H 16 16 #define __IA_CSS_IRQ_H 17 17 18 - /** @file 18 + /* @file 19 19 * This file contains information for Interrupts/IRQs from CSS 20 20 */ 21 21 ··· 23 23 #include "ia_css_pipe_public.h" 24 24 #include "ia_css_input_port.h" 25 25 26 - /** Interrupt types, these enumerate all supported interrupt types. 26 + /* Interrupt types, these enumerate all supported interrupt types. 27 27 */ 28 28 enum ia_css_irq_type { 29 - IA_CSS_IRQ_TYPE_EDGE, /**< Edge (level) sensitive interrupt */ 30 - IA_CSS_IRQ_TYPE_PULSE /**< Pulse-shaped interrupt */ 29 + IA_CSS_IRQ_TYPE_EDGE, /** Edge (level) sensitive interrupt */ 30 + IA_CSS_IRQ_TYPE_PULSE /** Pulse-shaped interrupt */ 31 31 }; 32 32 33 - /** Interrupt request type. 33 + /* Interrupt request type. 34 34 * When the CSS hardware generates an interrupt, a function in this API 35 35 * needs to be called to retrieve information about the interrupt. 36 36 * This interrupt type is part of this information and indicates what ··· 46 46 */ 47 47 enum ia_css_irq_info { 48 48 IA_CSS_IRQ_INFO_CSS_RECEIVER_ERROR = 1 << 0, 49 - /**< the css receiver has encountered an error */ 49 + /** the css receiver has encountered an error */ 50 50 IA_CSS_IRQ_INFO_CSS_RECEIVER_FIFO_OVERFLOW = 1 << 1, 51 - /**< the FIFO in the csi receiver has overflown */ 51 + /** the FIFO in the csi receiver has overflown */ 52 52 IA_CSS_IRQ_INFO_CSS_RECEIVER_SOF = 1 << 2, 53 - /**< the css receiver received the start of frame */ 53 + /** the css receiver received the start of frame */ 54 54 IA_CSS_IRQ_INFO_CSS_RECEIVER_EOF = 1 << 3, 55 - /**< the css receiver received the end of frame */ 55 + /** the css receiver received the end of frame */ 56 56 IA_CSS_IRQ_INFO_CSS_RECEIVER_SOL = 1 << 4, 57 - /**< the css receiver received the start of line */ 57 + /** the css receiver received the start of line */ 58 58 IA_CSS_IRQ_INFO_PSYS_EVENTS_READY = 1 << 5, 59 - /**< One or more events are available in the PSYS event queue */ 59 + /** One or more events are available in the PSYS event queue */ 60 60 IA_CSS_IRQ_INFO_EVENTS_READY = IA_CSS_IRQ_INFO_PSYS_EVENTS_READY, 61 - /**< deprecated{obsolete version of IA_CSS_IRQ_INFO_PSYS_EVENTS_READY, 61 + /** deprecated{obsolete version of IA_CSS_IRQ_INFO_PSYS_EVENTS_READY, 62 62 * same functionality.} */ 63 63 IA_CSS_IRQ_INFO_CSS_RECEIVER_EOL = 1 << 6, 64 - /**< the css receiver received the end of line */ 64 + /** the css receiver received the end of line */ 65 65 IA_CSS_IRQ_INFO_CSS_RECEIVER_SIDEBAND_CHANGED = 1 << 7, 66 - /**< the css receiver received a change in side band signals */ 66 + /** the css receiver received a change in side band signals */ 67 67 IA_CSS_IRQ_INFO_CSS_RECEIVER_GEN_SHORT_0 = 1 << 8, 68 - /**< generic short packets (0) */ 68 + /** generic short packets (0) */ 69 69 IA_CSS_IRQ_INFO_CSS_RECEIVER_GEN_SHORT_1 = 1 << 9, 70 - /**< generic short packets (1) */ 70 + /** generic short packets (1) */ 71 71 IA_CSS_IRQ_INFO_IF_PRIM_ERROR = 1 << 10, 72 - /**< the primary input formatter (A) has encountered an error */ 72 + /** the primary input formatter (A) has encountered an error */ 73 73 IA_CSS_IRQ_INFO_IF_PRIM_B_ERROR = 1 << 11, 74 - /**< the primary input formatter (B) has encountered an error */ 74 + /** the primary input formatter (B) has encountered an error */ 75 75 IA_CSS_IRQ_INFO_IF_SEC_ERROR = 1 << 12, 76 - /**< the secondary input formatter has encountered an error */ 76 + /** the secondary input formatter has encountered an error */ 77 77 IA_CSS_IRQ_INFO_STREAM_TO_MEM_ERROR = 1 << 13, 78 - /**< the stream-to-memory device has encountered an error */ 78 + /** the stream-to-memory device has encountered an error */ 79 79 IA_CSS_IRQ_INFO_SW_0 = 1 << 14, 80 - /**< software interrupt 0 */ 80 + /** software interrupt 0 */ 81 81 IA_CSS_IRQ_INFO_SW_1 = 1 << 15, 82 - /**< software interrupt 1 */ 82 + /** software interrupt 1 */ 83 83 IA_CSS_IRQ_INFO_SW_2 = 1 << 16, 84 - /**< software interrupt 2 */ 84 + /** software interrupt 2 */ 85 85 IA_CSS_IRQ_INFO_ISP_BINARY_STATISTICS_READY = 1 << 17, 86 - /**< ISP binary statistics are ready */ 86 + /** ISP binary statistics are ready */ 87 87 IA_CSS_IRQ_INFO_INPUT_SYSTEM_ERROR = 1 << 18, 88 - /**< the input system in in error */ 88 + /** the input system in in error */ 89 89 IA_CSS_IRQ_INFO_IF_ERROR = 1 << 19, 90 - /**< the input formatter in in error */ 90 + /** the input formatter in in error */ 91 91 IA_CSS_IRQ_INFO_DMA_ERROR = 1 << 20, 92 - /**< the dma in in error */ 92 + /** the dma in in error */ 93 93 IA_CSS_IRQ_INFO_ISYS_EVENTS_READY = 1 << 21, 94 - /**< end-of-frame events are ready in the isys_event queue */ 94 + /** end-of-frame events are ready in the isys_event queue */ 95 95 }; 96 96 97 - /** CSS receiver error types. Whenever the CSS receiver has encountered 97 + /* CSS receiver error types. Whenever the CSS receiver has encountered 98 98 * an error, this enumeration is used to indicate which errors have occurred. 99 99 * 100 100 * Note that multiple error flags can be enabled at once and that this is in ··· 105 105 * different receiver types, or possibly none in case of tests systems. 106 106 */ 107 107 enum ia_css_rx_irq_info { 108 - IA_CSS_RX_IRQ_INFO_BUFFER_OVERRUN = 1U << 0, /**< buffer overrun */ 109 - IA_CSS_RX_IRQ_INFO_ENTER_SLEEP_MODE = 1U << 1, /**< entering sleep mode */ 110 - IA_CSS_RX_IRQ_INFO_EXIT_SLEEP_MODE = 1U << 2, /**< exited sleep mode */ 111 - IA_CSS_RX_IRQ_INFO_ECC_CORRECTED = 1U << 3, /**< ECC corrected */ 108 + IA_CSS_RX_IRQ_INFO_BUFFER_OVERRUN = 1U << 0, /** buffer overrun */ 109 + IA_CSS_RX_IRQ_INFO_ENTER_SLEEP_MODE = 1U << 1, /** entering sleep mode */ 110 + IA_CSS_RX_IRQ_INFO_EXIT_SLEEP_MODE = 1U << 2, /** exited sleep mode */ 111 + IA_CSS_RX_IRQ_INFO_ECC_CORRECTED = 1U << 3, /** ECC corrected */ 112 112 IA_CSS_RX_IRQ_INFO_ERR_SOT = 1U << 4, 113 - /**< Start of transmission */ 114 - IA_CSS_RX_IRQ_INFO_ERR_SOT_SYNC = 1U << 5, /**< SOT sync (??) */ 115 - IA_CSS_RX_IRQ_INFO_ERR_CONTROL = 1U << 6, /**< Control (??) */ 116 - IA_CSS_RX_IRQ_INFO_ERR_ECC_DOUBLE = 1U << 7, /**< Double ECC */ 117 - IA_CSS_RX_IRQ_INFO_ERR_CRC = 1U << 8, /**< CRC error */ 118 - IA_CSS_RX_IRQ_INFO_ERR_UNKNOWN_ID = 1U << 9, /**< Unknown ID */ 119 - IA_CSS_RX_IRQ_INFO_ERR_FRAME_SYNC = 1U << 10,/**< Frame sync error */ 120 - IA_CSS_RX_IRQ_INFO_ERR_FRAME_DATA = 1U << 11,/**< Frame data error */ 121 - IA_CSS_RX_IRQ_INFO_ERR_DATA_TIMEOUT = 1U << 12,/**< Timeout occurred */ 122 - IA_CSS_RX_IRQ_INFO_ERR_UNKNOWN_ESC = 1U << 13,/**< Unknown escape seq. */ 123 - IA_CSS_RX_IRQ_INFO_ERR_LINE_SYNC = 1U << 14,/**< Line Sync error */ 113 + /** Start of transmission */ 114 + IA_CSS_RX_IRQ_INFO_ERR_SOT_SYNC = 1U << 5, /** SOT sync (??) */ 115 + IA_CSS_RX_IRQ_INFO_ERR_CONTROL = 1U << 6, /** Control (??) */ 116 + IA_CSS_RX_IRQ_INFO_ERR_ECC_DOUBLE = 1U << 7, /** Double ECC */ 117 + IA_CSS_RX_IRQ_INFO_ERR_CRC = 1U << 8, /** CRC error */ 118 + IA_CSS_RX_IRQ_INFO_ERR_UNKNOWN_ID = 1U << 9, /** Unknown ID */ 119 + IA_CSS_RX_IRQ_INFO_ERR_FRAME_SYNC = 1U << 10,/** Frame sync error */ 120 + IA_CSS_RX_IRQ_INFO_ERR_FRAME_DATA = 1U << 11,/** Frame data error */ 121 + IA_CSS_RX_IRQ_INFO_ERR_DATA_TIMEOUT = 1U << 12,/** Timeout occurred */ 122 + IA_CSS_RX_IRQ_INFO_ERR_UNKNOWN_ESC = 1U << 13,/** Unknown escape seq. */ 123 + IA_CSS_RX_IRQ_INFO_ERR_LINE_SYNC = 1U << 14,/** Line Sync error */ 124 124 IA_CSS_RX_IRQ_INFO_INIT_TIMEOUT = 1U << 15, 125 125 }; 126 126 127 - /** Interrupt info structure. This structure contains information about an 127 + /* Interrupt info structure. This structure contains information about an 128 128 * interrupt. This needs to be used after an interrupt is received on the IA 129 129 * to perform the correct action. 130 130 */ 131 131 struct ia_css_irq { 132 - enum ia_css_irq_info type; /**< Interrupt type. */ 133 - unsigned int sw_irq_0_val; /**< In case of SW interrupt 0, value. */ 134 - unsigned int sw_irq_1_val; /**< In case of SW interrupt 1, value. */ 135 - unsigned int sw_irq_2_val; /**< In case of SW interrupt 2, value. */ 132 + enum ia_css_irq_info type; /** Interrupt type. */ 133 + unsigned int sw_irq_0_val; /** In case of SW interrupt 0, value. */ 134 + unsigned int sw_irq_1_val; /** In case of SW interrupt 1, value. */ 135 + unsigned int sw_irq_2_val; /** In case of SW interrupt 2, value. */ 136 136 struct ia_css_pipe *pipe; 137 - /**< The image pipe that generated the interrupt. */ 137 + /** The image pipe that generated the interrupt. */ 138 138 }; 139 139 140 - /** @brief Obtain interrupt information. 140 + /* @brief Obtain interrupt information. 141 141 * 142 142 * @param[out] info Pointer to the interrupt info. The interrupt 143 143 * information wil be written to this info. ··· 154 154 enum ia_css_err 155 155 ia_css_irq_translate(unsigned int *info); 156 156 157 - /** @brief Get CSI receiver error info. 157 + /* @brief Get CSI receiver error info. 158 158 * 159 159 * @param[out] irq_bits Pointer to the interrupt bits. The interrupt 160 160 * bits will be written this info. ··· 172 172 void 173 173 ia_css_rx_get_irq_info(unsigned int *irq_bits); 174 174 175 - /** @brief Get CSI receiver error info. 175 + /* @brief Get CSI receiver error info. 176 176 * 177 177 * @param[in] port Input port identifier. 178 178 * @param[out] irq_bits Pointer to the interrupt bits. The interrupt ··· 188 188 void 189 189 ia_css_rx_port_get_irq_info(enum ia_css_csi2_port port, unsigned int *irq_bits); 190 190 191 - /** @brief Clear CSI receiver error info. 191 + /* @brief Clear CSI receiver error info. 192 192 * 193 193 * @param[in] irq_bits The bits that should be cleared from the CSI receiver 194 194 * interrupt bits register. ··· 205 205 void 206 206 ia_css_rx_clear_irq_info(unsigned int irq_bits); 207 207 208 - /** @brief Clear CSI receiver error info. 208 + /* @brief Clear CSI receiver error info. 209 209 * 210 210 * @param[in] port Input port identifier. 211 211 * @param[in] irq_bits The bits that should be cleared from the CSI receiver ··· 220 220 void 221 221 ia_css_rx_port_clear_irq_info(enum ia_css_csi2_port port, unsigned int irq_bits); 222 222 223 - /** @brief Enable or disable specific interrupts. 223 + /* @brief Enable or disable specific interrupts. 224 224 * 225 225 * @param[in] type The interrupt type that will be enabled/disabled. 226 226 * @param[in] enable enable or disable.
+12 -12
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_metadata.h
··· 15 15 #ifndef __IA_CSS_METADATA_H 16 16 #define __IA_CSS_METADATA_H 17 17 18 - /** @file 18 + /* @file 19 19 * This file contains structure for processing sensor metadata. 20 20 */ 21 21 ··· 23 23 #include "ia_css_types.h" 24 24 #include "ia_css_stream_format.h" 25 25 26 - /** Metadata configuration. This data structure contains necessary info 26 + /* Metadata configuration. This data structure contains necessary info 27 27 * to process sensor metadata. 28 28 */ 29 29 struct ia_css_metadata_config { 30 - enum ia_css_stream_format data_type; /**< Data type of CSI-2 embedded 30 + enum ia_css_stream_format data_type; /** Data type of CSI-2 embedded 31 31 data. The default value is IA_CSS_STREAM_FORMAT_EMBEDDED. For 32 32 certain sensors, user can choose non-default data type for embedded 33 33 data. */ 34 - struct ia_css_resolution resolution; /**< Resolution */ 34 + struct ia_css_resolution resolution; /** Resolution */ 35 35 }; 36 36 37 37 struct ia_css_metadata_info { 38 - struct ia_css_resolution resolution; /**< Resolution */ 39 - uint32_t stride; /**< Stride in bytes */ 40 - uint32_t size; /**< Total size in bytes */ 38 + struct ia_css_resolution resolution; /** Resolution */ 39 + uint32_t stride; /** Stride in bytes */ 40 + uint32_t size; /** Total size in bytes */ 41 41 }; 42 42 43 43 struct ia_css_metadata { 44 - struct ia_css_metadata_info info; /**< Layout info */ 45 - ia_css_ptr address; /**< CSS virtual address */ 44 + struct ia_css_metadata_info info; /** Layout info */ 45 + ia_css_ptr address; /** CSS virtual address */ 46 46 uint32_t exp_id; 47 - /**< Exposure ID, see ia_css_event_public.h for more detail */ 47 + /** Exposure ID, see ia_css_event_public.h for more detail */ 48 48 }; 49 49 #define SIZE_OF_IA_CSS_METADATA_STRUCT sizeof(struct ia_css_metadata) 50 50 51 - /** @brief Allocate a metadata buffer. 51 + /* @brief Allocate a metadata buffer. 52 52 * @param[in] metadata_info Metadata info struct, contains details on metadata buffers. 53 53 * @return Pointer of metadata buffer or NULL (if error) 54 54 * ··· 58 58 struct ia_css_metadata * 59 59 ia_css_metadata_allocate(const struct ia_css_metadata_info *metadata_info); 60 60 61 - /** @brief Free a metadata buffer. 61 + /* @brief Free a metadata buffer. 62 62 * 63 63 * @param[in] metadata Pointer of metadata buffer. 64 64 * @return None
+5 -5
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_mipi.h
··· 15 15 #ifndef __IA_CSS_MIPI_H 16 16 #define __IA_CSS_MIPI_H 17 17 18 - /** @file 18 + /* @file 19 19 * This file contains MIPI support functionality 20 20 */ 21 21 ··· 24 24 #include "ia_css_stream_format.h" 25 25 #include "ia_css_input_port.h" 26 26 27 - /** Backward compatible for CSS API 2.0 only 27 + /* Backward compatible for CSS API 2.0 only 28 28 * TO BE REMOVED when all drivers move to CSS API 2.1. 29 29 */ 30 - /** @brief Specify a CSS MIPI frame buffer. 30 + /* @brief Specify a CSS MIPI frame buffer. 31 31 * 32 32 * @param[in] size_mem_words The frame size in memory words (32B). 33 33 * @param[in] contiguous Allocate memory physically contiguously or not. ··· 42 42 const bool contiguous); 43 43 44 44 #if !defined(HAS_NO_INPUT_SYSTEM) 45 - /** @brief Register size of a CSS MIPI frame for check during capturing. 45 + /* @brief Register size of a CSS MIPI frame for check during capturing. 46 46 * 47 47 * @param[in] port CSI-2 port this check is registered. 48 48 * @param[in] size_mem_words The frame size in memory words (32B). ··· 59 59 const unsigned int size_mem_words); 60 60 #endif 61 61 62 - /** @brief Calculate the size of a mipi frame. 62 + /* @brief Calculate the size of a mipi frame. 63 63 * 64 64 * @param[in] width The width (in pixels) of the frame. 65 65 * @param[in] height The height (in lines) of the frame.
+2 -2
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_mmu.h
··· 15 15 #ifndef __IA_CSS_MMU_H 16 16 #define __IA_CSS_MMU_H 17 17 18 - /** @file 18 + /* @file 19 19 * This file contains one support function for invalidating the CSS MMU cache 20 20 */ 21 21 22 - /** @brief Invalidate the MMU internal cache. 22 + /* @brief Invalidate the MMU internal cache. 23 23 * @return None 24 24 * 25 25 * This function triggers an invalidation of the translate-look-aside
+3 -3
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_morph.h
··· 15 15 #ifndef __IA_CSS_MORPH_H 16 16 #define __IA_CSS_MORPH_H 17 17 18 - /** @file 18 + /* @file 19 19 * This file contains supporting for morphing table 20 20 */ 21 21 22 22 #include <ia_css_types.h> 23 23 24 - /** @brief Morphing table 24 + /* @brief Morphing table 25 25 * @param[in] width Width of the morphing table. 26 26 * @param[in] height Height of the morphing table. 27 27 * @return Pointer to the morphing table ··· 29 29 struct ia_css_morph_table * 30 30 ia_css_morph_table_allocate(unsigned int width, unsigned int height); 31 31 32 - /** @brief Free the morph table 32 + /* @brief Free the morph table 33 33 * @param[in] me Pointer to the morph table. 34 34 * @return None 35 35 */
+64 -64
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h
··· 15 15 #ifndef __IA_CSS_PIPE_PUBLIC_H 16 16 #define __IA_CSS_PIPE_PUBLIC_H 17 17 18 - /** @file 18 + /* @file 19 19 * This file contains the public interface for CSS pipes. 20 20 */ 21 21 ··· 34 34 IA_CSS_PIPE_MAX_OUTPUT_STAGE, 35 35 }; 36 36 37 - /** Enumeration of pipe modes. This mode can be used to create 37 + /* Enumeration of pipe modes. This mode can be used to create 38 38 * an image pipe for this mode. These pipes can be combined 39 39 * to configure and run streams on the ISP. 40 40 * ··· 42 42 * create a continuous capture stream. 43 43 */ 44 44 enum ia_css_pipe_mode { 45 - IA_CSS_PIPE_MODE_PREVIEW, /**< Preview pipe */ 46 - IA_CSS_PIPE_MODE_VIDEO, /**< Video pipe */ 47 - IA_CSS_PIPE_MODE_CAPTURE, /**< Still capture pipe */ 48 - IA_CSS_PIPE_MODE_ACC, /**< Accelerated pipe */ 49 - IA_CSS_PIPE_MODE_COPY, /**< Copy pipe, only used for embedded/image data copying */ 50 - IA_CSS_PIPE_MODE_YUVPP, /**< YUV post processing pipe, used for all use cases with YUV input, 45 + IA_CSS_PIPE_MODE_PREVIEW, /** Preview pipe */ 46 + IA_CSS_PIPE_MODE_VIDEO, /** Video pipe */ 47 + IA_CSS_PIPE_MODE_CAPTURE, /** Still capture pipe */ 48 + IA_CSS_PIPE_MODE_ACC, /** Accelerated pipe */ 49 + IA_CSS_PIPE_MODE_COPY, /** Copy pipe, only used for embedded/image data copying */ 50 + IA_CSS_PIPE_MODE_YUVPP, /** YUV post processing pipe, used for all use cases with YUV input, 51 51 for SoC sensor and external ISP */ 52 52 }; 53 53 /* Temporary define */ ··· 58 58 * the order should match with definition in sh_css_defs.h 59 59 */ 60 60 enum ia_css_pipe_version { 61 - IA_CSS_PIPE_VERSION_1 = 1, /**< ISP1.0 pipe */ 62 - IA_CSS_PIPE_VERSION_2_2 = 2, /**< ISP2.2 pipe */ 63 - IA_CSS_PIPE_VERSION_2_6_1 = 3, /**< ISP2.6.1 pipe */ 64 - IA_CSS_PIPE_VERSION_2_7 = 4 /**< ISP2.7 pipe */ 61 + IA_CSS_PIPE_VERSION_1 = 1, /** ISP1.0 pipe */ 62 + IA_CSS_PIPE_VERSION_2_2 = 2, /** ISP2.2 pipe */ 63 + IA_CSS_PIPE_VERSION_2_6_1 = 3, /** ISP2.6.1 pipe */ 64 + IA_CSS_PIPE_VERSION_2_7 = 4 /** ISP2.7 pipe */ 65 65 }; 66 66 67 67 /** ··· 71 71 */ 72 72 struct ia_css_pipe_config { 73 73 enum ia_css_pipe_mode mode; 74 - /**< mode, indicates which mode the pipe should use. */ 74 + /** mode, indicates which mode the pipe should use. */ 75 75 enum ia_css_pipe_version isp_pipe_version; 76 - /**< pipe version, indicates which imaging pipeline the pipe should use. */ 76 + /** pipe version, indicates which imaging pipeline the pipe should use. */ 77 77 struct ia_css_resolution input_effective_res; 78 - /**< input effective resolution */ 78 + /** input effective resolution */ 79 79 struct ia_css_resolution bayer_ds_out_res; 80 - /**< bayer down scaling */ 80 + /** bayer down scaling */ 81 81 struct ia_css_resolution capt_pp_in_res; 82 82 #ifndef ISP2401 83 - /**< bayer down scaling */ 83 + /** bayer down scaling */ 84 84 #else 85 - /**< capture post processing input resolution */ 85 + /** capture post processing input resolution */ 86 86 #endif 87 87 struct ia_css_resolution vf_pp_in_res; 88 88 #ifndef ISP2401 89 - /**< bayer down scaling */ 89 + /** bayer down scaling */ 90 90 #else 91 - /**< view finder post processing input resolution */ 91 + /** view finder post processing input resolution */ 92 92 struct ia_css_resolution output_system_in_res; 93 - /**< For IPU3 only: use output_system_in_res to specify what input resolution 93 + /** For IPU3 only: use output_system_in_res to specify what input resolution 94 94 will OSYS receive, this resolution is equal to the output resolution of GDC 95 95 if not determined CSS will set output_system_in_res with main osys output pin resolution 96 96 All other IPUs may ignore this property */ 97 97 #endif 98 98 struct ia_css_resolution dvs_crop_out_res; 99 - /**< dvs crop, video only, not in use yet. Use dvs_envelope below. */ 99 + /** dvs crop, video only, not in use yet. Use dvs_envelope below. */ 100 100 struct ia_css_frame_info output_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; 101 - /**< output of YUV scaling */ 101 + /** output of YUV scaling */ 102 102 struct ia_css_frame_info vf_output_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; 103 - /**< output of VF YUV scaling */ 103 + /** output of VF YUV scaling */ 104 104 struct ia_css_fw_info *acc_extension; 105 - /**< Pipeline extension accelerator */ 105 + /** Pipeline extension accelerator */ 106 106 struct ia_css_fw_info **acc_stages; 107 - /**< Standalone accelerator stages */ 107 + /** Standalone accelerator stages */ 108 108 uint32_t num_acc_stages; 109 - /**< Number of standalone accelerator stages */ 109 + /** Number of standalone accelerator stages */ 110 110 struct ia_css_capture_config default_capture_config; 111 - /**< Default capture config for initial capture pipe configuration. */ 112 - struct ia_css_resolution dvs_envelope; /**< temporary */ 111 + /** Default capture config for initial capture pipe configuration. */ 112 + struct ia_css_resolution dvs_envelope; /** temporary */ 113 113 enum ia_css_frame_delay dvs_frame_delay; 114 - /**< indicates the DVS loop delay in frame periods */ 114 + /** indicates the DVS loop delay in frame periods */ 115 115 int acc_num_execs; 116 - /**< For acceleration pipes only: determine how many times the pipe 116 + /** For acceleration pipes only: determine how many times the pipe 117 117 should be run. Setting this to -1 means it will run until 118 118 stopped. */ 119 119 bool enable_dz; 120 - /**< Disabling digital zoom for a pipeline, if this is set to false, 120 + /** Disabling digital zoom for a pipeline, if this is set to false, 121 121 then setting a zoom factor will have no effect. 122 122 In some use cases this provides better performance. */ 123 123 bool enable_dpc; 124 - /**< Disabling "Defect Pixel Correction" for a pipeline, if this is set 124 + /** Disabling "Defect Pixel Correction" for a pipeline, if this is set 125 125 to false. In some use cases this provides better performance. */ 126 126 bool enable_vfpp_bci; 127 - /**< Enabling BCI mode will cause yuv_scale binary to be picked up 127 + /** Enabling BCI mode will cause yuv_scale binary to be picked up 128 128 instead of vf_pp. This only applies to viewfinder post 129 129 processing stages. */ 130 130 #ifdef ISP2401 131 131 bool enable_luma_only; 132 - /**< Enabling of monochrome mode for a pipeline. If enabled only luma processing 132 + /** Enabling of monochrome mode for a pipeline. If enabled only luma processing 133 133 will be done. */ 134 134 bool enable_tnr; 135 - /**< Enabling of TNR (temporal noise reduction). This is only applicable to video 135 + /** Enabling of TNR (temporal noise reduction). This is only applicable to video 136 136 pipes. Non video-pipes should always set this parameter to false. */ 137 137 #endif 138 138 struct ia_css_isp_config *p_isp_config; 139 - /**< Pointer to ISP configuration */ 139 + /** Pointer to ISP configuration */ 140 140 struct ia_css_resolution gdc_in_buffer_res; 141 - /**< GDC in buffer resolution. */ 141 + /** GDC in buffer resolution. */ 142 142 struct ia_css_point gdc_in_buffer_offset; 143 - /**< GDC in buffer offset - indicates the pixel coordinates of the first valid pixel inside the buffer */ 143 + /** GDC in buffer offset - indicates the pixel coordinates of the first valid pixel inside the buffer */ 144 144 #ifdef ISP2401 145 145 struct ia_css_coordinate internal_frame_origin_bqs_on_sctbl; 146 - /**< Origin of internal frame positioned on shading table at shading correction in ISP. 146 + /** Origin of internal frame positioned on shading table at shading correction in ISP. 147 147 NOTE: Shading table is larger than or equal to internal frame. 148 148 Shading table has shading gains and internal frame has bayer data. 149 149 The origin of internal frame is used in shading correction in ISP ··· 228 228 229 229 #endif 230 230 231 - /** Pipe info, this struct describes properties of a pipe after it's stream has 231 + /* Pipe info, this struct describes properties of a pipe after it's stream has 232 232 * been created. 233 233 * ~~~** DO NOT ADD NEW FIELD **~~~ This structure will be deprecated. 234 234 * - On the Behalf of CSS-API Committee. 235 235 */ 236 236 struct ia_css_pipe_info { 237 237 struct ia_css_frame_info output_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; 238 - /**< Info about output resolution. This contains the stride which 238 + /** Info about output resolution. This contains the stride which 239 239 should be used for memory allocation. */ 240 240 struct ia_css_frame_info vf_output_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; 241 - /**< Info about viewfinder output resolution (optional). This contains 241 + /** Info about viewfinder output resolution (optional). This contains 242 242 the stride that should be used for memory allocation. */ 243 243 struct ia_css_frame_info raw_output_info; 244 - /**< Raw output resolution. This indicates the resolution of the 244 + /** Raw output resolution. This indicates the resolution of the 245 245 RAW bayer output for pipes that support this. Currently, only the 246 246 still capture pipes support this feature. When this resolution is 247 247 smaller than the input resolution, cropping will be performed by ··· 252 252 the input resolution - 8x8. */ 253 253 #ifdef ISP2401 254 254 struct ia_css_resolution output_system_in_res_info; 255 - /**< For IPU3 only. Info about output system in resolution which is considered 255 + /** For IPU3 only. Info about output system in resolution which is considered 256 256 as gdc out resolution. */ 257 257 #endif 258 258 struct ia_css_shading_info shading_info; 259 - /**< After an image pipe is created, this field will contain the info 259 + /** After an image pipe is created, this field will contain the info 260 260 for the shading correction. */ 261 261 struct ia_css_grid_info grid_info; 262 - /**< After an image pipe is created, this field will contain the grid 262 + /** After an image pipe is created, this field will contain the grid 263 263 info for 3A and DVS. */ 264 264 int num_invalid_frames; 265 - /**< The very first frames in a started stream do not contain valid data. 265 + /** The very first frames in a started stream do not contain valid data. 266 266 In this field, the CSS-firmware communicates to the host-driver how 267 267 many initial frames will contain invalid data; this allows the 268 268 host-driver to discard those initial invalid frames and start it's ··· 299 299 300 300 #endif 301 301 302 - /** @brief Load default pipe configuration 302 + /* @brief Load default pipe configuration 303 303 * @param[out] pipe_config The pipe configuration. 304 304 * @return None 305 305 * ··· 334 334 */ 335 335 void ia_css_pipe_config_defaults(struct ia_css_pipe_config *pipe_config); 336 336 337 - /** @brief Create a pipe 337 + /* @brief Create a pipe 338 338 * @param[in] config The pipe configuration. 339 339 * @param[out] pipe The pipe. 340 340 * @return IA_CSS_SUCCESS or the error code. ··· 346 346 ia_css_pipe_create(const struct ia_css_pipe_config *config, 347 347 struct ia_css_pipe **pipe); 348 348 349 - /** @brief Destroy a pipe 349 + /* @brief Destroy a pipe 350 350 * @param[in] pipe The pipe. 351 351 * @return IA_CSS_SUCCESS or the error code. 352 352 * ··· 355 355 enum ia_css_err 356 356 ia_css_pipe_destroy(struct ia_css_pipe *pipe); 357 357 358 - /** @brief Provides information about a pipe 358 + /* @brief Provides information about a pipe 359 359 * @param[in] pipe The pipe. 360 360 * @param[out] pipe_info The pipe information. 361 361 * @return IA_CSS_SUCCESS or IA_CSS_ERR_INVALID_ARGUMENTS. ··· 366 366 ia_css_pipe_get_info(const struct ia_css_pipe *pipe, 367 367 struct ia_css_pipe_info *pipe_info); 368 368 369 - /** @brief Configure a pipe with filter coefficients. 369 + /* @brief Configure a pipe with filter coefficients. 370 370 * @param[in] pipe The pipe. 371 371 * @param[in] config The pointer to ISP configuration. 372 372 * @return IA_CSS_SUCCESS or error code upon error. ··· 378 378 ia_css_pipe_set_isp_config(struct ia_css_pipe *pipe, 379 379 struct ia_css_isp_config *config); 380 380 381 - /** @brief Controls when the Event generator raises an IRQ to the Host. 381 + /* @brief Controls when the Event generator raises an IRQ to the Host. 382 382 * 383 383 * @param[in] pipe The pipe. 384 384 * @param[in] or_mask Binary or of enum ia_css_event_irq_mask_type. Each pipe ··· 455 455 unsigned int or_mask, 456 456 unsigned int and_mask); 457 457 458 - /** @brief Reads the current event IRQ mask from the CSS. 458 + /* @brief Reads the current event IRQ mask from the CSS. 459 459 * 460 460 * @param[in] pipe The pipe. 461 461 * @param[out] or_mask Current or_mask. The bits in this mask are a binary or ··· 476 476 unsigned int *or_mask, 477 477 unsigned int *and_mask); 478 478 479 - /** @brief Queue a buffer for an image pipe. 479 + /* @brief Queue a buffer for an image pipe. 480 480 * 481 481 * @param[in] pipe The pipe that will own the buffer. 482 482 * @param[in] buffer Pointer to the buffer. ··· 498 498 ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, 499 499 const struct ia_css_buffer *buffer); 500 500 501 - /** @brief Dequeue a buffer from an image pipe. 501 + /* @brief Dequeue a buffer from an image pipe. 502 502 * 503 503 * @param[in] pipe The pipeline that the buffer queue belongs to. 504 504 * @param[in,out] buffer The buffer is used to lookup the type which determines ··· 519 519 struct ia_css_buffer *buffer); 520 520 521 521 522 - /** @brief Set the state (Enable or Disable) of the Extension stage in the 522 + /* @brief Set the state (Enable or Disable) of the Extension stage in the 523 523 * given pipe. 524 524 * @param[in] pipe Pipe handle. 525 525 * @param[in] fw_handle Extension firmware Handle (ia_css_fw_info.handle) ··· 546 546 uint32_t fw_handle, 547 547 bool enable); 548 548 549 - /** @brief Get the state (Enable or Disable) of the Extension stage in the 549 + /* @brief Get the state (Enable or Disable) of the Extension stage in the 550 550 * given pipe. 551 551 * @param[in] pipe Pipe handle. 552 552 * @param[in] fw_handle Extension firmware Handle (ia_css_fw_info.handle) ··· 573 573 bool * enable); 574 574 575 575 #ifdef ISP2401 576 - /** @brief Update mapped CSS and ISP arguments for QoS pipe during SP runtime. 576 + /* @brief Update mapped CSS and ISP arguments for QoS pipe during SP runtime. 577 577 * @param[in] pipe Pipe handle. 578 578 * @param[in] fw_handle Extension firmware Handle (ia_css_fw_info.handle). 579 579 * @param[in] css_seg Parameter memory descriptors for CSS segments. ··· 595 595 struct ia_css_isp_param_isp_segments *isp_seg); 596 596 597 597 #endif 598 - /** @brief Get selected configuration settings 598 + /* @brief Get selected configuration settings 599 599 * @param[in] pipe The pipe. 600 600 * @param[out] config Configuration settings. 601 601 * @return None ··· 604 604 ia_css_pipe_get_isp_config(struct ia_css_pipe *pipe, 605 605 struct ia_css_isp_config *config); 606 606 607 - /** @brief Set the scaler lut on this pipe. A copy of lut is made in the inuit 607 + /* @brief Set the scaler lut on this pipe. A copy of lut is made in the inuit 608 608 * address space. So the LUT can be freed by caller. 609 609 * @param[in] pipe Pipe handle. 610 610 * @param[in] lut Look up tabel ··· 623 623 enum ia_css_err 624 624 ia_css_pipe_set_bci_scaler_lut( struct ia_css_pipe *pipe, 625 625 const void *lut); 626 - /** @brief Checking of DVS statistics ability 626 + /* @brief Checking of DVS statistics ability 627 627 * @param[in] pipe_info The pipe info. 628 628 * @return true - has DVS statistics ability 629 629 * false - otherwise ··· 631 631 bool ia_css_pipe_has_dvs_stats(struct ia_css_pipe_info *pipe_info); 632 632 633 633 #ifdef ISP2401 634 - /** @brief Override the frameformat set on the output pins. 634 + /* @brief Override the frameformat set on the output pins. 635 635 * @param[in] pipe Pipe handle. 636 636 * @param[in] output_pin Pin index to set the format on 637 637 * 0 - main output pin
+6 -6
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_prbs.h
··· 15 15 #ifndef __IA_CSS_PRBS_H 16 16 #define __IA_CSS_PRBS_H 17 17 18 - /** @file 18 + /* @file 19 19 * This file contains support for Pseudo Random Bit Sequence (PRBS) inputs 20 20 */ 21 21 22 - /** Enumerate the PRBS IDs. 22 + /* Enumerate the PRBS IDs. 23 23 */ 24 24 enum ia_css_prbs_id { 25 25 IA_CSS_PRBS_ID0, ··· 44 44 */ 45 45 struct ia_css_prbs_config { 46 46 enum ia_css_prbs_id id; 47 - unsigned int h_blank; /**< horizontal blank */ 48 - unsigned int v_blank; /**< vertical blank */ 49 - int seed; /**< random seed for the 1st 2-pixel-components/clock */ 50 - int seed1; /**< random seed for the 2nd 2-pixel-components/clock */ 47 + unsigned int h_blank; /** horizontal blank */ 48 + unsigned int v_blank; /** vertical blank */ 49 + int seed; /** random seed for the 1st 2-pixel-components/clock */ 50 + int seed1; /** random seed for the 2nd 2-pixel-components/clock */ 51 51 }; 52 52 53 53 #endif /* __IA_CSS_PRBS_H */
+3 -3
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_properties.h
··· 15 15 #ifndef __IA_CSS_PROPERTIES_H 16 16 #define __IA_CSS_PROPERTIES_H 17 17 18 - /** @file 18 + /* @file 19 19 * This file contains support for retrieving properties of some hardware the CSS system 20 20 */ 21 21 ··· 24 24 25 25 struct ia_css_properties { 26 26 int gdc_coord_one; 27 - bool l1_base_is_index; /**< Indicate whether the L1 page base 27 + bool l1_base_is_index; /** Indicate whether the L1 page base 28 28 is a page index or a byte address. */ 29 29 enum ia_css_vamem_type vamem_type; 30 30 }; 31 31 32 - /** @brief Get hardware properties 32 + /* @brief Get hardware properties 33 33 * @param[in,out] properties The hardware properties 34 34 * @return None 35 35 *
+3 -3
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_shading.h
··· 15 15 #ifndef __IA_CSS_SHADING_H 16 16 #define __IA_CSS_SHADING_H 17 17 18 - /** @file 18 + /* @file 19 19 * This file contains support for setting the shading table for CSS 20 20 */ 21 21 22 22 #include <ia_css_types.h> 23 23 24 - /** @brief Shading table 24 + /* @brief Shading table 25 25 * @param[in] width Width of the shading table. 26 26 * @param[in] height Height of the shading table. 27 27 * @return Pointer to the shading table ··· 30 30 ia_css_shading_table_alloc(unsigned int width, 31 31 unsigned int height); 32 32 33 - /** @brief Free shading table 33 + /* @brief Free shading table 34 34 * @param[in] table Pointer to the shading table. 35 35 * @return None 36 36 */
+2 -2
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream.h
··· 48 48 bool started; 49 49 }; 50 50 51 - /** @brief Get a binary in the stream, which binary has the shading correction. 51 + /* @brief Get a binary in the stream, which binary has the shading correction. 52 52 * 53 53 * @param[in] stream: The stream. 54 54 * @return The binary which has the shading correction. ··· 76 76 const struct ia_css_fpn_table * 77 77 ia_css_get_fpn_table(struct ia_css_stream *stream); 78 78 79 - /** @brief Get a pointer to the shading table. 79 + /* @brief Get a pointer to the shading table. 80 80 * 81 81 * @param[in] stream: The stream. 82 82 * @return The pointer to the shading table.
+45 -45
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_format.h
··· 15 15 #ifndef __IA_CSS_STREAM_FORMAT_H 16 16 #define __IA_CSS_STREAM_FORMAT_H 17 17 18 - /** @file 18 + /* @file 19 19 * This file contains formats usable for ISP streaming input 20 20 */ 21 21 22 22 #include <type_support.h> /* bool */ 23 23 24 - /** The ISP streaming input interface supports the following formats. 24 + /* The ISP streaming input interface supports the following formats. 25 25 * These match the corresponding MIPI formats. 26 26 */ 27 27 enum ia_css_stream_format { 28 - IA_CSS_STREAM_FORMAT_YUV420_8_LEGACY, /**< 8 bits per subpixel */ 29 - IA_CSS_STREAM_FORMAT_YUV420_8, /**< 8 bits per subpixel */ 30 - IA_CSS_STREAM_FORMAT_YUV420_10, /**< 10 bits per subpixel */ 31 - IA_CSS_STREAM_FORMAT_YUV420_16, /**< 16 bits per subpixel */ 32 - IA_CSS_STREAM_FORMAT_YUV422_8, /**< UYVY..UYVY, 8 bits per subpixel */ 33 - IA_CSS_STREAM_FORMAT_YUV422_10, /**< UYVY..UYVY, 10 bits per subpixel */ 34 - IA_CSS_STREAM_FORMAT_YUV422_16, /**< UYVY..UYVY, 16 bits per subpixel */ 35 - IA_CSS_STREAM_FORMAT_RGB_444, /**< BGR..BGR, 4 bits per subpixel */ 36 - IA_CSS_STREAM_FORMAT_RGB_555, /**< BGR..BGR, 5 bits per subpixel */ 37 - IA_CSS_STREAM_FORMAT_RGB_565, /**< BGR..BGR, 5 bits B and R, 6 bits G */ 38 - IA_CSS_STREAM_FORMAT_RGB_666, /**< BGR..BGR, 6 bits per subpixel */ 39 - IA_CSS_STREAM_FORMAT_RGB_888, /**< BGR..BGR, 8 bits per subpixel */ 40 - IA_CSS_STREAM_FORMAT_RAW_6, /**< RAW data, 6 bits per pixel */ 41 - IA_CSS_STREAM_FORMAT_RAW_7, /**< RAW data, 7 bits per pixel */ 42 - IA_CSS_STREAM_FORMAT_RAW_8, /**< RAW data, 8 bits per pixel */ 43 - IA_CSS_STREAM_FORMAT_RAW_10, /**< RAW data, 10 bits per pixel */ 44 - IA_CSS_STREAM_FORMAT_RAW_12, /**< RAW data, 12 bits per pixel */ 45 - IA_CSS_STREAM_FORMAT_RAW_14, /**< RAW data, 14 bits per pixel */ 46 - IA_CSS_STREAM_FORMAT_RAW_16, /**< RAW data, 16 bits per pixel, which is 28 + IA_CSS_STREAM_FORMAT_YUV420_8_LEGACY, /** 8 bits per subpixel */ 29 + IA_CSS_STREAM_FORMAT_YUV420_8, /** 8 bits per subpixel */ 30 + IA_CSS_STREAM_FORMAT_YUV420_10, /** 10 bits per subpixel */ 31 + IA_CSS_STREAM_FORMAT_YUV420_16, /** 16 bits per subpixel */ 32 + IA_CSS_STREAM_FORMAT_YUV422_8, /** UYVY..UYVY, 8 bits per subpixel */ 33 + IA_CSS_STREAM_FORMAT_YUV422_10, /** UYVY..UYVY, 10 bits per subpixel */ 34 + IA_CSS_STREAM_FORMAT_YUV422_16, /** UYVY..UYVY, 16 bits per subpixel */ 35 + IA_CSS_STREAM_FORMAT_RGB_444, /** BGR..BGR, 4 bits per subpixel */ 36 + IA_CSS_STREAM_FORMAT_RGB_555, /** BGR..BGR, 5 bits per subpixel */ 37 + IA_CSS_STREAM_FORMAT_RGB_565, /** BGR..BGR, 5 bits B and R, 6 bits G */ 38 + IA_CSS_STREAM_FORMAT_RGB_666, /** BGR..BGR, 6 bits per subpixel */ 39 + IA_CSS_STREAM_FORMAT_RGB_888, /** BGR..BGR, 8 bits per subpixel */ 40 + IA_CSS_STREAM_FORMAT_RAW_6, /** RAW data, 6 bits per pixel */ 41 + IA_CSS_STREAM_FORMAT_RAW_7, /** RAW data, 7 bits per pixel */ 42 + IA_CSS_STREAM_FORMAT_RAW_8, /** RAW data, 8 bits per pixel */ 43 + IA_CSS_STREAM_FORMAT_RAW_10, /** RAW data, 10 bits per pixel */ 44 + IA_CSS_STREAM_FORMAT_RAW_12, /** RAW data, 12 bits per pixel */ 45 + IA_CSS_STREAM_FORMAT_RAW_14, /** RAW data, 14 bits per pixel */ 46 + IA_CSS_STREAM_FORMAT_RAW_16, /** RAW data, 16 bits per pixel, which is 47 47 not specified in CSI-MIPI standard*/ 48 - IA_CSS_STREAM_FORMAT_BINARY_8, /**< Binary byte stream, which is target at 48 + IA_CSS_STREAM_FORMAT_BINARY_8, /** Binary byte stream, which is target at 49 49 JPEG. */ 50 50 51 - /** CSI2-MIPI specific format: Generic short packet data. It is used to 51 + /* CSI2-MIPI specific format: Generic short packet data. It is used to 52 52 * keep the timing information for the opening/closing of shutters, 53 53 * triggering of flashes and etc. 54 54 */ 55 - IA_CSS_STREAM_FORMAT_GENERIC_SHORT1, /**< Generic Short Packet Code 1 */ 56 - IA_CSS_STREAM_FORMAT_GENERIC_SHORT2, /**< Generic Short Packet Code 2 */ 57 - IA_CSS_STREAM_FORMAT_GENERIC_SHORT3, /**< Generic Short Packet Code 3 */ 58 - IA_CSS_STREAM_FORMAT_GENERIC_SHORT4, /**< Generic Short Packet Code 4 */ 59 - IA_CSS_STREAM_FORMAT_GENERIC_SHORT5, /**< Generic Short Packet Code 5 */ 60 - IA_CSS_STREAM_FORMAT_GENERIC_SHORT6, /**< Generic Short Packet Code 6 */ 61 - IA_CSS_STREAM_FORMAT_GENERIC_SHORT7, /**< Generic Short Packet Code 7 */ 62 - IA_CSS_STREAM_FORMAT_GENERIC_SHORT8, /**< Generic Short Packet Code 8 */ 55 + IA_CSS_STREAM_FORMAT_GENERIC_SHORT1, /** Generic Short Packet Code 1 */ 56 + IA_CSS_STREAM_FORMAT_GENERIC_SHORT2, /** Generic Short Packet Code 2 */ 57 + IA_CSS_STREAM_FORMAT_GENERIC_SHORT3, /** Generic Short Packet Code 3 */ 58 + IA_CSS_STREAM_FORMAT_GENERIC_SHORT4, /** Generic Short Packet Code 4 */ 59 + IA_CSS_STREAM_FORMAT_GENERIC_SHORT5, /** Generic Short Packet Code 5 */ 60 + IA_CSS_STREAM_FORMAT_GENERIC_SHORT6, /** Generic Short Packet Code 6 */ 61 + IA_CSS_STREAM_FORMAT_GENERIC_SHORT7, /** Generic Short Packet Code 7 */ 62 + IA_CSS_STREAM_FORMAT_GENERIC_SHORT8, /** Generic Short Packet Code 8 */ 63 63 64 - /** CSI2-MIPI specific format: YUV data. 64 + /* CSI2-MIPI specific format: YUV data. 65 65 */ 66 - IA_CSS_STREAM_FORMAT_YUV420_8_SHIFT, /**< YUV420 8-bit (Chroma Shifted Pixel Sampling) */ 67 - IA_CSS_STREAM_FORMAT_YUV420_10_SHIFT, /**< YUV420 8-bit (Chroma Shifted Pixel Sampling) */ 66 + IA_CSS_STREAM_FORMAT_YUV420_8_SHIFT, /** YUV420 8-bit (Chroma Shifted Pixel Sampling) */ 67 + IA_CSS_STREAM_FORMAT_YUV420_10_SHIFT, /** YUV420 8-bit (Chroma Shifted Pixel Sampling) */ 68 68 69 - /** CSI2-MIPI specific format: Generic long packet data 69 + /* CSI2-MIPI specific format: Generic long packet data 70 70 */ 71 - IA_CSS_STREAM_FORMAT_EMBEDDED, /**< Embedded 8-bit non Image Data */ 71 + IA_CSS_STREAM_FORMAT_EMBEDDED, /** Embedded 8-bit non Image Data */ 72 72 73 - /** CSI2-MIPI specific format: User defined byte-based data. For example, 73 + /* CSI2-MIPI specific format: User defined byte-based data. For example, 74 74 * the data transmitter (e.g. the SoC sensor) can keep the JPEG data as 75 75 * the User Defined Data Type 4 and the MPEG data as the 76 76 * User Defined Data Type 7. 77 77 */ 78 - IA_CSS_STREAM_FORMAT_USER_DEF1, /**< User defined 8-bit data type 1 */ 79 - IA_CSS_STREAM_FORMAT_USER_DEF2, /**< User defined 8-bit data type 2 */ 80 - IA_CSS_STREAM_FORMAT_USER_DEF3, /**< User defined 8-bit data type 3 */ 81 - IA_CSS_STREAM_FORMAT_USER_DEF4, /**< User defined 8-bit data type 4 */ 82 - IA_CSS_STREAM_FORMAT_USER_DEF5, /**< User defined 8-bit data type 5 */ 83 - IA_CSS_STREAM_FORMAT_USER_DEF6, /**< User defined 8-bit data type 6 */ 84 - IA_CSS_STREAM_FORMAT_USER_DEF7, /**< User defined 8-bit data type 7 */ 85 - IA_CSS_STREAM_FORMAT_USER_DEF8, /**< User defined 8-bit data type 8 */ 78 + IA_CSS_STREAM_FORMAT_USER_DEF1, /** User defined 8-bit data type 1 */ 79 + IA_CSS_STREAM_FORMAT_USER_DEF2, /** User defined 8-bit data type 2 */ 80 + IA_CSS_STREAM_FORMAT_USER_DEF3, /** User defined 8-bit data type 3 */ 81 + IA_CSS_STREAM_FORMAT_USER_DEF4, /** User defined 8-bit data type 4 */ 82 + IA_CSS_STREAM_FORMAT_USER_DEF5, /** User defined 8-bit data type 5 */ 83 + IA_CSS_STREAM_FORMAT_USER_DEF6, /** User defined 8-bit data type 6 */ 84 + IA_CSS_STREAM_FORMAT_USER_DEF7, /** User defined 8-bit data type 7 */ 85 + IA_CSS_STREAM_FORMAT_USER_DEF8, /** User defined 8-bit data type 8 */ 86 86 }; 87 87 88 88 #define IA_CSS_STREAM_FORMAT_NUM IA_CSS_STREAM_FORMAT_USER_DEF8
+74 -74
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_public.h
··· 15 15 #ifndef __IA_CSS_STREAM_PUBLIC_H 16 16 #define __IA_CSS_STREAM_PUBLIC_H 17 17 18 - /** @file 18 + /* @file 19 19 * This file contains support for configuring and controlling streams 20 20 */ 21 21 ··· 27 27 #include "ia_css_prbs.h" 28 28 #include "ia_css_input_port.h" 29 29 30 - /** Input modes, these enumerate all supported input modes. 30 + /* Input modes, these enumerate all supported input modes. 31 31 * Note that not all ISP modes support all input modes. 32 32 */ 33 33 enum ia_css_input_mode { 34 - IA_CSS_INPUT_MODE_SENSOR, /**< data from sensor */ 35 - IA_CSS_INPUT_MODE_FIFO, /**< data from input-fifo */ 36 - IA_CSS_INPUT_MODE_TPG, /**< data from test-pattern generator */ 37 - IA_CSS_INPUT_MODE_PRBS, /**< data from pseudo-random bit stream */ 38 - IA_CSS_INPUT_MODE_MEMORY, /**< data from a frame in memory */ 39 - IA_CSS_INPUT_MODE_BUFFERED_SENSOR /**< data is sent through mipi buffer */ 34 + IA_CSS_INPUT_MODE_SENSOR, /** data from sensor */ 35 + IA_CSS_INPUT_MODE_FIFO, /** data from input-fifo */ 36 + IA_CSS_INPUT_MODE_TPG, /** data from test-pattern generator */ 37 + IA_CSS_INPUT_MODE_PRBS, /** data from pseudo-random bit stream */ 38 + IA_CSS_INPUT_MODE_MEMORY, /** data from a frame in memory */ 39 + IA_CSS_INPUT_MODE_BUFFERED_SENSOR /** data is sent through mipi buffer */ 40 40 }; 41 41 42 - /** Structure of the MIPI buffer configuration 42 + /* Structure of the MIPI buffer configuration 43 43 */ 44 44 struct ia_css_mipi_buffer_config { 45 - unsigned int size_mem_words; /**< The frame size in the system memory 45 + unsigned int size_mem_words; /** The frame size in the system memory 46 46 words (32B) */ 47 - bool contiguous; /**< Allocated memory physically 47 + bool contiguous; /** Allocated memory physically 48 48 contiguously or not. \deprecated{Will be false always.}*/ 49 - unsigned int nof_mipi_buffers; /**< The number of MIPI buffers required for this 49 + unsigned int nof_mipi_buffers; /** The number of MIPI buffers required for this 50 50 stream */ 51 51 }; 52 52 ··· 57 57 IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH 58 58 }; 59 59 60 - /** This is input data configuration for one MIPI data type. We can have 60 + /* This is input data configuration for one MIPI data type. We can have 61 61 * multiple of this in one virtual channel. 62 62 */ 63 63 struct ia_css_stream_isys_stream_config { 64 - struct ia_css_resolution input_res; /**< Resolution of input data */ 65 - enum ia_css_stream_format format; /**< Format of input stream. This data 64 + struct ia_css_resolution input_res; /** Resolution of input data */ 65 + enum ia_css_stream_format format; /** Format of input stream. This data 66 66 format will be mapped to MIPI data 67 67 type internally. */ 68 - int linked_isys_stream_id; /**< default value is -1, other value means 68 + int linked_isys_stream_id; /** default value is -1, other value means 69 69 current isys_stream shares the same buffer with 70 70 indicated isys_stream*/ 71 - bool valid; /**< indicate whether other fields have valid value */ 71 + bool valid; /** indicate whether other fields have valid value */ 72 72 }; 73 73 74 74 struct ia_css_stream_input_config { 75 - struct ia_css_resolution input_res; /**< Resolution of input data */ 76 - struct ia_css_resolution effective_res; /**< Resolution of input data. 75 + struct ia_css_resolution input_res; /** Resolution of input data */ 76 + struct ia_css_resolution effective_res; /** Resolution of input data. 77 77 Used for CSS 2400/1 System and deprecated for other 78 78 systems (replaced by input_effective_res in 79 79 ia_css_pipe_config) */ 80 - enum ia_css_stream_format format; /**< Format of input stream. This data 80 + enum ia_css_stream_format format; /** Format of input stream. This data 81 81 format will be mapped to MIPI data 82 82 type internally. */ 83 - enum ia_css_bayer_order bayer_order; /**< Bayer order for RAW streams */ 83 + enum ia_css_bayer_order bayer_order; /** Bayer order for RAW streams */ 84 84 }; 85 85 86 86 87 - /** Input stream description. This describes how input will flow into the 87 + /* Input stream description. This describes how input will flow into the 88 88 * CSS. This is used to program the CSS hardware. 89 89 */ 90 90 struct ia_css_stream_config { 91 - enum ia_css_input_mode mode; /**< Input mode */ 91 + enum ia_css_input_mode mode; /** Input mode */ 92 92 union { 93 - struct ia_css_input_port port; /**< Port, for sensor only. */ 94 - struct ia_css_tpg_config tpg; /**< TPG configuration */ 95 - struct ia_css_prbs_config prbs; /**< PRBS configuration */ 96 - } source; /**< Source of input data */ 97 - unsigned int channel_id; /**< Channel on which input data 93 + struct ia_css_input_port port; /** Port, for sensor only. */ 94 + struct ia_css_tpg_config tpg; /** TPG configuration */ 95 + struct ia_css_prbs_config prbs; /** PRBS configuration */ 96 + } source; /** Source of input data */ 97 + unsigned int channel_id; /** Channel on which input data 98 98 will arrive. Use this field 99 99 to specify virtual channel id. 100 100 Valid values are: 0, 1, 2, 3 */ ··· 110 110 * and will be deprecated. In the future,all platforms will use the N*N method 111 111 */ 112 112 #endif 113 - unsigned int sensor_binning_factor; /**< Binning factor used by sensor 113 + unsigned int sensor_binning_factor; /** Binning factor used by sensor 114 114 to produce image data. This is 115 115 used for shading correction. */ 116 - unsigned int pixels_per_clock; /**< Number of pixels per clock, which can be 116 + unsigned int pixels_per_clock; /** Number of pixels per clock, which can be 117 117 1, 2 or 4. */ 118 - bool online; /**< offline will activate RAW copy on SP, use this for 118 + bool online; /** offline will activate RAW copy on SP, use this for 119 119 continuous capture. */ 120 120 /* ISYS2401 usage: ISP receives data directly from sensor, no copy. */ 121 - unsigned init_num_cont_raw_buf; /**< initial number of raw buffers to 121 + unsigned init_num_cont_raw_buf; /** initial number of raw buffers to 122 122 allocate */ 123 - unsigned target_num_cont_raw_buf; /**< total number of raw buffers to 123 + unsigned target_num_cont_raw_buf; /** total number of raw buffers to 124 124 allocate */ 125 - bool pack_raw_pixels; /**< Pack pixels in the raw buffers */ 126 - bool continuous; /**< Use SP copy feature to continuously capture frames 125 + bool pack_raw_pixels; /** Pack pixels in the raw buffers */ 126 + bool continuous; /** Use SP copy feature to continuously capture frames 127 127 to system memory and run pipes in offline mode */ 128 - bool disable_cont_viewfinder; /**< disable continous viewfinder for ZSL use case */ 129 - int32_t flash_gpio_pin; /**< pin on which the flash is connected, -1 for no flash */ 130 - int left_padding; /**< The number of input-formatter left-paddings, -1 for default from binary.*/ 131 - struct ia_css_mipi_buffer_config mipi_buffer_config; /**< mipi buffer configuration */ 132 - struct ia_css_metadata_config metadata_config; /**< Metadata configuration. */ 133 - bool ia_css_enable_raw_buffer_locking; /**< Enable Raw Buffer Locking for HALv3 Support */ 128 + bool disable_cont_viewfinder; /** disable continous viewfinder for ZSL use case */ 129 + int32_t flash_gpio_pin; /** pin on which the flash is connected, -1 for no flash */ 130 + int left_padding; /** The number of input-formatter left-paddings, -1 for default from binary.*/ 131 + struct ia_css_mipi_buffer_config mipi_buffer_config; /** mipi buffer configuration */ 132 + struct ia_css_metadata_config metadata_config; /** Metadata configuration. */ 133 + bool ia_css_enable_raw_buffer_locking; /** Enable Raw Buffer Locking for HALv3 Support */ 134 134 bool lock_all; 135 - /**< Lock all RAW buffers (true) or lock only buffers processed by 135 + /** Lock all RAW buffers (true) or lock only buffers processed by 136 136 video or preview pipe (false). 137 137 This setting needs to be enabled to allow raw buffer locking 138 138 without continuous viewfinder. */ ··· 140 140 141 141 struct ia_css_stream; 142 142 143 - /** Stream info, this struct describes properties of a stream after it has been 143 + /* Stream info, this struct describes properties of a stream after it has been 144 144 * created. 145 145 */ 146 146 struct ia_css_stream_info { 147 147 struct ia_css_metadata_info metadata_info; 148 - /**< Info about the metadata layout, this contains the stride. */ 148 + /** Info about the metadata layout, this contains the stride. */ 149 149 }; 150 150 151 - /** @brief Load default stream configuration 151 + /* @brief Load default stream configuration 152 152 * @param[in,out] stream_config The stream configuration. 153 153 * @return None 154 154 * ··· 165 165 * create the internal structures and fill in the configuration data and pipes 166 166 */ 167 167 168 - /** @brief Creates a stream 168 + /* @brief Creates a stream 169 169 * @param[in] stream_config The stream configuration. 170 170 * @param[in] num_pipes The number of pipes to incorporate in the stream. 171 171 * @param[in] pipes The pipes. ··· 180 180 struct ia_css_pipe *pipes[], 181 181 struct ia_css_stream **stream); 182 182 183 - /** @brief Destroys a stream 183 + /* @brief Destroys a stream 184 184 * @param[in] stream The stream. 185 185 * @return IA_CSS_SUCCESS or the error code. 186 186 * ··· 189 189 enum ia_css_err 190 190 ia_css_stream_destroy(struct ia_css_stream *stream); 191 191 192 - /** @brief Provides information about a stream 192 + /* @brief Provides information about a stream 193 193 * @param[in] stream The stream. 194 194 * @param[out] stream_info The information about the stream. 195 195 * @return IA_CSS_SUCCESS or the error code. ··· 200 200 ia_css_stream_get_info(const struct ia_css_stream *stream, 201 201 struct ia_css_stream_info *stream_info); 202 202 203 - /** @brief load (rebuild) a stream that was unloaded. 203 + /* @brief load (rebuild) a stream that was unloaded. 204 204 * @param[in] stream The stream 205 205 * @return IA_CSS_SUCCESS or the error code 206 206 * ··· 210 210 enum ia_css_err 211 211 ia_css_stream_load(struct ia_css_stream *stream); 212 212 213 - /** @brief Starts the stream. 213 + /* @brief Starts the stream. 214 214 * @param[in] stream The stream. 215 215 * @return IA_CSS_SUCCESS or the error code. 216 216 * ··· 223 223 enum ia_css_err 224 224 ia_css_stream_start(struct ia_css_stream *stream); 225 225 226 - /** @brief Stop the stream. 226 + /* @brief Stop the stream. 227 227 * @param[in] stream The stream. 228 228 * @return IA_CSS_SUCCESS or the error code. 229 229 * ··· 233 233 enum ia_css_err 234 234 ia_css_stream_stop(struct ia_css_stream *stream); 235 235 236 - /** @brief Check if a stream has stopped 236 + /* @brief Check if a stream has stopped 237 237 * @param[in] stream The stream. 238 238 * @return boolean flag 239 239 * ··· 242 242 bool 243 243 ia_css_stream_has_stopped(struct ia_css_stream *stream); 244 244 245 - /** @brief destroy a stream according to the stream seed previosly saved in the seed array. 245 + /* @brief destroy a stream according to the stream seed previosly saved in the seed array. 246 246 * @param[in] stream The stream. 247 247 * @return IA_CSS_SUCCESS (no other errors are generated now) 248 248 * ··· 251 251 enum ia_css_err 252 252 ia_css_stream_unload(struct ia_css_stream *stream); 253 253 254 - /** @brief Returns stream format 254 + /* @brief Returns stream format 255 255 * @param[in] stream The stream. 256 256 * @return format of the string 257 257 * ··· 260 260 enum ia_css_stream_format 261 261 ia_css_stream_get_format(const struct ia_css_stream *stream); 262 262 263 - /** @brief Check if the stream is configured for 2 pixels per clock 263 + /* @brief Check if the stream is configured for 2 pixels per clock 264 264 * @param[in] stream The stream. 265 265 * @return boolean flag 266 266 * ··· 270 270 bool 271 271 ia_css_stream_get_two_pixels_per_clock(const struct ia_css_stream *stream); 272 272 273 - /** @brief Sets the output frame stride (at the last pipe) 273 + /* @brief Sets the output frame stride (at the last pipe) 274 274 * @param[in] stream The stream 275 275 * @param[in] output_padded_width - the output buffer stride. 276 276 * @return ia_css_err ··· 280 280 enum ia_css_err 281 281 ia_css_stream_set_output_padded_width(struct ia_css_stream *stream, unsigned int output_padded_width); 282 282 283 - /** @brief Return max number of continuous RAW frames. 283 + /* @brief Return max number of continuous RAW frames. 284 284 * @param[in] stream The stream. 285 285 * @param[out] buffer_depth The maximum number of continuous RAW frames. 286 286 * @return IA_CSS_SUCCESS or IA_CSS_ERR_INVALID_ARGUMENTS ··· 291 291 enum ia_css_err 292 292 ia_css_stream_get_max_buffer_depth(struct ia_css_stream *stream, int *buffer_depth); 293 293 294 - /** @brief Set nr of continuous RAW frames to use. 294 + /* @brief Set nr of continuous RAW frames to use. 295 295 * 296 296 * @param[in] stream The stream. 297 297 * @param[in] buffer_depth Number of frames to set. ··· 302 302 enum ia_css_err 303 303 ia_css_stream_set_buffer_depth(struct ia_css_stream *stream, int buffer_depth); 304 304 305 - /** @brief Get number of continuous RAW frames to use. 305 + /* @brief Get number of continuous RAW frames to use. 306 306 * @param[in] stream The stream. 307 307 * @param[out] buffer_depth The number of frames to use 308 308 * @return IA_CSS_SUCCESS or IA_CSS_ERR_INVALID_ARGUMENTS ··· 315 315 316 316 /* ===== CAPTURE ===== */ 317 317 318 - /** @brief Configure the continuous capture 318 + /* @brief Configure the continuous capture 319 319 * 320 320 * @param[in] stream The stream. 321 321 * @param[in] num_captures The number of RAW frames to be processed to ··· 347 347 unsigned int skip, 348 348 int offset); 349 349 350 - /** @brief Specify which raw frame to tag based on exp_id found in frame info 350 + /* @brief Specify which raw frame to tag based on exp_id found in frame info 351 351 * 352 352 * @param[in] stream The stream. 353 353 * @param[in] exp_id The exposure id of the raw frame to tag. ··· 363 363 364 364 /* ===== VIDEO ===== */ 365 365 366 - /** @brief Send streaming data into the css input FIFO 366 + /* @brief Send streaming data into the css input FIFO 367 367 * 368 368 * @param[in] stream The stream. 369 369 * @param[in] data Pointer to the pixels to be send. ··· 395 395 unsigned int width, 396 396 unsigned int height); 397 397 398 - /** @brief Start an input frame on the CSS input FIFO. 398 + /* @brief Start an input frame on the CSS input FIFO. 399 399 * 400 400 * @param[in] stream The stream. 401 401 * @return None ··· 411 411 void 412 412 ia_css_stream_start_input_frame(const struct ia_css_stream *stream); 413 413 414 - /** @brief Send a line of input data into the CSS input FIFO. 414 + /* @brief Send a line of input data into the CSS input FIFO. 415 415 * 416 416 * @param[in] stream The stream. 417 417 * @param[in] data Array of the first line of image data. ··· 435 435 const unsigned short *data2, 436 436 unsigned int width2); 437 437 438 - /** @brief Send a line of input embedded data into the CSS input FIFO. 438 + /* @brief Send a line of input embedded data into the CSS input FIFO. 439 439 * 440 440 * @param[in] stream Pointer of the stream. 441 441 * @param[in] format Format of the embedded data. ··· 457 457 const unsigned short *data, 458 458 unsigned int width); 459 459 460 - /** @brief End an input frame on the CSS input FIFO. 460 + /* @brief End an input frame on the CSS input FIFO. 461 461 * 462 462 * @param[in] stream The stream. 463 463 * @return None ··· 467 467 void 468 468 ia_css_stream_end_input_frame(const struct ia_css_stream *stream); 469 469 470 - /** @brief send a request flash command to SP 470 + /* @brief send a request flash command to SP 471 471 * 472 472 * @param[in] stream The stream. 473 473 * @return None ··· 481 481 void 482 482 ia_css_stream_request_flash(struct ia_css_stream *stream); 483 483 484 - /** @brief Configure a stream with filter coefficients. 484 + /* @brief Configure a stream with filter coefficients. 485 485 * @deprecated {Replaced by 486 486 * ia_css_pipe_set_isp_config_on_pipe()} 487 487 * ··· 503 503 const struct ia_css_isp_config *config, 504 504 struct ia_css_pipe *pipe); 505 505 506 - /** @brief Configure a stream with filter coefficients. 506 + /* @brief Configure a stream with filter coefficients. 507 507 * @deprecated {Replaced by 508 508 * ia_css_pipe_set_isp_config()} 509 509 * @param[in] stream The stream. ··· 523 523 struct ia_css_stream *stream, 524 524 const struct ia_css_isp_config *config); 525 525 526 - /** @brief Get selected configuration settings 526 + /* @brief Get selected configuration settings 527 527 * @param[in] stream The stream. 528 528 * @param[out] config Configuration settings. 529 529 * @return None ··· 532 532 ia_css_stream_get_isp_config(const struct ia_css_stream *stream, 533 533 struct ia_css_isp_config *config); 534 534 535 - /** @brief allocate continuous raw frames for continuous capture 535 + /* @brief allocate continuous raw frames for continuous capture 536 536 * @param[in] stream The stream. 537 537 * @return IA_CSS_SUCCESS or error code. 538 538 * ··· 544 544 enum ia_css_err 545 545 ia_css_alloc_continuous_frame_remain(struct ia_css_stream *stream); 546 546 547 - /** @brief allocate continuous raw frames for continuous capture 547 + /* @brief allocate continuous raw frames for continuous capture 548 548 * @param[in] stream The stream. 549 549 * @return IA_CSS_SUCCESS or error code. 550 550 * ··· 555 555 enum ia_css_err 556 556 ia_css_update_continuous_frames(struct ia_css_stream *stream); 557 557 558 - /** @brief ia_css_unlock_raw_frame . unlock a raw frame (HALv3 Support) 558 + /* @brief ia_css_unlock_raw_frame . unlock a raw frame (HALv3 Support) 559 559 * @param[in] stream The stream. 560 560 * @param[in] exp_id exposure id that uniquely identifies the locked Raw Frame Buffer 561 561 * @return ia_css_err IA_CSS_SUCCESS or error code ··· 567 567 enum ia_css_err 568 568 ia_css_unlock_raw_frame(struct ia_css_stream *stream, uint32_t exp_id); 569 569 570 - /** @brief ia_css_en_dz_capt_pipe . Enable/Disable digital zoom for capture pipe 570 + /* @brief ia_css_en_dz_capt_pipe . Enable/Disable digital zoom for capture pipe 571 571 * @param[in] stream The stream. 572 572 * @param[in] enable - true, disable - false 573 573 * @return None
+15 -15
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_timer.h
··· 31 31 #ifndef __IA_CSS_TIMER_H 32 32 #define __IA_CSS_TIMER_H 33 33 34 - /** @file 34 + /* @file 35 35 * Timer interface definitions 36 36 */ 37 37 #include <type_support.h> /* for uint32_t */ 38 38 #include "ia_css_err.h" 39 39 40 - /** @brief timer reading definition */ 40 + /* @brief timer reading definition */ 41 41 typedef uint32_t clock_value_t; 42 42 43 - /** @brief 32 bit clock tick,(timestamp based on timer-value of CSS-internal timer)*/ 43 + /* @brief 32 bit clock tick,(timestamp based on timer-value of CSS-internal timer)*/ 44 44 struct ia_css_clock_tick { 45 - clock_value_t ticks; /**< measured time in ticks.*/ 45 + clock_value_t ticks; /** measured time in ticks.*/ 46 46 }; 47 47 48 - /** @brief TIMER event codes */ 48 + /* @brief TIMER event codes */ 49 49 enum ia_css_tm_event { 50 50 IA_CSS_TM_EVENT_AFTER_INIT, 51 - /**< Timer Event after Initialization */ 51 + /** Timer Event after Initialization */ 52 52 IA_CSS_TM_EVENT_MAIN_END, 53 - /**< Timer Event after end of Main */ 53 + /** Timer Event after end of Main */ 54 54 IA_CSS_TM_EVENT_THREAD_START, 55 - /**< Timer Event after thread start */ 55 + /** Timer Event after thread start */ 56 56 IA_CSS_TM_EVENT_FRAME_PROC_START, 57 - /**< Timer Event after Frame Process Start */ 57 + /** Timer Event after Frame Process Start */ 58 58 IA_CSS_TM_EVENT_FRAME_PROC_END 59 - /**< Timer Event after Frame Process End */ 59 + /** Timer Event after Frame Process End */ 60 60 }; 61 61 62 - /** @brief code measurement common struct */ 62 + /* @brief code measurement common struct */ 63 63 struct ia_css_time_meas { 64 - clock_value_t start_timer_value; /**< measured time in ticks */ 65 - clock_value_t end_timer_value; /**< measured time in ticks */ 64 + clock_value_t start_timer_value; /** measured time in ticks */ 65 + clock_value_t end_timer_value; /** measured time in ticks */ 66 66 }; 67 67 68 68 /**@brief SIZE_OF_IA_CSS_CLOCK_TICK_STRUCT checks to ensure correct alignment for struct ia_css_clock_tick. */ 69 69 #define SIZE_OF_IA_CSS_CLOCK_TICK_STRUCT sizeof(clock_value_t) 70 - /** @brief checks to ensure correct alignment for ia_css_time_meas. */ 70 + /* @brief checks to ensure correct alignment for ia_css_time_meas. */ 71 71 #define SIZE_OF_IA_CSS_TIME_MEAS_STRUCT (sizeof(clock_value_t) \ 72 72 + sizeof(clock_value_t)) 73 73 74 - /** @brief API to fetch timer count directly 74 + /* @brief API to fetch timer count directly 75 75 * 76 76 * @param curr_ts [out] measured count value 77 77 * @return IA_CSS_SUCCESS if success
+4 -4
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_tpg.h
··· 15 15 #ifndef __IA_CSS_TPG_H 16 16 #define __IA_CSS_TPG_H 17 17 18 - /** @file 18 + /* @file 19 19 * This file contains support for the test pattern generator (TPG) 20 20 */ 21 21 22 - /** Enumerate the TPG IDs. 22 + /* Enumerate the TPG IDs. 23 23 */ 24 24 enum ia_css_tpg_id { 25 25 IA_CSS_TPG_ID0, ··· 35 35 */ 36 36 #define N_CSS_TPG_IDS (IA_CSS_TPG_ID2+1) 37 37 38 - /** Enumerate the TPG modes. 38 + /* Enumerate the TPG modes. 39 39 */ 40 40 enum ia_css_tpg_mode { 41 41 IA_CSS_TPG_MODE_RAMP, ··· 44 44 IA_CSS_TPG_MODE_MONO 45 45 }; 46 46 47 - /** @brief Configure the test pattern generator. 47 + /* @brief Configure the test pattern generator. 48 48 * 49 49 * Configure the Test Pattern Generator, the way these values are used to 50 50 * generate the pattern can be seen in the HRT extension for the test pattern
+129 -129
drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_types.h
··· 16 16 #ifndef _IA_CSS_TYPES_H 17 17 #define _IA_CSS_TYPES_H 18 18 19 - /** @file 19 + /* @file 20 20 * This file contains types used for the ia_css parameters. 21 21 * These types are in a separate file because they are expected 22 22 * to be used in software layers that do not access the CSS API ··· 58 58 #include "isp/kernels/output/output_1.0/ia_css_output_types.h" 59 59 60 60 #define IA_CSS_DVS_STAT_GRID_INFO_SUPPORTED 61 - /**< Should be removed after Driver adaptation will be done */ 61 + /** Should be removed after Driver adaptation will be done */ 62 62 63 63 #define IA_CSS_VERSION_MAJOR 2 64 64 #define IA_CSS_VERSION_MINOR 0 ··· 69 69 /* Min and max exposure IDs. These macros are here to allow 70 70 * the drivers to get this information. Changing these macros 71 71 * constitutes a CSS API change. */ 72 - #define IA_CSS_ISYS_MIN_EXPOSURE_ID 1 /**< Minimum exposure ID */ 73 - #define IA_CSS_ISYS_MAX_EXPOSURE_ID 250 /**< Maximum exposure ID */ 72 + #define IA_CSS_ISYS_MIN_EXPOSURE_ID 1 /** Minimum exposure ID */ 73 + #define IA_CSS_ISYS_MAX_EXPOSURE_ID 250 /** Maximum exposure ID */ 74 74 75 75 /* opaque types */ 76 76 struct ia_css_isp_parameters; ··· 79 79 struct ia_css_config_memory_offsets; 80 80 struct ia_css_state_memory_offsets; 81 81 82 - /** Virtual address within the CSS address space. */ 82 + /* Virtual address within the CSS address space. */ 83 83 typedef uint32_t ia_css_ptr; 84 84 85 - /** Generic resolution structure. 85 + /* Generic resolution structure. 86 86 */ 87 87 struct ia_css_resolution { 88 - uint32_t width; /**< Width */ 89 - uint32_t height; /**< Height */ 88 + uint32_t width; /** Width */ 89 + uint32_t height; /** Height */ 90 90 }; 91 91 92 - /** Generic coordinate structure. 92 + /* Generic coordinate structure. 93 93 */ 94 94 struct ia_css_coordinate { 95 - int32_t x; /**< Value of a coordinate on the horizontal axis */ 96 - int32_t y; /**< Value of a coordinate on the vertical axis */ 95 + int32_t x; /** Value of a coordinate on the horizontal axis */ 96 + int32_t y; /** Value of a coordinate on the vertical axis */ 97 97 }; 98 98 99 - /** Vector with signed values. This is used to indicate motion for 99 + /* Vector with signed values. This is used to indicate motion for 100 100 * Digital Image Stabilization. 101 101 */ 102 102 struct ia_css_vector { 103 - int32_t x; /**< horizontal motion (in pixels) */ 104 - int32_t y; /**< vertical motion (in pixels) */ 103 + int32_t x; /** horizontal motion (in pixels) */ 104 + int32_t y; /** vertical motion (in pixels) */ 105 105 }; 106 106 107 107 /* Short hands */ 108 108 #define IA_CSS_ISP_DMEM IA_CSS_ISP_DMEM0 109 109 #define IA_CSS_ISP_VMEM IA_CSS_ISP_VMEM0 110 110 111 - /** CSS data descriptor */ 111 + /* CSS data descriptor */ 112 112 struct ia_css_data { 113 - ia_css_ptr address; /**< CSS virtual address */ 114 - uint32_t size; /**< Disabled if 0 */ 113 + ia_css_ptr address; /** CSS virtual address */ 114 + uint32_t size; /** Disabled if 0 */ 115 115 }; 116 116 117 - /** Host data descriptor */ 117 + /* Host data descriptor */ 118 118 struct ia_css_host_data { 119 - char *address; /**< Host address */ 120 - uint32_t size; /**< Disabled if 0 */ 119 + char *address; /** Host address */ 120 + uint32_t size; /** Disabled if 0 */ 121 121 }; 122 122 123 - /** ISP data descriptor */ 123 + /* ISP data descriptor */ 124 124 struct ia_css_isp_data { 125 - uint32_t address; /**< ISP address */ 126 - uint32_t size; /**< Disabled if 0 */ 125 + uint32_t address; /** ISP address */ 126 + uint32_t size; /** Disabled if 0 */ 127 127 }; 128 128 129 - /** Shading Correction types. */ 129 + /* Shading Correction types. */ 130 130 enum ia_css_shading_correction_type { 131 131 #ifndef ISP2401 132 - IA_CSS_SHADING_CORRECTION_TYPE_1 /**< Shading Correction 1.0 (pipe 1.0 on ISP2300, pipe 2.2 on ISP2400) */ 132 + IA_CSS_SHADING_CORRECTION_TYPE_1 /** Shading Correction 1.0 (pipe 1.0 on ISP2300, pipe 2.2 on ISP2400) */ 133 133 #else 134 - IA_CSS_SHADING_CORRECTION_NONE, /**< Shading Correction is not processed in the pipe. */ 135 - IA_CSS_SHADING_CORRECTION_TYPE_1 /**< Shading Correction 1.0 (pipe 1.0 on ISP2300, pipe 2.2 on ISP2400/2401) */ 134 + IA_CSS_SHADING_CORRECTION_NONE, /** Shading Correction is not processed in the pipe. */ 135 + IA_CSS_SHADING_CORRECTION_TYPE_1 /** Shading Correction 1.0 (pipe 1.0 on ISP2300, pipe 2.2 on ISP2400/2401) */ 136 136 #endif 137 137 138 - /**< More shading correction types can be added in the future. */ 138 + /** More shading correction types can be added in the future. */ 139 139 }; 140 140 141 - /** Shading Correction information. */ 141 + /* Shading Correction information. */ 142 142 struct ia_css_shading_info { 143 - enum ia_css_shading_correction_type type; /**< Shading Correction type. */ 143 + enum ia_css_shading_correction_type type; /** Shading Correction type. */ 144 144 145 - union { /** Shading Correction information of each Shading Correction types. */ 145 + union { /* Shading Correction information of each Shading Correction types. */ 146 146 147 - /** Shading Correction information of IA_CSS_SHADING_CORRECTION_TYPE_1. 147 + /* Shading Correction information of IA_CSS_SHADING_CORRECTION_TYPE_1. 148 148 * 149 149 * This structure contains the information necessary to generate 150 150 * the shading table required in the isp. ··· 288 288 */ 289 289 struct { 290 290 #ifndef ISP2401 291 - uint32_t enable; /**< Shading correction enabled. 291 + uint32_t enable; /** Shading correction enabled. 292 292 0:disabled, 1:enabled */ 293 - uint32_t num_hor_grids; /**< Number of data points per line 293 + uint32_t num_hor_grids; /** Number of data points per line 294 294 per color on shading table. */ 295 - uint32_t num_ver_grids; /**< Number of lines of data points 295 + uint32_t num_ver_grids; /** Number of lines of data points 296 296 per color on shading table. */ 297 - uint32_t bqs_per_grid_cell; /**< Grid cell size 297 + uint32_t bqs_per_grid_cell; /** Grid cell size 298 298 in BQ(Bayer Quad) unit. 299 299 (1BQ means {Gr,R,B,Gb}(2x2 pixels).) 300 300 Valid values are 8,16,32,64. */ 301 301 #else 302 - uint32_t num_hor_grids; /**< Number of data points per line per color on shading table. */ 303 - uint32_t num_ver_grids; /**< Number of lines of data points per color on shading table. */ 304 - uint32_t bqs_per_grid_cell; /**< Grid cell size in BQ unit. 302 + uint32_t num_hor_grids; /** Number of data points per line per color on shading table. */ 303 + uint32_t num_ver_grids; /** Number of lines of data points per color on shading table. */ 304 + uint32_t bqs_per_grid_cell; /** Grid cell size in BQ unit. 305 305 NOTE: bqs = size in BQ(Bayer Quad) unit. 306 306 1BQ means {Gr,R,B,Gb} (2x2 pixels). 307 307 Horizontal 1 bqs corresponds to horizontal 2 pixels. ··· 310 310 uint32_t bayer_scale_hor_ratio_in; 311 311 uint32_t bayer_scale_hor_ratio_out; 312 312 #ifndef ISP2401 313 - /**< Horizontal ratio of bayer scaling 313 + /** Horizontal ratio of bayer scaling 314 314 between input width and output width, for the scaling 315 315 which should be done before shading correction. 316 316 output_width = input_width * bayer_scale_hor_ratio_out 317 317 / bayer_scale_hor_ratio_in */ 318 318 #else 319 - /**< Horizontal ratio of bayer scaling between input width and output width, 319 + /** Horizontal ratio of bayer scaling between input width and output width, 320 320 for the scaling which should be done before shading correction. 321 321 output_width = input_width * bayer_scale_hor_ratio_out 322 322 / bayer_scale_hor_ratio_in + 0.5 */ ··· 324 324 uint32_t bayer_scale_ver_ratio_in; 325 325 uint32_t bayer_scale_ver_ratio_out; 326 326 #ifndef ISP2401 327 - /**< Vertical ratio of bayer scaling 327 + /** Vertical ratio of bayer scaling 328 328 between input height and output height, for the scaling 329 329 which should be done before shading correction. 330 330 output_height = input_height * bayer_scale_ver_ratio_out 331 331 / bayer_scale_ver_ratio_in */ 332 332 uint32_t sc_bayer_origin_x_bqs_on_shading_table; 333 - /**< X coordinate (in bqs) of bayer origin on shading table. 333 + /** X coordinate (in bqs) of bayer origin on shading table. 334 334 This indicates the left-most pixel of bayer 335 335 (not include margin) inputted to the shading correction. 336 336 This corresponds to the left-most pixel of bayer 337 337 inputted to isp from sensor. */ 338 338 uint32_t sc_bayer_origin_y_bqs_on_shading_table; 339 - /**< Y coordinate (in bqs) of bayer origin on shading table. 339 + /** Y coordinate (in bqs) of bayer origin on shading table. 340 340 This indicates the top pixel of bayer 341 341 (not include margin) inputted to the shading correction. 342 342 This corresponds to the top pixel of bayer 343 343 inputted to isp from sensor. */ 344 344 #else 345 - /**< Vertical ratio of bayer scaling between input height and output height, 345 + /** Vertical ratio of bayer scaling between input height and output height, 346 346 for the scaling which should be done before shading correction. 347 347 output_height = input_height * bayer_scale_ver_ratio_out 348 348 / bayer_scale_ver_ratio_in + 0.5 */ 349 349 struct ia_css_resolution isp_input_sensor_data_res_bqs; 350 - /**< Sensor data size (in bqs) inputted to ISP. This is the size BEFORE bayer scaling. 350 + /** Sensor data size (in bqs) inputted to ISP. This is the size BEFORE bayer scaling. 351 351 NOTE: This is NOT the size of the physical sensor size. 352 352 CSS requests the driver that ISP inputs sensor data 353 353 by the size of isp_input_sensor_data_res_bqs. ··· 357 357 ISP assumes the area of isp_input_sensor_data_res_bqs 358 358 is centered on the physical sensor. */ 359 359 struct ia_css_resolution sensor_data_res_bqs; 360 - /**< Sensor data size (in bqs) at shading correction. 360 + /** Sensor data size (in bqs) at shading correction. 361 361 This is the size AFTER bayer scaling. */ 362 362 struct ia_css_coordinate sensor_data_origin_bqs_on_sctbl; 363 - /**< Origin of sensor data area positioned on shading table at shading correction. 363 + /** Origin of sensor data area positioned on shading table at shading correction. 364 364 The coordinate x,y should be positive values. */ 365 365 #endif 366 366 } type_1; 367 367 368 - /**< More structures can be added here when more shading correction types will be added 368 + /** More structures can be added here when more shading correction types will be added 369 369 in the future. */ 370 370 } info; 371 371 }; 372 372 373 373 #ifndef ISP2401 374 374 375 - /** Default Shading Correction information of Shading Correction Type 1. */ 375 + /* Default Shading Correction information of Shading Correction Type 1. */ 376 376 #define DEFAULT_SHADING_INFO_TYPE_1 \ 377 377 { \ 378 378 IA_CSS_SHADING_CORRECTION_TYPE_1, /* type */ \ ··· 394 394 395 395 #else 396 396 397 - /** Default Shading Correction information of Shading Correction Type 1. */ 397 + /* Default Shading Correction information of Shading Correction Type 1. */ 398 398 #define DEFAULT_SHADING_INFO_TYPE_1 \ 399 399 { \ 400 400 IA_CSS_SHADING_CORRECTION_TYPE_1, /* type */ \ ··· 416 416 417 417 #endif 418 418 419 - /** Default Shading Correction information. */ 419 + /* Default Shading Correction information. */ 420 420 #define DEFAULT_SHADING_INFO DEFAULT_SHADING_INFO_TYPE_1 421 421 422 - /** structure that describes the 3A and DIS grids */ 422 + /* structure that describes the 3A and DIS grids */ 423 423 struct ia_css_grid_info { 424 - /** \name ISP input size 424 + /* \name ISP input size 425 425 * that is visible for user 426 426 * @{ 427 427 */ 428 428 uint32_t isp_in_width; 429 429 uint32_t isp_in_height; 430 - /** @}*/ 430 + /* @}*/ 431 431 432 - struct ia_css_3a_grid_info s3a_grid; /**< 3A grid info */ 432 + struct ia_css_3a_grid_info s3a_grid; /** 3A grid info */ 433 433 union ia_css_dvs_grid_u dvs_grid; 434 - /**< All types of DVS statistics grid info union */ 434 + /** All types of DVS statistics grid info union */ 435 435 436 436 enum ia_css_vamem_type vamem_type; 437 437 }; 438 438 439 - /** defaults for ia_css_grid_info structs */ 439 + /* defaults for ia_css_grid_info structs */ 440 440 #define DEFAULT_GRID_INFO \ 441 441 { \ 442 442 0, /* isp_in_width */ \ ··· 446 446 IA_CSS_VAMEM_TYPE_1 /* vamem_type */ \ 447 447 } 448 448 449 - /** Morphing table, used for geometric distortion and chromatic abberration 449 + /* Morphing table, used for geometric distortion and chromatic abberration 450 450 * correction (GDCAC, also called GDC). 451 451 * This table describes the imperfections introduced by the lens, the 452 452 * advanced ISP can correct for these imperfections using this table. 453 453 */ 454 454 struct ia_css_morph_table { 455 - uint32_t enable; /**< To disable GDC, set this field to false. The 455 + uint32_t enable; /** To disable GDC, set this field to false. The 456 456 coordinates fields can be set to NULL in this case. */ 457 - uint32_t height; /**< Table height */ 458 - uint32_t width; /**< Table width */ 457 + uint32_t height; /** Table height */ 458 + uint32_t width; /** Table width */ 459 459 uint16_t *coordinates_x[IA_CSS_MORPH_TABLE_NUM_PLANES]; 460 - /**< X coordinates that describe the sensor imperfection */ 460 + /** X coordinates that describe the sensor imperfection */ 461 461 uint16_t *coordinates_y[IA_CSS_MORPH_TABLE_NUM_PLANES]; 462 - /**< Y coordinates that describe the sensor imperfection */ 462 + /** Y coordinates that describe the sensor imperfection */ 463 463 }; 464 464 465 465 struct ia_css_dvs_6axis_config { 466 466 unsigned int exp_id; 467 - /**< Exposure ID, see ia_css_event_public.h for more detail */ 467 + /** Exposure ID, see ia_css_event_public.h for more detail */ 468 468 uint32_t width_y; 469 469 uint32_t height_y; 470 470 uint32_t width_uv; ··· 479 479 * This specifies the coordinates (x,y) 480 480 */ 481 481 struct ia_css_point { 482 - int32_t x; /**< x coordinate */ 483 - int32_t y; /**< y coordinate */ 482 + int32_t x; /** x coordinate */ 483 + int32_t y; /** y coordinate */ 484 484 }; 485 485 486 486 /** 487 487 * This specifies the region 488 488 */ 489 489 struct ia_css_region { 490 - struct ia_css_point origin; /**< Starting point coordinates for the region */ 491 - struct ia_css_resolution resolution; /**< Region resolution */ 490 + struct ia_css_point origin; /** Starting point coordinates for the region */ 491 + struct ia_css_resolution resolution; /** Region resolution */ 492 492 }; 493 493 494 494 /** ··· 509 509 * y + height <= effective input height 510 510 */ 511 511 struct ia_css_dz_config { 512 - uint32_t dx; /**< Horizontal zoom factor */ 513 - uint32_t dy; /**< Vertical zoom factor */ 514 - struct ia_css_region zoom_region; /**< region for zoom */ 512 + uint32_t dx; /** Horizontal zoom factor */ 513 + uint32_t dy; /** Vertical zoom factor */ 514 + struct ia_css_region zoom_region; /** region for zoom */ 515 515 }; 516 516 517 - /** The still capture mode, this can be RAW (simply copy sensor input to DDR), 517 + /* The still capture mode, this can be RAW (simply copy sensor input to DDR), 518 518 * Primary ISP, the Advanced ISP (GDC) or the low-light ISP (ANR). 519 519 */ 520 520 enum ia_css_capture_mode { 521 - IA_CSS_CAPTURE_MODE_RAW, /**< no processing, copy data only */ 522 - IA_CSS_CAPTURE_MODE_BAYER, /**< bayer processing, up to demosaic */ 523 - IA_CSS_CAPTURE_MODE_PRIMARY, /**< primary ISP */ 524 - IA_CSS_CAPTURE_MODE_ADVANCED, /**< advanced ISP (GDC) */ 525 - IA_CSS_CAPTURE_MODE_LOW_LIGHT /**< low light ISP (ANR) */ 521 + IA_CSS_CAPTURE_MODE_RAW, /** no processing, copy data only */ 522 + IA_CSS_CAPTURE_MODE_BAYER, /** bayer processing, up to demosaic */ 523 + IA_CSS_CAPTURE_MODE_PRIMARY, /** primary ISP */ 524 + IA_CSS_CAPTURE_MODE_ADVANCED, /** advanced ISP (GDC) */ 525 + IA_CSS_CAPTURE_MODE_LOW_LIGHT /** low light ISP (ANR) */ 526 526 }; 527 527 528 528 struct ia_css_capture_config { 529 - enum ia_css_capture_mode mode; /**< Still capture mode */ 530 - uint32_t enable_xnr; /**< Enable/disable XNR */ 529 + enum ia_css_capture_mode mode; /** Still capture mode */ 530 + uint32_t enable_xnr; /** Enable/disable XNR */ 531 531 uint32_t enable_raw_output; 532 - bool enable_capture_pp_bli; /**< Enable capture_pp_bli mode */ 532 + bool enable_capture_pp_bli; /** Enable capture_pp_bli mode */ 533 533 }; 534 534 535 - /** default settings for ia_css_capture_config structs */ 535 + /* default settings for ia_css_capture_config structs */ 536 536 #define DEFAULT_CAPTURE_CONFIG \ 537 537 { \ 538 538 IA_CSS_CAPTURE_MODE_PRIMARY, /* mode (capture) */ \ ··· 542 542 } 543 543 544 544 545 - /** ISP filter configuration. This is a collection of configurations 545 + /* ISP filter configuration. This is a collection of configurations 546 546 * for each of the ISP filters (modules). 547 547 * 548 548 * NOTE! The contents of all pointers is copied when get or set with the ··· 557 557 * ["ISP block", 2only] : ISP block is used only for ISP2. 558 558 */ 559 559 struct ia_css_isp_config { 560 - struct ia_css_wb_config *wb_config; /**< White Balance 560 + struct ia_css_wb_config *wb_config; /** White Balance 561 561 [WB1, 1&2] */ 562 - struct ia_css_cc_config *cc_config; /**< Color Correction 562 + struct ia_css_cc_config *cc_config; /** Color Correction 563 563 [CSC1, 1only] */ 564 - struct ia_css_tnr_config *tnr_config; /**< Temporal Noise Reduction 564 + struct ia_css_tnr_config *tnr_config; /** Temporal Noise Reduction 565 565 [TNR1, 1&2] */ 566 - struct ia_css_ecd_config *ecd_config; /**< Eigen Color Demosaicing 566 + struct ia_css_ecd_config *ecd_config; /** Eigen Color Demosaicing 567 567 [DE2, 2only] */ 568 - struct ia_css_ynr_config *ynr_config; /**< Y(Luma) Noise Reduction 568 + struct ia_css_ynr_config *ynr_config; /** Y(Luma) Noise Reduction 569 569 [YNR2&YEE2, 2only] */ 570 - struct ia_css_fc_config *fc_config; /**< Fringe Control 570 + struct ia_css_fc_config *fc_config; /** Fringe Control 571 571 [FC2, 2only] */ 572 - struct ia_css_formats_config *formats_config; /**< Formats Control for main output 572 + struct ia_css_formats_config *formats_config; /** Formats Control for main output 573 573 [FORMATS, 1&2] */ 574 - struct ia_css_cnr_config *cnr_config; /**< Chroma Noise Reduction 574 + struct ia_css_cnr_config *cnr_config; /** Chroma Noise Reduction 575 575 [CNR2, 2only] */ 576 - struct ia_css_macc_config *macc_config; /**< MACC 576 + struct ia_css_macc_config *macc_config; /** MACC 577 577 [MACC2, 2only] */ 578 - struct ia_css_ctc_config *ctc_config; /**< Chroma Tone Control 578 + struct ia_css_ctc_config *ctc_config; /** Chroma Tone Control 579 579 [CTC2, 2only] */ 580 - struct ia_css_aa_config *aa_config; /**< YUV Anti-Aliasing 580 + struct ia_css_aa_config *aa_config; /** YUV Anti-Aliasing 581 581 [AA2, 2only] 582 582 (not used currently) */ 583 - struct ia_css_aa_config *baa_config; /**< Bayer Anti-Aliasing 583 + struct ia_css_aa_config *baa_config; /** Bayer Anti-Aliasing 584 584 [BAA2, 1&2] */ 585 - struct ia_css_ce_config *ce_config; /**< Chroma Enhancement 585 + struct ia_css_ce_config *ce_config; /** Chroma Enhancement 586 586 [CE1, 1only] */ 587 587 struct ia_css_dvs_6axis_config *dvs_6axis_config; 588 - struct ia_css_ob_config *ob_config; /**< Objective Black 588 + struct ia_css_ob_config *ob_config; /** Objective Black 589 589 [OB1, 1&2] */ 590 - struct ia_css_dp_config *dp_config; /**< Defect Pixel Correction 590 + struct ia_css_dp_config *dp_config; /** Defect Pixel Correction 591 591 [DPC1/DPC2, 1&2] */ 592 - struct ia_css_nr_config *nr_config; /**< Noise Reduction 592 + struct ia_css_nr_config *nr_config; /** Noise Reduction 593 593 [BNR1&YNR1&CNR1, 1&2]*/ 594 - struct ia_css_ee_config *ee_config; /**< Edge Enhancement 594 + struct ia_css_ee_config *ee_config; /** Edge Enhancement 595 595 [YEE1, 1&2] */ 596 - struct ia_css_de_config *de_config; /**< Demosaic 596 + struct ia_css_de_config *de_config; /** Demosaic 597 597 [DE1, 1only] */ 598 - struct ia_css_gc_config *gc_config; /**< Gamma Correction (for YUV) 598 + struct ia_css_gc_config *gc_config; /** Gamma Correction (for YUV) 599 599 [GC1, 1only] */ 600 - struct ia_css_anr_config *anr_config; /**< Advanced Noise Reduction */ 601 - struct ia_css_3a_config *s3a_config; /**< 3A Statistics config */ 602 - struct ia_css_xnr_config *xnr_config; /**< eXtra Noise Reduction */ 603 - struct ia_css_dz_config *dz_config; /**< Digital Zoom */ 604 - struct ia_css_cc_config *yuv2rgb_cc_config; /**< Color Correction 600 + struct ia_css_anr_config *anr_config; /** Advanced Noise Reduction */ 601 + struct ia_css_3a_config *s3a_config; /** 3A Statistics config */ 602 + struct ia_css_xnr_config *xnr_config; /** eXtra Noise Reduction */ 603 + struct ia_css_dz_config *dz_config; /** Digital Zoom */ 604 + struct ia_css_cc_config *yuv2rgb_cc_config; /** Color Correction 605 605 [CCM2, 2only] */ 606 - struct ia_css_cc_config *rgb2yuv_cc_config; /**< Color Correction 606 + struct ia_css_cc_config *rgb2yuv_cc_config; /** Color Correction 607 607 [CSC2, 2only] */ 608 - struct ia_css_macc_table *macc_table; /**< MACC 608 + struct ia_css_macc_table *macc_table; /** MACC 609 609 [MACC1/MACC2, 1&2]*/ 610 - struct ia_css_gamma_table *gamma_table; /**< Gamma Correction (for YUV) 610 + struct ia_css_gamma_table *gamma_table; /** Gamma Correction (for YUV) 611 611 [GC1, 1only] */ 612 - struct ia_css_ctc_table *ctc_table; /**< Chroma Tone Control 612 + struct ia_css_ctc_table *ctc_table; /** Chroma Tone Control 613 613 [CTC1, 1only] */ 614 614 615 - /** \deprecated */ 616 - struct ia_css_xnr_table *xnr_table; /**< eXtra Noise Reduction 615 + /* \deprecated */ 616 + struct ia_css_xnr_table *xnr_table; /** eXtra Noise Reduction 617 617 [XNR1, 1&2] */ 618 - struct ia_css_rgb_gamma_table *r_gamma_table;/**< sRGB Gamma Correction 618 + struct ia_css_rgb_gamma_table *r_gamma_table;/** sRGB Gamma Correction 619 619 [GC2, 2only] */ 620 - struct ia_css_rgb_gamma_table *g_gamma_table;/**< sRGB Gamma Correction 620 + struct ia_css_rgb_gamma_table *g_gamma_table;/** sRGB Gamma Correction 621 621 [GC2, 2only] */ 622 - struct ia_css_rgb_gamma_table *b_gamma_table;/**< sRGB Gamma Correction 622 + struct ia_css_rgb_gamma_table *b_gamma_table;/** sRGB Gamma Correction 623 623 [GC2, 2only] */ 624 - struct ia_css_vector *motion_vector; /**< For 2-axis DVS */ 624 + struct ia_css_vector *motion_vector; /** For 2-axis DVS */ 625 625 struct ia_css_shading_table *shading_table; 626 626 struct ia_css_morph_table *morph_table; 627 - struct ia_css_dvs_coefficients *dvs_coefs; /**< DVS 1.0 coefficients */ 628 - struct ia_css_dvs2_coefficients *dvs2_coefs; /**< DVS 2.0 coefficients */ 627 + struct ia_css_dvs_coefficients *dvs_coefs; /** DVS 1.0 coefficients */ 628 + struct ia_css_dvs2_coefficients *dvs2_coefs; /** DVS 2.0 coefficients */ 629 629 struct ia_css_capture_config *capture_config; 630 630 struct ia_css_anr_thres *anr_thres; 631 - /** @deprecated{Old shading settings, see bugzilla bz675 for details} */ 631 + /* @deprecated{Old shading settings, see bugzilla bz675 for details} */ 632 632 struct ia_css_shading_settings *shading_settings; 633 - struct ia_css_xnr3_config *xnr3_config; /**< eXtreme Noise Reduction v3 */ 634 - /** comment from Lasse: Be aware how this feature will affect coordinate 633 + struct ia_css_xnr3_config *xnr3_config; /** eXtreme Noise Reduction v3 */ 634 + /* comment from Lasse: Be aware how this feature will affect coordinate 635 635 * normalization in different parts of the system. (e.g. face detection, 636 636 * touch focus, 3A statistics and windows of interest, shading correction, 637 637 * DVS, GDC) from IQ tool level and application level down-to ISP FW level. 638 638 * the risk for regression is not in the individual blocks, but how they 639 639 * integrate together. */ 640 - struct ia_css_output_config *output_config; /**< Main Output Mirroring, flipping */ 640 + struct ia_css_output_config *output_config; /** Main Output Mirroring, flipping */ 641 641 642 642 #ifdef ISP2401 643 - struct ia_css_tnr3_kernel_config *tnr3_config; /**< TNR3 config */ 643 + struct ia_css_tnr3_kernel_config *tnr3_config; /** TNR3 config */ 644 644 #endif 645 - struct ia_css_scaler_config *scaler_config; /**< Skylake: scaler config (optional) */ 646 - struct ia_css_formats_config *formats_config_display;/**< Formats control for viewfinder/display output (optional) 645 + struct ia_css_scaler_config *scaler_config; /** Skylake: scaler config (optional) */ 646 + struct ia_css_formats_config *formats_config_display;/** Formats control for viewfinder/display output (optional) 647 647 [OSYS, n/a] */ 648 - struct ia_css_output_config *output_config_display; /**< Viewfinder/display output mirroring, flipping (optional) */ 648 + struct ia_css_output_config *output_config_display; /** Viewfinder/display output mirroring, flipping (optional) */ 649 649 650 - struct ia_css_frame *output_frame; /**< Output frame the config is to be applied to (optional) */ 651 - uint32_t isp_config_id; /**< Unique ID to track which config was actually applied to a particular frame */ 650 + struct ia_css_frame *output_frame; /** Output frame the config is to be applied to (optional) */ 651 + uint32_t isp_config_id; /** Unique ID to track which config was actually applied to a particular frame */ 652 652 }; 653 653 654 654 #endif /* _IA_CSS_TYPES_H */
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drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_version.h
··· 15 15 #ifndef __IA_CSS_VERSION_H 16 16 #define __IA_CSS_VERSION_H 17 17 18 - /** @file 18 + /* @file 19 19 * This file contains functions to retrieve CSS-API version information 20 20 */ 21 21 22 22 #include <ia_css_err.h> 23 23 24 - /** a common size for the version arrays */ 24 + /* a common size for the version arrays */ 25 25 #define MAX_VERSION_SIZE 500 26 26 27 - /** @brief Retrieves the current CSS version 27 + /* @brief Retrieves the current CSS version 28 28 * @param[out] version A pointer to a buffer where to put the generated 29 29 * version string. NULL is ignored. 30 30 * @param[in] max_size Size of the version buffer. If version string
+3 -3
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2_types.h
··· 15 15 #ifndef __IA_CSS_AA2_TYPES_H 16 16 #define __IA_CSS_AA2_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for Anti-Aliasing parameters. 20 20 */ 21 21 22 22 23 - /** Anti-Aliasing configuration. 23 + /* Anti-Aliasing configuration. 24 24 * 25 25 * This structure is used both for YUV AA and Bayer AA. 26 26 * ··· 39 39 * ISP2: BAA2 is used. 40 40 */ 41 41 struct ia_css_aa_config { 42 - uint16_t strength; /**< Strength of the filter. 42 + uint16_t strength; /** Strength of the filter. 43 43 u0.13, [0,8191], 44 44 default/ineffective 0 */ 45 45 };
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drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr_types.h
··· 15 15 #ifndef __IA_CSS_ANR_TYPES_H 16 16 #define __IA_CSS_ANR_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for Advanced Noise Reduction kernel v1 20 20 */ 21 21 ··· 23 23 #define ANR_BPP 10 24 24 #define ANR_ELEMENT_BITS ((CEIL_DIV(ANR_BPP, 8))*8) 25 25 26 - /** Advanced Noise Reduction configuration. 26 + /* Advanced Noise Reduction configuration. 27 27 * This is also known as Low-Light. 28 28 */ 29 29 struct ia_css_anr_config { 30 - int32_t threshold; /**< Threshold */ 30 + int32_t threshold; /** Threshold */ 31 31 int32_t thresholds[4*4*4]; 32 32 int32_t factors[3]; 33 33 };
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drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_types.h
··· 15 15 #ifndef __IA_CSS_ANR2_TYPES_H 16 16 #define __IA_CSS_ANR2_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for Advanced Noise Reduction kernel v2 20 20 */ 21 21 ··· 23 23 24 24 #define ANR_PARAM_SIZE 13 25 25 26 - /** Advanced Noise Reduction (ANR) thresholds */ 26 + /* Advanced Noise Reduction (ANR) thresholds */ 27 27 struct ia_css_anr_thres { 28 28 int16_t data[13*64]; 29 29 };
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr_param.h
··· 18 18 #include "vmem.h" 19 19 #include "ia_css_anr2_types.h" 20 20 21 - /** Advanced Noise Reduction (ANR) thresholds */ 21 + /* Advanced Noise Reduction (ANR) thresholds */ 22 22 23 23 struct ia_css_isp_anr2_params { 24 24 VMEM_ARRAY(data, ANR_PARAM_SIZE*ISP_VEC_NELEMS);
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drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bayer_ls/bayer_ls_1.0/ia_css_bayer_ls_param.h
··· 27 27 #define BAYER_QUAD_HEIGHT 2 28 28 #define NOF_BAYER_VECTORS 4 29 29 30 - /** bayer load/store */ 30 + /* bayer load/store */ 31 31 struct sh_css_isp_bayer_ls_isp_config { 32 32 uint32_t base_address[NUM_BAYER_LS]; 33 33 uint32_t width[NUM_BAYER_LS];
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drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh_types.h
··· 15 15 #ifndef __IA_CSS_BH_TYPES_H 16 16 #define __IA_CSS_BH_TYPES_H 17 17 18 - /** Number of elements in the BH table. 18 + /* Number of elements in the BH table. 19 19 * Should be consistent with hmem.h 20 20 */ 21 21 #define IA_CSS_HMEM_BH_TABLE_SIZE ISP_HIST_DEPTH ··· 27 27 #define BH_COLOR_Y (3) 28 28 #define BH_COLOR_NUM (4) 29 29 30 - /** BH table */ 30 + /* BH table */ 31 31 struct ia_css_bh_table { 32 32 uint32_t hmem[ISP_HIST_COMPONENTS][IA_CSS_HMEM_BH_UNIT_SIZE]; 33 33 };
+18 -18
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm_types.h
··· 15 15 #ifndef __IA_CSS_BNLM_TYPES_H 16 16 #define __IA_CSS_BNLM_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for Bayer Non-Linear Mean parameters. 20 20 */ 21 21 22 22 #include "type_support.h" /* int32_t */ 23 23 24 - /** Bayer Non-Linear Mean configuration 24 + /* Bayer Non-Linear Mean configuration 25 25 * 26 26 * \brief BNLM public parameters. 27 27 * \details Struct with all parameters for the BNLM kernel that can be set ··· 30 30 * ISP2.6.1: BNLM is used. 31 31 */ 32 32 struct ia_css_bnlm_config { 33 - bool rad_enable; /**< Enable a radial dependency in a weight calculation */ 34 - int32_t rad_x_origin; /**< Initial x coordinate for a radius calculation */ 35 - int32_t rad_y_origin; /**< Initial x coordinate for a radius calculation */ 33 + bool rad_enable; /** Enable a radial dependency in a weight calculation */ 34 + int32_t rad_x_origin; /** Initial x coordinate for a radius calculation */ 35 + int32_t rad_y_origin; /** Initial x coordinate for a radius calculation */ 36 36 /* a threshold for average of weights if this < Th, do not denoise pixel */ 37 37 int32_t avg_min_th; 38 38 /* minimum weight for denoising if max < th, do not denoise pixel */ 39 39 int32_t max_min_th; 40 40 41 41 /**@{*/ 42 - /** Coefficient for approximation, in the form of (1 + x / N)^N, 42 + /* Coefficient for approximation, in the form of (1 + x / N)^N, 43 43 * that fits the first-order exp() to default exp_lut in BNLM sheet 44 44 * */ 45 45 int32_t exp_coeff_a; ··· 48 48 uint32_t exp_exponent; 49 49 /**@}*/ 50 50 51 - int32_t nl_th[3]; /**< Detail thresholds */ 51 + int32_t nl_th[3]; /** Detail thresholds */ 52 52 53 - /** Index for n-th maximum candidate weight for each detail group */ 53 + /* Index for n-th maximum candidate weight for each detail group */ 54 54 int32_t match_quality_max_idx[4]; 55 55 56 56 /**@{*/ 57 - /** A lookup table for 1/sqrt(1+mu) approximation */ 57 + /* A lookup table for 1/sqrt(1+mu) approximation */ 58 58 int32_t mu_root_lut_thr[15]; 59 59 int32_t mu_root_lut_val[16]; 60 60 /**@}*/ 61 61 /**@{*/ 62 - /** A lookup table for SAD normalization */ 62 + /* A lookup table for SAD normalization */ 63 63 int32_t sad_norm_lut_thr[15]; 64 64 int32_t sad_norm_lut_val[16]; 65 65 /**@}*/ 66 66 /**@{*/ 67 - /** A lookup table that models a weight's dependency on textures */ 67 + /* A lookup table that models a weight's dependency on textures */ 68 68 int32_t sig_detail_lut_thr[15]; 69 69 int32_t sig_detail_lut_val[16]; 70 70 /**@}*/ 71 71 /**@{*/ 72 - /** A lookup table that models a weight's dependency on a pixel's radial distance */ 72 + /* A lookup table that models a weight's dependency on a pixel's radial distance */ 73 73 int32_t sig_rad_lut_thr[15]; 74 74 int32_t sig_rad_lut_val[16]; 75 75 /**@}*/ 76 76 /**@{*/ 77 - /** A lookup table to control denoise power depending on a pixel's radial distance */ 77 + /* A lookup table to control denoise power depending on a pixel's radial distance */ 78 78 int32_t rad_pow_lut_thr[15]; 79 79 int32_t rad_pow_lut_val[16]; 80 80 /**@}*/ 81 81 /**@{*/ 82 - /** Non linear transfer functions to calculate the blending coefficient depending on detail group */ 83 - /** detail group 0 */ 82 + /* Non linear transfer functions to calculate the blending coefficient depending on detail group */ 83 + /* detail group 0 */ 84 84 /**@{*/ 85 85 int32_t nl_0_lut_thr[15]; 86 86 int32_t nl_0_lut_val[16]; 87 87 /**@}*/ 88 88 /**@{*/ 89 - /** detail group 1 */ 89 + /* detail group 1 */ 90 90 int32_t nl_1_lut_thr[15]; 91 91 int32_t nl_1_lut_val[16]; 92 92 /**@}*/ 93 93 /**@{*/ 94 - /** detail group 2 */ 94 + /* detail group 2 */ 95 95 int32_t nl_2_lut_thr[15]; 96 96 int32_t nl_2_lut_val[16]; 97 97 /**@}*/ 98 98 /**@{*/ 99 - /** detail group 3 */ 99 + /* detail group 3 */ 100 100 int32_t nl_3_lut_thr[15]; 101 101 int32_t nl_3_lut_val[16]; 102 102 /**@}*/
+17 -17
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2_types.h
··· 15 15 #ifndef __IA_CSS_BNR2_2_TYPES_H 16 16 #define __IA_CSS_BNR2_2_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for Bayer Noise Reduction parameters. 20 20 */ 21 21 22 22 #include "type_support.h" /* int32_t */ 23 23 24 - /** Bayer Noise Reduction 2.2 configuration 24 + /* Bayer Noise Reduction 2.2 configuration 25 25 * 26 26 * \brief BNR2_2 public parameters. 27 27 * \details Struct with all parameters for the BNR2.2 kernel that can be set ··· 31 31 */ 32 32 struct ia_css_bnr2_2_config { 33 33 /**@{*/ 34 - /** Directional variance gain for R/G/B components in dark region */ 34 + /* Directional variance gain for R/G/B components in dark region */ 35 35 int32_t d_var_gain_r; 36 36 int32_t d_var_gain_g; 37 37 int32_t d_var_gain_b; 38 38 /**@}*/ 39 39 /**@{*/ 40 - /** Slope of Directional variance gain between dark and bright region */ 40 + /* Slope of Directional variance gain between dark and bright region */ 41 41 int32_t d_var_gain_slope_r; 42 42 int32_t d_var_gain_slope_g; 43 43 int32_t d_var_gain_slope_b; 44 44 /**@}*/ 45 45 /**@{*/ 46 - /** Non-Directional variance gain for R/G/B components in dark region */ 46 + /* Non-Directional variance gain for R/G/B components in dark region */ 47 47 int32_t n_var_gain_r; 48 48 int32_t n_var_gain_g; 49 49 int32_t n_var_gain_b; 50 50 /**@}*/ 51 51 /**@{*/ 52 - /** Slope of Non-Directional variance gain between dark and bright region */ 52 + /* Slope of Non-Directional variance gain between dark and bright region */ 53 53 int32_t n_var_gain_slope_r; 54 54 int32_t n_var_gain_slope_g; 55 55 int32_t n_var_gain_slope_b; 56 56 /**@}*/ 57 57 58 - int32_t dir_thres; /**< Threshold for directional filtering */ 59 - int32_t dir_thres_w; /**< Threshold width for directional filtering */ 60 - int32_t var_offset_coef; /**< Variance offset coefficient */ 61 - int32_t dir_gain; /**< Gain for directional coefficient */ 62 - int32_t detail_gain; /**< Gain for low contrast texture control */ 63 - int32_t detail_gain_divisor; /**< Gain divisor for low contrast texture control */ 64 - int32_t detail_level_offset; /**< Bias value for low contrast texture control */ 65 - int32_t d_var_th_min; /**< Minimum clipping value for directional variance*/ 66 - int32_t d_var_th_max; /**< Maximum clipping value for diretional variance*/ 67 - int32_t n_var_th_min; /**< Minimum clipping value for non-directional variance*/ 68 - int32_t n_var_th_max; /**< Maximum clipping value for non-directional variance*/ 58 + int32_t dir_thres; /** Threshold for directional filtering */ 59 + int32_t dir_thres_w; /** Threshold width for directional filtering */ 60 + int32_t var_offset_coef; /** Variance offset coefficient */ 61 + int32_t dir_gain; /** Gain for directional coefficient */ 62 + int32_t detail_gain; /** Gain for low contrast texture control */ 63 + int32_t detail_gain_divisor; /** Gain divisor for low contrast texture control */ 64 + int32_t detail_level_offset; /** Bias value for low contrast texture control */ 65 + int32_t d_var_th_min; /** Minimum clipping value for directional variance*/ 66 + int32_t d_var_th_max; /** Maximum clipping value for diretional variance*/ 67 + int32_t n_var_th_min; /** Minimum clipping value for non-directional variance*/ 68 + int32_t n_var_th_max; /** Maximum clipping value for non-directional variance*/ 69 69 }; 70 70 71 71 #endif /* __IA_CSS_BNR2_2_TYPES_H */
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drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2_types.h
··· 15 15 #ifndef __IA_CSS_CNR2_TYPES_H 16 16 #define __IA_CSS_CNR2_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for Chroma Noise Reduction (CNR) parameters 20 20 */ 21 21 22 - /** Chroma Noise Reduction configuration. 22 + /* Chroma Noise Reduction configuration. 23 23 * 24 24 * Small sensitivity of edge means strong smoothness and NR performance. 25 25 * If you see blurred color on vertical edges, ··· 33 33 * ISP2: CNR2 is used for Still. 34 34 */ 35 35 struct ia_css_cnr_config { 36 - uint16_t coring_u; /**< Coring level of U. 36 + uint16_t coring_u; /** Coring level of U. 37 37 u0.13, [0,8191], default/ineffective 0 */ 38 - uint16_t coring_v; /**< Coring level of V. 38 + uint16_t coring_v; /** Coring level of V. 39 39 u0.13, [0,8191], default/ineffective 0 */ 40 - uint16_t sense_gain_vy; /**< Sensitivity of horizontal edge of Y. 40 + uint16_t sense_gain_vy; /** Sensitivity of horizontal edge of Y. 41 41 u13.0, [0,8191], default 100, ineffective 8191 */ 42 - uint16_t sense_gain_vu; /**< Sensitivity of horizontal edge of U. 42 + uint16_t sense_gain_vu; /** Sensitivity of horizontal edge of U. 43 43 u13.0, [0,8191], default 100, ineffective 8191 */ 44 - uint16_t sense_gain_vv; /**< Sensitivity of horizontal edge of V. 44 + uint16_t sense_gain_vv; /** Sensitivity of horizontal edge of V. 45 45 u13.0, [0,8191], default 100, ineffective 8191 */ 46 - uint16_t sense_gain_hy; /**< Sensitivity of vertical edge of Y. 46 + uint16_t sense_gain_hy; /** Sensitivity of vertical edge of Y. 47 47 u13.0, [0,8191], default 50, ineffective 8191 */ 48 - uint16_t sense_gain_hu; /**< Sensitivity of vertical edge of U. 48 + uint16_t sense_gain_hu; /** Sensitivity of vertical edge of U. 49 49 u13.0, [0,8191], default 50, ineffective 8191 */ 50 - uint16_t sense_gain_hv; /**< Sensitivity of vertical edge of V. 50 + uint16_t sense_gain_hv; /** Sensitivity of vertical edge of V. 51 51 u13.0, [0,8191], default 50, ineffective 8191 */ 52 52 }; 53 53
+4 -4
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion_types.h
··· 23 23 * 24 24 */ 25 25 struct ia_css_conversion_config { 26 - uint32_t en; /**< en parameter */ 27 - uint32_t dummy0; /**< dummy0 dummy parameter 0 */ 28 - uint32_t dummy1; /**< dummy1 dummy parameter 1 */ 29 - uint32_t dummy2; /**< dummy2 dummy parameter 2 */ 26 + uint32_t en; /** en parameter */ 27 + uint32_t dummy0; /** dummy0 dummy parameter 0 */ 28 + uint32_t dummy1; /** dummy1 dummy parameter 1 */ 29 + uint32_t dummy2; /** dummy2 dummy parameter 2 */ 30 30 }; 31 31 32 32 #endif /* __IA_CSS_CONVERSION_TYPES_H */
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drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop_param.h
··· 19 19 #include "dma.h" 20 20 #include "sh_css_internal.h" /* sh_css_crop_pos */ 21 21 22 - /** Crop frame */ 22 + /* Crop frame */ 23 23 struct sh_css_isp_crop_isp_config { 24 24 uint32_t width_a_over_b; 25 25 struct dma_port_config port_b;
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drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop_types.h
··· 15 15 #ifndef __IA_CSS_CROP_TYPES_H 16 16 #define __IA_CSS_CROP_TYPES_H 17 17 18 - /** Crop frame 18 + /* Crop frame 19 19 * 20 20 * ISP block: crop frame 21 21 */
+4 -4
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc_types.h
··· 15 15 #ifndef __IA_CSS_CSC_TYPES_H 16 16 #define __IA_CSS_CSC_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for Color Space Conversion parameters. 20 20 */ 21 21 22 - /** Color Correction configuration. 22 + /* Color Correction configuration. 23 23 * 24 24 * This structure is used for 3 cases. 25 25 * ("YCgCo" is the output format of Demosaic.) ··· 68 68 * 4096 -3430 -666 69 69 */ 70 70 struct ia_css_cc_config { 71 - uint32_t fraction_bits;/**< Fractional bits of matrix. 71 + uint32_t fraction_bits;/** Fractional bits of matrix. 72 72 u8.0, [0,13] */ 73 - int32_t matrix[3 * 3]; /**< Conversion matrix. 73 + int32_t matrix[3 * 3]; /** Conversion matrix. 74 74 s[13-fraction_bits].[fraction_bits], 75 75 [-8192,8191] */ 76 76 };
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drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2_param.h
··· 22 22 23 23 /*VMEM Luma params*/ 24 24 struct ia_css_isp_ctc2_vmem_params { 25 - /**< Gains by Y(Luma) at Y = 0.0,Y_X1, Y_X2, Y_X3, Y_X4*/ 25 + /** Gains by Y(Luma) at Y = 0.0,Y_X1, Y_X2, Y_X3, Y_X4*/ 26 26 VMEM_ARRAY(y_x, ISP_VEC_NELEMS); 27 - /** kneepoints by Y(Luma) 0.0, y_x1, y_x2, y _x3, y_x4*/ 27 + /* kneepoints by Y(Luma) 0.0, y_x1, y_x2, y _x3, y_x4*/ 28 28 VMEM_ARRAY(y_y, ISP_VEC_NELEMS); 29 - /** Slopes of lines interconnecting 29 + /* Slopes of lines interconnecting 30 30 * 0.0 -> y_x1 -> y_x2 -> y _x3 -> y_x4 -> 1.0*/ 31 31 VMEM_ARRAY(e_y_slope, ISP_VEC_NELEMS); 32 32 }; ··· 34 34 /*DMEM Chroma params*/ 35 35 struct ia_css_isp_ctc2_dmem_params { 36 36 37 - /** Gains by UV(Chroma) under kneepoints uv_x0 and uv_x1*/ 37 + /* Gains by UV(Chroma) under kneepoints uv_x0 and uv_x1*/ 38 38 int32_t uv_y0; 39 39 int32_t uv_y1; 40 40 41 - /** Kneepoints by UV(Chroma)- uv_x0 and uv_x1*/ 41 + /* Kneepoints by UV(Chroma)- uv_x0 and uv_x1*/ 42 42 int32_t uv_x0; 43 43 int32_t uv_x1; 44 44 45 - /** Slope of line interconnecting uv_x0 -> uv_x1*/ 45 + /* Slope of line interconnecting uv_x0 -> uv_x1*/ 46 46 int32_t uv_dydx; 47 47 48 48 };
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drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2_types.h
··· 15 15 #ifndef __IA_CSS_CTC2_TYPES_H 16 16 #define __IA_CSS_CTC2_TYPES_H 17 17 18 - /** Chroma Tone Control configuration. 18 + /* Chroma Tone Control configuration. 19 19 * 20 20 * ISP block: CTC2 (CTC by polygonal approximation) 21 21 * (ISP1: CTC1 (CTC by look-up table) is used.) ··· 24 24 */ 25 25 struct ia_css_ctc2_config { 26 26 27 - /**< Gains by Y(Luma) at Y =0.0,Y_X1, Y_X2, Y_X3, Y_X4 and Y_X5 27 + /** Gains by Y(Luma) at Y =0.0,Y_X1, Y_X2, Y_X3, Y_X4 and Y_X5 28 28 * --default/ineffective value: 4096(0.5f) 29 29 */ 30 30 int32_t y_y0; ··· 33 33 int32_t y_y3; 34 34 int32_t y_y4; 35 35 int32_t y_y5; 36 - /** 1st-4th kneepoints by Y(Luma) --default/ineffective value:n/a 36 + /* 1st-4th kneepoints by Y(Luma) --default/ineffective value:n/a 37 37 * requirement: 0.0 < y_x1 < y_x2 <y _x3 < y_x4 < 1.0 38 38 */ 39 39 int32_t y_x1; 40 40 int32_t y_x2; 41 41 int32_t y_x3; 42 42 int32_t y_x4; 43 - /** Gains by UV(Chroma) under threholds uv_x0 and uv_x1 43 + /* Gains by UV(Chroma) under threholds uv_x0 and uv_x1 44 44 * --default/ineffective value: 4096(0.5f) 45 45 */ 46 46 int32_t uv_y0; 47 47 int32_t uv_y1; 48 - /** Minimum and Maximum Thresholds by UV(Chroma)- uv_x0 and uv_x1 48 + /* Minimum and Maximum Thresholds by UV(Chroma)- uv_x0 and uv_x1 49 49 * --default/ineffective value: n/a 50 50 */ 51 51 int32_t uv_x0;
+19 -19
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_types.h
··· 15 15 #ifndef __IA_CSS_CTC_TYPES_H 16 16 #define __IA_CSS_CTC_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for Chroma Tone Control parameters. 20 20 */ 21 21 22 - /** Fractional bits for CTC gain (used only for ISP1). 22 + /* Fractional bits for CTC gain (used only for ISP1). 23 23 * 24 24 * IA_CSS_CTC_COEF_SHIFT(=13) includes not only the fractional bits 25 25 * of gain(=8), but also the bits(=5) to convert chroma ··· 32 32 */ 33 33 #define IA_CSS_CTC_COEF_SHIFT 13 34 34 35 - /** Number of elements in the CTC table. */ 35 + /* Number of elements in the CTC table. */ 36 36 #define IA_CSS_VAMEM_1_CTC_TABLE_SIZE_LOG2 10 37 - /** Number of elements in the CTC table. */ 37 + /* Number of elements in the CTC table. */ 38 38 #define IA_CSS_VAMEM_1_CTC_TABLE_SIZE (1U<<IA_CSS_VAMEM_1_CTC_TABLE_SIZE_LOG2) 39 39 40 - /** Number of elements in the CTC table. */ 40 + /* Number of elements in the CTC table. */ 41 41 #define IA_CSS_VAMEM_2_CTC_TABLE_SIZE_LOG2 8 42 - /** Number of elements in the CTC table. */ 42 + /* Number of elements in the CTC table. */ 43 43 #define IA_CSS_VAMEM_2_CTC_TABLE_SIZE ((1U<<IA_CSS_VAMEM_2_CTC_TABLE_SIZE_LOG2) + 1) 44 44 45 45 enum ia_css_vamem_type { ··· 47 47 IA_CSS_VAMEM_TYPE_2 48 48 }; 49 49 50 - /** Chroma Tone Control configuration. 50 + /* Chroma Tone Control configuration. 51 51 * 52 52 * ISP block: CTC2 (CTC by polygonal line approximation) 53 53 * (ISP1: CTC1 (CTC by look-up table) is used.) 54 54 * ISP2: CTC2 is used. 55 55 */ 56 56 struct ia_css_ctc_config { 57 - uint16_t y0; /**< 1st kneepoint gain. 57 + uint16_t y0; /** 1st kneepoint gain. 58 58 u[ce_gain_exp].[13-ce_gain_exp], [0,8191], 59 59 default/ineffective 4096(0.5) */ 60 - uint16_t y1; /**< 2nd kneepoint gain. 60 + uint16_t y1; /** 2nd kneepoint gain. 61 61 u[ce_gain_exp].[13-ce_gain_exp], [0,8191], 62 62 default/ineffective 4096(0.5) */ 63 - uint16_t y2; /**< 3rd kneepoint gain. 63 + uint16_t y2; /** 3rd kneepoint gain. 64 64 u[ce_gain_exp].[13-ce_gain_exp], [0,8191], 65 65 default/ineffective 4096(0.5) */ 66 - uint16_t y3; /**< 4th kneepoint gain. 66 + uint16_t y3; /** 4th kneepoint gain. 67 67 u[ce_gain_exp].[13-ce_gain_exp], [0,8191], 68 68 default/ineffective 4096(0.5) */ 69 - uint16_t y4; /**< 5th kneepoint gain. 69 + uint16_t y4; /** 5th kneepoint gain. 70 70 u[ce_gain_exp].[13-ce_gain_exp], [0,8191], 71 71 default/ineffective 4096(0.5) */ 72 - uint16_t y5; /**< 6th kneepoint gain. 72 + uint16_t y5; /** 6th kneepoint gain. 73 73 u[ce_gain_exp].[13-ce_gain_exp], [0,8191], 74 74 default/ineffective 4096(0.5) */ 75 - uint16_t ce_gain_exp; /**< Common exponent of y-axis gain. 75 + uint16_t ce_gain_exp; /** Common exponent of y-axis gain. 76 76 u8.0, [0,13], 77 77 default/ineffective 1 */ 78 - uint16_t x1; /**< 2nd kneepoint luma. 78 + uint16_t x1; /** 2nd kneepoint luma. 79 79 u0.13, [0,8191], constraints: 0<x1<x2, 80 80 default/ineffective 1024 */ 81 - uint16_t x2; /**< 3rd kneepoint luma. 81 + uint16_t x2; /** 3rd kneepoint luma. 82 82 u0.13, [0,8191], constraints: x1<x2<x3, 83 83 default/ineffective 2048 */ 84 - uint16_t x3; /**< 4th kneepoint luma. 84 + uint16_t x3; /** 4th kneepoint luma. 85 85 u0.13, [0,8191], constraints: x2<x3<x4, 86 86 default/ineffective 6144 */ 87 - uint16_t x4; /**< 5tn kneepoint luma. 87 + uint16_t x4; /** 5tn kneepoint luma. 88 88 u0.13, [0,8191], constraints: x3<x4<8191, 89 89 default/ineffective 7168 */ 90 90 }; ··· 94 94 uint16_t vamem_2[IA_CSS_VAMEM_2_CTC_TABLE_SIZE]; 95 95 }; 96 96 97 - /** CTC table, used for Chroma Tone Control. 97 + /* CTC table, used for Chroma Tone Control. 98 98 * 99 99 * ISP block: CTC1 (CTC by look-up table) 100 100 * ISP1: CTC1 is used.
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drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_types.h
··· 15 15 #ifndef __IA_CSS_DE_TYPES_H 16 16 #define __IA_CSS_DE_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for Demosaic (bayer-to-YCgCo) parameters. 20 20 */ 21 21 22 - /** Demosaic (bayer-to-YCgCo) configuration. 22 + /* Demosaic (bayer-to-YCgCo) configuration. 23 23 * 24 24 * ISP block: DE1 25 25 * ISP1: DE1 is used. 26 26 * (ISP2: DE2 is used.) 27 27 */ 28 28 struct ia_css_de_config { 29 - ia_css_u0_16 pixelnoise; /**< Pixel noise used in moire elimination. 29 + ia_css_u0_16 pixelnoise; /** Pixel noise used in moire elimination. 30 30 u0.16, [0,65535], 31 31 default 0, ineffective 0 */ 32 - ia_css_u0_16 c1_coring_threshold; /**< Coring threshold for C1. 32 + ia_css_u0_16 c1_coring_threshold; /** Coring threshold for C1. 33 33 This is the same as nr_config.threshold_cb. 34 34 u0.16, [0,65535], 35 35 default 128(0.001953125), ineffective 0 */ 36 - ia_css_u0_16 c2_coring_threshold; /**< Coring threshold for C2. 36 + ia_css_u0_16 c2_coring_threshold; /** Coring threshold for C2. 37 37 This is the same as nr_config.threshold_cr. 38 38 u0.16, [0,65535], 39 39 default 128(0.001953125), ineffective 0 */
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drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2_types.h
··· 15 15 #ifndef __IA_CSS_DE2_TYPES_H 16 16 #define __IA_CSS_DE2_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for Demosaicing parameters. 20 20 */ 21 21 22 - /** Eigen Color Demosaicing configuration. 22 + /* Eigen Color Demosaicing configuration. 23 23 * 24 24 * ISP block: DE2 25 25 * (ISP1: DE1 is used.) 26 26 * ISP2: DE2 is used. 27 27 */ 28 28 struct ia_css_ecd_config { 29 - uint16_t zip_strength; /**< Strength of zipper reduction. 29 + uint16_t zip_strength; /** Strength of zipper reduction. 30 30 u0.13, [0,8191], 31 31 default 5489(0.67), ineffective 0 */ 32 - uint16_t fc_strength; /**< Strength of false color reduction. 32 + uint16_t fc_strength; /** Strength of false color reduction. 33 33 u0.13, [0,8191], 34 34 default 8191(almost 1.0), ineffective 0 */ 35 - uint16_t fc_debias; /**< Prevent color change 35 + uint16_t fc_debias; /** Prevent color change 36 36 on noise or Gr/Gb imbalance. 37 37 u0.13, [0,8191], 38 38 default 0, ineffective 0 */
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drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp_types.h
··· 15 15 #ifndef __IA_CSS_DP_TYPES_H 16 16 #define __IA_CSS_DP_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for Defect Pixel Correction (DPC) parameters. 20 20 */ 21 21 22 22 23 - /** Defect Pixel Correction configuration. 23 + /* Defect Pixel Correction configuration. 24 24 * 25 25 * ISP block: DPC1 (DPC after WB) 26 26 * DPC2 (DPC before WB) ··· 28 28 * ISP2: DPC2 is used. 29 29 */ 30 30 struct ia_css_dp_config { 31 - ia_css_u0_16 threshold; /**< The threshold of defect pixel correction, 31 + ia_css_u0_16 threshold; /** The threshold of defect pixel correction, 32 32 representing the permissible difference of 33 33 intensity between one pixel and its 34 34 surrounding pixels. Smaller values result 35 35 in more frequent pixel corrections. 36 36 u0.16, [0,65535], 37 37 default 8192, ineffective 65535 */ 38 - ia_css_u8_8 gain; /**< The sensitivity of mis-correction. ISP will 38 + ia_css_u8_8 gain; /** The sensitivity of mis-correction. ISP will 39 39 miss a lot of defects if the value is set 40 40 too large. 41 41 u8.8, [0,65535],
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drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2_types.h
··· 15 15 #ifndef __IA_CSS_DPC2_TYPES_H 16 16 #define __IA_CSS_DPC2_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for Defect Pixel Correction 2 (DPC2) parameters. 20 20 */ 21 21 22 22 #include "type_support.h" 23 23 24 24 /**@{*/ 25 - /** Floating point constants for different metrics. */ 25 + /* Floating point constants for different metrics. */ 26 26 #define METRIC1_ONE_FP (1<<12) 27 27 #define METRIC2_ONE_FP (1<<5) 28 28 #define METRIC3_ONE_FP (1<<12) ··· 30 30 /**@}*/ 31 31 32 32 /**@{*/ 33 - /** Defect Pixel Correction 2 configuration. 33 + /* Defect Pixel Correction 2 configuration. 34 34 * 35 35 * \brief DPC2 public parameters. 36 36 * \details Struct with all parameters for the Defect Pixel Correction 2
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drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs_param.h
··· 30 30 #ifdef ISP2401 31 31 32 32 #endif 33 - /** dvserence frame */ 33 + /* dvserence frame */ 34 34 struct sh_css_isp_dvs_isp_config { 35 35 uint32_t num_horizontal_blocks; 36 36 uint32_t num_vertical_blocks;
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drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs_types.h
··· 15 15 #ifndef __IA_CSS_DVS_TYPES_H 16 16 #define __IA_CSS_DVS_TYPES_H 17 17 18 - /** DVS frame 18 + /* DVS frame 19 19 * 20 20 * ISP block: dvs frame 21 21 */
+34 -34
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8_types.h
··· 15 15 #ifndef __IA_CSS_EED1_8_TYPES_H 16 16 #define __IA_CSS_EED1_8_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for Edge Enhanced Demosaic parameters. 20 20 */ 21 21 ··· 36 36 */ 37 37 #define IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS 9 38 38 39 - /** Edge Enhanced Demosaic configuration 39 + /* Edge Enhanced Demosaic configuration 40 40 * 41 41 * ISP2.6.1: EED1_8 is used. 42 42 */ 43 43 44 44 struct ia_css_eed1_8_config { 45 - int32_t rbzp_strength; /**< Strength of zipper reduction. */ 45 + int32_t rbzp_strength; /** Strength of zipper reduction. */ 46 46 47 - int32_t fcstrength; /**< Strength of false color reduction. */ 48 - int32_t fcthres_0; /**< Threshold to prevent chroma coring due to noise or green disparity in dark region. */ 49 - int32_t fcthres_1; /**< Threshold to prevent chroma coring due to noise or green disparity in bright region. */ 50 - int32_t fc_sat_coef; /**< How much color saturation to maintain in high color saturation region. */ 51 - int32_t fc_coring_prm; /**< Chroma coring coefficient for tint color suppression. */ 47 + int32_t fcstrength; /** Strength of false color reduction. */ 48 + int32_t fcthres_0; /** Threshold to prevent chroma coring due to noise or green disparity in dark region. */ 49 + int32_t fcthres_1; /** Threshold to prevent chroma coring due to noise or green disparity in bright region. */ 50 + int32_t fc_sat_coef; /** How much color saturation to maintain in high color saturation region. */ 51 + int32_t fc_coring_prm; /** Chroma coring coefficient for tint color suppression. */ 52 52 53 - int32_t aerel_thres0; /**< Threshold for Non-Directional Reliability at dark region. */ 54 - int32_t aerel_gain0; /**< Gain for Non-Directional Reliability at dark region. */ 55 - int32_t aerel_thres1; /**< Threshold for Non-Directional Reliability at bright region. */ 56 - int32_t aerel_gain1; /**< Gain for Non-Directional Reliability at bright region. */ 53 + int32_t aerel_thres0; /** Threshold for Non-Directional Reliability at dark region. */ 54 + int32_t aerel_gain0; /** Gain for Non-Directional Reliability at dark region. */ 55 + int32_t aerel_thres1; /** Threshold for Non-Directional Reliability at bright region. */ 56 + int32_t aerel_gain1; /** Gain for Non-Directional Reliability at bright region. */ 57 57 58 - int32_t derel_thres0; /**< Threshold for Directional Reliability at dark region. */ 59 - int32_t derel_gain0; /**< Gain for Directional Reliability at dark region. */ 60 - int32_t derel_thres1; /**< Threshold for Directional Reliability at bright region. */ 61 - int32_t derel_gain1; /**< Gain for Directional Reliability at bright region. */ 58 + int32_t derel_thres0; /** Threshold for Directional Reliability at dark region. */ 59 + int32_t derel_gain0; /** Gain for Directional Reliability at dark region. */ 60 + int32_t derel_thres1; /** Threshold for Directional Reliability at bright region. */ 61 + int32_t derel_gain1; /** Gain for Directional Reliability at bright region. */ 62 62 63 - int32_t coring_pos0; /**< Positive Edge Coring Threshold in dark region. */ 64 - int32_t coring_pos1; /**< Positive Edge Coring Threshold in bright region. */ 65 - int32_t coring_neg0; /**< Negative Edge Coring Threshold in dark region. */ 66 - int32_t coring_neg1; /**< Negative Edge Coring Threshold in bright region. */ 63 + int32_t coring_pos0; /** Positive Edge Coring Threshold in dark region. */ 64 + int32_t coring_pos1; /** Positive Edge Coring Threshold in bright region. */ 65 + int32_t coring_neg0; /** Negative Edge Coring Threshold in dark region. */ 66 + int32_t coring_neg1; /** Negative Edge Coring Threshold in bright region. */ 67 67 68 - int32_t gain_exp; /**< Common Exponent of Gain. */ 69 - int32_t gain_pos0; /**< Gain for Positive Edge in dark region. */ 70 - int32_t gain_pos1; /**< Gain for Positive Edge in bright region. */ 71 - int32_t gain_neg0; /**< Gain for Negative Edge in dark region. */ 72 - int32_t gain_neg1; /**< Gain for Negative Edge in bright region. */ 68 + int32_t gain_exp; /** Common Exponent of Gain. */ 69 + int32_t gain_pos0; /** Gain for Positive Edge in dark region. */ 70 + int32_t gain_pos1; /** Gain for Positive Edge in bright region. */ 71 + int32_t gain_neg0; /** Gain for Negative Edge in dark region. */ 72 + int32_t gain_neg1; /** Gain for Negative Edge in bright region. */ 73 73 74 - int32_t pos_margin0; /**< Margin for Positive Edge in dark region. */ 75 - int32_t pos_margin1; /**< Margin for Positive Edge in bright region. */ 76 - int32_t neg_margin0; /**< Margin for Negative Edge in dark region. */ 77 - int32_t neg_margin1; /**< Margin for Negative Edge in bright region. */ 74 + int32_t pos_margin0; /** Margin for Positive Edge in dark region. */ 75 + int32_t pos_margin1; /** Margin for Positive Edge in bright region. */ 76 + int32_t neg_margin0; /** Margin for Negative Edge in dark region. */ 77 + int32_t neg_margin1; /** Margin for Negative Edge in bright region. */ 78 78 79 - int32_t dew_enhance_seg_x[IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS]; /**< Segment data for directional edge weight: X. */ 80 - int32_t dew_enhance_seg_y[IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS]; /**< Segment data for directional edge weight: Y. */ 81 - int32_t dew_enhance_seg_slope[(IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS - 1)]; /**< Segment data for directional edge weight: Slope. */ 82 - int32_t dew_enhance_seg_exp[(IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS - 1)]; /**< Segment data for directional edge weight: Exponent. */ 83 - int32_t dedgew_max; /**< Max Weight for Directional Edge. */ 79 + int32_t dew_enhance_seg_x[IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS]; /** Segment data for directional edge weight: X. */ 80 + int32_t dew_enhance_seg_y[IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS]; /** Segment data for directional edge weight: Y. */ 81 + int32_t dew_enhance_seg_slope[(IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS - 1)]; /** Segment data for directional edge weight: Slope. */ 82 + int32_t dew_enhance_seg_exp[(IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS - 1)]; /** Segment data for directional edge weight: Exponent. */ 83 + int32_t dedgew_max; /** Max Weight for Directional Edge. */ 84 84 }; 85 85 86 86 #endif /* __IA_CSS_EED1_8_TYPES_H */
+3 -3
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats_types.h
··· 15 15 #ifndef __IA_CSS_FORMATS_TYPES_H 16 16 #define __IA_CSS_FORMATS_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for output format parameters. 20 20 */ 21 21 22 22 #include "type_support.h" 23 23 24 - /** Formats configuration. 24 + /* Formats configuration. 25 25 * 26 26 * ISP block: FORMATS 27 27 * ISP1: FORMATS is used. 28 28 * ISP2: FORMATS is used. 29 29 */ 30 30 struct ia_css_formats_config { 31 - uint32_t video_full_range_flag; /**< selects the range of YUV output. 31 + uint32_t video_full_range_flag; /** selects the range of YUV output. 32 32 u8.0, [0,1], 33 33 default 1, ineffective n/a\n 34 34 1 - full range, luma 0-255, chroma 0-255\n
+7 -7
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn_types.h
··· 15 15 #ifndef __IA_CSS_FPN_TYPES_H 16 16 #define __IA_CSS_FPN_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for Fixed Pattern Noise parameters. 20 20 */ 21 21 22 - /** Fixed Pattern Noise table. 22 + /* Fixed Pattern Noise table. 23 23 * 24 24 * This contains the fixed patterns noise values 25 25 * obtained from a black frame capture. ··· 33 33 */ 34 34 35 35 struct ia_css_fpn_table { 36 - int16_t *data; /**< Table content (fixed patterns noise). 36 + int16_t *data; /** Table content (fixed patterns noise). 37 37 u0.[13-shift], [0,63] */ 38 - uint32_t width; /**< Table width (in pixels). 38 + uint32_t width; /** Table width (in pixels). 39 39 This is the input frame width. */ 40 - uint32_t height; /**< Table height (in pixels). 40 + uint32_t height; /** Table height (in pixels). 41 41 This is the input frame height. */ 42 - uint32_t shift; /**< Common exponent of table content. 42 + uint32_t shift; /** Common exponent of table content. 43 43 u8.0, [0,13] */ 44 - uint32_t enabled; /**< Fpn is enabled. 44 + uint32_t enabled; /** Fpn is enabled. 45 45 bool */ 46 46 }; 47 47
+16 -16
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc_types.h
··· 15 15 #ifndef __IA_CSS_GC_TYPES_H 16 16 #define __IA_CSS_GC_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for Gamma Correction parameters. 20 20 */ 21 21 22 22 #include "isp/kernels/ctc/ctc_1.0/ia_css_ctc_types.h" /* FIXME: Needed for ia_css_vamem_type */ 23 23 24 - /** Fractional bits for GAMMA gain */ 24 + /* Fractional bits for GAMMA gain */ 25 25 #define IA_CSS_GAMMA_GAIN_K_SHIFT 13 26 26 27 - /** Number of elements in the gamma table. */ 27 + /* Number of elements in the gamma table. */ 28 28 #define IA_CSS_VAMEM_1_GAMMA_TABLE_SIZE_LOG2 10 29 29 #define IA_CSS_VAMEM_1_GAMMA_TABLE_SIZE (1U<<IA_CSS_VAMEM_1_GAMMA_TABLE_SIZE_LOG2) 30 30 31 - /** Number of elements in the gamma table. */ 31 + /* Number of elements in the gamma table. */ 32 32 #define IA_CSS_VAMEM_2_GAMMA_TABLE_SIZE_LOG2 8 33 33 #define IA_CSS_VAMEM_2_GAMMA_TABLE_SIZE ((1U<<IA_CSS_VAMEM_2_GAMMA_TABLE_SIZE_LOG2) + 1) 34 34 35 - /** Gamma table, used for Y(Luma) Gamma Correction. 35 + /* Gamma table, used for Y(Luma) Gamma Correction. 36 36 * 37 37 * ISP block: GC1 (YUV Gamma Correction) 38 38 * ISP1: GC1 is used. 39 39 * (ISP2: GC2(sRGB Gamma Correction) is used.) 40 40 */ 41 - /**< IA_CSS_VAMEM_TYPE_1(ISP2300) or 41 + /** IA_CSS_VAMEM_TYPE_1(ISP2300) or 42 42 IA_CSS_VAMEM_TYPE_2(ISP2400) */ 43 43 union ia_css_gc_data { 44 44 uint16_t vamem_1[IA_CSS_VAMEM_1_GAMMA_TABLE_SIZE]; 45 - /**< Y(Luma) Gamma table on vamem type 1. u0.8, [0,255] */ 45 + /** Y(Luma) Gamma table on vamem type 1. u0.8, [0,255] */ 46 46 uint16_t vamem_2[IA_CSS_VAMEM_2_GAMMA_TABLE_SIZE]; 47 - /**< Y(Luma) Gamma table on vamem type 2. u0.8, [0,255] */ 47 + /** Y(Luma) Gamma table on vamem type 2. u0.8, [0,255] */ 48 48 }; 49 49 50 50 struct ia_css_gamma_table { ··· 52 52 union ia_css_gc_data data; 53 53 }; 54 54 55 - /** Gamma Correction configuration (used only for YUV Gamma Correction). 55 + /* Gamma Correction configuration (used only for YUV Gamma Correction). 56 56 * 57 57 * ISP block: GC1 (YUV Gamma Correction) 58 58 * ISP1: GC1 is used. 59 59 * (ISP2: GC2 (sRGB Gamma Correction) is used.) 60 60 */ 61 61 struct ia_css_gc_config { 62 - uint16_t gain_k1; /**< Gain to adjust U after YUV Gamma Correction. 62 + uint16_t gain_k1; /** Gain to adjust U after YUV Gamma Correction. 63 63 u0.16, [0,65535], 64 64 default/ineffective 19000(0.29) */ 65 - uint16_t gain_k2; /**< Gain to adjust V after YUV Gamma Correction. 65 + uint16_t gain_k2; /** Gain to adjust V after YUV Gamma Correction. 66 66 u0.16, [0,65535], 67 67 default/ineffective 19000(0.29) */ 68 68 }; 69 69 70 - /** Chroma Enhancement configuration. 70 + /* Chroma Enhancement configuration. 71 71 * 72 72 * This parameter specifies range of chroma output level. 73 73 * The standard range is [0,255] or [16,240]. ··· 77 77 * (ISP2: CE1 is not used.) 78 78 */ 79 79 struct ia_css_ce_config { 80 - uint8_t uv_level_min; /**< Minimum of chroma output level. 80 + uint8_t uv_level_min; /** Minimum of chroma output level. 81 81 u0.8, [0,255], default/ineffective 0 */ 82 - uint8_t uv_level_max; /**< Maximum of chroma output level. 82 + uint8_t uv_level_max; /** Maximum of chroma output level. 83 83 u0.8, [0,255], default/ineffective 255 */ 84 84 }; 85 85 86 - /** Multi-Axes Color Correction (MACC) configuration. 86 + /* Multi-Axes Color Correction (MACC) configuration. 87 87 * 88 88 * ISP block: MACC2 (MACC by matrix and exponent(ia_css_macc_config)) 89 89 * (ISP1: MACC1 (MACC by only matrix) is used.) 90 90 * ISP2: MACC2 is used. 91 91 */ 92 92 struct ia_css_macc_config { 93 - uint8_t exp; /**< Common exponent of ia_css_macc_table. 93 + uint8_t exp; /** Common exponent of ia_css_macc_table. 94 94 u8.0, [0,13], default 1, ineffective 1 */ 95 95 }; 96 96
+7 -7
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_types.h
··· 17 17 18 18 #include "isp/kernels/ctc/ctc_1.0/ia_css_ctc_types.h" /* FIXME: needed for ia_css_vamem_type */ 19 19 20 - /** @file 20 + /* @file 21 21 * CSS-API header file for Gamma Correction parameters. 22 22 */ 23 23 24 - /** sRGB Gamma table, used for sRGB Gamma Correction. 24 + /* sRGB Gamma table, used for sRGB Gamma Correction. 25 25 * 26 26 * ISP block: GC2 (sRGB Gamma Correction) 27 27 * (ISP1: GC1(YUV Gamma Correction) is used.) 28 28 * ISP2: GC2 is used. 29 29 */ 30 30 31 - /** Number of elements in the sRGB gamma table. */ 31 + /* Number of elements in the sRGB gamma table. */ 32 32 #define IA_CSS_VAMEM_1_RGB_GAMMA_TABLE_SIZE_LOG2 8 33 33 #define IA_CSS_VAMEM_1_RGB_GAMMA_TABLE_SIZE (1U<<IA_CSS_VAMEM_1_RGB_GAMMA_TABLE_SIZE_LOG2) 34 34 35 - /** Number of elements in the sRGB gamma table. */ 35 + /* Number of elements in the sRGB gamma table. */ 36 36 #define IA_CSS_VAMEM_2_RGB_GAMMA_TABLE_SIZE_LOG2 8 37 37 #define IA_CSS_VAMEM_2_RGB_GAMMA_TABLE_SIZE ((1U<<IA_CSS_VAMEM_2_RGB_GAMMA_TABLE_SIZE_LOG2) + 1) 38 38 39 - /**< IA_CSS_VAMEM_TYPE_1(ISP2300) or 39 + /** IA_CSS_VAMEM_TYPE_1(ISP2300) or 40 40 IA_CSS_VAMEM_TYPE_2(ISP2400) */ 41 41 union ia_css_rgb_gamma_data { 42 42 uint16_t vamem_1[IA_CSS_VAMEM_1_RGB_GAMMA_TABLE_SIZE]; 43 - /**< RGB Gamma table on vamem type1. This table is not used, 43 + /** RGB Gamma table on vamem type1. This table is not used, 44 44 because sRGB Gamma Correction is not implemented for ISP2300. */ 45 45 uint16_t vamem_2[IA_CSS_VAMEM_2_RGB_GAMMA_TABLE_SIZE]; 46 - /**< RGB Gamma table on vamem type2. u0.12, [0,4095] */ 46 + /** RGB Gamma table on vamem type2. u0.12, [0,4095] */ 47 47 }; 48 48 49 49 struct ia_css_rgb_gamma_table {
+13 -13
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr_types.h
··· 24 24 * \detail Currently HDR paramters are used only for testing purposes 25 25 */ 26 26 struct ia_css_hdr_irradiance_params { 27 - int test_irr; /**< Test parameter */ 28 - int match_shift[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - 1]; /**< Histogram matching shift parameter */ 29 - int match_mul[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - 1]; /**< Histogram matching multiplication parameter */ 30 - int thr_low[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - 1]; /**< Weight map soft threshold low bound parameter */ 31 - int thr_high[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - 1]; /**< Weight map soft threshold high bound parameter */ 32 - int thr_coeff[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - 1]; /**< Soft threshold linear function coefficien */ 33 - int thr_shift[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - 1]; /**< Soft threshold precision shift parameter */ 34 - int weight_bpp; /**< Weight map bits per pixel */ 27 + int test_irr; /** Test parameter */ 28 + int match_shift[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - 1]; /** Histogram matching shift parameter */ 29 + int match_mul[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - 1]; /** Histogram matching multiplication parameter */ 30 + int thr_low[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - 1]; /** Weight map soft threshold low bound parameter */ 31 + int thr_high[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - 1]; /** Weight map soft threshold high bound parameter */ 32 + int thr_coeff[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - 1]; /** Soft threshold linear function coefficien */ 33 + int thr_shift[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - 1]; /** Soft threshold precision shift parameter */ 34 + int weight_bpp; /** Weight map bits per pixel */ 35 35 }; 36 36 37 37 /** ··· 39 39 * \detail Currently HDR paramters are used only for testing purposes 40 40 */ 41 41 struct ia_css_hdr_deghost_params { 42 - int test_deg; /**< Test parameter */ 42 + int test_deg; /** Test parameter */ 43 43 }; 44 44 45 45 /** ··· 47 47 * \detail Currently HDR paramters are used only for testing purposes 48 48 */ 49 49 struct ia_css_hdr_exclusion_params { 50 - int test_excl; /**< Test parameter */ 50 + int test_excl; /** Test parameter */ 51 51 }; 52 52 53 53 /** ··· 56 56 * the CSS API. Currenly, only test paramters are defined. 57 57 */ 58 58 struct ia_css_hdr_config { 59 - struct ia_css_hdr_irradiance_params irradiance; /**< HDR irradiance paramaters */ 60 - struct ia_css_hdr_deghost_params deghost; /**< HDR deghosting parameters */ 61 - struct ia_css_hdr_exclusion_params exclusion; /**< HDR exclusion parameters */ 59 + struct ia_css_hdr_irradiance_params irradiance; /** HDR irradiance paramaters */ 60 + struct ia_css_hdr_deghost_params deghost; /** HDR deghosting parameters */ 61 + struct ia_css_hdr_exclusion_params exclusion; /** HDR exclusion parameters */ 62 62 }; 63 63 64 64 #endif /* __IA_CSS_HDR_TYPES_H */
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.c
··· 1 1 #ifdef ISP2401 2 - /** 2 + /* 3 3 Support for Intel Camera Imaging ISP subsystem. 4 4 Copyright (c) 2010 - 2015, Intel Corporation. 5 5
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.c
··· 1 1 #ifdef ISP2401 2 - /** 2 + /* 3 3 Support for Intel Camera Imaging ISP subsystem. 4 4 Copyright (c) 2010 - 2015, Intel Corporation. 5 5
+8 -8
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_types.h
··· 15 15 #ifndef __IA_CSS_MACC1_5_TYPES_H 16 16 #define __IA_CSS_MACC1_5_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for Multi-Axis Color Conversion algorithm parameters. 20 20 */ 21 21 22 - /** Multi-Axis Color Conversion configuration 22 + /* Multi-Axis Color Conversion configuration 23 23 * 24 24 * ISP2.6.1: MACC1_5 is used. 25 25 */ 26 26 27 27 28 - /** Number of axes in the MACC table. */ 28 + /* Number of axes in the MACC table. */ 29 29 #define IA_CSS_MACC_NUM_AXES 16 30 - /** Number of coefficients per MACC axes. */ 30 + /* Number of coefficients per MACC axes. */ 31 31 #define IA_CSS_MACC_NUM_COEFS 4 32 32 33 - /** Multi-Axes Color Correction (MACC) table. 33 + /* Multi-Axes Color Correction (MACC) table. 34 34 * 35 35 * ISP block: MACC (MACC by only matrix) 36 36 * MACC1_5 (MACC by matrix and exponent(ia_css_macc_config)) ··· 55 55 */ 56 56 struct ia_css_macc1_5_table { 57 57 int16_t data[IA_CSS_MACC_NUM_COEFS * IA_CSS_MACC_NUM_AXES]; 58 - /**< 16 of 2x2 matix 58 + /** 16 of 2x2 matix 59 59 MACC1_5: s[macc_config.exp].[13-macc_config.exp], [-8192,8191] 60 60 default/ineffective: (s1.12) 61 61 16 of "identity 2x2 matix" {4096,0,0,4096} */ 62 62 }; 63 63 64 - /** Multi-Axes Color Correction (MACC) configuration. 64 + /* Multi-Axes Color Correction (MACC) configuration. 65 65 * 66 66 * ISP block: MACC1_5 (MACC by matrix and exponent(ia_css_macc_config)) 67 67 * ISP2: MACC1_5 is used. 68 68 */ 69 69 struct ia_css_macc1_5_config { 70 - uint8_t exp; /**< Common exponent of ia_css_macc_table. 70 + uint8_t exp; /** Common exponent of ia_css_macc_table. 71 71 u8.0, [0,13], default 1, ineffective 1 */ 72 72 }; 73 73
+6 -6
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_types.h
··· 15 15 #ifndef __IA_CSS_MACC_TYPES_H 16 16 #define __IA_CSS_MACC_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for Multi-Axis Color Correction (MACC) parameters. 20 20 */ 21 21 22 - /** Number of axes in the MACC table. */ 22 + /* Number of axes in the MACC table. */ 23 23 #define IA_CSS_MACC_NUM_AXES 16 24 - /** Number of coefficients per MACC axes. */ 24 + /* Number of coefficients per MACC axes. */ 25 25 #define IA_CSS_MACC_NUM_COEFS 4 26 - /** The number of planes in the morphing table. */ 26 + /* The number of planes in the morphing table. */ 27 27 28 - /** Multi-Axis Color Correction (MACC) table. 28 + /* Multi-Axis Color Correction (MACC) table. 29 29 * 30 30 * ISP block: MACC1 (MACC by only matrix) 31 31 * MACC2 (MACC by matrix and exponent(ia_css_macc_config)) ··· 51 51 52 52 struct ia_css_macc_table { 53 53 int16_t data[IA_CSS_MACC_NUM_COEFS * IA_CSS_MACC_NUM_AXES]; 54 - /**< 16 of 2x2 matix 54 + /** 16 of 2x2 matix 55 55 MACC1: s2.13, [-65536,65535] 56 56 default/ineffective: 57 57 16 of "identity 2x2 matix" {8192,0,0,8192}
+6 -6
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2_types.h
··· 15 15 #ifndef __IA_CSS_OB2_TYPES_H 16 16 #define __IA_CSS_OB2_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for Optical Black algorithm parameters. 20 20 */ 21 21 22 - /** Optical Black configuration 22 + /* Optical Black configuration 23 23 * 24 24 * ISP2.6.1: OB2 is used. 25 25 */ ··· 27 27 #include "ia_css_frac.h" 28 28 29 29 struct ia_css_ob2_config { 30 - ia_css_u0_16 level_gr; /**< Black level for GR pixels. 30 + ia_css_u0_16 level_gr; /** Black level for GR pixels. 31 31 u0.16, [0,65535], 32 32 default/ineffective 0 */ 33 - ia_css_u0_16 level_r; /**< Black level for R pixels. 33 + ia_css_u0_16 level_r; /** Black level for R pixels. 34 34 u0.16, [0,65535], 35 35 default/ineffective 0 */ 36 - ia_css_u0_16 level_b; /**< Black level for B pixels. 36 + ia_css_u0_16 level_b; /** Black level for B pixels. 37 37 u0.16, [0,65535], 38 38 default/ineffective 0 */ 39 - ia_css_u0_16 level_gb; /**< Black level for GB pixels. 39 + ia_css_u0_16 level_gb; /** Black level for GB pixels. 40 40 u0.16, [0,65535], 41 41 default/ineffective 0 */ 42 42 };
+13 -13
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob_types.h
··· 15 15 #ifndef __IA_CSS_OB_TYPES_H 16 16 #define __IA_CSS_OB_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for Optical Black level parameters. 20 20 */ 21 21 22 22 #include "ia_css_frac.h" 23 23 24 - /** Optical black mode. 24 + /* Optical black mode. 25 25 */ 26 26 enum ia_css_ob_mode { 27 - IA_CSS_OB_MODE_NONE, /**< OB has no effect. */ 28 - IA_CSS_OB_MODE_FIXED, /**< Fixed OB */ 29 - IA_CSS_OB_MODE_RASTER /**< Raster OB */ 27 + IA_CSS_OB_MODE_NONE, /** OB has no effect. */ 28 + IA_CSS_OB_MODE_FIXED, /** Fixed OB */ 29 + IA_CSS_OB_MODE_RASTER /** Raster OB */ 30 30 }; 31 31 32 - /** Optical Black level configuration. 32 + /* Optical Black level configuration. 33 33 * 34 34 * ISP block: OB1 35 35 * ISP1: OB1 is used. 36 36 * ISP2: OB1 is used. 37 37 */ 38 38 struct ia_css_ob_config { 39 - enum ia_css_ob_mode mode; /**< Mode (None / Fixed / Raster). 39 + enum ia_css_ob_mode mode; /** Mode (None / Fixed / Raster). 40 40 enum, [0,2], 41 41 default 1, ineffective 0 */ 42 - ia_css_u0_16 level_gr; /**< Black level for GR pixels 42 + ia_css_u0_16 level_gr; /** Black level for GR pixels 43 43 (used for Fixed Mode only). 44 44 u0.16, [0,65535], 45 45 default/ineffective 0 */ 46 - ia_css_u0_16 level_r; /**< Black level for R pixels 46 + ia_css_u0_16 level_r; /** Black level for R pixels 47 47 (used for Fixed Mode only). 48 48 u0.16, [0,65535], 49 49 default/ineffective 0 */ 50 - ia_css_u0_16 level_b; /**< Black level for B pixels 50 + ia_css_u0_16 level_b; /** Black level for B pixels 51 51 (used for Fixed Mode only). 52 52 u0.16, [0,65535], 53 53 default/ineffective 0 */ 54 - ia_css_u0_16 level_gb; /**< Black level for GB pixels 54 + ia_css_u0_16 level_gb; /** Black level for GB pixels 55 55 (used for Fixed Mode only). 56 56 u0.16, [0,65535], 57 57 default/ineffective 0 */ 58 - uint16_t start_position; /**< Start position of OB area 58 + uint16_t start_position; /** Start position of OB area 59 59 (used for Raster Mode only). 60 60 u16.0, [0,63], 61 61 default/ineffective 0 */ 62 - uint16_t end_position; /**< End position of OB area 62 + uint16_t end_position; /** End position of OB area 63 63 (used for Raster Mode only). 64 64 u16.0, [0,63], 65 65 default/ineffective 0 */
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output_param.h
··· 19 19 #include "dma.h" 20 20 #include "ia_css_frame_comm.h" /* ia_css_frame_sp_info */ 21 21 22 - /** output frame */ 22 + /* output frame */ 23 23 struct sh_css_isp_output_isp_config { 24 24 uint32_t width_a_over_b; 25 25 uint32_t height;
+4 -4
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output_types.h
··· 15 15 #ifndef __IA_CSS_OUTPUT_TYPES_H 16 16 #define __IA_CSS_OUTPUT_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for parameters of output frames. 20 20 */ 21 21 22 - /** Output frame 22 + /* Output frame 23 23 * 24 24 * ISP block: output frame 25 25 */ ··· 40 40 }; 41 41 42 42 struct ia_css_output_config { 43 - uint8_t enable_hflip; /**< enable horizontal output mirroring */ 44 - uint8_t enable_vflip; /**< enable vertical output mirroring */ 43 + uint8_t enable_hflip; /** enable horizontal output mirroring */ 44 + uint8_t enable_vflip; /** enable vertical output mirroring */ 45 45 }; 46 46 47 47 #endif /* __IA_CSS_OUTPUT_TYPES_H */
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane_types.h
··· 18 18 #include <ia_css_frame_public.h> 19 19 #include "sh_css_internal.h" 20 20 21 - /** qplane frame 21 + /* qplane frame 22 22 * 23 23 * ISP block: qplane frame 24 24 */
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw_types.h
··· 18 18 #include <ia_css_frame_public.h> 19 19 #include "sh_css_internal.h" 20 20 21 - /** Raw frame 21 + /* Raw frame 22 22 * 23 23 * ISP block: Raw frame 24 24 */
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_param.h
··· 19 19 #include "sh_css_defs.h" 20 20 #include "dma.h" 21 21 22 - /** Reference frame */ 22 + /* Reference frame */ 23 23 struct ia_css_ref_configuration { 24 24 const struct ia_css_frame *ref_frames[MAX_NUM_VIDEO_DELAY_FRAMES]; 25 25 uint32_t dvs_frame_delay;
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_types.h
··· 15 15 #ifndef __IA_CSS_REF_TYPES_H 16 16 #define __IA_CSS_REF_TYPES_H 17 17 18 - /** Reference frame 18 + /* Reference frame 19 19 * 20 20 * ISP block: reference frame 21 21 */
+49 -49
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a_types.h
··· 15 15 #ifndef __IA_CSS_S3A_TYPES_H 16 16 #define __IA_CSS_S3A_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for 3A statistics parameters. 20 20 */ 21 21 ··· 25 25 #include "../../../../components/stats_3a/src/stats_3a_public.h" 26 26 #endif 27 27 28 - /** 3A configuration. This configures the 3A statistics collection 28 + /* 3A configuration. This configures the 3A statistics collection 29 29 * module. 30 30 */ 31 31 32 - /** 3A statistics grid 32 + /* 3A statistics grid 33 33 * 34 34 * ISP block: S3A1 (3A Support for 3A ver.1 (Histogram is not used for AE)) 35 35 * S3A2 (3A Support for 3A ver.2 (Histogram is used for AE)) ··· 39 39 struct ia_css_3a_grid_info { 40 40 41 41 #if defined(SYSTEM_css_skycam_c0_system) 42 - uint32_t ae_enable; /**< ae enabled in binary, 42 + uint32_t ae_enable; /** ae enabled in binary, 43 43 0:disabled, 1:enabled */ 44 - struct ae_public_config_grid_config ae_grd_info; /**< see description in ae_public.h*/ 44 + struct ae_public_config_grid_config ae_grd_info; /** see description in ae_public.h*/ 45 45 46 - uint32_t awb_enable; /**< awb enabled in binary, 46 + uint32_t awb_enable; /** awb enabled in binary, 47 47 0:disabled, 1:enabled */ 48 - struct awb_public_config_grid_config awb_grd_info; /**< see description in awb_public.h*/ 48 + struct awb_public_config_grid_config awb_grd_info; /** see description in awb_public.h*/ 49 49 50 - uint32_t af_enable; /**< af enabled in binary, 50 + uint32_t af_enable; /** af enabled in binary, 51 51 0:disabled, 1:enabled */ 52 - struct af_public_grid_config af_grd_info; /**< see description in af_public.h*/ 52 + struct af_public_grid_config af_grd_info; /** see description in af_public.h*/ 53 53 54 - uint32_t awb_fr_enable; /**< awb_fr enabled in binary, 54 + uint32_t awb_fr_enable; /** awb_fr enabled in binary, 55 55 0:disabled, 1:enabled */ 56 - struct awb_fr_public_grid_config awb_fr_grd_info;/**< see description in awb_fr_public.h*/ 56 + struct awb_fr_public_grid_config awb_fr_grd_info;/** see description in awb_fr_public.h*/ 57 57 58 - uint32_t elem_bit_depth; /**< TODO:Taken from BYT - need input from AIQ 58 + uint32_t elem_bit_depth; /** TODO:Taken from BYT - need input from AIQ 59 59 if needed for SKC 60 60 Bit depth of element used 61 61 to calculate 3A statistics. ··· 63 63 bayer bit depth in DSP. */ 64 64 65 65 #else 66 - uint32_t enable; /**< 3A statistics enabled. 66 + uint32_t enable; /** 3A statistics enabled. 67 67 0:disabled, 1:enabled */ 68 - uint32_t use_dmem; /**< DMEM or VMEM determines layout. 68 + uint32_t use_dmem; /** DMEM or VMEM determines layout. 69 69 0:3A statistics are stored to VMEM, 70 70 1:3A statistics are stored to DMEM */ 71 - uint32_t has_histogram; /**< Statistics include histogram. 71 + uint32_t has_histogram; /** Statistics include histogram. 72 72 0:no histogram, 1:has histogram */ 73 - uint32_t width; /**< Width of 3A grid table. 73 + uint32_t width; /** Width of 3A grid table. 74 74 (= Horizontal number of grid cells 75 75 in table, which cells have effective 76 76 statistics.) */ 77 - uint32_t height; /**< Height of 3A grid table. 77 + uint32_t height; /** Height of 3A grid table. 78 78 (= Vertical number of grid cells 79 79 in table, which cells have effective 80 80 statistics.) */ 81 - uint32_t aligned_width; /**< Horizontal stride (for alloc). 81 + uint32_t aligned_width; /** Horizontal stride (for alloc). 82 82 (= Horizontal number of grid cells 83 83 in table, which means 84 84 the allocated width.) */ 85 - uint32_t aligned_height; /**< Vertical stride (for alloc). 85 + uint32_t aligned_height; /** Vertical stride (for alloc). 86 86 (= Vertical number of grid cells 87 87 in table, which means 88 88 the allocated height.) */ 89 - uint32_t bqs_per_grid_cell; /**< Grid cell size in BQ(Bayer Quad) unit. 89 + uint32_t bqs_per_grid_cell; /** Grid cell size in BQ(Bayer Quad) unit. 90 90 (1BQ means {Gr,R,B,Gb}(2x2 pixels).) 91 91 Valid values are 8,16,32,64. */ 92 - uint32_t deci_factor_log2; /**< log2 of bqs_per_grid_cell. */ 93 - uint32_t elem_bit_depth; /**< Bit depth of element used 92 + uint32_t deci_factor_log2; /** log2 of bqs_per_grid_cell. */ 93 + uint32_t elem_bit_depth; /** Bit depth of element used 94 94 to calculate 3A statistics. 95 95 This is 13, which is the normalized 96 96 bayer bit depth in DSP. */ ··· 148 148 * However, that will require driver/ 3A lib modifications. 149 149 */ 150 150 151 - /** 3A configuration. This configures the 3A statistics collection 151 + /* 3A configuration. This configures the 3A statistics collection 152 152 * module. 153 153 * 154 154 * ae_y_*: Coefficients to calculate luminance from bayer. ··· 167 167 * ISP2: S3A2 and SDVS2 are used. 168 168 */ 169 169 struct ia_css_3a_config { 170 - ia_css_u0_16 ae_y_coef_r; /**< Weight of R for Y. 170 + ia_css_u0_16 ae_y_coef_r; /** Weight of R for Y. 171 171 u0.16, [0,65535], 172 172 default/ineffective 25559 */ 173 - ia_css_u0_16 ae_y_coef_g; /**< Weight of G for Y. 173 + ia_css_u0_16 ae_y_coef_g; /** Weight of G for Y. 174 174 u0.16, [0,65535], 175 175 default/ineffective 32768 */ 176 - ia_css_u0_16 ae_y_coef_b; /**< Weight of B for Y. 176 + ia_css_u0_16 ae_y_coef_b; /** Weight of B for Y. 177 177 u0.16, [0,65535], 178 178 default/ineffective 7209 */ 179 - ia_css_u0_16 awb_lg_high_raw; /**< AWB level gate high for raw. 179 + ia_css_u0_16 awb_lg_high_raw; /** AWB level gate high for raw. 180 180 u0.16, [0,65535], 181 181 default 65472(=1023*64), 182 182 ineffective 65535 */ 183 - ia_css_u0_16 awb_lg_low; /**< AWB level gate low. 183 + ia_css_u0_16 awb_lg_low; /** AWB level gate low. 184 184 u0.16, [0,65535], 185 185 default 64(=1*64), 186 186 ineffective 0 */ 187 - ia_css_u0_16 awb_lg_high; /**< AWB level gate high. 187 + ia_css_u0_16 awb_lg_high; /** AWB level gate high. 188 188 u0.16, [0,65535], 189 189 default 65535, 190 190 ineffective 65535 */ 191 - ia_css_s0_15 af_fir1_coef[7]; /**< AF FIR coefficients of fir1. 191 + ia_css_s0_15 af_fir1_coef[7]; /** AF FIR coefficients of fir1. 192 192 s0.15, [-32768,32767], 193 193 default/ineffective 194 194 -6689,-12207,-32768,32767,12207,6689,0 */ 195 - ia_css_s0_15 af_fir2_coef[7]; /**< AF FIR coefficients of fir2. 195 + ia_css_s0_15 af_fir2_coef[7]; /** AF FIR coefficients of fir2. 196 196 s0.15, [-32768,32767], 197 197 default/ineffective 198 198 2053,0,-18437,32767,-18437,2053,0 */ 199 199 }; 200 200 201 - /** 3A statistics. This structure describes the data stored 201 + /* 3A statistics. This structure describes the data stored 202 202 * in each 3A grid point. 203 203 * 204 204 * ISP block: S3A1 (3A Support for 3A ver.1) (Histogram is not used for AE) ··· 209 209 * ISP2: S3A2 is used. 210 210 */ 211 211 struct ia_css_3a_output { 212 - int32_t ae_y; /**< Sum of Y in a statistics window, for AE. 212 + int32_t ae_y; /** Sum of Y in a statistics window, for AE. 213 213 (u19.13) */ 214 - int32_t awb_cnt; /**< Number of effective pixels 214 + int32_t awb_cnt; /** Number of effective pixels 215 215 in a statistics window. 216 216 Pixels passed by the AWB level gate check are 217 217 judged as "effective". (u32) */ 218 - int32_t awb_gr; /**< Sum of Gr in a statistics window, for AWB. 218 + int32_t awb_gr; /** Sum of Gr in a statistics window, for AWB. 219 219 All Gr pixels (not only for effective pixels) 220 220 are summed. (u19.13) */ 221 - int32_t awb_r; /**< Sum of R in a statistics window, for AWB. 221 + int32_t awb_r; /** Sum of R in a statistics window, for AWB. 222 222 All R pixels (not only for effective pixels) 223 223 are summed. (u19.13) */ 224 - int32_t awb_b; /**< Sum of B in a statistics window, for AWB. 224 + int32_t awb_b; /** Sum of B in a statistics window, for AWB. 225 225 All B pixels (not only for effective pixels) 226 226 are summed. (u19.13) */ 227 - int32_t awb_gb; /**< Sum of Gb in a statistics window, for AWB. 227 + int32_t awb_gb; /** Sum of Gb in a statistics window, for AWB. 228 228 All Gb pixels (not only for effective pixels) 229 229 are summed. (u19.13) */ 230 - int32_t af_hpf1; /**< Sum of |Y| following high pass filter af_fir1 230 + int32_t af_hpf1; /** Sum of |Y| following high pass filter af_fir1 231 231 within a statistics window, for AF. (u19.13) */ 232 - int32_t af_hpf2; /**< Sum of |Y| following high pass filter af_fir2 232 + int32_t af_hpf2; /** Sum of |Y| following high pass filter af_fir2 233 233 within a statistics window, for AF. (u19.13) */ 234 234 }; 235 235 236 236 237 - /** 3A Statistics. This structure describes the statistics that are generated 237 + /* 3A Statistics. This structure describes the statistics that are generated 238 238 * using the provided configuration (ia_css_3a_config). 239 239 */ 240 240 struct ia_css_3a_statistics { 241 - struct ia_css_3a_grid_info grid; /**< grid info contains the dimensions of the 3A grid */ 242 - struct ia_css_3a_output *data; /**< the pointer to 3a_output[grid.width * grid.height] 241 + struct ia_css_3a_grid_info grid; /** grid info contains the dimensions of the 3A grid */ 242 + struct ia_css_3a_output *data; /** the pointer to 3a_output[grid.width * grid.height] 243 243 containing the 3A statistics */ 244 - struct ia_css_3a_rgby_output *rgby_data;/**< the pointer to 3a_rgby_output[256] 244 + struct ia_css_3a_rgby_output *rgby_data;/** the pointer to 3a_rgby_output[256] 245 245 containing the histogram */ 246 246 }; 247 247 248 - /** Histogram (Statistics for AE). 248 + /* Histogram (Statistics for AE). 249 249 * 250 250 * 4 histograms(r,g,b,y), 251 251 * 256 bins for each histogram, unsigned 24bit value for each bin. ··· 256 256 * ISP2: HIST2 is used. 257 257 */ 258 258 struct ia_css_3a_rgby_output { 259 - uint32_t r; /**< Number of R of one bin of the histogram R. (u24) */ 260 - uint32_t g; /**< Number of G of one bin of the histogram G. (u24) */ 261 - uint32_t b; /**< Number of B of one bin of the histogram B. (u24) */ 262 - uint32_t y; /**< Number of Y of one bin of the histogram Y. (u24) */ 259 + uint32_t r; /** Number of R of one bin of the histogram R. (u24) */ 260 + uint32_t g; /** Number of G of one bin of the histogram G. (u24) */ 261 + uint32_t b; /** Number of B of one bin of the histogram B. (u24) */ 262 + uint32_t y; /** Number of Y of one bin of the histogram Y. (u24) */ 263 263 }; 264 264 265 265 #endif /* __IA_CSS_S3A_TYPES_H */
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a_stat_ls/ia_css_s3a_stat_ls_param.h
··· 22 22 23 23 #define NUM_S3A_LS 1 24 24 25 - /** s3a statistics store */ 25 + /* s3a statistics store */ 26 26 #ifdef ISP2401 27 27 struct ia_css_s3a_stat_ls_configuration { 28 28 uint32_t s3a_grid_size_log2;
+2 -2
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.h
··· 32 32 unsigned level); 33 33 34 34 #ifdef ISP2401 35 - /** @brief Configure the shading correction. 35 + /* @brief Configure the shading correction. 36 36 * @param[out] to Parameters used in the shading correction kernel in the isp. 37 37 * @param[in] from Parameters passed from the host. 38 38 * @param[in] size Size of the sh_css_isp_sc_isp_config structure. ··· 45 45 const struct ia_css_sc_configuration *from, 46 46 unsigned size); 47 47 48 - /** @brief Configure the shading correction. 48 + /* @brief Configure the shading correction. 49 49 * @param[in] binary The binary, which has the shading correction. 50 50 * @param[in] internal_frame_origin_x_bqs_on_sctbl 51 51 * X coordinate (in bqs) of the origin of the internal frame on the shading table.
+21 -21
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_types.h
··· 15 15 #ifndef __IA_CSS_SC_TYPES_H 16 16 #define __IA_CSS_SC_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for Lens Shading Correction (SC) parameters. 20 20 */ 21 21 22 22 23 - /** Number of color planes in the shading table. */ 23 + /* Number of color planes in the shading table. */ 24 24 #define IA_CSS_SC_NUM_COLORS 4 25 25 26 - /** The 4 colors that a shading table consists of. 26 + /* The 4 colors that a shading table consists of. 27 27 * For each color we store a grid of values. 28 28 */ 29 29 enum ia_css_sc_color { 30 - IA_CSS_SC_COLOR_GR, /**< Green on a green-red line */ 31 - IA_CSS_SC_COLOR_R, /**< Red */ 32 - IA_CSS_SC_COLOR_B, /**< Blue */ 33 - IA_CSS_SC_COLOR_GB /**< Green on a green-blue line */ 30 + IA_CSS_SC_COLOR_GR, /** Green on a green-red line */ 31 + IA_CSS_SC_COLOR_R, /** Red */ 32 + IA_CSS_SC_COLOR_B, /** Blue */ 33 + IA_CSS_SC_COLOR_GB /** Green on a green-blue line */ 34 34 }; 35 35 36 - /** Lens Shading Correction table. 36 + /* Lens Shading Correction table. 37 37 * 38 38 * This describes the color shading artefacts 39 39 * introduced by lens imperfections. To correct artefacts, ··· 64 64 * ISP2: SC1 is used. 65 65 */ 66 66 struct ia_css_shading_table { 67 - uint32_t enable; /**< Set to false for no shading correction. 67 + uint32_t enable; /** Set to false for no shading correction. 68 68 The data field can be NULL when enable == true */ 69 69 /* ------ deprecated(bz675) : from ------ */ 70 - uint32_t sensor_width; /**< Native sensor width in pixels. */ 71 - uint32_t sensor_height; /**< Native sensor height in lines. 70 + uint32_t sensor_width; /** Native sensor width in pixels. */ 71 + uint32_t sensor_height; /** Native sensor height in lines. 72 72 When shading_settings.enable_shading_table_conversion is set 73 73 as 0, sensor_width and sensor_height are NOT used. 74 74 These are used only in the legacy shading table conversion 75 75 in the css, when shading_settings. 76 76 enable_shading_table_conversion is set as 1. */ 77 77 /* ------ deprecated(bz675) : to ------ */ 78 - uint32_t width; /**< Number of data points per line per color. 78 + uint32_t width; /** Number of data points per line per color. 79 79 u8.0, [0,81] */ 80 - uint32_t height; /**< Number of lines of data points per color. 80 + uint32_t height; /** Number of lines of data points per color. 81 81 u8.0, [0,61] */ 82 - uint32_t fraction_bits; /**< Bits of fractional part in the data 82 + uint32_t fraction_bits; /** Bits of fractional part in the data 83 83 points. 84 84 u8.0, [0,13] */ 85 85 uint16_t *data[IA_CSS_SC_NUM_COLORS]; 86 - /**< Table data, one array for each color. 86 + /** Table data, one array for each color. 87 87 Use ia_css_sc_color to index this array. 88 88 u[13-fraction_bits].[fraction_bits], [0,8191] */ 89 89 }; 90 90 91 91 /* ------ deprecated(bz675) : from ------ */ 92 - /** Shading Correction settings. 92 + /* Shading Correction settings. 93 93 * 94 94 * NOTE: 95 95 * This structure should be removed when the shading table conversion is 96 96 * removed from the css. 97 97 */ 98 98 struct ia_css_shading_settings { 99 - uint32_t enable_shading_table_conversion; /**< Set to 0, 99 + uint32_t enable_shading_table_conversion; /** Set to 0, 100 100 if the conversion of the shading table should be disabled 101 101 in the css. (default 1) 102 102 0: The shading table is directly sent to the isp. ··· 119 119 120 120 #ifdef ISP2401 121 121 122 - /** Shading Correction configuration. 122 + /* Shading Correction configuration. 123 123 * 124 124 * NOTE: The shading table size is larger than or equal to the internal frame size. 125 125 */ 126 126 struct ia_css_sc_configuration { 127 - uint32_t internal_frame_origin_x_bqs_on_sctbl; /**< Origin X (in bqs) of internal frame on shading table. */ 128 - uint32_t internal_frame_origin_y_bqs_on_sctbl; /**< Origin Y (in bqs) of internal frame on shading table. */ 129 - /**< NOTE: bqs = size in BQ(Bayer Quad) unit. 127 + uint32_t internal_frame_origin_x_bqs_on_sctbl; /** Origin X (in bqs) of internal frame on shading table. */ 128 + uint32_t internal_frame_origin_y_bqs_on_sctbl; /** Origin Y (in bqs) of internal frame on shading table. */ 129 + /** NOTE: bqs = size in BQ(Bayer Quad) unit. 130 130 1BQ means {Gr,R,B,Gb}(2x2 pixels). 131 131 Horizontal 1 bqs corresponds to horizontal 2 pixels. 132 132 Vertical 1 bqs corresponds to vertical 2 pixels. */
+52 -52
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/common/ia_css_sdis_common_types.h
··· 15 15 #ifndef __IA_CSS_SDIS_COMMON_TYPES_H 16 16 #define __IA_CSS_SDIS_COMMON_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for DVS statistics parameters. 20 20 */ 21 21 22 22 #include <type_support.h> 23 23 24 - /** DVS statistics grid dimensions in number of cells. 24 + /* DVS statistics grid dimensions in number of cells. 25 25 */ 26 26 27 27 struct ia_css_dvs_grid_dim { 28 - uint32_t width; /**< Width of DVS grid table in cells */ 29 - uint32_t height; /**< Height of DVS grid table in cells */ 28 + uint32_t width; /** Width of DVS grid table in cells */ 29 + uint32_t height; /** Height of DVS grid table in cells */ 30 30 }; 31 31 32 - /** DVS statistics dimensions in number of cells for 32 + /* DVS statistics dimensions in number of cells for 33 33 * grid, coeffieicient and projection. 34 34 */ 35 35 ··· 55 55 0, /* dis_deci_factor_log2 */ \ 56 56 } 57 57 58 - /** DVS statistics grid 58 + /* DVS statistics grid 59 59 * 60 60 * ISP block: SDVS1 (DIS/DVS Support for DIS/DVS ver.1 (2-axes)) 61 61 * SDVS2 (DVS Support for DVS ver.2 (6-axes)) ··· 63 63 * ISP2: SDVS2 is used. 64 64 */ 65 65 struct ia_css_dvs_grid_res { 66 - uint32_t width; /**< Width of DVS grid table. 66 + uint32_t width; /** Width of DVS grid table. 67 67 (= Horizontal number of grid cells 68 68 in table, which cells have effective 69 69 statistics.) 70 70 For DVS1, this is equal to 71 71 the number of vertical statistics. */ 72 - uint32_t aligned_width; /**< Stride of each grid line. 72 + uint32_t aligned_width; /** Stride of each grid line. 73 73 (= Horizontal number of grid cells 74 74 in table, which means 75 75 the allocated width.) */ 76 - uint32_t height; /**< Height of DVS grid table. 76 + uint32_t height; /** Height of DVS grid table. 77 77 (= Vertical number of grid cells 78 78 in table, which cells have effective 79 79 statistics.) 80 80 For DVS1, This is equal to 81 81 the number of horizontal statistics. */ 82 - uint32_t aligned_height;/**< Stride of each grid column. 82 + uint32_t aligned_height;/** Stride of each grid column. 83 83 (= Vertical number of grid cells 84 84 in table, which means 85 85 the allocated height.) */ ··· 89 89 * However, that implies driver I/F changes 90 90 */ 91 91 struct ia_css_dvs_grid_info { 92 - uint32_t enable; /**< DVS statistics enabled. 92 + uint32_t enable; /** DVS statistics enabled. 93 93 0:disabled, 1:enabled */ 94 - uint32_t width; /**< Width of DVS grid table. 94 + uint32_t width; /** Width of DVS grid table. 95 95 (= Horizontal number of grid cells 96 96 in table, which cells have effective 97 97 statistics.) 98 98 For DVS1, this is equal to 99 99 the number of vertical statistics. */ 100 - uint32_t aligned_width; /**< Stride of each grid line. 100 + uint32_t aligned_width; /** Stride of each grid line. 101 101 (= Horizontal number of grid cells 102 102 in table, which means 103 103 the allocated width.) */ 104 - uint32_t height; /**< Height of DVS grid table. 104 + uint32_t height; /** Height of DVS grid table. 105 105 (= Vertical number of grid cells 106 106 in table, which cells have effective 107 107 statistics.) 108 108 For DVS1, This is equal to 109 109 the number of horizontal statistics. */ 110 - uint32_t aligned_height;/**< Stride of each grid column. 110 + uint32_t aligned_height;/** Stride of each grid column. 111 111 (= Vertical number of grid cells 112 112 in table, which means 113 113 the allocated height.) */ 114 - uint32_t bqs_per_grid_cell; /**< Grid cell size in BQ(Bayer Quad) unit. 114 + uint32_t bqs_per_grid_cell; /** Grid cell size in BQ(Bayer Quad) unit. 115 115 (1BQ means {Gr,R,B,Gb}(2x2 pixels).) 116 116 For DVS1, valid value is 64. 117 117 For DVS2, valid value is only 64, 118 118 currently. */ 119 - uint32_t num_hor_coefs; /**< Number of horizontal coefficients. */ 120 - uint32_t num_ver_coefs; /**< Number of vertical coefficients. */ 119 + uint32_t num_hor_coefs; /** Number of horizontal coefficients. */ 120 + uint32_t num_ver_coefs; /** Number of vertical coefficients. */ 121 121 }; 122 122 123 - /** Number of DVS statistics levels 123 + /* Number of DVS statistics levels 124 124 */ 125 125 #define IA_CSS_DVS_STAT_NUM_OF_LEVELS 3 126 126 127 - /** DVS statistics generated by accelerator global configuration 127 + /* DVS statistics generated by accelerator global configuration 128 128 */ 129 129 struct dvs_stat_public_dvs_global_cfg { 130 130 unsigned char kappa; 131 - /**< DVS statistics global configuration - kappa */ 131 + /** DVS statistics global configuration - kappa */ 132 132 unsigned char match_shift; 133 - /**< DVS statistics global configuration - match_shift */ 133 + /** DVS statistics global configuration - match_shift */ 134 134 unsigned char ybin_mode; 135 - /**< DVS statistics global configuration - y binning mode */ 135 + /** DVS statistics global configuration - y binning mode */ 136 136 }; 137 137 138 - /** DVS statistics generated by accelerator level grid 138 + /* DVS statistics generated by accelerator level grid 139 139 * configuration 140 140 */ 141 141 struct dvs_stat_public_dvs_level_grid_cfg { 142 142 unsigned char grid_width; 143 - /**< DVS statistics grid width */ 143 + /** DVS statistics grid width */ 144 144 unsigned char grid_height; 145 - /**< DVS statistics grid height */ 145 + /** DVS statistics grid height */ 146 146 unsigned char block_width; 147 - /**< DVS statistics block width */ 147 + /** DVS statistics block width */ 148 148 unsigned char block_height; 149 - /**< DVS statistics block height */ 149 + /** DVS statistics block height */ 150 150 }; 151 151 152 - /** DVS statistics generated by accelerator level grid start 152 + /* DVS statistics generated by accelerator level grid start 153 153 * configuration 154 154 */ 155 155 struct dvs_stat_public_dvs_level_grid_start { 156 156 unsigned short x_start; 157 - /**< DVS statistics level x start */ 157 + /** DVS statistics level x start */ 158 158 unsigned short y_start; 159 - /**< DVS statistics level y start */ 159 + /** DVS statistics level y start */ 160 160 unsigned char enable; 161 - /**< DVS statistics level enable */ 161 + /** DVS statistics level enable */ 162 162 }; 163 163 164 - /** DVS statistics generated by accelerator level grid end 164 + /* DVS statistics generated by accelerator level grid end 165 165 * configuration 166 166 */ 167 167 struct dvs_stat_public_dvs_level_grid_end { 168 168 unsigned short x_end; 169 - /**< DVS statistics level x end */ 169 + /** DVS statistics level x end */ 170 170 unsigned short y_end; 171 - /**< DVS statistics level y end */ 171 + /** DVS statistics level y end */ 172 172 }; 173 173 174 - /** DVS statistics generated by accelerator Feature Extraction 174 + /* DVS statistics generated by accelerator Feature Extraction 175 175 * Region Of Interest (FE-ROI) configuration 176 176 */ 177 177 struct dvs_stat_public_dvs_level_fe_roi_cfg { 178 178 unsigned char x_start; 179 - /**< DVS statistics fe-roi level x start */ 179 + /** DVS statistics fe-roi level x start */ 180 180 unsigned char y_start; 181 - /**< DVS statistics fe-roi level y start */ 181 + /** DVS statistics fe-roi level y start */ 182 182 unsigned char x_end; 183 - /**< DVS statistics fe-roi level x end */ 183 + /** DVS statistics fe-roi level x end */ 184 184 unsigned char y_end; 185 - /**< DVS statistics fe-roi level y end */ 185 + /** DVS statistics fe-roi level y end */ 186 186 }; 187 187 188 - /** DVS statistics generated by accelerator public configuration 188 + /* DVS statistics generated by accelerator public configuration 189 189 */ 190 190 struct dvs_stat_public_dvs_grd_cfg { 191 191 struct dvs_stat_public_dvs_level_grid_cfg grd_cfg; 192 - /**< DVS statistics level grid configuration */ 192 + /** DVS statistics level grid configuration */ 193 193 struct dvs_stat_public_dvs_level_grid_start grd_start; 194 - /**< DVS statistics level grid start configuration */ 194 + /** DVS statistics level grid start configuration */ 195 195 struct dvs_stat_public_dvs_level_grid_end grd_end; 196 - /**< DVS statistics level grid end configuration */ 196 + /** DVS statistics level grid end configuration */ 197 197 }; 198 198 199 - /** DVS statistics grid generated by accelerator 199 + /* DVS statistics grid generated by accelerator 200 200 */ 201 201 struct ia_css_dvs_stat_grid_info { 202 202 struct dvs_stat_public_dvs_global_cfg dvs_gbl_cfg; 203 - /**< DVS statistics global configuration (kappa, match, binning) */ 203 + /** DVS statistics global configuration (kappa, match, binning) */ 204 204 struct dvs_stat_public_dvs_grd_cfg grd_cfg[IA_CSS_DVS_STAT_NUM_OF_LEVELS]; 205 - /**< DVS statistics grid configuration (blocks and grids) */ 205 + /** DVS statistics grid configuration (blocks and grids) */ 206 206 struct dvs_stat_public_dvs_level_fe_roi_cfg fe_roi_cfg[IA_CSS_DVS_STAT_NUM_OF_LEVELS]; 207 - /**< DVS statistics FE ROI (region of interest) configuration */ 207 + /** DVS statistics FE ROI (region of interest) configuration */ 208 208 }; 209 209 210 - /** DVS statistics generated by accelerator default grid info 210 + /* DVS statistics generated by accelerator default grid info 211 211 */ 212 212 #define DEFAULT_DVS_GRID_INFO { \ 213 213 { \ ··· 219 219 } 220 220 221 221 222 - /** Union that holds all types of DVS statistics grid info in 222 + /* Union that holds all types of DVS statistics grid info in 223 223 * CSS format 224 224 * */ 225 225 union ia_css_dvs_grid_u { 226 226 struct ia_css_dvs_stat_grid_info dvs_stat_grid_info; 227 - /**< DVS statistics produced by accelerator grid info */ 227 + /** DVS statistics produced by accelerator grid info */ 228 228 struct ia_css_dvs_grid_info dvs_grid_info; 229 - /**< DVS (DVS1/DVS2) grid info */ 229 + /** DVS (DVS1/DVS2) grid info */ 230 230 }; 231 231 232 232 #endif /* __IA_CSS_SDIS_COMMON_TYPES_H */
+10 -10
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis_types.h
··· 15 15 #ifndef __IA_CSS_SDIS_TYPES_H 16 16 #define __IA_CSS_SDIS_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for DVS statistics parameters. 20 20 */ 21 21 22 - /** Number of DVS coefficient types */ 22 + /* Number of DVS coefficient types */ 23 23 #define IA_CSS_DVS_NUM_COEF_TYPES 6 24 24 25 25 #ifndef PIPE_GENERATION 26 26 #include "isp/kernels/sdis/common/ia_css_sdis_common_types.h" 27 27 #endif 28 28 29 - /** DVS 1.0 Coefficients. 29 + /* DVS 1.0 Coefficients. 30 30 * This structure describes the coefficients that are needed for the dvs statistics. 31 31 */ 32 32 33 33 struct ia_css_dvs_coefficients { 34 - struct ia_css_dvs_grid_info grid;/**< grid info contains the dimensions of the dvs grid */ 35 - int16_t *hor_coefs; /**< the pointer to int16_t[grid.num_hor_coefs * IA_CSS_DVS_NUM_COEF_TYPES] 34 + struct ia_css_dvs_grid_info grid;/** grid info contains the dimensions of the dvs grid */ 35 + int16_t *hor_coefs; /** the pointer to int16_t[grid.num_hor_coefs * IA_CSS_DVS_NUM_COEF_TYPES] 36 36 containing the horizontal coefficients */ 37 - int16_t *ver_coefs; /**< the pointer to int16_t[grid.num_ver_coefs * IA_CSS_DVS_NUM_COEF_TYPES] 37 + int16_t *ver_coefs; /** the pointer to int16_t[grid.num_ver_coefs * IA_CSS_DVS_NUM_COEF_TYPES] 38 38 containing the vertical coefficients */ 39 39 }; 40 40 41 - /** DVS 1.0 Statistics. 41 + /* DVS 1.0 Statistics. 42 42 * This structure describes the statistics that are generated using the provided coefficients. 43 43 */ 44 44 45 45 struct ia_css_dvs_statistics { 46 - struct ia_css_dvs_grid_info grid;/**< grid info contains the dimensions of the dvs grid */ 47 - int32_t *hor_proj; /**< the pointer to int16_t[grid.height * IA_CSS_DVS_NUM_COEF_TYPES] 46 + struct ia_css_dvs_grid_info grid;/** grid info contains the dimensions of the dvs grid */ 47 + int32_t *hor_proj; /** the pointer to int16_t[grid.height * IA_CSS_DVS_NUM_COEF_TYPES] 48 48 containing the horizontal projections */ 49 - int32_t *ver_proj; /**< the pointer to int16_t[grid.width * IA_CSS_DVS_NUM_COEF_TYPES] 49 + int32_t *ver_proj; /** the pointer to int16_t[grid.width * IA_CSS_DVS_NUM_COEF_TYPES] 50 50 containing the vertical projections */ 51 51 }; 52 52
+20 -20
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2_types.h
··· 15 15 #ifndef __IA_CSS_SDIS2_TYPES_H 16 16 #define __IA_CSS_SDIS2_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for DVS statistics parameters. 20 20 */ 21 21 22 - /** Number of DVS coefficient types */ 22 + /* Number of DVS coefficient types */ 23 23 #define IA_CSS_DVS2_NUM_COEF_TYPES 4 24 24 25 25 #ifndef PIPE_GENERATION 26 26 #include "isp/kernels/sdis/common/ia_css_sdis_common_types.h" 27 27 #endif 28 28 29 - /** DVS 2.0 Coefficient types. This structure contains 4 pointers to 29 + /* DVS 2.0 Coefficient types. This structure contains 4 pointers to 30 30 * arrays that contain the coeffients for each type. 31 31 */ 32 32 struct ia_css_dvs2_coef_types { 33 - int16_t *odd_real; /**< real part of the odd coefficients*/ 34 - int16_t *odd_imag; /**< imaginary part of the odd coefficients*/ 35 - int16_t *even_real;/**< real part of the even coefficients*/ 36 - int16_t *even_imag;/**< imaginary part of the even coefficients*/ 33 + int16_t *odd_real; /** real part of the odd coefficients*/ 34 + int16_t *odd_imag; /** imaginary part of the odd coefficients*/ 35 + int16_t *even_real;/** real part of the even coefficients*/ 36 + int16_t *even_imag;/** imaginary part of the even coefficients*/ 37 37 }; 38 38 39 - /** DVS 2.0 Coefficients. This structure describes the coefficients that are needed for the dvs statistics. 39 + /* DVS 2.0 Coefficients. This structure describes the coefficients that are needed for the dvs statistics. 40 40 * e.g. hor_coefs.odd_real is the pointer to int16_t[grid.num_hor_coefs] containing the horizontal odd real 41 41 * coefficients. 42 42 */ 43 43 struct ia_css_dvs2_coefficients { 44 - struct ia_css_dvs_grid_info grid; /**< grid info contains the dimensions of the dvs grid */ 45 - struct ia_css_dvs2_coef_types hor_coefs; /**< struct with pointers that contain the horizontal coefficients */ 46 - struct ia_css_dvs2_coef_types ver_coefs; /**< struct with pointers that contain the vertical coefficients */ 44 + struct ia_css_dvs_grid_info grid; /** grid info contains the dimensions of the dvs grid */ 45 + struct ia_css_dvs2_coef_types hor_coefs; /** struct with pointers that contain the horizontal coefficients */ 46 + struct ia_css_dvs2_coef_types ver_coefs; /** struct with pointers that contain the vertical coefficients */ 47 47 }; 48 48 49 - /** DVS 2.0 Statistic types. This structure contains 4 pointers to 49 + /* DVS 2.0 Statistic types. This structure contains 4 pointers to 50 50 * arrays that contain the statistics for each type. 51 51 */ 52 52 struct ia_css_dvs2_stat_types { 53 - int32_t *odd_real; /**< real part of the odd statistics*/ 54 - int32_t *odd_imag; /**< imaginary part of the odd statistics*/ 55 - int32_t *even_real;/**< real part of the even statistics*/ 56 - int32_t *even_imag;/**< imaginary part of the even statistics*/ 53 + int32_t *odd_real; /** real part of the odd statistics*/ 54 + int32_t *odd_imag; /** imaginary part of the odd statistics*/ 55 + int32_t *even_real;/** real part of the even statistics*/ 56 + int32_t *even_imag;/** imaginary part of the even statistics*/ 57 57 }; 58 58 59 - /** DVS 2.0 Statistics. This structure describes the statistics that are generated using the provided coefficients. 59 + /* DVS 2.0 Statistics. This structure describes the statistics that are generated using the provided coefficients. 60 60 * e.g. hor_prod.odd_real is the pointer to int16_t[grid.aligned_height][grid.aligned_width] containing 61 61 * the horizontal odd real statistics. Valid statistics data area is int16_t[0..grid.height-1][0..grid.width-1] 62 62 */ 63 63 struct ia_css_dvs2_statistics { 64 - struct ia_css_dvs_grid_info grid; /**< grid info contains the dimensions of the dvs grid */ 65 - struct ia_css_dvs2_stat_types hor_prod; /**< struct with pointers that contain the horizontal statistics */ 66 - struct ia_css_dvs2_stat_types ver_prod; /**< struct with pointers that contain the vertical statistics */ 64 + struct ia_css_dvs_grid_info grid; /** grid info contains the dimensions of the dvs grid */ 65 + struct ia_css_dvs2_stat_types hor_prod; /** struct with pointers that contain the horizontal statistics */ 66 + struct ia_css_dvs2_stat_types ver_prod; /** struct with pointers that contain the vertical statistics */ 67 67 }; 68 68 69 69 #endif /* __IA_CSS_SDIS2_TYPES_H */
+19 -19
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf_types.h
··· 15 15 #ifndef __IA_CSS_TDF_TYPES_H 16 16 #define __IA_CSS_TDF_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for Transform Domain Filter parameters. 20 20 */ 21 21 22 22 #include "type_support.h" 23 23 24 - /** Transform Domain Filter configuration 24 + /* Transform Domain Filter configuration 25 25 * 26 26 * \brief TDF public parameters. 27 27 * \details Struct with all parameters for the TDF kernel that can be set ··· 30 30 * ISP2.6.1: TDF is used. 31 31 */ 32 32 struct ia_css_tdf_config { 33 - int32_t thres_flat_table[64]; /**< Final optimized strength table of NR for flat region. */ 34 - int32_t thres_detail_table[64]; /**< Final optimized strength table of NR for detail region. */ 35 - int32_t epsilon_0; /**< Coefficient to control variance for dark area (for flat region). */ 36 - int32_t epsilon_1; /**< Coefficient to control variance for bright area (for flat region). */ 37 - int32_t eps_scale_text; /**< Epsilon scaling coefficient for texture region. */ 38 - int32_t eps_scale_edge; /**< Epsilon scaling coefficient for edge region. */ 39 - int32_t sepa_flat; /**< Threshold to judge flat (edge < m_Flat_thre). */ 40 - int32_t sepa_edge; /**< Threshold to judge edge (edge > m_Edge_thre). */ 41 - int32_t blend_flat; /**< Blending ratio at flat region. */ 42 - int32_t blend_text; /**< Blending ratio at texture region. */ 43 - int32_t blend_edge; /**< Blending ratio at edge region. */ 44 - int32_t shading_gain; /**< Gain of Shading control. */ 45 - int32_t shading_base_gain; /**< Base Gain of Shading control. */ 46 - int32_t local_y_gain; /**< Gain of local luminance control. */ 47 - int32_t local_y_base_gain; /**< Base gain of local luminance control. */ 48 - int32_t rad_x_origin; /**< Initial x coord. for radius computation. */ 49 - int32_t rad_y_origin; /**< Initial y coord. for radius computation. */ 33 + int32_t thres_flat_table[64]; /** Final optimized strength table of NR for flat region. */ 34 + int32_t thres_detail_table[64]; /** Final optimized strength table of NR for detail region. */ 35 + int32_t epsilon_0; /** Coefficient to control variance for dark area (for flat region). */ 36 + int32_t epsilon_1; /** Coefficient to control variance for bright area (for flat region). */ 37 + int32_t eps_scale_text; /** Epsilon scaling coefficient for texture region. */ 38 + int32_t eps_scale_edge; /** Epsilon scaling coefficient for edge region. */ 39 + int32_t sepa_flat; /** Threshold to judge flat (edge < m_Flat_thre). */ 40 + int32_t sepa_edge; /** Threshold to judge edge (edge > m_Edge_thre). */ 41 + int32_t blend_flat; /** Blending ratio at flat region. */ 42 + int32_t blend_text; /** Blending ratio at texture region. */ 43 + int32_t blend_edge; /** Blending ratio at edge region. */ 44 + int32_t shading_gain; /** Gain of Shading control. */ 45 + int32_t shading_base_gain; /** Base Gain of Shading control. */ 46 + int32_t local_y_gain; /** Gain of local luminance control. */ 47 + int32_t local_y_base_gain; /** Base gain of local luminance control. */ 48 + int32_t rad_x_origin; /** Initial x coord. for radius computation. */ 49 + int32_t rad_y_origin; /** Initial y coord. for radius computation. */ 50 50 }; 51 51 52 52 #endif /* __IA_CSS_TDF_TYPES_H */
+13 -13
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr3/ia_css_tnr3_types.h
··· 16 16 #ifndef _IA_CSS_TNR3_TYPES_H 17 17 #define _IA_CSS_TNR3_TYPES_H 18 18 19 - /** @file 19 + /* @file 20 20 * CSS-API header file for Temporal Noise Reduction v3 (TNR3) kernel 21 21 */ 22 22 ··· 27 27 */ 28 28 #define TNR3_NUM_SEGMENTS 3 29 29 30 - /** Temporal Noise Reduction v3 (TNR3) configuration. 30 + /* Temporal Noise Reduction v3 (TNR3) configuration. 31 31 * The parameter to this kernel is fourfold 32 32 * 1. Three piecewise linear graphs (one for each plane) with three segments 33 33 * each. Each line graph has Luma values on the x axis and sigma values for ··· 44 44 * 4. Selection of the reference frame buffer to be used for noise reduction. 45 45 */ 46 46 struct ia_css_tnr3_kernel_config { 47 - unsigned int maxfb_y; /**< Maximum Feedback Gain for Y */ 48 - unsigned int maxfb_u; /**< Maximum Feedback Gain for U */ 49 - unsigned int maxfb_v; /**< Maximum Feedback Gain for V */ 50 - unsigned int round_adj_y; /**< Rounding Adjust for Y */ 51 - unsigned int round_adj_u; /**< Rounding Adjust for U */ 52 - unsigned int round_adj_v; /**< Rounding Adjust for V */ 53 - unsigned int knee_y[TNR3_NUM_SEGMENTS - 1]; /**< Knee points */ 54 - unsigned int sigma_y[TNR3_NUM_SEGMENTS + 1]; /**< Standard deviation for Y at points Y0, Y1, Y2, Y3 */ 55 - unsigned int sigma_u[TNR3_NUM_SEGMENTS + 1]; /**< Standard deviation for U at points U0, U1, U2, U3 */ 56 - unsigned int sigma_v[TNR3_NUM_SEGMENTS + 1]; /**< Standard deviation for V at points V0, V1, V2, V3 */ 57 - unsigned int ref_buf_select; /**< Selection of the reference buffer */ 47 + unsigned int maxfb_y; /** Maximum Feedback Gain for Y */ 48 + unsigned int maxfb_u; /** Maximum Feedback Gain for U */ 49 + unsigned int maxfb_v; /** Maximum Feedback Gain for V */ 50 + unsigned int round_adj_y; /** Rounding Adjust for Y */ 51 + unsigned int round_adj_u; /** Rounding Adjust for U */ 52 + unsigned int round_adj_v; /** Rounding Adjust for V */ 53 + unsigned int knee_y[TNR3_NUM_SEGMENTS - 1]; /** Knee points */ 54 + unsigned int sigma_y[TNR3_NUM_SEGMENTS + 1]; /** Standard deviation for Y at points Y0, Y1, Y2, Y3 */ 55 + unsigned int sigma_u[TNR3_NUM_SEGMENTS + 1]; /** Standard deviation for U at points U0, U1, U2, U3 */ 56 + unsigned int sigma_v[TNR3_NUM_SEGMENTS + 1]; /** Standard deviation for V at points V0, V1, V2, V3 */ 57 + unsigned int ref_buf_select; /** Selection of the reference buffer */ 58 58 }; 59 59 60 60 #endif
+5 -5
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_types.h
··· 15 15 #ifndef __IA_CSS_TNR_TYPES_H 16 16 #define __IA_CSS_TNR_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for Temporal Noise Reduction (TNR) parameters. 20 20 */ 21 21 22 - /** Temporal Noise Reduction (TNR) configuration. 22 + /* Temporal Noise Reduction (TNR) configuration. 23 23 * 24 24 * When difference between current frame and previous frame is less than or 25 25 * equal to threshold, TNR works and current frame is mixed ··· 36 36 37 37 38 38 struct ia_css_tnr_config { 39 - ia_css_u0_16 gain; /**< Interpolation ratio of current frame 39 + ia_css_u0_16 gain; /** Interpolation ratio of current frame 40 40 and previous frame. 41 41 gain=0.0 -> previous frame is outputted. 42 42 gain=1.0 -> current frame is outputted. 43 43 u0.16, [0,65535], 44 44 default 32768(0.5), ineffective 65535(almost 1.0) */ 45 - ia_css_u0_16 threshold_y; /**< Threshold to enable interpolation of Y. 45 + ia_css_u0_16 threshold_y; /** Threshold to enable interpolation of Y. 46 46 If difference between current frame and 47 47 previous frame is greater than threshold_y, 48 48 TNR for Y is disabled. 49 49 u0.16, [0,65535], default/ineffective 0 */ 50 - ia_css_u0_16 threshold_uv; /**< Threshold to enable interpolation of 50 + ia_css_u0_16 threshold_uv; /** Threshold to enable interpolation of 51 51 U/V. 52 52 If difference between current frame and 53 53 previous frame is greater than threshold_uv,
+2 -2
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf_param.h
··· 23 23 24 24 #define VFDEC_BITS_PER_PIXEL GAMMA_OUTPUT_BITS 25 25 26 - /** Viewfinder decimation */ 26 + /* Viewfinder decimation */ 27 27 struct sh_css_isp_vf_isp_config { 28 - uint32_t vf_downscale_bits; /**< Log VF downscale value */ 28 + uint32_t vf_downscale_bits; /** Log VF downscale value */ 29 29 uint32_t enable; 30 30 struct ia_css_frame_sp_info info; 31 31 struct {
+2 -2
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf_types.h
··· 15 15 #ifndef __IA_CSS_VF_TYPES_H 16 16 #define __IA_CSS_VF_TYPES_H 17 17 18 - /** Viewfinder decimation 18 + /* Viewfinder decimation 19 19 * 20 20 * ISP block: vfeven_horizontal_downscale 21 21 */ ··· 24 24 #include <type_support.h> 25 25 26 26 struct ia_css_vf_configuration { 27 - uint32_t vf_downscale_bits; /**< Log VF downscale value */ 27 + uint32_t vf_downscale_bits; /** Log VF downscale value */ 28 28 const struct ia_css_frame_info *info; 29 29 }; 30 30
+7 -7
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb_types.h
··· 15 15 #ifndef __IA_CSS_WB_TYPES_H 16 16 #define __IA_CSS_WB_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for White Balance parameters. 20 20 */ 21 21 22 22 23 - /** White Balance configuration (Gain Adjust). 23 + /* White Balance configuration (Gain Adjust). 24 24 * 25 25 * ISP block: WB1 26 26 * ISP1: WB1 is used. 27 27 * ISP2: WB1 is used. 28 28 */ 29 29 struct ia_css_wb_config { 30 - uint32_t integer_bits; /**< Common exponent of gains. 30 + uint32_t integer_bits; /** Common exponent of gains. 31 31 u8.0, [0,3], 32 32 default 1, ineffective 1 */ 33 - uint32_t gr; /**< Significand of Gr gain. 33 + uint32_t gr; /** Significand of Gr gain. 34 34 u[integer_bits].[16-integer_bits], [0,65535], 35 35 default/ineffective 32768(u1.15, 1.0) */ 36 - uint32_t r; /**< Significand of R gain. 36 + uint32_t r; /** Significand of R gain. 37 37 u[integer_bits].[16-integer_bits], [0,65535], 38 38 default/ineffective 32768(u1.15, 1.0) */ 39 - uint32_t b; /**< Significand of B gain. 39 + uint32_t b; /** Significand of B gain. 40 40 u[integer_bits].[16-integer_bits], [0,65535], 41 41 default/ineffective 32768(u1.15, 1.0) */ 42 - uint32_t gb; /**< Significand of Gb gain. 42 + uint32_t gb; /** Significand of Gb gain. 43 43 u[integer_bits].[16-integer_bits], [0,65535], 44 44 default/ineffective 32768(u1.15, 1.0) */ 45 45 };
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.c
··· 21 21 #include "ia_css_xnr.host.h" 22 22 23 23 const struct ia_css_xnr_config default_xnr_config = { 24 - /** default threshold 6400 translates to 25 on ISP. */ 24 + /* default threshold 6400 translates to 25 on ISP. */ 25 25 6400 26 26 }; 27 27
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_param.h
··· 41 41 }; 42 42 43 43 struct sh_css_isp_xnr_params { 44 - /** XNR threshold. 44 + /* XNR threshold. 45 45 * type:u0.16 but actual valid range is:[0,255] 46 46 * valid range is dependent on SH_CSS_ISP_YUV_BITS (currently 8bits) 47 47 * default: 25 */
+10 -10
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_types.h
··· 15 15 #ifndef __IA_CSS_XNR_TYPES_H 16 16 #define __IA_CSS_XNR_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for Extra Noise Reduction (XNR) parameters. 20 20 */ 21 21 22 - /** XNR table. 22 + /* XNR table. 23 23 * 24 24 * NOTE: The driver does not need to set this table, 25 25 * because the default values are set inside the css. ··· 36 36 * 37 37 */ 38 38 39 - /** Number of elements in the xnr table. */ 39 + /* Number of elements in the xnr table. */ 40 40 #define IA_CSS_VAMEM_1_XNR_TABLE_SIZE_LOG2 6 41 - /** Number of elements in the xnr table. */ 41 + /* Number of elements in the xnr table. */ 42 42 #define IA_CSS_VAMEM_1_XNR_TABLE_SIZE (1U<<IA_CSS_VAMEM_1_XNR_TABLE_SIZE_LOG2) 43 43 44 - /** Number of elements in the xnr table. */ 44 + /* Number of elements in the xnr table. */ 45 45 #define IA_CSS_VAMEM_2_XNR_TABLE_SIZE_LOG2 6 46 - /** Number of elements in the xnr table. */ 46 + /* Number of elements in the xnr table. */ 47 47 #define IA_CSS_VAMEM_2_XNR_TABLE_SIZE (1U<<IA_CSS_VAMEM_2_XNR_TABLE_SIZE_LOG2) 48 48 49 - /**< IA_CSS_VAMEM_TYPE_1(ISP2300) or 49 + /** IA_CSS_VAMEM_TYPE_1(ISP2300) or 50 50 IA_CSS_VAMEM_TYPE_2(ISP2400) */ 51 51 union ia_css_xnr_data { 52 52 uint16_t vamem_1[IA_CSS_VAMEM_1_XNR_TABLE_SIZE]; 53 - /**< Coefficients table on vamem type1. u0.12, [0,4095] */ 53 + /** Coefficients table on vamem type1. u0.12, [0,4095] */ 54 54 uint16_t vamem_2[IA_CSS_VAMEM_2_XNR_TABLE_SIZE]; 55 - /**< Coefficients table on vamem type2. u0.12, [0,4095] */ 55 + /** Coefficients table on vamem type2. u0.12, [0,4095] */ 56 56 }; 57 57 58 58 struct ia_css_xnr_table { ··· 61 61 }; 62 62 63 63 struct ia_css_xnr_config { 64 - /** XNR threshold. 64 + /* XNR threshold. 65 65 * type:u0.16 valid range:[0,65535] 66 66 * default: 6400 */ 67 67 uint16_t threshold;
+15 -15
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_types.h
··· 15 15 #ifndef __IA_CSS_XNR3_TYPES_H 16 16 #define __IA_CSS_XNR3_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for Extra Noise Reduction (XNR) parameters. 20 20 */ 21 21 ··· 47 47 * IA_CSS_XNR3_SIGMA_SCALE. 48 48 */ 49 49 struct ia_css_xnr3_sigma_params { 50 - int y0; /**< Sigma for Y range similarity in dark area */ 51 - int y1; /**< Sigma for Y range similarity in bright area */ 52 - int u0; /**< Sigma for U range similarity in dark area */ 53 - int u1; /**< Sigma for U range similarity in bright area */ 54 - int v0; /**< Sigma for V range similarity in dark area */ 55 - int v1; /**< Sigma for V range similarity in bright area */ 50 + int y0; /** Sigma for Y range similarity in dark area */ 51 + int y1; /** Sigma for Y range similarity in bright area */ 52 + int u0; /** Sigma for U range similarity in dark area */ 53 + int u1; /** Sigma for U range similarity in bright area */ 54 + int v0; /** Sigma for V range similarity in dark area */ 55 + int v1; /** Sigma for V range similarity in bright area */ 56 56 }; 57 57 58 58 /** ··· 64 64 * with IA_CSS_XNR3_CORING_SCALE. The ineffective value is 0. 65 65 */ 66 66 struct ia_css_xnr3_coring_params { 67 - int u0; /**< Coring threshold of U channel in dark area */ 68 - int u1; /**< Coring threshold of U channel in bright area */ 69 - int v0; /**< Coring threshold of V channel in dark area */ 70 - int v1; /**< Coring threshold of V channel in bright area */ 67 + int u0; /** Coring threshold of U channel in dark area */ 68 + int u1; /** Coring threshold of U channel in bright area */ 69 + int v0; /** Coring threshold of V channel in dark area */ 70 + int v1; /** Coring threshold of V channel in bright area */ 71 71 }; 72 72 73 73 /** ··· 81 81 * value of 0.0 bypasses the entire xnr3 filter. 82 82 */ 83 83 struct ia_css_xnr3_blending_params { 84 - int strength; /**< Blending strength */ 84 + int strength; /** Blending strength */ 85 85 }; 86 86 87 87 /** ··· 90 90 * from the CSS API. 91 91 */ 92 92 struct ia_css_xnr3_config { 93 - struct ia_css_xnr3_sigma_params sigma; /**< XNR3 sigma parameters */ 94 - struct ia_css_xnr3_coring_params coring; /**< XNR3 coring parameters */ 95 - struct ia_css_xnr3_blending_params blending; /**< XNR3 blending parameters */ 93 + struct ia_css_xnr3_sigma_params sigma; /** XNR3 sigma parameters */ 94 + struct ia_css_xnr3_coring_params coring; /** XNR3 coring parameters */ 95 + struct ia_css_xnr3_blending_params blending; /** XNR3 blending parameters */ 96 96 }; 97 97 98 98 #endif /* __IA_CSS_XNR3_TYPES_H */
+14 -14
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_types.h
··· 15 15 #ifndef __IA_CSS_YNR_TYPES_H 16 16 #define __IA_CSS_YNR_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for Noise Reduction (BNR) and YCC Noise Reduction (YNR,CNR). 20 20 */ 21 21 22 - /** Configuration used by Bayer Noise Reduction (BNR) and 22 + /* Configuration used by Bayer Noise Reduction (BNR) and 23 23 * YCC Noise Reduction (YNR,CNR). 24 24 * 25 25 * ISP block: BNR1, YNR1, CNR1 ··· 28 28 * BNR1,YNR2,CNR2 are used for Still. 29 29 */ 30 30 struct ia_css_nr_config { 31 - ia_css_u0_16 bnr_gain; /**< Strength of noise reduction (BNR). 31 + ia_css_u0_16 bnr_gain; /** Strength of noise reduction (BNR). 32 32 u0.16, [0,65535], 33 33 default 14336(0.21875), ineffective 0 */ 34 - ia_css_u0_16 ynr_gain; /**< Strength of noise reduction (YNR). 34 + ia_css_u0_16 ynr_gain; /** Strength of noise reduction (YNR). 35 35 u0.16, [0,65535], 36 36 default 14336(0.21875), ineffective 0 */ 37 - ia_css_u0_16 direction; /**< Sensitivity of edge (BNR). 37 + ia_css_u0_16 direction; /** Sensitivity of edge (BNR). 38 38 u0.16, [0,65535], 39 39 default 512(0.0078125), ineffective 0 */ 40 - ia_css_u0_16 threshold_cb; /**< Coring threshold for Cb (CNR). 40 + ia_css_u0_16 threshold_cb; /** Coring threshold for Cb (CNR). 41 41 This is the same as 42 42 de_config.c1_coring_threshold. 43 43 u0.16, [0,65535], 44 44 default 0(0), ineffective 0 */ 45 - ia_css_u0_16 threshold_cr; /**< Coring threshold for Cr (CNR). 45 + ia_css_u0_16 threshold_cr; /** Coring threshold for Cr (CNR). 46 46 This is the same as 47 47 de_config.c2_coring_threshold. 48 48 u0.16, [0,65535], 49 49 default 0(0), ineffective 0 */ 50 50 }; 51 51 52 - /** Edge Enhancement (sharpen) configuration. 52 + /* Edge Enhancement (sharpen) configuration. 53 53 * 54 54 * ISP block: YEE1 55 55 * ISP1: YEE1 is used. ··· 57 57 * (YEE2 is used for Still.) 58 58 */ 59 59 struct ia_css_ee_config { 60 - ia_css_u5_11 gain; /**< The strength of sharpness. 60 + ia_css_u5_11 gain; /** The strength of sharpness. 61 61 u5.11, [0,65535], 62 62 default 8192(4.0), ineffective 0 */ 63 - ia_css_u8_8 threshold; /**< The threshold that divides noises from 63 + ia_css_u8_8 threshold; /** The threshold that divides noises from 64 64 edge. 65 65 u8.8, [0,65535], 66 66 default 256(1.0), ineffective 65535 */ 67 - ia_css_u5_11 detail_gain; /**< The strength of sharpness in pell-mell 67 + ia_css_u5_11 detail_gain; /** The strength of sharpness in pell-mell 68 68 area. 69 69 u5.11, [0,65535], 70 70 default 2048(1.0), ineffective 0 */ 71 71 }; 72 72 73 - /** YNR and YEE (sharpen) configuration. 73 + /* YNR and YEE (sharpen) configuration. 74 74 */ 75 75 struct ia_css_yee_config { 76 - struct ia_css_nr_config nr; /**< The NR configuration. */ 77 - struct ia_css_ee_config ee; /**< The EE configuration. */ 76 + struct ia_css_nr_config nr; /** The NR configuration. */ 77 + struct ia_css_ee_config ee; /** The EE configuration. */ 78 78 }; 79 79 80 80 #endif /* __IA_CSS_YNR_TYPES_H */
+20 -20
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2_types.h
··· 15 15 #ifndef __IA_CSS_YNR2_TYPES_H 16 16 #define __IA_CSS_YNR2_TYPES_H 17 17 18 - /** @file 18 + /* @file 19 19 * CSS-API header file for Y(Luma) Noise Reduction. 20 20 */ 21 21 22 - /** Y(Luma) Noise Reduction configuration. 22 + /* Y(Luma) Noise Reduction configuration. 23 23 * 24 24 * ISP block: YNR2 & YEE2 25 25 * (ISP1: YNR1 and YEE1 are used.) ··· 27 27 * ISP2: YNR2 and YEE2 are used for Still. 28 28 */ 29 29 struct ia_css_ynr_config { 30 - uint16_t edge_sense_gain_0; /**< Sensitivity of edge in dark area. 30 + uint16_t edge_sense_gain_0; /** Sensitivity of edge in dark area. 31 31 u13.0, [0,8191], 32 32 default 1000, ineffective 0 */ 33 - uint16_t edge_sense_gain_1; /**< Sensitivity of edge in bright area. 33 + uint16_t edge_sense_gain_1; /** Sensitivity of edge in bright area. 34 34 u13.0, [0,8191], 35 35 default 1000, ineffective 0 */ 36 - uint16_t corner_sense_gain_0; /**< Sensitivity of corner in dark area. 36 + uint16_t corner_sense_gain_0; /** Sensitivity of corner in dark area. 37 37 u13.0, [0,8191], 38 38 default 1000, ineffective 0 */ 39 - uint16_t corner_sense_gain_1; /**< Sensitivity of corner in bright area. 39 + uint16_t corner_sense_gain_1; /** Sensitivity of corner in bright area. 40 40 u13.0, [0,8191], 41 41 default 1000, ineffective 0 */ 42 42 }; 43 43 44 - /** Fringe Control configuration. 44 + /* Fringe Control configuration. 45 45 * 46 46 * ISP block: FC2 (FC2 is used with YNR2/YEE2.) 47 47 * (ISP1: FC2 is not used.) ··· 49 49 * ISP2: FC2 is used for Still. 50 50 */ 51 51 struct ia_css_fc_config { 52 - uint8_t gain_exp; /**< Common exponent of gains. 52 + uint8_t gain_exp; /** Common exponent of gains. 53 53 u8.0, [0,13], 54 54 default 1, ineffective 0 */ 55 - uint16_t coring_pos_0; /**< Coring threshold for positive edge in dark area. 55 + uint16_t coring_pos_0; /** Coring threshold for positive edge in dark area. 56 56 u0.13, [0,8191], 57 57 default 0(0), ineffective 0 */ 58 - uint16_t coring_pos_1; /**< Coring threshold for positive edge in bright area. 58 + uint16_t coring_pos_1; /** Coring threshold for positive edge in bright area. 59 59 u0.13, [0,8191], 60 60 default 0(0), ineffective 0 */ 61 - uint16_t coring_neg_0; /**< Coring threshold for negative edge in dark area. 61 + uint16_t coring_neg_0; /** Coring threshold for negative edge in dark area. 62 62 u0.13, [0,8191], 63 63 default 0(0), ineffective 0 */ 64 - uint16_t coring_neg_1; /**< Coring threshold for negative edge in bright area. 64 + uint16_t coring_neg_1; /** Coring threshold for negative edge in bright area. 65 65 u0.13, [0,8191], 66 66 default 0(0), ineffective 0 */ 67 - uint16_t gain_pos_0; /**< Gain for positive edge in dark area. 67 + uint16_t gain_pos_0; /** Gain for positive edge in dark area. 68 68 u0.13, [0,8191], 69 69 default 4096(0.5), ineffective 0 */ 70 - uint16_t gain_pos_1; /**< Gain for positive edge in bright area. 70 + uint16_t gain_pos_1; /** Gain for positive edge in bright area. 71 71 u0.13, [0,8191], 72 72 default 4096(0.5), ineffective 0 */ 73 - uint16_t gain_neg_0; /**< Gain for negative edge in dark area. 73 + uint16_t gain_neg_0; /** Gain for negative edge in dark area. 74 74 u0.13, [0,8191], 75 75 default 4096(0.5), ineffective 0 */ 76 - uint16_t gain_neg_1; /**< Gain for negative edge in bright area. 76 + uint16_t gain_neg_1; /** Gain for negative edge in bright area. 77 77 u0.13, [0,8191], 78 78 default 4096(0.5), ineffective 0 */ 79 - uint16_t crop_pos_0; /**< Limit for positive edge in dark area. 79 + uint16_t crop_pos_0; /** Limit for positive edge in dark area. 80 80 u0.13, [0,8191], 81 81 default/ineffective 8191(almost 1.0) */ 82 - uint16_t crop_pos_1; /**< Limit for positive edge in bright area. 82 + uint16_t crop_pos_1; /** Limit for positive edge in bright area. 83 83 u0.13, [0,8191], 84 84 default/ineffective 8191(almost 1.0) */ 85 - int16_t crop_neg_0; /**< Limit for negative edge in dark area. 85 + int16_t crop_neg_0; /** Limit for negative edge in dark area. 86 86 s0.13, [-8192,0], 87 87 default/ineffective -8192(-1.0) */ 88 - int16_t crop_neg_1; /**< Limit for negative edge in bright area. 88 + int16_t crop_neg_1; /** Limit for negative edge in bright area. 89 89 s0.13, [-8192,0], 90 90 default/ineffective -8192(-1.0) */ 91 91 };
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/yuv_ls/yuv_ls_1.0/ia_css_yuv_ls_param.h
··· 24 24 */ 25 25 #define NUM_YUV_LS 2 26 26 27 - /** YUV load/store */ 27 + /* YUV load/store */ 28 28 struct sh_css_isp_yuv_ls_isp_config { 29 29 unsigned base_address[NUM_YUV_LS]; 30 30 unsigned width[NUM_YUV_LS];
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/memory_realloc.c
··· 1 - /** 1 + /* 2 2 Support for Intel Camera Imaging ISP subsystem. 3 3 Copyright (c) 2010 - 2015, Intel Corporation. 4 4
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/interface/ia_css_binary.h
··· 269 269 ia_css_binary_find(struct ia_css_binary_descr *descr, 270 270 struct ia_css_binary *binary); 271 271 272 - /** @brief Get the shading information of the specified shading correction type. 272 + /* @brief Get the shading information of the specified shading correction type. 273 273 * 274 274 * @param[in] binary: The isp binary which has the shading correction. 275 275 * @param[in] type: The shading correction type.
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c
··· 972 972 return IA_CSS_SUCCESS; 973 973 } 974 974 975 - /** @brief Compute decimation factor for 3A statistics and shading correction. 975 + /* @brief Compute decimation factor for 3A statistics and shading correction. 976 976 * 977 977 * @param[in] width Frame width in pixels. 978 978 * @param[in] height Frame height in pixels.
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/src/bufq.c
··· 152 152 unmap_buffer_type_to_queue_id(thread_id, buf_type); 153 153 } 154 154 155 - /** 155 + /* 156 156 * @brief Query the internal queue ID. 157 157 */ 158 158 bool ia_css_query_internal_queue_id(
+15 -15
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug.h
··· 54 54 * Values can be combined to dump a combination of sets. 55 55 */ 56 56 enum ia_css_debug_enable_param_dump { 57 - IA_CSS_DEBUG_DUMP_FPN = 1 << 0, /**< FPN table */ 58 - IA_CSS_DEBUG_DUMP_OB = 1 << 1, /**< OB table */ 59 - IA_CSS_DEBUG_DUMP_SC = 1 << 2, /**< Shading table */ 60 - IA_CSS_DEBUG_DUMP_WB = 1 << 3, /**< White balance */ 61 - IA_CSS_DEBUG_DUMP_DP = 1 << 4, /**< Defect Pixel */ 62 - IA_CSS_DEBUG_DUMP_BNR = 1 << 5, /**< Bayer Noise Reductions */ 63 - IA_CSS_DEBUG_DUMP_S3A = 1 << 6, /**< 3A Statistics */ 64 - IA_CSS_DEBUG_DUMP_DE = 1 << 7, /**< De Mosaicing */ 65 - IA_CSS_DEBUG_DUMP_YNR = 1 << 8, /**< Luma Noise Reduction */ 66 - IA_CSS_DEBUG_DUMP_CSC = 1 << 9, /**< Color Space Conversion */ 67 - IA_CSS_DEBUG_DUMP_GC = 1 << 10, /**< Gamma Correction */ 68 - IA_CSS_DEBUG_DUMP_TNR = 1 << 11, /**< Temporal Noise Reduction */ 69 - IA_CSS_DEBUG_DUMP_ANR = 1 << 12, /**< Advanced Noise Reduction */ 70 - IA_CSS_DEBUG_DUMP_CE = 1 << 13, /**< Chroma Enhancement */ 71 - IA_CSS_DEBUG_DUMP_ALL = 1 << 14 /**< Dump all device parameters */ 57 + IA_CSS_DEBUG_DUMP_FPN = 1 << 0, /** FPN table */ 58 + IA_CSS_DEBUG_DUMP_OB = 1 << 1, /** OB table */ 59 + IA_CSS_DEBUG_DUMP_SC = 1 << 2, /** Shading table */ 60 + IA_CSS_DEBUG_DUMP_WB = 1 << 3, /** White balance */ 61 + IA_CSS_DEBUG_DUMP_DP = 1 << 4, /** Defect Pixel */ 62 + IA_CSS_DEBUG_DUMP_BNR = 1 << 5, /** Bayer Noise Reductions */ 63 + IA_CSS_DEBUG_DUMP_S3A = 1 << 6, /** 3A Statistics */ 64 + IA_CSS_DEBUG_DUMP_DE = 1 << 7, /** De Mosaicing */ 65 + IA_CSS_DEBUG_DUMP_YNR = 1 << 8, /** Luma Noise Reduction */ 66 + IA_CSS_DEBUG_DUMP_CSC = 1 << 9, /** Color Space Conversion */ 67 + IA_CSS_DEBUG_DUMP_GC = 1 << 10, /** Gamma Correction */ 68 + IA_CSS_DEBUG_DUMP_TNR = 1 << 11, /** Temporal Noise Reduction */ 69 + IA_CSS_DEBUG_DUMP_ANR = 1 << 12, /** Advanced Noise Reduction */ 70 + IA_CSS_DEBUG_DUMP_CE = 1 << 13, /** Chroma Enhancement */ 71 + IA_CSS_DEBUG_DUMP_ALL = 1 << 14 /** Dump all device parameters */ 72 72 }; 73 73 74 74 #define IA_CSS_ERROR(fmt, ...) \
+5 -5
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/src/ia_css_debug.c
··· 1617 1617 1618 1618 #elif SP_DEBUG == SP_DEBUG_TRACE 1619 1619 1620 - /** 1620 + /* 1621 1621 * This is just an example how TRACE_FILE_ID (see ia_css_debug.sp.h) will 1622 1622 * me mapped on the file name string. 1623 1623 * ··· 2267 2267 return; 2268 2268 } 2269 2269 2270 - /** this function is for debug use, it can make SP go to sleep 2270 + /* this function is for debug use, it can make SP go to sleep 2271 2271 state after each frame, then user can dump the stable SP dmem. 2272 2272 this function can be called after ia_css_start_sp() 2273 2273 and before sh_css_init_buffer_queues() ··· 2526 2526 } 2527 2527 */ 2528 2528 2529 - /** 2529 + /* 2530 2530 * @brief Initialize the debug mode. 2531 2531 * Refer to "ia_css_debug.h" for more details. 2532 2532 */ ··· 2537 2537 return rc; 2538 2538 } 2539 2539 2540 - /** 2540 + /* 2541 2541 * @brief Disable the DMA channel. 2542 2542 * Refer to "ia_css_debug.h" for more details. 2543 2543 */ ··· 2552 2552 return rc; 2553 2553 } 2554 2554 2555 - /** 2555 + /* 2556 2556 * @brief Enable the DMA channel. 2557 2557 * Refer to "ia_css_debug.h" for more details. 2558 2558 */
+2 -2
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/src/event.c
··· 13 13 * more details. 14 14 */ 15 15 #else 16 - /** 16 + /* 17 17 Support for Intel Camera Imaging ISP subsystem. 18 18 Copyright (c) 2010 - 2015, Intel Corporation. 19 19 ··· 52 52 53 53 #include "ia_css_queue.h" /* host_sp_enqueue_XXX */ 54 54 #include "ia_css_event.h" /* ia_css_event_encode */ 55 - /** 55 + /* 56 56 * @brief Encode the information into the software-event. 57 57 * Refer to "sw_event_public.h" for details. 58 58 */
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/src/eventq.c
··· 37 37 return error; 38 38 } 39 39 40 - /** 40 + /* 41 41 * @brief The Host sends the event to the SP. 42 42 * Refer to "sh_css_sp.h" for details. 43 43 */
+11 -11
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame.h
··· 41 41 /********************************************************************* 42 42 **** Frame INFO APIs 43 43 **********************************************************************/ 44 - /** @brief Sets the given width and alignment to the frame info 44 + /* @brief Sets the given width and alignment to the frame info 45 45 * 46 46 * @param 47 47 * @param[in] info The info to which parameters would set ··· 53 53 unsigned int width, 54 54 unsigned int min_padded_width); 55 55 56 - /** @brief Sets the given format to the frame info 56 + /* @brief Sets the given format to the frame info 57 57 * 58 58 * @param 59 59 * @param[in] info The info to which parameters would set ··· 63 63 void ia_css_frame_info_set_format(struct ia_css_frame_info *info, 64 64 enum ia_css_frame_format format); 65 65 66 - /** @brief Sets the frame info with the given parameters 66 + /* @brief Sets the frame info with the given parameters 67 67 * 68 68 * @param 69 69 * @param[in] info The info to which parameters would set ··· 79 79 enum ia_css_frame_format format, 80 80 unsigned int aligned); 81 81 82 - /** @brief Checks whether 2 frame infos has the same resolution 82 + /* @brief Checks whether 2 frame infos has the same resolution 83 83 * 84 84 * @param 85 85 * @param[in] frame_a The first frame to be compared ··· 90 90 const struct ia_css_frame_info *info_a, 91 91 const struct ia_css_frame_info *info_b); 92 92 93 - /** @brief Check the frame info is valid 93 + /* @brief Check the frame info is valid 94 94 * 95 95 * @param 96 96 * @param[in] info The frame attributes to be initialized ··· 102 102 **** Frame APIs 103 103 **********************************************************************/ 104 104 105 - /** @brief Initialize the plane depending on the frame type 105 + /* @brief Initialize the plane depending on the frame type 106 106 * 107 107 * @param 108 108 * @param[in] frame The frame attributes to be initialized ··· 110 110 */ 111 111 enum ia_css_err ia_css_frame_init_planes(struct ia_css_frame *frame); 112 112 113 - /** @brief Free an array of frames 113 + /* @brief Free an array of frames 114 114 * 115 115 * @param 116 116 * @param[in] num_frames The number of frames to be freed in the array ··· 120 120 void ia_css_frame_free_multiple(unsigned int num_frames, 121 121 struct ia_css_frame **frames_array); 122 122 123 - /** @brief Allocate a CSS frame structure of given size in bytes.. 123 + /* @brief Allocate a CSS frame structure of given size in bytes.. 124 124 * 125 125 * @param frame The allocated frame. 126 126 * @param[in] size_bytes The frame size in bytes. ··· 135 135 const unsigned int size_bytes, 136 136 const bool contiguous); 137 137 138 - /** @brief Check whether 2 frames are same type 138 + /* @brief Check whether 2 frames are same type 139 139 * 140 140 * @param 141 141 * @param[in] frame_a The first frame to be compared ··· 146 146 const struct ia_css_frame *frame_a, 147 147 const struct ia_css_frame *frame_b); 148 148 149 - /** @brief Configure a dma port from frame info 149 + /* @brief Configure a dma port from frame info 150 150 * 151 151 * @param 152 152 * @param[in] config The DAM port configuration ··· 158 158 const struct ia_css_frame_info *info); 159 159 160 160 #ifdef ISP2401 161 - /** @brief Finds the cropping resolution 161 + /* @brief Finds the cropping resolution 162 162 * This function finds the maximum cropping resolution in an input image keeping 163 163 * the aspect ratio for the given output resolution.Calculates the coordinates 164 164 * for cropping from the center and returns the starting pixel location of the
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/src/frame.c
··· 13 13 * more details. 14 14 */ 15 15 #else 16 - /** 16 + /* 17 17 Support for Intel Camera Imaging ISP subsystem. 18 18 Copyright (c) 2010 - 2015, Intel Corporation. 19 19
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/ifmtr/src/ifmtr.c
··· 13 13 * more details. 14 14 */ 15 15 #else 16 - /** 16 + /* 17 17 Support for Intel Camera Imaging ISP subsystem. 18 18 Copyright (c) 2010 - 2015, Intel Corporation. 19 19
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/inputfifo/src/inputfifo.c
··· 13 13 * more details. 14 14 */ 15 15 #else 16 - /** 16 + /* 17 17 Support for Intel Camera Imaging ISP subsystem. 18 18 Copyright (c) 2010 - 2015, Intel Corporation. 19 19
+3 -3
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param_types.h
··· 53 53 }; 54 54 #define IA_CSS_NUM_PARAM_CLASSES (IA_CSS_PARAM_CLASS_STATE + 1) 55 55 56 - /** ISP parameter descriptor */ 56 + /* ISP parameter descriptor */ 57 57 struct ia_css_isp_parameter { 58 58 uint32_t offset; /* Offset in isp_<mem>)parameters, etc. */ 59 59 uint32_t size; /* Disabled if 0 */ ··· 77 77 78 78 /* Memory offsets in binary info */ 79 79 struct ia_css_isp_param_memory_offsets { 80 - uint32_t offsets[IA_CSS_NUM_PARAM_CLASSES]; /**< offset wrt hdr in bytes */ 80 + uint32_t offsets[IA_CSS_NUM_PARAM_CLASSES]; /** offset wrt hdr in bytes */ 81 81 }; 82 82 83 - /** Offsets for ISP kernel parameters per isp memory. 83 + /* Offsets for ISP kernel parameters per isp memory. 84 84 * Only relevant for standard ISP binaries, not ACC or SP. 85 85 */ 86 86 union ia_css_all_memory_offsets {
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/src/isp_param.c
··· 13 13 * more details. 14 14 */ 15 15 #else 16 - /** 16 + /* 17 17 Support for Intel Camera Imaging ISP subsystem. 18 18 Copyright (c) 2010 - 2015, Intel Corporation. 19 19
+3 -3
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys.h
··· 44 44 * Virtual Input System. (Input System 2401) 45 45 */ 46 46 typedef input_system_cfg_t ia_css_isys_descr_t; 47 - /** end of Virtual Input System */ 47 + /* end of Virtual Input System */ 48 48 #endif 49 49 50 50 #if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) ··· 112 112 113 113 #endif /* #if !defined(USE_INPUT_SYSTEM_VERSION_2401) */ 114 114 115 - /** @brief Translate format and compression to format type. 115 + /* @brief Translate format and compression to format type. 116 116 * 117 117 * @param[in] input_format The input format. 118 118 * @param[in] compression The compression scheme. ··· 195 195 stream2mmio_ID_t stream2mmio, 196 196 stream2mmio_sid_ID_t *sid); 197 197 198 - /** end of Virtual Input System */ 198 + /* end of Virtual Input System */ 199 199 #endif 200 200 201 201 #endif /* __IA_CSS_ISYS_H__ */
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/csi_rx_rmgr.c
··· 13 13 * more details. 14 14 */ 15 15 #else 16 - /** 16 + /* 17 17 Support for Intel Camera Imaging ISP subsystem. 18 18 Copyright (c) 2010 - 2015, Intel Corporation. 19 19
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/ibuf_ctrl_rmgr.c
··· 13 13 * more details. 14 14 */ 15 15 #else 16 - /** 16 + /* 17 17 * Support for Intel Camera Imaging ISP subsystem. 18 18 * Copyright (c) 2010 - 2015, Intel Corporation. 19 19 *
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_dma_rmgr.c
··· 13 13 * more details. 14 14 */ 15 15 #else 16 - /** 16 + /* 17 17 Support for Intel Camera Imaging ISP subsystem. 18 18 Copyright (c) 2010 - 2015, Intel Corporation. 19 19
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_init.c
··· 13 13 * more details. 14 14 */ 15 15 #else 16 - /** 16 + /* 17 17 Support for Intel Camera Imaging ISP subsystem. 18 18 Copyright (c) 2010 - 2015, Intel Corporation. 19 19
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_stream2mmio_rmgr.c
··· 13 13 * more details. 14 14 */ 15 15 #else 16 - /** 16 + /* 17 17 Support for Intel Camera Imaging ISP subsystem. 18 18 Copyright (c) 2010 - 2015, Intel Corporation. 19 19
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/rx.c
··· 13 13 * more details. 14 14 */ 15 15 #else 16 - /** 16 + /* 17 17 Support for Intel Camera Imaging ISP subsystem. 18 18 Copyright (c) 2010 - 2015, Intel Corporation. 19 19
+4 -4
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/virtual_isys.c
··· 13 13 * more details. 14 14 */ 15 15 #else 16 - /** 16 + /* 17 17 Support for Intel Camera Imaging ISP subsystem. 18 18 Copyright (c) 2010 - 2015, Intel Corporation. 19 19 ··· 166 166 bool raw_packed, 167 167 int32_t align_in_bytes); 168 168 169 - /** end of Forwarded Declaration */ 169 + /* end of Forwarded Declaration */ 170 170 171 171 /************************************************** 172 172 * ··· 292 292 return rc; 293 293 } 294 294 295 - /** end of Public Methods */ 295 + /* end of Public Methods */ 296 296 297 297 /************************************************** 298 298 * ··· 894 894 895 895 return packet_type; 896 896 } 897 - /** end of Private Methods */ 897 + /* end of Private Methods */ 898 898 #endif
+14 -14
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline.h
··· 103 103 struct ia_css_frame *vf_frame; 104 104 }; 105 105 106 - /** @brief initialize the pipeline module 106 + /* @brief initialize the pipeline module 107 107 * 108 108 * @return None 109 109 * ··· 112 112 */ 113 113 void ia_css_pipeline_init(void); 114 114 115 - /** @brief initialize the pipeline structure with default values 115 + /* @brief initialize the pipeline structure with default values 116 116 * 117 117 * @param[out] pipeline structure to be initialized with defaults 118 118 * @param[in] pipe_id ··· 129 129 unsigned int pipe_num, 130 130 unsigned int dvs_frame_delay); 131 131 132 - /** @brief destroy a pipeline 132 + /* @brief destroy a pipeline 133 133 * 134 134 * @param[in] pipeline 135 135 * @return None ··· 138 138 void ia_css_pipeline_destroy(struct ia_css_pipeline *pipeline); 139 139 140 140 141 - /** @brief Starts a pipeline 141 + /* @brief Starts a pipeline 142 142 * 143 143 * @param[in] pipe_id 144 144 * @param[in] pipeline ··· 148 148 void ia_css_pipeline_start(enum ia_css_pipe_id pipe_id, 149 149 struct ia_css_pipeline *pipeline); 150 150 151 - /** @brief Request to stop a pipeline 151 + /* @brief Request to stop a pipeline 152 152 * 153 153 * @param[in] pipeline 154 154 * @return IA_CSS_SUCCESS or error code upon error. ··· 156 156 */ 157 157 enum ia_css_err ia_css_pipeline_request_stop(struct ia_css_pipeline *pipeline); 158 158 159 - /** @brief Check whether pipeline has stopped 159 + /* @brief Check whether pipeline has stopped 160 160 * 161 161 * @param[in] pipeline 162 162 * @return true if the pipeline has stopped ··· 164 164 */ 165 165 bool ia_css_pipeline_has_stopped(struct ia_css_pipeline *pipe); 166 166 167 - /** @brief clean all the stages pipeline and make it as new 167 + /* @brief clean all the stages pipeline and make it as new 168 168 * 169 169 * @param[in] pipeline 170 170 * @return None ··· 172 172 */ 173 173 void ia_css_pipeline_clean(struct ia_css_pipeline *pipeline); 174 174 175 - /** @brief Add a stage to pipeline. 175 + /* @brief Add a stage to pipeline. 176 176 * 177 177 * @param pipeline Pointer to the pipeline to be added to. 178 178 * @param[in] stage_desc The description of the stage ··· 188 188 struct ia_css_pipeline_stage_desc *stage_desc, 189 189 struct ia_css_pipeline_stage **stage); 190 190 191 - /** @brief Finalize the stages in a pipeline 191 + /* @brief Finalize the stages in a pipeline 192 192 * 193 193 * @param pipeline Pointer to the pipeline to be added to. 194 194 * @return None ··· 198 198 void ia_css_pipeline_finalize_stages(struct ia_css_pipeline *pipeline, 199 199 bool continuous); 200 200 201 - /** @brief gets a stage from the pipeline 201 + /* @brief gets a stage from the pipeline 202 202 * 203 203 * @param[in] pipeline 204 204 * @return IA_CSS_SUCCESS or error code upon error. ··· 208 208 int mode, 209 209 struct ia_css_pipeline_stage **stage); 210 210 211 - /** @brief Gets a pipeline stage corresponding Firmware handle from the pipeline 211 + /* @brief Gets a pipeline stage corresponding Firmware handle from the pipeline 212 212 * 213 213 * @param[in] pipeline 214 214 * @param[in] fw_handle ··· 221 221 uint32_t fw_handle, 222 222 struct ia_css_pipeline_stage **stage); 223 223 224 - /** @brief Gets the Firmware handle correponding the stage num from the pipeline 224 + /* @brief Gets the Firmware handle correponding the stage num from the pipeline 225 225 * 226 226 * @param[in] pipeline 227 227 * @param[in] stage_num ··· 234 234 uint32_t stage_num, 235 235 uint32_t *fw_handle); 236 236 237 - /** @brief gets the output stage from the pipeline 237 + /* @brief gets the output stage from the pipeline 238 238 * 239 239 * @param[in] pipeline 240 240 * @return IA_CSS_SUCCESS or error code upon error. ··· 245 245 int mode, 246 246 struct ia_css_pipeline_stage **stage); 247 247 248 - /** @brief Checks whether the pipeline uses params 248 + /* @brief Checks whether the pipeline uses params 249 249 * 250 250 * @param[in] pipeline 251 251 * @return true if the pipeline uses params
+4 -4
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/src/pipeline.c
··· 13 13 * more details. 14 14 */ 15 15 #else 16 - /** 16 + /* 17 17 Support for Intel Camera Imaging ISP subsystem. 18 18 Copyright (c) 2010 - 2015, Intel Corporation. 19 19 ··· 114 114 IA_CSS_LEAVE_PRIVATE("void"); 115 115 } 116 116 117 - /** @brief destroy a pipeline 117 + /* @brief destroy a pipeline 118 118 * 119 119 * @param[in] pipeline 120 120 * @return None ··· 187 187 "ia_css_pipeline_start() leave: return_void\n"); 188 188 } 189 189 190 - /** 190 + /* 191 191 * @brief Query the SP thread ID. 192 192 * Refer to "sh_css_internal.h" for details. 193 193 */ ··· 285 285 IA_CSS_LEAVE_PRIVATE("void"); 286 286 } 287 287 288 - /** @brief Add a stage to pipeline. 288 + /* @brief Add a stage to pipeline. 289 289 * 290 290 * @param pipeline Pointer to the pipeline to be added to. 291 291 * @param[in] stage_desc The description of the stage
+11 -11
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue.h
··· 51 51 /***************************************************************************** 52 52 * Queue Public APIs 53 53 *****************************************************************************/ 54 - /** @brief Initialize a local queue instance. 54 + /* @brief Initialize a local queue instance. 55 55 * 56 56 * @param[out] qhandle. Handle to queue instance for use with API 57 57 * @param[in] desc. Descriptor with queue properties filled-in ··· 63 63 ia_css_queue_t *qhandle, 64 64 ia_css_queue_local_t *desc); 65 65 66 - /** @brief Initialize a remote queue instance 66 + /* @brief Initialize a remote queue instance 67 67 * 68 68 * @param[out] qhandle. Handle to queue instance for use with API 69 69 * @param[in] desc. Descriptor with queue properties filled-in ··· 74 74 ia_css_queue_t *qhandle, 75 75 ia_css_queue_remote_t *desc); 76 76 77 - /** @brief Uninitialize a queue instance 77 + /* @brief Uninitialize a queue instance 78 78 * 79 79 * @param[in] qhandle. Handle to queue instance 80 80 * @return 0 - Successful uninit. ··· 83 83 extern int ia_css_queue_uninit( 84 84 ia_css_queue_t *qhandle); 85 85 86 - /** @brief Enqueue an item in the queue instance 86 + /* @brief Enqueue an item in the queue instance 87 87 * 88 88 * @param[in] qhandle. Handle to queue instance 89 89 * @param[in] item. Object to be enqueued. ··· 96 96 ia_css_queue_t *qhandle, 97 97 uint32_t item); 98 98 99 - /** @brief Dequeue an item from the queue instance 99 + /* @brief Dequeue an item from the queue instance 100 100 * 101 101 * @param[in] qhandle. Handle to queue instance 102 102 * @param[out] item. Object to be dequeued into this item. ··· 110 110 ia_css_queue_t *qhandle, 111 111 uint32_t *item); 112 112 113 - /** @brief Check if the queue is empty 113 + /* @brief Check if the queue is empty 114 114 * 115 115 * @param[in] qhandle. Handle to queue instance 116 116 * @param[in] is_empty True if empty, False if not. ··· 123 123 ia_css_queue_t *qhandle, 124 124 bool *is_empty); 125 125 126 - /** @brief Check if the queue is full 126 + /* @brief Check if the queue is full 127 127 * 128 128 * @param[in] qhandle. Handle to queue instance 129 129 * @param[in] is_full True if Full, False if not. ··· 136 136 ia_css_queue_t *qhandle, 137 137 bool *is_full); 138 138 139 - /** @brief Get used space in the queue 139 + /* @brief Get used space in the queue 140 140 * 141 141 * @param[in] qhandle. Handle to queue instance 142 142 * @param[in] size Number of available elements in the queue ··· 148 148 ia_css_queue_t *qhandle, 149 149 uint32_t *size); 150 150 151 - /** @brief Get free space in the queue 151 + /* @brief Get free space in the queue 152 152 * 153 153 * @param[in] qhandle. Handle to queue instance 154 154 * @param[in] size Number of free elements in the queue ··· 160 160 ia_css_queue_t *qhandle, 161 161 uint32_t *size); 162 162 163 - /** @brief Peek at an element in the queue 163 + /* @brief Peek at an element in the queue 164 164 * 165 165 * @param[in] qhandle. Handle to queue instance 166 166 * @param[in] offset Offset of element to peek, ··· 175 175 uint32_t offset, 176 176 uint32_t *element); 177 177 178 - /** @brief Get the usable size for the queue 178 + /* @brief Get the usable size for the queue 179 179 * 180 180 * @param[in] qhandle. Handle to queue instance 181 181 * @param[out] size Size value to be returned here.
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.c
··· 13 13 * more details. 14 14 */ 15 15 #else 16 - /** 16 + /* 17 17 Support for Intel Camera Imaging ISP subsystem. 18 18 Copyright (c) 2010 - 2015, Intel Corporation. 19 19
+2 -2
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/src/rmgr.c
··· 13 13 * more details. 14 14 */ 15 15 #else 16 - /** 16 + /* 17 17 Support for Intel Camera Imaging ISP subsystem. 18 18 Copyright (c) 2010 - 2015, Intel Corporation. 19 19 ··· 44 44 return err; 45 45 } 46 46 47 - /** 47 + /* 48 48 * @brief Uninitialize resource pool (host) 49 49 */ 50 50 void ia_css_rmgr_uninit(void)
+13 -13
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/src/rmgr_vbuf.c
··· 20 20 #include <memory_access.h> /* mmmgr_malloc, mhmm_free */ 21 21 #include <ia_css_debug.h> 22 22 23 - /** 23 + /* 24 24 * @brief VBUF resource handles 25 25 */ 26 26 #define NUM_HANDLES 1000 27 27 struct ia_css_rmgr_vbuf_handle handle_table[NUM_HANDLES]; 28 28 29 - /** 29 + /* 30 30 * @brief VBUF resource pool - refpool 31 31 */ 32 32 struct ia_css_rmgr_vbuf_pool refpool = { ··· 37 37 NULL, /* handles */ 38 38 }; 39 39 40 - /** 40 + /* 41 41 * @brief VBUF resource pool - writepool 42 42 */ 43 43 struct ia_css_rmgr_vbuf_pool writepool = { ··· 48 48 NULL, /* handles */ 49 49 }; 50 50 51 - /** 51 + /* 52 52 * @brief VBUF resource pool - hmmbufferpool 53 53 */ 54 54 struct ia_css_rmgr_vbuf_pool hmmbufferpool = { ··· 63 63 struct ia_css_rmgr_vbuf_pool *vbuf_write = &writepool; 64 64 struct ia_css_rmgr_vbuf_pool *hmm_buffer_pool = &hmmbufferpool; 65 65 66 - /** 66 + /* 67 67 * @brief Initialize the reference count (host, vbuf) 68 68 */ 69 69 static void rmgr_refcount_init_vbuf(void) ··· 72 72 memset(&handle_table, 0, sizeof(handle_table)); 73 73 } 74 74 75 - /** 75 + /* 76 76 * @brief Retain the reference count for a handle (host, vbuf) 77 77 * 78 78 * @param handle The pointer to the handle ··· 109 109 (*handle)->count++; 110 110 } 111 111 112 - /** 112 + /* 113 113 * @brief Release the reference count for a handle (host, vbuf) 114 114 * 115 115 * @param handle The pointer to the handle ··· 131 131 } 132 132 } 133 133 134 - /** 134 + /* 135 135 * @brief Initialize the resource pool (host, vbuf) 136 136 * 137 137 * @param pool The pointer to the pool ··· 163 163 return err; 164 164 } 165 165 166 - /** 166 + /* 167 167 * @brief Uninitialize the resource pool (host, vbuf) 168 168 * 169 169 * @param pool The pointer to the pool ··· 197 197 } 198 198 } 199 199 200 - /** 200 + /* 201 201 * @brief Push a handle to the pool 202 202 * 203 203 * @param pool The pointer to the pool ··· 224 224 assert(succes); 225 225 } 226 226 227 - /** 227 + /* 228 228 * @brief Pop a handle from the pool 229 229 * 230 230 * @param pool The pointer to the pool ··· 254 254 } 255 255 } 256 256 257 - /** 257 + /* 258 258 * @brief Acquire a handle from the pool (host, vbuf) 259 259 * 260 260 * @param pool The pointer to the pool ··· 302 302 ia_css_rmgr_refcount_retain_vbuf(handle); 303 303 } 304 304 305 - /** 305 + /* 306 306 * @brief Release a handle to the pool (host, vbuf) 307 307 * 308 308 * @param pool The pointer to the pool
+10 -10
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/interface/ia_css_spctrl.h
··· 37 37 38 38 39 39 typedef struct { 40 - uint32_t ddr_data_offset; /**< posistion of data in DDR */ 41 - uint32_t dmem_data_addr; /**< data segment address in dmem */ 42 - uint32_t dmem_bss_addr; /**< bss segment address in dmem */ 43 - uint32_t data_size; /**< data segment size */ 44 - uint32_t bss_size; /**< bss segment size */ 45 - uint32_t spctrl_config_dmem_addr; /** <location of dmem_cfg in SP dmem */ 46 - uint32_t spctrl_state_dmem_addr; /** < location of state in SP dmem */ 47 - unsigned int sp_entry; /** < entry function ptr on SP */ 48 - const void *code; /**< location of firmware */ 40 + uint32_t ddr_data_offset; /** posistion of data in DDR */ 41 + uint32_t dmem_data_addr; /** data segment address in dmem */ 42 + uint32_t dmem_bss_addr; /** bss segment address in dmem */ 43 + uint32_t data_size; /** data segment size */ 44 + uint32_t bss_size; /** bss segment size */ 45 + uint32_t spctrl_config_dmem_addr; /* <location of dmem_cfg in SP dmem */ 46 + uint32_t spctrl_state_dmem_addr; /* < location of state in SP dmem */ 47 + unsigned int sp_entry; /* < entry function ptr on SP */ 48 + const void *code; /** location of firmware */ 49 49 uint32_t code_size; 50 - char *program_name; /**< not used on hardware, only for simulation */ 50 + char *program_name; /** not used on hardware, only for simulation */ 51 51 } ia_css_spctrl_cfg; 52 52 53 53 /* Get the code addr in DDR of SP */
+7 -7
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/interface/ia_css_spctrl_comm.h
··· 41 41 IA_CSS_SP_SW_RUNNING 42 42 } ia_css_spctrl_sp_sw_state; 43 43 44 - /** Structure to encapsulate required arguments for 44 + /* Structure to encapsulate required arguments for 45 45 * initialization of SP DMEM using the SP itself 46 46 */ 47 47 struct ia_css_sp_init_dmem_cfg { 48 - ia_css_ptr ddr_data_addr; /**< data segment address in ddr */ 49 - uint32_t dmem_data_addr; /**< data segment address in dmem */ 50 - uint32_t dmem_bss_addr; /**< bss segment address in dmem */ 51 - uint32_t data_size; /**< data segment size */ 52 - uint32_t bss_size; /**< bss segment size */ 53 - sp_ID_t sp_id; /** <sp Id */ 48 + ia_css_ptr ddr_data_addr; /** data segment address in ddr */ 49 + uint32_t dmem_data_addr; /** data segment address in dmem */ 50 + uint32_t dmem_bss_addr; /** bss segment address in dmem */ 51 + uint32_t data_size; /** data segment size */ 52 + uint32_t bss_size; /** bss segment size */ 53 + sp_ID_t sp_id; /* <sp Id */ 54 54 }; 55 55 56 56 #define SIZE_OF_IA_CSS_SP_INIT_DMEM_CFG_STRUCT \
+2 -2
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/src/spctrl.c
··· 13 13 * more details. 14 14 */ 15 15 #else 16 - /** 16 + /* 17 17 Support for Intel Camera Imaging ISP subsystem. 18 18 Copyright (c) 2010 - 2015, Intel Corporation. 19 19 ··· 39 39 40 40 struct spctrl_context_info { 41 41 struct ia_css_sp_init_dmem_cfg dmem_config; 42 - uint32_t spctrl_config_dmem_addr; /** location of dmem_cfg in SP dmem */ 42 + uint32_t spctrl_config_dmem_addr; /* location of dmem_cfg in SP dmem */ 43 43 uint32_t spctrl_state_dmem_addr; 44 44 unsigned int sp_entry; /* entry function ptr on SP */ 45 45 hrt_vaddress code_addr; /* sp firmware location in host mem-DDR*/
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/timer/src/timer.c
··· 13 13 * more details. 14 14 */ 15 15 #else 16 - /** 16 + /* 17 17 Support for Intel Camera Imaging ISP subsystem. 18 18 Copyright (c) 2010 - 2015, Intel Corporation. 19 19
+34 -34
drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c
··· 176 176 177 177 static bool fw_explicitly_loaded = false; 178 178 179 - /** 179 + /* 180 180 * Local prototypes 181 181 */ 182 182 ··· 187 187 sh_css_pipe_start(struct ia_css_stream *stream); 188 188 189 189 #ifdef ISP2401 190 - /** 190 + /* 191 191 * @brief Stop all "ia_css_pipe" instances in the target 192 192 * "ia_css_stream" instance. 193 193 * ··· 207 207 static enum ia_css_err 208 208 sh_css_pipes_stop(struct ia_css_stream *stream); 209 209 210 - /** 210 + /* 211 211 * @brief Check if all "ia_css_pipe" instances in the target 212 212 * "ia_css_stream" instance have stopped. 213 213 * ··· 1649 1649 void (*flush_func)(struct ia_css_acc_fw *fw); 1650 1650 hrt_data select, enable; 1651 1651 1652 - /** 1652 + /* 1653 1653 * The C99 standard does not specify the exact object representation of structs; 1654 1654 * the representation is compiler dependent. 1655 1655 * ··· 4617 4617 * 4) "enum ia_css_event_type convert_event_sp_to_host_domain" (sh_css.c) 4618 4618 */ 4619 4619 static enum ia_css_event_type convert_event_sp_to_host_domain[] = { 4620 - IA_CSS_EVENT_TYPE_OUTPUT_FRAME_DONE, /**< Output frame ready. */ 4621 - IA_CSS_EVENT_TYPE_SECOND_OUTPUT_FRAME_DONE, /**< Second output frame ready. */ 4622 - IA_CSS_EVENT_TYPE_VF_OUTPUT_FRAME_DONE, /**< Viewfinder Output frame ready. */ 4623 - IA_CSS_EVENT_TYPE_SECOND_VF_OUTPUT_FRAME_DONE, /**< Second viewfinder Output frame ready. */ 4624 - IA_CSS_EVENT_TYPE_3A_STATISTICS_DONE, /**< Indication that 3A statistics are available. */ 4625 - IA_CSS_EVENT_TYPE_DIS_STATISTICS_DONE, /**< Indication that DIS statistics are available. */ 4626 - IA_CSS_EVENT_TYPE_PIPELINE_DONE, /**< Pipeline Done event, sent after last pipeline stage. */ 4627 - IA_CSS_EVENT_TYPE_FRAME_TAGGED, /**< Frame tagged. */ 4628 - IA_CSS_EVENT_TYPE_INPUT_FRAME_DONE, /**< Input frame ready. */ 4629 - IA_CSS_EVENT_TYPE_METADATA_DONE, /**< Metadata ready. */ 4630 - IA_CSS_EVENT_TYPE_LACE_STATISTICS_DONE, /**< Indication that LACE statistics are available. */ 4631 - IA_CSS_EVENT_TYPE_ACC_STAGE_COMPLETE, /**< Extension stage executed. */ 4632 - IA_CSS_EVENT_TYPE_TIMER, /**< Timing measurement data. */ 4633 - IA_CSS_EVENT_TYPE_PORT_EOF, /**< End Of Frame event, sent when in buffered sensor mode. */ 4634 - IA_CSS_EVENT_TYPE_FW_WARNING, /**< Performance warning encountered by FW */ 4635 - IA_CSS_EVENT_TYPE_FW_ASSERT, /**< Assertion hit by FW */ 4636 - 0, /** error if sp passes SH_CSS_SP_EVENT_NR_OF_TYPES as a valid event. */ 4620 + IA_CSS_EVENT_TYPE_OUTPUT_FRAME_DONE, /** Output frame ready. */ 4621 + IA_CSS_EVENT_TYPE_SECOND_OUTPUT_FRAME_DONE, /** Second output frame ready. */ 4622 + IA_CSS_EVENT_TYPE_VF_OUTPUT_FRAME_DONE, /** Viewfinder Output frame ready. */ 4623 + IA_CSS_EVENT_TYPE_SECOND_VF_OUTPUT_FRAME_DONE, /** Second viewfinder Output frame ready. */ 4624 + IA_CSS_EVENT_TYPE_3A_STATISTICS_DONE, /** Indication that 3A statistics are available. */ 4625 + IA_CSS_EVENT_TYPE_DIS_STATISTICS_DONE, /** Indication that DIS statistics are available. */ 4626 + IA_CSS_EVENT_TYPE_PIPELINE_DONE, /** Pipeline Done event, sent after last pipeline stage. */ 4627 + IA_CSS_EVENT_TYPE_FRAME_TAGGED, /** Frame tagged. */ 4628 + IA_CSS_EVENT_TYPE_INPUT_FRAME_DONE, /** Input frame ready. */ 4629 + IA_CSS_EVENT_TYPE_METADATA_DONE, /** Metadata ready. */ 4630 + IA_CSS_EVENT_TYPE_LACE_STATISTICS_DONE, /** Indication that LACE statistics are available. */ 4631 + IA_CSS_EVENT_TYPE_ACC_STAGE_COMPLETE, /** Extension stage executed. */ 4632 + IA_CSS_EVENT_TYPE_TIMER, /** Timing measurement data. */ 4633 + IA_CSS_EVENT_TYPE_PORT_EOF, /** End Of Frame event, sent when in buffered sensor mode. */ 4634 + IA_CSS_EVENT_TYPE_FW_WARNING, /** Performance warning encountered by FW */ 4635 + IA_CSS_EVENT_TYPE_FW_ASSERT, /** Assertion hit by FW */ 4636 + 0, /* error if sp passes SH_CSS_SP_EVENT_NR_OF_TYPES as a valid event. */ 4637 4637 }; 4638 4638 4639 4639 enum ia_css_err ··· 5028 5028 bool 5029 5029 sh_css_continuous_is_enabled(uint8_t pipe_num) 5030 5030 #else 5031 - /** 5031 + /* 5032 5032 * @brief Stop all "ia_css_pipe" instances in the target 5033 5033 * "ia_css_stream" instance. 5034 5034 * ··· 5107 5107 return IA_CSS_SUCCESS; 5108 5108 } 5109 5109 #else 5110 - /** 5110 + /* 5111 5111 * Stop all "ia_css_pipe" instances in this target 5112 5112 * "ia_css_stream" instance. 5113 5113 */ ··· 5146 5146 } 5147 5147 } 5148 5148 5149 - /** 5149 + /* 5150 5150 * In the CSS firmware use scenario "Continuous Preview" 5151 5151 * as well as "Continuous Video", the "ia_css_pipe" instance 5152 5152 * "Copy Pipe" is activated. This "Copy Pipe" is private to ··· 5183 5183 return err; 5184 5184 } 5185 5185 5186 - /** 5186 + /* 5187 5187 * @brief Check if all "ia_css_pipe" instances in the target 5188 5188 * "ia_css_stream" instance have stopped. 5189 5189 * ··· 5218 5218 main_pipe_id = main_pipe->mode; 5219 5219 IA_CSS_ENTER_PRIVATE("main_pipe_id=%d", main_pipe_id); 5220 5220 5221 - /** 5221 + /* 5222 5222 * Check if every "ia_css_pipe" instance in this target 5223 5223 * "ia_css_stream" instance has stopped. 5224 5224 */ ··· 5229 5229 rval); 5230 5230 } 5231 5231 5232 - /** 5232 + /* 5233 5233 * In the CSS firmware use scenario "Continuous Preview" 5234 5234 * as well as "Continuous Video", the "ia_css_pipe" instance 5235 5235 * "Copy Pipe" is activated. This "Copy Pipe" is private to ··· 5474 5474 } 5475 5475 5476 5476 #ifdef ISP2401 5477 - /** 5477 + /* 5478 5478 * @brief Check if a format is supported by the pipe. 5479 5479 * 5480 5480 */ ··· 8626 8626 return err; 8627 8627 } 8628 8628 8629 - /** 8629 + /* 8630 8630 * @brief Tag a specific frame in continuous capture. 8631 8631 * Refer to "sh_css_internal.h" for details. 8632 8632 */ ··· 8666 8666 return err; 8667 8667 } 8668 8668 8669 - /** 8669 + /* 8670 8670 * @brief Configure the continuous capture. 8671 8671 * Refer to "sh_css_internal.h" for details. 8672 8672 */ ··· 8822 8822 "sh_css_init_host_sp_control_vars() leave: return_void\n"); 8823 8823 } 8824 8824 8825 - /** 8825 + /* 8826 8826 * create the internal structures and fill in the configuration data 8827 8827 */ 8828 8828 void ia_css_pipe_config_defaults(struct ia_css_pipe_config *pipe_config) ··· 10435 10435 return err; 10436 10436 } 10437 10437 10438 - /** 10438 + /* 10439 10439 * Time to wait SP for termincate. Only condition when this can happen 10440 10440 * is a fatal hw failure, but we must be able to detect this and emit 10441 10441 * a proper error trace. ··· 10713 10713 return ret; 10714 10714 } 10715 10715 10716 - /** @brief Set the state (Enable or Disable) of the Extension stage in the 10716 + /* @brief Set the state (Enable or Disable) of the Extension stage in the 10717 10717 * given pipe. 10718 10718 */ 10719 10719 enum ia_css_err ··· 10758 10758 return err; 10759 10759 } 10760 10760 10761 - /** @brief Get the state (Enable or Disable) of the Extension stage in the 10761 + /* @brief Get the state (Enable or Disable) of the Extension stage in the 10762 10762 * given pipe. 10763 10763 */ 10764 10764 enum ia_css_err
+11 -11
drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h
··· 188 188 N_host2sp_cmd 189 189 }; 190 190 191 - /** Enumeration used to indicate the events that are produced by 191 + /* Enumeration used to indicate the events that are produced by 192 192 * the SP and consumed by the Host. 193 193 * 194 194 * !!!IMPORTANT!!! KEEP THE FOLLOWING IN SYNC: ··· 274 274 }; 275 275 276 276 struct ia_css_isp_parameter_set_info { 277 - struct sh_css_ddr_address_map mem_map;/**< pointers to Parameters in ISP format IMPT: 277 + struct sh_css_ddr_address_map mem_map;/** pointers to Parameters in ISP format IMPT: 278 278 This should be first member of this struct */ 279 - uint32_t isp_parameters_id;/**< Unique ID to track which config was actually applied to a particular frame */ 280 - ia_css_ptr output_frame_ptr;/**< Output frame to which this config has to be applied (optional) */ 279 + uint32_t isp_parameters_id;/** Unique ID to track which config was actually applied to a particular frame */ 280 + ia_css_ptr output_frame_ptr;/** Output frame to which this config has to be applied (optional) */ 281 281 }; 282 282 283 283 /* this struct contains all arguments that can be passed to ··· 398 398 /* SP configuration information */ 399 399 struct sh_css_sp_config { 400 400 uint8_t no_isp_sync; /* Signal host immediately after start */ 401 - uint8_t enable_raw_pool_locking; /**< Enable Raw Buffer Locking for HALv3 Support */ 401 + uint8_t enable_raw_pool_locking; /** Enable Raw Buffer Locking for HALv3 Support */ 402 402 uint8_t lock_all; 403 - /**< If raw buffer locking is enabled, this flag indicates whether raw 403 + /** If raw buffer locking is enabled, this flag indicates whether raw 404 404 frames are locked when their EOF event is successfully sent to the 405 405 host (true) or when they are passed to the preview/video pipe 406 406 (false). */ ··· 458 458 /*struct sh_css_sp_pipeline_terminal output;*/ 459 459 }; 460 460 461 - /** This struct tracks how many streams are registered per CSI port. 461 + /* This struct tracks how many streams are registered per CSI port. 462 462 * This is used to track which streams have already been configured. 463 463 * Only when all streams are configured, the CSI RX is started for that port. 464 464 */ 465 465 struct sh_css_sp_pipeline_io_status { 466 - uint32_t active[N_INPUT_SYSTEM_CSI_PORT]; /**< registered streams */ 467 - uint32_t running[N_INPUT_SYSTEM_CSI_PORT]; /**< configured streams */ 466 + uint32_t active[N_INPUT_SYSTEM_CSI_PORT]; /** registered streams */ 467 + uint32_t running[N_INPUT_SYSTEM_CSI_PORT]; /** configured streams */ 468 468 }; 469 469 470 470 #endif ··· 500 500 #define SH_CSS_METADATA_OFFLINE_MODE 0x04 501 501 #define SH_CSS_METADATA_WAIT_INPUT 0x08 502 502 503 - /** @brief Free an array of metadata buffers. 503 + /* @brief Free an array of metadata buffers. 504 504 * 505 505 * @param[in] num_bufs Number of metadata buffers to be freed. 506 506 * @param[in] bufs Pointer of array of metadata buffers. ··· 764 764 hrt_vaddress frame_data; 765 765 uint32_t flashed; 766 766 uint32_t exp_id; 767 - uint32_t isp_parameters_id; /**< Unique ID to track which config was 767 + uint32_t isp_parameters_id; /** Unique ID to track which config was 768 768 actually applied to a particular frame */ 769 769 #if CONFIG_ON_FRAME_ENQUEUE() 770 770 struct sh_css_config_on_frame_enqueue config_on_frame_enqueue;
+1 -1
drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_legacy.h
··· 22 22 #include <ia_css_pipe_public.h> 23 23 #include <ia_css_stream_public.h> 24 24 25 - /** The pipe id type, distinguishes the kind of pipes that 25 + /* The pipe id type, distinguishes the kind of pipes that 26 26 * can be run in parallel. 27 27 */ 28 28 enum ia_css_pipe_id {
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drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mipi.c
··· 321 321 height = stream_cfg->input_config.input_res.height; 322 322 format = stream_cfg->input_config.format; 323 323 pack_raw_pixels = stream_cfg->pack_raw_pixels; 324 - /** end of NOTE */ 324 + /* end of NOTE */ 325 325 326 326 /** 327 327 #ifndef ISP2401 ··· 341 341 * in the non-continuous use scenario. 342 342 */ 343 343 width_padded = width + (2 * ISP_VEC_NELEMS); 344 - /** end of NOTE */ 344 + /* end of NOTE */ 345 345 346 346 IA_CSS_ENTER("padded_width=%d, height=%d, format=%d\n", 347 347 width_padded, height, format);
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drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.h
··· 144 144 struct sh_css_ddr_address_map_size pipe_ddr_ptrs_size[IA_CSS_PIPE_ID_NUM]; 145 145 struct sh_css_ddr_address_map ddr_ptrs; 146 146 struct sh_css_ddr_address_map_size ddr_ptrs_size; 147 - struct ia_css_frame *output_frame; /**< Output frame the config is to be applied to (optional) */ 148 - uint32_t isp_parameters_id; /**< Unique ID to track which config was actually applied to a particular frame */ 147 + struct ia_css_frame *output_frame; /** Output frame the config is to be applied to (optional) */ 148 + uint32_t isp_parameters_id; /** Unique ID to track which config was actually applied to a particular frame */ 149 149 }; 150 150 151 151 void
+9 -9
drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.c
··· 261 261 assert(out_frame != NULL); 262 262 263 263 { 264 - /** 264 + /* 265 265 * Clear sh_css_sp_stage for easy debugging. 266 266 * program_input_circuit must be saved as it is set outside 267 267 * this function. ··· 335 335 assert(out_frame != NULL); 336 336 337 337 { 338 - /** 338 + /* 339 339 * Clear sh_css_sp_stage for easy debugging. 340 340 * program_input_circuit must be saved as it is set outside 341 341 * this function. ··· 909 909 xinfo = binary->info; 910 910 info = &xinfo->sp; 911 911 { 912 - /** 912 + /* 913 913 * Clear sh_css_sp_stage for easy debugging. 914 914 * program_input_circuit must be saved as it is set outside 915 915 * this function. ··· 980 980 sh_css_isp_stage.binary_name[SH_CSS_MAX_BINARY_NAME - 1] = 0; 981 981 sh_css_isp_stage.mem_initializers = *isp_mem_if; 982 982 983 - /** 983 + /* 984 984 * Even when a stage does not need uds and does not params, 985 985 * ia_css_uds_sp_scale_params() seems to be called (needs 986 986 * further investigation). This function can not deal with ··· 1429 1429 } 1430 1430 1431 1431 1432 - /** 1432 + /* 1433 1433 * @brief Update the offline frame information in host_sp_communication. 1434 1434 * Refer to "sh_css_sp.h" for more details. 1435 1435 */ ··· 1461 1461 } 1462 1462 1463 1463 #if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) 1464 - /** 1464 + /* 1465 1465 * @brief Update the mipi frame information in host_sp_communication. 1466 1466 * Refer to "sh_css_sp.h" for more details. 1467 1467 */ ··· 1488 1488 frame ? frame->data : 0); 1489 1489 } 1490 1490 1491 - /** 1491 + /* 1492 1492 * @brief Update the mipi metadata information in host_sp_communication. 1493 1493 * Refer to "sh_css_sp.h" for more details. 1494 1494 */ ··· 1735 1735 } 1736 1736 1737 1737 1738 - /** 1738 + /* 1739 1739 * @brief Initialize the DMA software-mask in the debug mode. 1740 1740 * Refer to "sh_css_sp.h" for more details. 1741 1741 */ ··· 1761 1761 return true; 1762 1762 } 1763 1763 1764 - /** 1764 + /* 1765 1765 * @brief Set the DMA software-mask in the debug mode. 1766 1766 * Refer to "sh_css_sp.h" for more details. 1767 1767 */
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drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_struct.h
··· 61 61 #endif 62 62 hrt_vaddress sp_bin_addr; 63 63 hrt_data page_table_base_index; 64 - unsigned int size_mem_words; /** \deprecated{Use ia_css_mipi_buffer_config instead.}*/ 64 + unsigned int size_mem_words; /* \deprecated{Use ia_css_mipi_buffer_config instead.}*/ 65 65 enum ia_css_irq_type irq_type; 66 66 unsigned int pipe_counter; 67 67