tjh.dev / kernel
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ARM: S5PV310: Fix on Secondary CPU startup

Following occurs on boot message without this patch.
CPU1: processor failed to boot
Brought up 1 CPUs
SMP: Total of 1 processors activated...

This patch adds SYSRAM mapping for fixing Secondary CPU startup.
CPU1: Booted secondary processor
Brought up 2 CPUs
SMP: Total of 2 processors activated...

Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

authored by Changhwan Youn and committed by Kukjin Kim 766211e7 3297c2e6

+10 -2
unified split
+6 -1
arch/arm/mach-s5pv310/cpu.c
··· 46 .length = SZ_4K, 47 .type = MT_DEVICE, 48 }, { 49 .virtual = (unsigned long)S5P_VA_CMU, 50 .pfn = __phys_to_pfn(S5PV310_PA_CMU), 51 .length = SZ_128K, 52 .type = MT_DEVICE, 53 - } 54 }; 55 56 static void s5pv310_idle(void)
··· 46 .length = SZ_4K, 47 .type = MT_DEVICE, 48 }, { 49 + .virtual = (unsigned long)S5P_VA_SYSRAM, 50 + .pfn = __phys_to_pfn(S5PV310_PA_SYSRAM), 51 + .length = SZ_4K, 52 + .type = MT_DEVICE, 53 + }, { 54 .virtual = (unsigned long)S5P_VA_CMU, 55 .pfn = __phys_to_pfn(S5PV310_PA_CMU), 56 .length = SZ_128K, 57 .type = MT_DEVICE, 58 + }, 59 }; 60 61 static void s5pv310_idle(void)
+2
arch/arm/mach-s5pv310/include/mach/map.h
··· 23 24 #include <plat/map-s5p.h> 25 26 #define S5PV310_PA_CHIPID (0x10000000) 27 #define S5P_PA_CHIPID S5PV310_PA_CHIPID 28
··· 23 24 #include <plat/map-s5p.h> 25 26 + #define S5PV310_PA_SYSRAM (0x02025000) 27 + 28 #define S5PV310_PA_CHIPID (0x10000000) 29 #define S5P_PA_CHIPID S5PV310_PA_CHIPID 30
+1 -1
arch/arm/mach-s5pv310/platsmp.c
··· 187 * until it receives a soft interrupt, and then the 188 * secondary CPU branches to this address. 189 */ 190 - __raw_writel(BSYM(virt_to_phys(s5pv310_secondary_startup)), S5P_INFORM0); 191 } 192 }
··· 187 * until it receives a soft interrupt, and then the 188 * secondary CPU branches to this address. 189 */ 190 + __raw_writel(BSYM(virt_to_phys(s5pv310_secondary_startup)), S5P_VA_SYSRAM); 191 } 192 }
+1
arch/arm/plat-s5p/include/plat/map-s5p.h
··· 17 #define S5P_VA_GPIO S3C_ADDR(0x00500000) 18 #define S5P_VA_SYSTIMER S3C_ADDR(0x01200000) 19 #define S5P_VA_SROMC S3C_ADDR(0x01100000) 20 21 #define S5P_VA_COMBINER_BASE S3C_ADDR(0x00600000) 22 #define S5P_VA_COMBINER(x) (S5P_VA_COMBINER_BASE + ((x) >> 2) * 0x10)
··· 17 #define S5P_VA_GPIO S3C_ADDR(0x00500000) 18 #define S5P_VA_SYSTIMER S3C_ADDR(0x01200000) 19 #define S5P_VA_SROMC S3C_ADDR(0x01100000) 20 + #define S5P_VA_SYSRAM S3C_ADDR(0x01180000) 21 22 #define S5P_VA_COMBINER_BASE S3C_ADDR(0x00600000) 23 #define S5P_VA_COMBINER(x) (S5P_VA_COMBINER_BASE + ((x) >> 2) * 0x10)