mfd: omap-usb-host: Remove TLL specific code from USB HS core driver

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

The TLL specific code such as channels clocks enable/disable,
initialization functions are removed from the USBHS core
driver. The hwmod of the usb tll is retrieved and omap device
build is performed to created the platform device for the
usb tll component.

Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com>
Reviewed-by: Partha Basak <parthab@india.ti.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>

authored by

Keshava Munegowda and committed by

Samuel Ortiz 13 years ago 760189b3 4dc2cceb

+32 -230

2 changed files

expand all

arch

arm

mach-omap2

usb-host.c

drivers

mfd

omap-usb-host.c

+22 -9

arch/arm/mach-omap2/usb-host.c

··· 35 35 #ifdef CONFIG_MFD_OMAP_USB_HOST 36 36 37 37 #define OMAP_USBHS_DEVICE "usbhs_omap" 38 + #define OMAP_USBTLL_DEVICE "usbhs_tll" 38 39 #define USBHS_UHH_HWMODNAME "usb_host_hs" 39 40 #define USBHS_TLL_HWMODNAME "usb_tll_hs" 40 41 41 42 static struct usbhs_omap_platform_data usbhs_data; 43 + static struct usbtll_omap_platform_data usbtll_data; 42 44 static struct ehci_hcd_omap_platform_data ehci_data; 43 45 static struct ohci_hcd_omap_platform_data ohci_data; 44 46 ··· 489 487 490 488 void __init usbhs_init(const struct usbhs_omap_board_data *pdata) 491 489 { 492 - struct omap_hwmod *oh[2]; 490 + struct omap_hwmod *uhh_hwm, *tll_hwm; 493 491 struct platform_device *pdev; 494 492 int bus_id = -1; 495 493 int i; 496 494 497 495 for (i = 0; i < OMAP3_HS_USB_PORTS; i++) { 498 496 usbhs_data.port_mode[i] = pdata->port_mode[i]; 497 + usbtll_data.port_mode[i] = pdata->port_mode[i]; 499 498 ohci_data.port_mode[i] = pdata->port_mode[i]; 500 499 ehci_data.port_mode[i] = pdata->port_mode[i]; 501 500 ehci_data.reset_gpio_port[i] = pdata->reset_gpio_port[i]; ··· 515 512 setup_4430ohci_io_mux(pdata->port_mode); 516 513 } 517 514 518 - oh[0] = omap_hwmod_lookup(USBHS_UHH_HWMODNAME); 519 - if (!oh[0]) { 515 + uhh_hwm = omap_hwmod_lookup(USBHS_UHH_HWMODNAME); 516 + if (!uhh_hwm) { 520 517 pr_err("Could not look up %s\n", USBHS_UHH_HWMODNAME); 521 518 return; 522 519 } 523 520 524 - oh[1] = omap_hwmod_lookup(USBHS_TLL_HWMODNAME); 525 - if (!oh[1]) { 521 + tll_hwm = omap_hwmod_lookup(USBHS_TLL_HWMODNAME); 522 + if (!tll_hwm) { 526 523 pr_err("Could not look up %s\n", USBHS_TLL_HWMODNAME); 527 524 return; 528 525 } 529 526 530 - pdev = omap_device_build_ss(OMAP_USBHS_DEVICE, bus_id, oh, 2, 531 - (void *)&usbhs_data, sizeof(usbhs_data), 527 + pdev = omap_device_build(OMAP_USBTLL_DEVICE, bus_id, tll_hwm, 528 + &usbtll_data, sizeof(usbtll_data), 532 529 omap_uhhtll_latency, 533 530 ARRAY_SIZE(omap_uhhtll_latency), false); 534 531 if (IS_ERR(pdev)) { 535 - pr_err("Could not build hwmod devices %s,%s\n", 536 - USBHS_UHH_HWMODNAME, USBHS_TLL_HWMODNAME); 532 + pr_err("Could not build hwmod device %s\n", 533 + USBHS_TLL_HWMODNAME); 534 + return; 535 + } 536 + 537 + pdev = omap_device_build(OMAP_USBHS_DEVICE, bus_id, uhh_hwm, 538 + &usbhs_data, sizeof(usbhs_data), 539 + omap_uhhtll_latency, 540 + ARRAY_SIZE(omap_uhhtll_latency), false); 541 + if (IS_ERR(pdev)) { 542 + pr_err("Could not build hwmod devices %s\n", 543 + USBHS_UHH_HWMODNAME); 537 544 return; 538 545 } 539 546 }

+10 -221

drivers/mfd/omap-usb-host.c

··· 35 35 36 36 /* OMAP USBHOST Register addresses */ 37 37 38 - /* TLL Register Set */ 39 - #define OMAP_USBTLL_REVISION (0x00) 40 - #define OMAP_USBTLL_SYSCONFIG (0x10) 41 - #define OMAP_USBTLL_SYSCONFIG_CACTIVITY (1 << 8) 42 - #define OMAP_USBTLL_SYSCONFIG_SIDLEMODE (1 << 3) 43 - #define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP (1 << 2) 44 - #define OMAP_USBTLL_SYSCONFIG_SOFTRESET (1 << 1) 45 - #define OMAP_USBTLL_SYSCONFIG_AUTOIDLE (1 << 0) 46 - 47 - #define OMAP_USBTLL_SYSSTATUS (0x14) 48 - #define OMAP_USBTLL_SYSSTATUS_RESETDONE (1 << 0) 49 - 50 - #define OMAP_USBTLL_IRQSTATUS (0x18) 51 - #define OMAP_USBTLL_IRQENABLE (0x1C) 52 - 53 - #define OMAP_TLL_SHARED_CONF (0x30) 54 - #define OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN (1 << 6) 55 - #define OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN (1 << 5) 56 - #define OMAP_TLL_SHARED_CONF_USB_DIVRATION (1 << 2) 57 - #define OMAP_TLL_SHARED_CONF_FCLK_REQ (1 << 1) 58 - #define OMAP_TLL_SHARED_CONF_FCLK_IS_ON (1 << 0) 59 - 60 - #define OMAP_TLL_CHANNEL_CONF(num) (0x040 + 0x004 * num) 61 - #define OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT 24 62 - #define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF (1 << 11) 63 - #define OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE (1 << 10) 64 - #define OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE (1 << 9) 65 - #define OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE (1 << 8) 66 - #define OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS (1 << 1) 67 - #define OMAP_TLL_CHANNEL_CONF_CHANEN (1 << 0) 68 - 69 - #define OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0 0x0 70 - #define OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM 0x1 71 - #define OMAP_TLL_FSLSMODE_3PIN_PHY 0x2 72 - #define OMAP_TLL_FSLSMODE_4PIN_PHY 0x3 73 - #define OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0 0x4 74 - #define OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM 0x5 75 - #define OMAP_TLL_FSLSMODE_3PIN_TLL 0x6 76 - #define OMAP_TLL_FSLSMODE_4PIN_TLL 0x7 77 - #define OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0 0xA 78 - #define OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM 0xB 79 - 80 - #define OMAP_TLL_ULPI_FUNCTION_CTRL(num) (0x804 + 0x100 * num) 81 - #define OMAP_TLL_ULPI_INTERFACE_CTRL(num) (0x807 + 0x100 * num) 82 - #define OMAP_TLL_ULPI_OTG_CTRL(num) (0x80A + 0x100 * num) 83 - #define OMAP_TLL_ULPI_INT_EN_RISE(num) (0x80D + 0x100 * num) 84 - #define OMAP_TLL_ULPI_INT_EN_FALL(num) (0x810 + 0x100 * num) 85 - #define OMAP_TLL_ULPI_INT_STATUS(num) (0x813 + 0x100 * num) 86 - #define OMAP_TLL_ULPI_INT_LATCH(num) (0x814 + 0x100 * num) 87 - #define OMAP_TLL_ULPI_DEBUG(num) (0x815 + 0x100 * num) 88 - #define OMAP_TLL_ULPI_SCRATCH_REGISTER(num) (0x816 + 0x100 * num) 89 - 90 - #define OMAP_TLL_CHANNEL_COUNT 3 91 - #define OMAP_TLL_CHANNEL_1_EN_MASK (1 << 0) 92 - #define OMAP_TLL_CHANNEL_2_EN_MASK (1 << 1) 93 - #define OMAP_TLL_CHANNEL_3_EN_MASK (1 << 2) 94 - 95 38 /* UHH Register Set */ 96 39 #define OMAP_UHH_REVISION (0x00) 97 40 #define OMAP_UHH_SYSCONFIG (0x10) ··· 74 131 #define OMAP4_P2_MODE_TLL (1 << 18) 75 132 #define OMAP4_P2_MODE_HSIC (3 << 18) 76 133 77 - #define OMAP_REV2_TLL_CHANNEL_COUNT 2 78 - 79 134 #define OMAP_UHH_DEBUG_CSR (0x44) 80 135 81 136 /* Values of UHH_REVISION - Note: these are not given in the TRM */ ··· 93 152 struct clk *xclk60mhsp2_ck; 94 153 struct clk *utmi_p1_fck; 95 154 struct clk *usbhost_p1_fck; 96 - struct clk *usbtll_p1_fck; 97 155 struct clk *utmi_p2_fck; 98 156 struct clk *usbhost_p2_fck; 99 - struct clk *usbtll_p2_fck; 100 157 struct clk *init_60m_fclk; 101 158 struct clk *ehci_logic_fck; 102 159 103 160 void __iomem *uhh_base; 104 - void __iomem *tll_base; 105 161 106 162 struct usbhs_omap_platform_data platdata; 107 163 ··· 273 335 } 274 336 } 275 337 276 - /* 277 - * convert the port-mode enum to a value we can use in the FSLSMODE 278 - * field of USBTLL_CHANNEL_CONF 279 - */ 280 - static unsigned ohci_omap3_fslsmode(enum usbhs_omap_port_mode mode) 281 - { 282 - switch (mode) { 283 - case OMAP_USBHS_PORT_MODE_UNUSED: 284 - case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0: 285 - return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0; 286 - 287 - case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM: 288 - return OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM; 289 - 290 - case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0: 291 - return OMAP_TLL_FSLSMODE_3PIN_PHY; 292 - 293 - case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM: 294 - return OMAP_TLL_FSLSMODE_4PIN_PHY; 295 - 296 - case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0: 297 - return OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0; 298 - 299 - case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM: 300 - return OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM; 301 - 302 - case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0: 303 - return OMAP_TLL_FSLSMODE_3PIN_TLL; 304 - 305 - case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM: 306 - return OMAP_TLL_FSLSMODE_4PIN_TLL; 307 - 308 - case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0: 309 - return OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0; 310 - 311 - case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM: 312 - return OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM; 313 - default: 314 - pr_warning("Invalid port mode, using default\n"); 315 - return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0; 316 - } 317 - } 318 - 319 - static void usbhs_omap_tll_init(struct device *dev, u8 tll_channel_count) 320 - { 321 - struct usbhs_hcd_omap *omap = dev_get_drvdata(dev); 322 - struct usbhs_omap_platform_data *pdata = dev->platform_data; 323 - unsigned reg; 324 - int i; 325 - 326 - /* Program Common TLL register */ 327 - reg = usbhs_read(omap->tll_base, OMAP_TLL_SHARED_CONF); 328 - reg |= (OMAP_TLL_SHARED_CONF_FCLK_IS_ON 329 - | OMAP_TLL_SHARED_CONF_USB_DIVRATION); 330 - reg &= ~OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN; 331 - reg &= ~OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN; 332 - 333 - usbhs_write(omap->tll_base, OMAP_TLL_SHARED_CONF, reg); 334 - 335 - /* Enable channels now */ 336 - for (i = 0; i < tll_channel_count; i++) { 337 - reg = usbhs_read(omap->tll_base, 338 - OMAP_TLL_CHANNEL_CONF(i)); 339 - 340 - if (is_ohci_port(pdata->port_mode[i])) { 341 - reg |= ohci_omap3_fslsmode(pdata->port_mode[i]) 342 - << OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT; 343 - reg |= OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS; 344 - } else if (pdata->port_mode[i] == OMAP_EHCI_PORT_MODE_TLL) { 345 - 346 - /* Disable AutoIdle, BitStuffing and use SDR Mode */ 347 - reg &= ~(OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE 348 - | OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF 349 - | OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE); 350 - 351 - } else 352 - continue; 353 - 354 - reg |= OMAP_TLL_CHANNEL_CONF_CHANEN; 355 - usbhs_write(omap->tll_base, 356 - OMAP_TLL_CHANNEL_CONF(i), reg); 357 - 358 - usbhs_writeb(omap->tll_base, 359 - OMAP_TLL_ULPI_SCRATCH_REGISTER(i), 0xbe); 360 - } 361 - } 362 - 363 338 static int usbhs_runtime_resume(struct device *dev) 364 339 { 365 340 struct usbhs_hcd_omap *omap = dev_get_drvdata(dev); ··· 292 441 if (omap->ehci_logic_fck && !IS_ERR(omap->ehci_logic_fck)) 293 442 clk_enable(omap->ehci_logic_fck); 294 443 295 - if (is_ehci_tll_mode(pdata->port_mode[0])) { 444 + if (is_ehci_tll_mode(pdata->port_mode[0])) 296 445 clk_enable(omap->usbhost_p1_fck); 297 - clk_enable(omap->usbtll_p1_fck); 298 - } 299 - if (is_ehci_tll_mode(pdata->port_mode[1])) { 446 + if (is_ehci_tll_mode(pdata->port_mode[1])) 300 447 clk_enable(omap->usbhost_p2_fck); 301 - clk_enable(omap->usbtll_p2_fck); 302 - } 448 + 303 449 clk_enable(omap->utmi_p1_fck); 304 450 clk_enable(omap->utmi_p2_fck); 305 451 ··· 320 472 321 473 spin_lock_irqsave(&omap->lock, flags); 322 474 323 - if (is_ehci_tll_mode(pdata->port_mode[0])) { 475 + if (is_ehci_tll_mode(pdata->port_mode[0])) 324 476 clk_disable(omap->usbhost_p1_fck); 325 - clk_disable(omap->usbtll_p1_fck); 326 - } 327 - if (is_ehci_tll_mode(pdata->port_mode[1])) { 477 + if (is_ehci_tll_mode(pdata->port_mode[1])) 328 478 clk_disable(omap->usbhost_p2_fck); 329 - clk_disable(omap->usbtll_p2_fck); 330 - } 479 + 331 480 clk_disable(omap->utmi_p2_fck); 332 481 clk_disable(omap->utmi_p1_fck); 333 482 ··· 346 501 347 502 dev_dbg(dev, "starting TI HSUSB Controller\n"); 348 503 349 - pm_runtime_get_sync(dev); 350 - 351 504 if (pdata->ehci_data->phy_reset) { 352 505 if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) 353 506 gpio_request_one(pdata->ehci_data->reset_gpio_port[0], ··· 359 516 udelay(10); 360 517 } 361 518 519 + pm_runtime_get_sync(dev); 362 520 spin_lock_irqsave(&omap->lock, flags); 363 521 omap->usbhs_rev = usbhs_read(omap->uhh_base, OMAP_UHH_REVISION); 364 522 dev_dbg(dev, "OMAP UHH_REVISION 0x%x\n", omap->usbhs_rev); ··· 425 581 usbhs_write(omap->uhh_base, OMAP_UHH_HOSTCONFIG, reg); 426 582 dev_dbg(dev, "UHH setup done, uhh_hostconfig=%x\n", reg); 427 583 428 - if (is_ehci_tll_mode(pdata->port_mode[0]) || 429 - is_ehci_tll_mode(pdata->port_mode[1]) || 430 - is_ehci_tll_mode(pdata->port_mode[2]) || 431 - (is_ohci_port(pdata->port_mode[0])) || 432 - (is_ohci_port(pdata->port_mode[1])) || 433 - (is_ohci_port(pdata->port_mode[2]))) { 434 - 435 - /* Enable UTMI mode for required TLL channels */ 436 - if (is_omap_usbhs_rev2(omap)) 437 - usbhs_omap_tll_init(dev, OMAP_REV2_TLL_CHANNEL_COUNT); 438 - else 439 - usbhs_omap_tll_init(dev, OMAP_TLL_CHANNEL_COUNT); 440 - } 441 - 442 584 spin_unlock_irqrestore(&omap->lock, flags); 443 585 586 + pm_runtime_put_sync(dev); 444 587 if (pdata->ehci_data->phy_reset) { 445 588 /* Hold the PHY in RESET for enough time till 446 589 * PHY is settled and ready ··· 442 611 gpio_set_value_cansleep 443 612 (pdata->ehci_data->reset_gpio_port[1], 1); 444 613 } 445 - 446 - pm_runtime_put_sync(dev); 447 614 } 448 615 449 616 static void omap_usbhs_deinit(struct device *dev) ··· 544 715 goto err_xclk60mhsp2_ck; 545 716 } 546 717 547 - omap->usbtll_p1_fck = clk_get(dev, "usb_tll_hs_usb_ch0_clk"); 548 - if (IS_ERR(omap->usbtll_p1_fck)) { 549 - ret = PTR_ERR(omap->usbtll_p1_fck); 550 - dev_err(dev, "usbtll_p1_fck failed error:%d\n", ret); 551 - goto err_usbhost_p1_fck; 552 - } 553 - 554 718 omap->usbhost_p2_fck = clk_get(dev, "usb_host_hs_utmi_p2_clk"); 555 719 if (IS_ERR(omap->usbhost_p2_fck)) { 556 720 ret = PTR_ERR(omap->usbhost_p2_fck); 557 721 dev_err(dev, "usbhost_p2_fck failed error:%d\n", ret); 558 - goto err_usbtll_p1_fck; 559 - } 560 - 561 - omap->usbtll_p2_fck = clk_get(dev, "usb_tll_hs_usb_ch1_clk"); 562 - if (IS_ERR(omap->usbtll_p2_fck)) { 563 - ret = PTR_ERR(omap->usbtll_p2_fck); 564 - dev_err(dev, "usbtll_p2_fck failed error:%d\n", ret); 565 - goto err_usbhost_p2_fck; 722 + goto err_usbhost_p1_fck; 566 723 } 567 724 568 725 omap->init_60m_fclk = clk_get(dev, "init_60m_fclk"); 569 726 if (IS_ERR(omap->init_60m_fclk)) { 570 727 ret = PTR_ERR(omap->init_60m_fclk); 571 728 dev_err(dev, "init_60m_fclk failed error:%d\n", ret); 572 - goto err_usbtll_p2_fck; 729 + goto err_usbhost_p2_fck; 573 730 } 574 731 575 732 if (is_ehci_phy_mode(pdata->port_mode[0])) { ··· 601 786 goto err_init_60m_fclk; 602 787 } 603 788 604 - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tll"); 605 - if (!res) { 606 - dev_err(dev, "UHH EHCI get resource failed\n"); 607 - ret = -ENODEV; 608 - goto err_tll; 609 - } 610 - 611 - omap->tll_base = ioremap(res->start, resource_size(res)); 612 - if (!omap->tll_base) { 613 - dev_err(dev, "TLL ioremap failed\n"); 614 - ret = -ENOMEM; 615 - goto err_tll; 616 - } 617 - 618 789 platform_set_drvdata(pdev, omap); 619 790 620 791 omap_usbhs_init(dev); ··· 614 813 615 814 err_alloc: 616 815 omap_usbhs_deinit(&pdev->dev); 617 - iounmap(omap->tll_base); 618 - 619 - err_tll: 620 816 iounmap(omap->uhh_base); 621 817 622 818 err_init_60m_fclk: 623 819 clk_put(omap->init_60m_fclk); 624 820 625 - err_usbtll_p2_fck: 626 - clk_put(omap->usbtll_p2_fck); 627 - 628 821 err_usbhost_p2_fck: 629 822 clk_put(omap->usbhost_p2_fck); 630 - 631 - err_usbtll_p1_fck: 632 - clk_put(omap->usbtll_p1_fck); 633 823 634 824 err_usbhost_p1_fck: 635 825 clk_put(omap->usbhost_p1_fck); ··· 657 865 struct usbhs_hcd_omap *omap = platform_get_drvdata(pdev); 658 866 659 867 omap_usbhs_deinit(&pdev->dev); 660 - iounmap(omap->tll_base); 661 868 iounmap(omap->uhh_base); 662 869 clk_put(omap->init_60m_fclk); 663 - clk_put(omap->usbtll_p2_fck); 664 870 clk_put(omap->usbhost_p2_fck); 665 - clk_put(omap->usbtll_p1_fck); 666 871 clk_put(omap->usbhost_p1_fck); 667 872 clk_put(omap->xclk60mhsp2_ck); 668 873 clk_put(omap->utmi_p2_fck);