dt-bindings: phy: ti: gmii-sel: add support for am654x/j721e soc

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

TI AM654x/J721E SoCs have the same PHY interface selection mechanism for
CPSWx subsystem as TI SoCs (AM3/4/5/DRA7), but registers and bit-fields
placement is different.

This patch adds corresponding compatible strings to enable support for TI
AM654x/J721E SoCs.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

authored by

Grygorii Strashko and committed by

Kishon Vijay Abraham I 6 years ago 74e29703 6076967a

1 changed file

expand all

Documentation

devicetree

bindings

phy

ti-phy-gmii-sel.txt

Documentation/devicetree/bindings/phy/ti-phy-gmii-sel.txt

··· 40 40 "ti,dra7xx-phy-gmii-sel" for dra7xx/am57xx platform 41 41 "ti,am43xx-phy-gmii-sel" for am43xx platform 42 42 "ti,dm814-phy-gmii-sel" for dm814x platform 43 + "ti,am654-phy-gmii-sel" for AM654x/J721E platform 43 44 - reg : Address and length of the register set for the device 44 45 - #phy-cells : must be 2. 45 46 cell 1 - CPSW port number (starting from 1)