RDMA/nes: Formatting cleanup · tjh.dev/kernel@7495ab6

+4 -4

drivers/infiniband/hw/nes/nes_cm.c

··· 594 594 continue; 595 595 } 596 596 /* this seems like the correct place, but leave send entry unprotected */ 597 - // spin_unlock_irqrestore(&cm_node->retrans_list_lock, flags); 597 + /* spin_unlock_irqrestore(&cm_node->retrans_list_lock, flags); */ 598 598 atomic_inc(&send_entry->skb->users); 599 599 cm_packets_retrans++; 600 600 nes_debug(NES_DBG_CM, "Retransmitting send_entry %p for node %p," ··· 1335 1335 cm_node->loc_addr, cm_node->loc_port, 1336 1336 cm_node->rem_addr, cm_node->rem_port, 1337 1337 cm_node->state, atomic_read(&cm_node->ref_count)); 1338 - // create event 1338 + /* create event */ 1339 1339 cm_node->state = NES_CM_STATE_CLOSED; 1340 1340 1341 1341 create_event(cm_node, NES_CM_EVENT_ABORTED); ··· 1669 1669 if (!cm_node) 1670 1670 return NULL; 1671 1671 1672 - // set our node side to client (active) side 1672 + /* set our node side to client (active) side */ 1673 1673 cm_node->tcp_cntxt.client = 1; 1674 1674 cm_node->tcp_cntxt.rcv_wscale = NES_CM_DEFAULT_RCV_WND_SCALE; 1675 1675 ··· 1694 1694 loopbackremotenode->mpa_frame_size = mpa_frame_size - 1695 1695 sizeof(struct ietf_mpa_frame); 1696 1696 1697 - // we are done handling this state, set node to a TSA state 1697 + /* we are done handling this state, set node to a TSA state */ 1698 1698 cm_node->state = NES_CM_STATE_TSA; 1699 1699 cm_node->tcp_cntxt.rcv_nxt = loopbackremotenode->tcp_cntxt.loc_seq_num; 1700 1700 loopbackremotenode->tcp_cntxt.rcv_nxt = cm_node->tcp_cntxt.loc_seq_num;

+54 -49

drivers/infiniband/hw/nes/nes_hw.c

··· 833 833 nes_write_indexed(nesdev, 0x00000900, 0x20000001); 834 834 nes_write_indexed(nesdev, 0x000060C0, 0x0000028e); 835 835 nes_write_indexed(nesdev, 0x000060C8, 0x00000020); 836 - // 836 + 837 837 nes_write_indexed(nesdev, 0x000001EC, 0x7b2625a0); 838 838 /* nes_write_indexed(nesdev, 0x000001EC, 0x5f2625a0); */ 839 839 ··· 1229 1229 nes_read_1G_phy_reg(nesdev, 1, nesadapter->phy_index[mac_index], &phy_data); 1230 1230 nes_debug(NES_DBG_PHY, "Phy data from register 1 phy address %u = 0x%X.\n", 1231 1231 nesadapter->phy_index[mac_index], phy_data); 1232 - nes_write_1G_phy_reg(nesdev, 23, nesadapter->phy_index[mac_index], 0xb000); 1232 + nes_write_1G_phy_reg(nesdev, 23, nesadapter->phy_index[mac_index], 0xb000); 1233 1233 1234 1234 /* Reset the PHY */ 1235 1235 nes_write_1G_phy_reg(nesdev, 0, nesadapter->phy_index[mac_index], 0x8000); ··· 1373 1373 * the amcc phy is stable 1374 1374 */ 1375 1375 1376 - sds_common_control0 = nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0); 1376 + sds_common_control0 = nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0); 1377 1377 sds_common_control0 |= 0x1; 1378 1378 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0, sds_common_control0); 1379 1379 ··· 1382 1382 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0, sds_common_control0); 1383 1383 1384 1384 i = 0; 1385 - while (((nes_read32(nesdev->regs+NES_SOFTWARE_RESET) & 0x00000040) != 0x00000040) 1385 + while (((nes_read32(nesdev->regs + NES_SOFTWARE_RESET) & 0x00000040) != 0x00000040) 1386 1386 && (i++ < 5000)) { 1387 1387 /* mdelay(1); */ 1388 1388 } ··· 1659 1659 } 1660 1660 1661 1661 u64temp = (u64)nesvnic->nic.sq_pbase; 1662 - nic_context->context_words[NES_NIC_CTX_SQ_LOW_IDX] = cpu_to_le32((u32)u64temp); 1662 + nic_context->context_words[NES_NIC_CTX_SQ_LOW_IDX] = cpu_to_le32((u32)u64temp); 1663 1663 nic_context->context_words[NES_NIC_CTX_SQ_HIGH_IDX] = cpu_to_le32((u32)(u64temp >> 32)); 1664 1664 u64temp = (u64)nesvnic->nic.rq_pbase; 1665 - nic_context->context_words[NES_NIC_CTX_RQ_LOW_IDX] = cpu_to_le32((u32)u64temp); 1665 + nic_context->context_words[NES_NIC_CTX_RQ_LOW_IDX] = cpu_to_le32((u32)u64temp); 1666 1666 nic_context->context_words[NES_NIC_CTX_RQ_HIGH_IDX] = cpu_to_le32((u32)(u64temp >> 32)); 1667 1667 1668 1668 cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] = cpu_to_le32(NES_CQP_CREATE_QP | ··· 1714 1714 nic_rqe = &nesvnic->nic.rq_vbase[counter]; 1715 1715 nic_rqe->wqe_words[NES_NIC_RQ_WQE_LENGTH_1_0_IDX] = cpu_to_le32(nesvnic->max_frame_size); 1716 1716 nic_rqe->wqe_words[NES_NIC_RQ_WQE_LENGTH_3_2_IDX] = 0; 1717 - nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_LOW_IDX] = cpu_to_le32((u32)pmem); 1717 + nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_LOW_IDX] = cpu_to_le32((u32)pmem); 1718 1718 nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_HIGH_IDX] = cpu_to_le32((u32)((u64)pmem >> 32)); 1719 1719 nesvnic->nic.rx_skb[counter] = skb; 1720 1720 } ··· 1738 1738 jumbomode = 1; 1739 1739 nes_nic_init_timer_defaults(nesdev, jumbomode); 1740 1740 } 1741 - nesvnic->lro_mgr.max_aggr = NES_LRO_MAX_AGGR; 1742 - nesvnic->lro_mgr.max_desc = NES_MAX_LRO_DESCRIPTORS; 1743 - nesvnic->lro_mgr.lro_arr = nesvnic->lro_desc; 1741 + nesvnic->lro_mgr.max_aggr = NES_LRO_MAX_AGGR; 1742 + nesvnic->lro_mgr.max_desc = NES_MAX_LRO_DESCRIPTORS; 1743 + nesvnic->lro_mgr.lro_arr = nesvnic->lro_desc; 1744 1744 nesvnic->lro_mgr.get_skb_header = nes_lro_get_skb_hdr; 1745 - nesvnic->lro_mgr.features = LRO_F_NAPI | LRO_F_EXTRACT_VLAN_ID; 1746 - nesvnic->lro_mgr.dev = netdev; 1747 - nesvnic->lro_mgr.ip_summed = CHECKSUM_UNNECESSARY; 1745 + nesvnic->lro_mgr.features = LRO_F_NAPI | LRO_F_EXTRACT_VLAN_ID; 1746 + nesvnic->lro_mgr.dev = netdev; 1747 + nesvnic->lro_mgr.ip_summed = CHECKSUM_UNNECESSARY; 1748 1748 nesvnic->lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY; 1749 1749 return 0; 1750 1750 } ··· 1765 1765 1766 1766 /* Free remaining NIC receive buffers */ 1767 1767 while (nesvnic->nic.rq_head != nesvnic->nic.rq_tail) { 1768 - nic_rqe = &nesvnic->nic.rq_vbase[nesvnic->nic.rq_tail]; 1769 - wqe_frag = (u64)le32_to_cpu(nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_LOW_IDX]); 1768 + nic_rqe = &nesvnic->nic.rq_vbase[nesvnic->nic.rq_tail]; 1769 + wqe_frag = (u64)le32_to_cpu(nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_LOW_IDX]); 1770 1770 wqe_frag |= ((u64)le32_to_cpu(nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_HIGH_IDX])) << 32; 1771 1771 pci_unmap_single(nesdev->pcidev, (dma_addr_t)wqe_frag, 1772 1772 nesvnic->max_frame_size, PCI_DMA_FROMDEVICE); ··· 1849 1849 /* iff NIC, process here, else wait for DPC */ 1850 1850 if ((int_stat) && ((int_stat & 0x0000ff00) == int_stat)) { 1851 1851 nesdev->napi_isr_ran = 0; 1852 - nes_write32(nesdev->regs+NES_INT_STAT, 1853 - (int_stat & 1854 - ~(NES_INT_INTF|NES_INT_TIMER|NES_INT_MAC0|NES_INT_MAC1|NES_INT_MAC2|NES_INT_MAC3))); 1852 + nes_write32(nesdev->regs + NES_INT_STAT, 1853 + (int_stat & 1854 + ~(NES_INT_INTF | NES_INT_TIMER | NES_INT_MAC0 | NES_INT_MAC1 | NES_INT_MAC2 | NES_INT_MAC3))); 1855 1855 1856 1856 /* Process the CEQs */ 1857 1857 nes_process_ceq(nesdev, &nesdev->nesadapter->ceq[nesdev->nic_ceq_index]); 1858 1858 1859 1859 if (unlikely((((nesadapter->et_rx_coalesce_usecs_irq) && 1860 - (!nesadapter->et_use_adaptive_rx_coalesce)) || 1861 - ((nesadapter->et_use_adaptive_rx_coalesce) && 1862 - (nesdev->deepcq_count > nesadapter->et_pkt_rate_low)))) ) { 1860 + (!nesadapter->et_use_adaptive_rx_coalesce)) || 1861 + ((nesadapter->et_use_adaptive_rx_coalesce) && 1862 + (nesdev->deepcq_count > nesadapter->et_pkt_rate_low))))) { 1863 1863 if ((nesdev->int_req & NES_INT_TIMER) == 0) { 1864 1864 /* Enable Periodic timer interrupts */ 1865 1865 nesdev->int_req |= NES_INT_TIMER; ··· 1937 1937 } 1938 1938 1939 1939 if (int_stat) { 1940 - if (int_stat & ~(NES_INT_INTF|NES_INT_TIMER|NES_INT_MAC0| 1941 - NES_INT_MAC1|NES_INT_MAC2|NES_INT_MAC3)) { 1940 + if (int_stat & ~(NES_INT_INTF | NES_INT_TIMER | NES_INT_MAC0| 1941 + NES_INT_MAC1|NES_INT_MAC2 | NES_INT_MAC3)) { 1942 1942 /* Ack the interrupts */ 1943 1943 nes_write32(nesdev->regs+NES_INT_STAT, 1944 - (int_stat & ~(NES_INT_INTF|NES_INT_TIMER|NES_INT_MAC0| 1945 - NES_INT_MAC1|NES_INT_MAC2|NES_INT_MAC3))); 1944 + (int_stat & ~(NES_INT_INTF | NES_INT_TIMER | NES_INT_MAC0| 1945 + NES_INT_MAC1 | NES_INT_MAC2 | NES_INT_MAC3))); 1946 1946 } 1947 1947 1948 1948 temp_int_stat = int_stat; ··· 2007 2007 } 2008 2008 } 2009 2009 /* Don't use the interface interrupt bit stay in loop */ 2010 - int_stat &= ~NES_INT_INTF|NES_INT_TIMER|NES_INT_MAC0| 2011 - NES_INT_MAC1|NES_INT_MAC2|NES_INT_MAC3; 2010 + int_stat &= ~NES_INT_INTF | NES_INT_TIMER | NES_INT_MAC0 | 2011 + NES_INT_MAC1 | NES_INT_MAC2 | NES_INT_MAC3; 2012 2012 } while ((int_stat != 0) && (loop_counter++ < MAX_DPC_ITERATIONS)); 2013 2013 2014 2014 if (timer_ints == 1) { ··· 2019 2019 nesdev->timer_only_int_count = 0; 2020 2020 nesdev->int_req &= ~NES_INT_TIMER; 2021 2021 nes_write32(nesdev->regs + NES_INTF_INT_MASK, ~(nesdev->intf_int_req)); 2022 - nes_write32(nesdev->regs+NES_INT_MASK, ~nesdev->int_req); 2022 + nes_write32(nesdev->regs + NES_INT_MASK, ~nesdev->int_req); 2023 2023 } else { 2024 - nes_write32(nesdev->regs+NES_INT_MASK, 0x0000ffff|(~nesdev->int_req)); 2024 + nes_write32(nesdev->regs+NES_INT_MASK, 0x0000ffff | (~nesdev->int_req)); 2025 2025 } 2026 2026 } else { 2027 2027 if (unlikely(nesadapter->et_use_adaptive_rx_coalesce)) ··· 2029 2029 nes_nic_init_timer(nesdev); 2030 2030 } 2031 2031 nesdev->timer_only_int_count = 0; 2032 - nes_write32(nesdev->regs+NES_INT_MASK, 0x0000ffff|(~nesdev->int_req)); 2032 + nes_write32(nesdev->regs+NES_INT_MASK, 0x0000ffff | (~nesdev->int_req)); 2033 2033 } 2034 2034 } else { 2035 2035 nesdev->timer_only_int_count = 0; ··· 2078 2078 do { 2079 2079 if (le32_to_cpu(ceq->ceq_vbase[head].ceqe_words[NES_CEQE_CQ_CTX_HIGH_IDX]) & 2080 2080 NES_CEQE_VALID) { 2081 - u64temp = (((u64)(le32_to_cpu(ceq->ceq_vbase[head].ceqe_words[NES_CEQE_CQ_CTX_HIGH_IDX])))<<32) | 2081 + u64temp = (((u64)(le32_to_cpu(ceq->ceq_vbase[head].ceqe_words[NES_CEQE_CQ_CTX_HIGH_IDX]))) << 32) | 2082 2082 ((u64)(le32_to_cpu(ceq->ceq_vbase[head].ceqe_words[NES_CEQE_CQ_CTX_LOW_IDX]))); 2083 2083 u64temp <<= 1; 2084 2084 cq = *((struct nes_hw_cq **)&u64temp); ··· 2106 2106 */ 2107 2107 static void nes_process_aeq(struct nes_device *nesdev, struct nes_hw_aeq *aeq) 2108 2108 { 2109 - // u64 u64temp; 2109 + /* u64 u64temp; */ 2110 2110 u32 head; 2111 2111 u32 aeq_size; 2112 2112 u32 aeqe_misc; ··· 2125 2125 if (aeqe_misc & (NES_AEQE_QP|NES_AEQE_CQ)) { 2126 2126 if (aeqe_cq_id >= NES_FIRST_QPN) { 2127 2127 /* dealing with an accelerated QP related AE */ 2128 - // u64temp = (((u64)(le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_HIGH_IDX])))<<32) | 2129 - // ((u64)(le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_LOW_IDX]))); 2128 + /* 2129 + * u64temp = (((u64)(le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_HIGH_IDX]))) << 32) | 2130 + * ((u64)(le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_LOW_IDX]))); 2131 + */ 2130 2132 nes_process_iwarp_aeqe(nesdev, (struct nes_hw_aeqe *)aeqe); 2131 2133 } else { 2132 2134 /* TODO: dealing with a CQP related AE */ ··· 2476 2474 /* bump past the vlan tag */ 2477 2475 wqe_fragment_length++; 2478 2476 if (le16_to_cpu(wqe_fragment_length[wqe_fragment_index]) != 0) { 2479 - u64temp = (u64) le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_LOW_IDX+wqe_fragment_index*2]); 2480 - u64temp += ((u64)le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_HIGH_IDX+wqe_fragment_index*2]))<<32; 2477 + u64temp = (u64) le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_LOW_IDX + 2478 + wqe_fragment_index * 2]); 2479 + u64temp += ((u64)le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_HIGH_IDX + 2480 + wqe_fragment_index * 2])) << 32; 2481 2481 bus_address = (dma_addr_t)u64temp; 2482 2482 if (test_and_clear_bit(nesnic->sq_tail, nesnic->first_frag_overflow)) { 2483 2483 pci_unmap_single(nesdev->pcidev, ··· 2489 2485 } 2490 2486 for (; wqe_fragment_index < 5; wqe_fragment_index++) { 2491 2487 if (wqe_fragment_length[wqe_fragment_index]) { 2492 - u64temp = le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_LOW_IDX+wqe_fragment_index*2]); 2493 - u64temp += ((u64)le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_HIGH_IDX+wqe_fragment_index*2]))<<32; 2488 + u64temp = le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_LOW_IDX + 2489 + wqe_fragment_index * 2]); 2490 + u64temp += ((u64)le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_HIGH_IDX 2491 + + wqe_fragment_index * 2])) <<32; 2494 2492 bus_address = (dma_addr_t)u64temp; 2495 2493 pci_unmap_page(nesdev->pcidev, 2496 2494 bus_address, ··· 2539 2533 if (atomic_read(&nesvnic->rx_skbs_needed) > (nesvnic->nic.rq_size>>1)) { 2540 2534 nes_write32(nesdev->regs+NES_CQE_ALLOC, 2541 2535 cq->cq_number | (cqe_count << 16)); 2542 - // nesadapter->tune_timer.cq_count += cqe_count; 2536 + /* nesadapter->tune_timer.cq_count += cqe_count; */ 2543 2537 nesdev->currcq_count += cqe_count; 2544 2538 cqe_count = 0; 2545 2539 nes_replenish_nic_rq(nesvnic); ··· 2614 2608 /* Replenish Nic CQ */ 2615 2609 nes_write32(nesdev->regs+NES_CQE_ALLOC, 2616 2610 cq->cq_number | (cqe_count << 16)); 2617 - // nesdev->nesadapter->tune_timer.cq_count += cqe_count; 2611 + /* nesdev->nesadapter->tune_timer.cq_count += cqe_count; */ 2618 2612 nesdev->currcq_count += cqe_count; 2619 2613 cqe_count = 0; 2620 2614 } ··· 2642 2636 cq->cqe_allocs_pending = cqe_count; 2643 2637 if (unlikely(nesadapter->et_use_adaptive_rx_coalesce)) 2644 2638 { 2645 - // nesdev->nesadapter->tune_timer.cq_count += cqe_count; 2639 + /* nesdev->nesadapter->tune_timer.cq_count += cqe_count; */ 2646 2640 nesdev->currcq_count += cqe_count; 2647 2641 nes_nic_tune_timer(nesdev); 2648 2642 } ··· 2677 2671 2678 2672 if (le32_to_cpu(cq->cq_vbase[head].cqe_words[NES_CQE_OPCODE_IDX]) & NES_CQE_VALID) { 2679 2673 u64temp = (((u64)(le32_to_cpu(cq->cq_vbase[head]. 2680 - cqe_words[NES_CQE_COMP_COMP_CTX_HIGH_IDX])))<<32) | 2674 + cqe_words[NES_CQE_COMP_COMP_CTX_HIGH_IDX]))) << 32) | 2681 2675 ((u64)(le32_to_cpu(cq->cq_vbase[head]. 2682 2676 cqe_words[NES_CQE_COMP_COMP_CTX_LOW_IDX]))); 2683 2677 cqp = *((struct nes_hw_cqp **)&u64temp); ··· 2694 2688 } 2695 2689 2696 2690 u64temp = (((u64)(le32_to_cpu(nesdev->cqp.sq_vbase[cqp->sq_tail]. 2697 - wqe_words[NES_CQP_WQE_COMP_SCRATCH_HIGH_IDX])))<<32) | 2691 + wqe_words[NES_CQP_WQE_COMP_SCRATCH_HIGH_IDX]))) << 32) | 2698 2692 ((u64)(le32_to_cpu(nesdev->cqp.sq_vbase[cqp->sq_tail]. 2699 2693 wqe_words[NES_CQP_WQE_COMP_SCRATCH_LOW_IDX]))); 2700 2694 cqp_request = *((struct nes_cqp_request **)&u64temp); ··· 2731 2725 } else { 2732 2726 nes_debug(NES_DBG_CQP, "CQP request %p (opcode 0x%02X) freed.\n", 2733 2727 cqp_request, 2734 - le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_OPCODE_IDX])&0x3f); 2728 + le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_OPCODE_IDX]) & 0x3f); 2735 2729 if (cqp_request->dynamic) { 2736 2730 kfree(cqp_request); 2737 2731 } else { ··· 2745 2739 } 2746 2740 2747 2741 cq->cq_vbase[head].cqe_words[NES_CQE_OPCODE_IDX] = 0; 2748 - nes_write32(nesdev->regs+NES_CQE_ALLOC, cq->cq_number | (1 << 16)); 2742 + nes_write32(nesdev->regs + NES_CQE_ALLOC, cq->cq_number | (1 << 16)); 2749 2743 if (++cqp->sq_tail >= cqp->sq_size) 2750 2744 cqp->sq_tail = 0; 2751 2745 ··· 2814 2808 nes_debug(NES_DBG_AEQ, "\n"); 2815 2809 aeq_info = le32_to_cpu(aeqe->aeqe_words[NES_AEQE_MISC_IDX]); 2816 2810 if ((NES_AEQE_INBOUND_RDMA&aeq_info) || (!(NES_AEQE_QP&aeq_info))) { 2817 - context = le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_LOW_IDX]); 2811 + context = le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_LOW_IDX]); 2818 2812 context += ((u64)le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_HIGH_IDX])) << 32; 2819 2813 } else { 2820 2814 aeqe_context = le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_LOW_IDX]); 2821 2815 aeqe_context += ((u64)le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_HIGH_IDX])) << 32; 2822 2816 context = (unsigned long)nesadapter->qp_table[le32_to_cpu( 2823 - aeqe->aeqe_words[NES_AEQE_COMP_QP_CQ_ID_IDX])-NES_FIRST_QPN]; 2817 + aeqe->aeqe_words[NES_AEQE_COMP_QP_CQ_ID_IDX]) - NES_FIRST_QPN]; 2824 2818 BUG_ON(!context); 2825 2819 } 2826 2820 ··· 2832 2826 async_event_id, 2833 2827 le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_QP_CQ_ID_IDX]), aeqe, 2834 2828 nes_tcp_state_str[tcp_state], nes_iwarp_state_str[iwarp_state]); 2835 - 2836 2829 2837 2830 switch (async_event_id) { 2838 2831 case NES_AEQE_AEID_LLP_FIN_RECEIVED: ··· 3236 3231 cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] |= cpu_to_le32(NES_CQP_ARP_VALID); 3237 3232 cqp_wqe->wqe_words[NES_CQP_ARP_WQE_MAC_ADDR_LOW_IDX] = cpu_to_le32( 3238 3233 (((u32)mac_addr[2]) << 24) | (((u32)mac_addr[3]) << 16) | 3239 - (((u32)mac_addr[4]) << 8) | (u32)mac_addr[5]); 3234 + (((u32)mac_addr[4]) << 8) | (u32)mac_addr[5]); 3240 3235 cqp_wqe->wqe_words[NES_CQP_ARP_WQE_MAC_HIGH_IDX] = cpu_to_le32( 3241 3236 (((u32)mac_addr[0]) << 16) | (u32)mac_addr[1]); 3242 3237 } else {

+1 -1

drivers/infiniband/hw/nes/nes_hw.h

··· 969 969 #define NES_NIC_CQ_DOWNWARD_TREND 16 970 970 971 971 struct nes_hw_tune_timer { 972 - //u16 cq_count; 972 + /* u16 cq_count; */ 973 973 u16 threshold_low; 974 974 u16 threshold_target; 975 975 u16 threshold_high;

+49 -47

drivers/infiniband/hw/nes/nes_nic.c

··· 185 185 nic_active |= nic_active_bit; 186 186 nes_write_indexed(nesdev, NES_IDX_NIC_BROADCAST_ON, nic_active); 187 187 188 - macaddr_high = ((u16)netdev->dev_addr[0]) << 8; 188 + macaddr_high = ((u16)netdev->dev_addr[0]) << 8; 189 189 macaddr_high += (u16)netdev->dev_addr[1]; 190 - macaddr_low = ((u32)netdev->dev_addr[2]) << 24; 191 - macaddr_low += ((u32)netdev->dev_addr[3]) << 16; 192 - macaddr_low += ((u32)netdev->dev_addr[4]) << 8; 193 - macaddr_low += (u32)netdev->dev_addr[5]; 190 + 191 + macaddr_low = ((u32)netdev->dev_addr[2]) << 24; 192 + macaddr_low += ((u32)netdev->dev_addr[3]) << 16; 193 + macaddr_low += ((u32)netdev->dev_addr[4]) << 8; 194 + macaddr_low += (u32)netdev->dev_addr[5]; 194 195 195 196 /* Program the various MAC regs */ 196 197 for (i = 0; i < NES_MAX_PORT_COUNT; i++) { ··· 452 451 __le16 *wqe_fragment_length; 453 452 u32 nr_frags; 454 453 u32 original_first_length; 455 - // u64 *wqe_fragment_address; 454 + /* u64 *wqe_fragment_address; */ 456 455 /* first fragment (0) is used by copy buffer */ 457 456 u16 wqe_fragment_index=1; 458 457 u16 hoffset; ··· 462 461 u32 old_head; 463 462 u32 wqe_misc; 464 463 465 - /* nes_debug(NES_DBG_NIC_TX, "%s Request to tx NIC packet length %u, headlen %u," 466 - " (%u frags), tso_size=%u\n", 467 - netdev->name, skb->len, skb_headlen(skb), 468 - skb_shinfo(skb)->nr_frags, skb_is_gso(skb)); 469 - */ 464 + /* 465 + * nes_debug(NES_DBG_NIC_TX, "%s Request to tx NIC packet length %u, headlen %u," 466 + * " (%u frags), tso_size=%u\n", 467 + * netdev->name, skb->len, skb_headlen(skb), 468 + * skb_shinfo(skb)->nr_frags, skb_is_gso(skb)); 469 + */ 470 470 471 471 if (!netif_carrier_ok(netdev)) 472 472 return NETDEV_TX_OK; ··· 797 795 memcpy(netdev->dev_addr, mac_addr->sa_data, netdev->addr_len); 798 796 printk(PFX "%s: Address length = %d, Address = %s\n", 799 797 __func__, netdev->addr_len, print_mac(mac, mac_addr->sa_data)); 800 - macaddr_high = ((u16)netdev->dev_addr[0]) << 8; 798 + macaddr_high = ((u16)netdev->dev_addr[0]) << 8; 801 799 macaddr_high += (u16)netdev->dev_addr[1]; 802 - macaddr_low = ((u32)netdev->dev_addr[2]) << 24; 803 - macaddr_low += ((u32)netdev->dev_addr[3]) << 16; 804 - macaddr_low += ((u32)netdev->dev_addr[4]) << 8; 805 - macaddr_low += (u32)netdev->dev_addr[5]; 800 + macaddr_low = ((u32)netdev->dev_addr[2]) << 24; 801 + macaddr_low += ((u32)netdev->dev_addr[3]) << 16; 802 + macaddr_low += ((u32)netdev->dev_addr[4]) << 8; 803 + macaddr_low += (u32)netdev->dev_addr[5]; 806 804 807 805 for (i = 0; i < NES_MAX_PORT_COUNT; i++) { 808 806 if (nesvnic->qp_nic_index[i] == 0xf) { ··· 883 881 print_mac(mac, multicast_addr->dmi_addr), 884 882 perfect_filter_register_address+(mc_index * 8), 885 883 mc_nic_index); 886 - macaddr_high = ((u16)multicast_addr->dmi_addr[0]) << 8; 884 + macaddr_high = ((u16)multicast_addr->dmi_addr[0]) << 8; 887 885 macaddr_high += (u16)multicast_addr->dmi_addr[1]; 888 - macaddr_low = ((u32)multicast_addr->dmi_addr[2]) << 24; 889 - macaddr_low += ((u32)multicast_addr->dmi_addr[3]) << 16; 890 - macaddr_low += ((u32)multicast_addr->dmi_addr[4]) << 8; 891 - macaddr_low += (u32)multicast_addr->dmi_addr[5]; 886 + macaddr_low = ((u32)multicast_addr->dmi_addr[2]) << 24; 887 + macaddr_low += ((u32)multicast_addr->dmi_addr[3]) << 16; 888 + macaddr_low += ((u32)multicast_addr->dmi_addr[4]) << 8; 889 + macaddr_low += (u32)multicast_addr->dmi_addr[5]; 892 890 nes_write_indexed(nesdev, 893 891 perfect_filter_register_address+(mc_index * 8), 894 892 macaddr_low); ··· 912 910 /** 913 911 * nes_netdev_change_mtu 914 912 */ 915 - static int nes_netdev_change_mtu(struct net_device *netdev, int new_mtu) 913 + static int nes_netdev_change_mtu(struct net_device *netdev, int new_mtu) 916 914 { 917 915 struct nes_vnic *nesvnic = netdev_priv(netdev); 918 - struct nes_device *nesdev = nesvnic->nesdev; 919 - int ret = 0; 920 - u8 jumbomode=0; 916 + struct nes_device *nesdev = nesvnic->nesdev; 917 + int ret = 0; 918 + u8 jumbomode = 0; 921 919 922 - if ((new_mtu < ETH_ZLEN) || (new_mtu > max_mtu)) 920 + if ((new_mtu < ETH_ZLEN) || (new_mtu > max_mtu)) 923 921 return -EINVAL; 924 922 925 - netdev->mtu = new_mtu; 923 + netdev->mtu = new_mtu; 926 924 nesvnic->max_frame_size = new_mtu + VLAN_ETH_HLEN; 927 925 928 926 if (netdev->mtu > 1500) { 929 927 jumbomode=1; 930 928 } 931 - nes_nic_init_timer_defaults(nesdev, jumbomode); 929 + nes_nic_init_timer_defaults(nesdev, jumbomode); 932 930 933 931 if (netif_running(netdev)) { 934 932 nes_netdev_stop(netdev); ··· 1227 1225 struct ethtool_coalesce *et_coalesce) 1228 1226 { 1229 1227 struct nes_vnic *nesvnic = netdev_priv(netdev); 1230 - struct nes_device *nesdev = nesvnic->nesdev; 1228 + struct nes_device *nesdev = nesvnic->nesdev; 1231 1229 struct nes_adapter *nesadapter = nesdev->nesadapter; 1232 1230 struct nes_hw_tune_timer *shared_timer = &nesadapter->tune_timer; 1233 1231 unsigned long flags; 1234 1232 1235 - spin_lock_irqsave(&nesadapter->periodic_timer_lock, flags); 1233 + spin_lock_irqsave(&nesadapter->periodic_timer_lock, flags); 1236 1234 if (et_coalesce->rx_max_coalesced_frames_low) { 1237 - shared_timer->threshold_low = et_coalesce->rx_max_coalesced_frames_low; 1235 + shared_timer->threshold_low = et_coalesce->rx_max_coalesced_frames_low; 1238 1236 } 1239 1237 if (et_coalesce->rx_max_coalesced_frames_irq) { 1240 1238 shared_timer->threshold_target = et_coalesce->rx_max_coalesced_frames_irq; ··· 1254 1252 nesadapter->et_rx_coalesce_usecs_irq = et_coalesce->rx_coalesce_usecs_irq; 1255 1253 if (et_coalesce->use_adaptive_rx_coalesce) { 1256 1254 nesadapter->et_use_adaptive_rx_coalesce = 1; 1257 - nesadapter->timer_int_limit = NES_TIMER_INT_LIMIT_DYNAMIC; 1255 + nesadapter->timer_int_limit = NES_TIMER_INT_LIMIT_DYNAMIC; 1258 1256 nesadapter->et_rx_coalesce_usecs_irq = 0; 1259 1257 if (et_coalesce->pkt_rate_low) { 1260 - nesadapter->et_pkt_rate_low = et_coalesce->pkt_rate_low; 1258 + nesadapter->et_pkt_rate_low = et_coalesce->pkt_rate_low; 1261 1259 } 1262 1260 } else { 1263 1261 nesadapter->et_use_adaptive_rx_coalesce = 0; 1264 - nesadapter->timer_int_limit = NES_TIMER_INT_LIMIT; 1262 + nesadapter->timer_int_limit = NES_TIMER_INT_LIMIT; 1265 1263 if (nesadapter->et_rx_coalesce_usecs_irq) { 1266 1264 nes_write32(nesdev->regs+NES_PERIODIC_CONTROL, 1267 1265 0x80000000 | ((u32)(nesadapter->et_rx_coalesce_usecs_irq*8))); ··· 1278 1276 struct ethtool_coalesce *et_coalesce) 1279 1277 { 1280 1278 struct nes_vnic *nesvnic = netdev_priv(netdev); 1281 - struct nes_device *nesdev = nesvnic->nesdev; 1279 + struct nes_device *nesdev = nesvnic->nesdev; 1282 1280 struct nes_adapter *nesadapter = nesdev->nesadapter; 1283 1281 struct ethtool_coalesce temp_et_coalesce; 1284 1282 struct nes_hw_tune_timer *shared_timer = &nesadapter->tune_timer; 1285 1283 unsigned long flags; 1286 1284 1287 1285 memset(&temp_et_coalesce, 0, sizeof(temp_et_coalesce)); 1288 - temp_et_coalesce.rx_coalesce_usecs_irq = nesadapter->et_rx_coalesce_usecs_irq; 1289 - temp_et_coalesce.use_adaptive_rx_coalesce = nesadapter->et_use_adaptive_rx_coalesce; 1290 - temp_et_coalesce.rate_sample_interval = nesadapter->et_rate_sample_interval; 1286 + temp_et_coalesce.rx_coalesce_usecs_irq = nesadapter->et_rx_coalesce_usecs_irq; 1287 + temp_et_coalesce.use_adaptive_rx_coalesce = nesadapter->et_use_adaptive_rx_coalesce; 1288 + temp_et_coalesce.rate_sample_interval = nesadapter->et_rate_sample_interval; 1291 1289 temp_et_coalesce.pkt_rate_low = nesadapter->et_pkt_rate_low; 1292 1290 spin_lock_irqsave(&nesadapter->periodic_timer_lock, flags); 1293 - temp_et_coalesce.rx_max_coalesced_frames_low = shared_timer->threshold_low; 1294 - temp_et_coalesce.rx_max_coalesced_frames_irq = shared_timer->threshold_target; 1291 + temp_et_coalesce.rx_max_coalesced_frames_low = shared_timer->threshold_low; 1292 + temp_et_coalesce.rx_max_coalesced_frames_irq = shared_timer->threshold_target; 1295 1293 temp_et_coalesce.rx_max_coalesced_frames_high = shared_timer->threshold_high; 1296 - temp_et_coalesce.rx_coalesce_usecs_low = shared_timer->timer_in_use_min; 1294 + temp_et_coalesce.rx_coalesce_usecs_low = shared_timer->timer_in_use_min; 1297 1295 temp_et_coalesce.rx_coalesce_usecs_high = shared_timer->timer_in_use_max; 1298 1296 if (nesadapter->et_use_adaptive_rx_coalesce) { 1299 1297 temp_et_coalesce.rx_coalesce_usecs_irq = shared_timer->timer_in_use; 1300 1298 } 1301 1299 spin_unlock_irqrestore(&nesadapter->periodic_timer_lock, flags); 1302 - memcpy(et_coalesce, &temp_et_coalesce, sizeof(*et_coalesce)); 1300 + memcpy(et_coalesce, &temp_et_coalesce, sizeof(*et_coalesce)); 1303 1301 return 0; 1304 1302 } 1305 1303 ··· 1378 1376 u16 phy_data; 1379 1377 1380 1378 et_cmd->duplex = DUPLEX_FULL; 1381 - et_cmd->port = PORT_MII; 1379 + et_cmd->port = PORT_MII; 1382 1380 1383 1381 if (nesadapter->OneG_Mode) { 1384 1382 et_cmd->speed = SPEED_1000; ··· 1403 1401 if ((nesadapter->phy_type[nesdev->mac_index] == NES_PHY_TYPE_IRIS) || 1404 1402 (nesadapter->phy_type[nesdev->mac_index] == NES_PHY_TYPE_ARGUS)) { 1405 1403 et_cmd->transceiver = XCVR_EXTERNAL; 1406 - et_cmd->port = PORT_FIBRE; 1407 - et_cmd->supported = SUPPORTED_FIBRE; 1404 + et_cmd->port = PORT_FIBRE; 1405 + et_cmd->supported = SUPPORTED_FIBRE; 1408 1406 et_cmd->advertising = ADVERTISED_FIBRE; 1409 1407 et_cmd->phy_address = nesadapter->phy_index[nesdev->mac_index]; 1410 1408 } else { 1411 1409 et_cmd->transceiver = XCVR_INTERNAL; 1412 - et_cmd->supported = SUPPORTED_10000baseT_Full; 1410 + et_cmd->supported = SUPPORTED_10000baseT_Full; 1413 1411 et_cmd->advertising = ADVERTISED_10000baseT_Full; 1414 1412 et_cmd->phy_address = nesdev->mac_index; 1415 1413 } ··· 1440 1438 /* Turn on Full duplex, Autoneg, and restart autonegotiation */ 1441 1439 phy_data |= 0x1300; 1442 1440 } else { 1443 - // Turn off autoneg 1441 + /* Turn off autoneg */ 1444 1442 phy_data &= ~0x1000; 1445 1443 } 1446 1444 nes_write_1G_phy_reg(nesdev, 0, nesadapter->phy_index[nesdev->mac_index],

+1 -1

drivers/infiniband/hw/nes/nes_verbs.c

··· 1266 1266 sq_size = init_attr->cap.max_send_wr; 1267 1267 rq_size = init_attr->cap.max_recv_wr; 1268 1268 1269 - // check if the encoded sizes are OK or not... 1269 + /* check if the encoded sizes are OK or not... */ 1270 1270 sq_encoded_size = nes_get_encoded_size(&sq_size); 1271 1271 rq_encoded_size = nes_get_encoded_size(&rq_size); 1272 1272