tjh.dev / kernel
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ARM: at91: pm: Remove 2.5V regulator

Remove 2.5V regulator since enabling and disabling this regulator is no
longer supported.

Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/a6785a40648b315a07152bca261a42bbf0f356af.1757519351.git.Ryan.Wanner@microchip.com
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>

authored by

Ryan Wanner and committed by
Nicolas Ferre 74743675 3cae7d18

-36
-29
arch/arm/mach-at91/pm_suspend.S
··· 87 87 88 88 .endm 89 89 90 - /** 91 - * Set state for 2.5V low power regulator 92 - * @ena: 0 - disable regulator 93 - * 1 - enable regulator 94 - * 95 - * Side effects: overwrites r7, r8, r9, r10 96 - */ 97 - .macro at91_2_5V_reg_set_low_power ena 98 - #ifdef CONFIG_SOC_SAMA7 99 - ldr r7, .sfrbu 100 - mov r8, #\ena 101 - ldr r9, [r7, #AT91_SFRBU_25LDOCR] 102 - orr r9, r9, #AT91_SFRBU_25LDOCR_LP 103 - cmp r8, #1 104 - beq lp_done_\ena 105 - bic r9, r9, #AT91_SFRBU_25LDOCR_LP 106 - lp_done_\ena: 107 - ldr r10, =AT91_SFRBU_25LDOCR_LDOANAKEY 108 - orr r9, r9, r10 109 - str r9, [r7, #AT91_SFRBU_25LDOCR] 110 - #endif 111 - .endm 112 - 113 90 .macro at91_backup_set_lpm reg 114 91 #ifdef CONFIG_SOC_SAMA7 115 92 orr \reg, \reg, #0x200000 ··· 1000 1023 1001 1024 at91_plla_disable 1002 1025 1003 - /* Enable low power mode for 2.5V regulator. */ 1004 - at91_2_5V_reg_set_low_power 1 1005 - 1006 1026 ldr tmp3, .pm_mode 1007 1027 cmp tmp3, #AT91_PM_ULP1 1008 1028 beq ulp1_mode ··· 1012 1038 b ulp_exit 1013 1039 1014 1040 ulp_exit: 1015 - /* Disable low power mode for 2.5V regulator. */ 1016 - at91_2_5V_reg_set_low_power 0 1017 - 1018 1041 ldr pmc, .pmc_base 1019 1042 1020 1043 at91_plla_enable
-7
include/soc/at91/sama7-sfrbu.h
··· 18 18 #define AT91_SFRBU_PSWBU_SOFTSWITCH (1 << 1) /* Power switch BU source selection */ 19 19 #define AT91_SFRBU_PSWBU_CTRL (1 << 0) /* Power switch BU control */ 20 20 21 - #define AT91_SFRBU_25LDOCR (0x0C) /* SFRBU 2.5V LDO Control Register */ 22 - #define AT91_SFRBU_25LDOCR_LDOANAKEY (0x3B6E18 << 8) /* Specific value mandatory to allow writing of other register bits. */ 23 - #define AT91_SFRBU_25LDOCR_STATE (1 << 3) /* LDOANA Switch On/Off Control */ 24 - #define AT91_SFRBU_25LDOCR_LP (1 << 2) /* LDOANA Low-Power Mode Control */ 25 - #define AT91_SFRBU_PD_VALUE_MSK (0x3) 26 - #define AT91_SFRBU_25LDOCR_PD_VALUE(v) ((v) & AT91_SFRBU_PD_VALUE_MSK) /* LDOANA Pull-down value */ 27 - 28 21 #define AT91_FRBU_DDRPWR (0x10) /* SFRBU DDR Power Control Register */ 29 22 #define AT91_FRBU_DDRPWR_STATE (1 << 0) /* DDR Power Mode State */ 30 23