drm/i915/tc: convert intel_tc.c to struct intel_display

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

Going forward, struct intel_display is the main display device data
pointer. Convert intel_tc.c to struct intel_display.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://lore.kernel.org/r/bbff21269f348ac72eb749b6cf3f692234bed9f2.1742554320.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Jani Nikula 1 year ago 744edb46 5e4098f7

+127 -139

1 changed file

expand all

drivers

gpu

drm

i915

display

intel_tc.c

+127 -139

drivers/gpu/drm/i915/display/intel_tc.c

··· 3 3 * Copyright © 2019 Intel Corporation 4 4 */ 5 5 6 - #include "i915_drv.h" 7 6 #include "i915_reg.h" 7 + #include "i915_utils.h" 8 8 #include "intel_atomic.h" 9 9 #include "intel_cx0_phy_regs.h" 10 10 #include "intel_ddi.h" ··· 90 90 static struct intel_tc_port *to_tc_port(struct intel_digital_port *dig_port) 91 91 { 92 92 return dig_port->tc; 93 - } 94 - 95 - static struct drm_i915_private *tc_to_i915(struct intel_tc_port *tc) 96 - { 97 - return to_i915(tc->dig_port->base.base.dev); 98 93 } 99 94 100 95 static bool intel_tc_port_in_mode(struct intel_digital_port *dig_port, ··· 214 219 static void 215 220 tc_cold_unblock(struct intel_tc_port *tc, intel_wakeref_t wakeref) 216 221 { 222 + struct intel_display __maybe_unused *display = to_intel_display(tc->dig_port); 217 223 enum intel_display_power_domain domain = tc_phy_cold_off_domain(tc); 218 224 219 225 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM) 220 - drm_WARN_ON(&tc_to_i915(tc)->drm, tc->lock_power_domain != domain); 226 + drm_WARN_ON(display->drm, tc->lock_power_domain != domain); 221 227 #endif 222 228 __tc_cold_unblock(tc, domain, wakeref); 223 229 } ··· 262 266 263 267 static u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port) 264 268 { 265 - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); 269 + struct intel_display *display = to_intel_display(dig_port); 266 270 struct intel_tc_port *tc = to_tc_port(dig_port); 267 271 u32 lane_mask; 268 272 269 - lane_mask = intel_de_read(i915, PORT_TX_DFLEXDPSP(tc->phy_fia)); 273 + lane_mask = intel_de_read(display, PORT_TX_DFLEXDPSP(tc->phy_fia)); 270 274 271 - drm_WARN_ON(&i915->drm, lane_mask == 0xffffffff); 275 + drm_WARN_ON(display->drm, lane_mask == 0xffffffff); 272 276 assert_tc_cold_blocked(tc); 273 277 274 278 lane_mask &= DP_LANE_ASSIGNMENT_MASK(tc->phy_fia_idx); ··· 277 281 278 282 u32 intel_tc_port_get_pin_assignment_mask(struct intel_digital_port *dig_port) 279 283 { 280 - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); 284 + struct intel_display *display = to_intel_display(dig_port); 281 285 struct intel_tc_port *tc = to_tc_port(dig_port); 282 286 u32 pin_mask; 283 287 284 - pin_mask = intel_de_read(i915, PORT_TX_DFLEXPA1(tc->phy_fia)); 288 + pin_mask = intel_de_read(display, PORT_TX_DFLEXPA1(tc->phy_fia)); 285 289 286 - drm_WARN_ON(&i915->drm, pin_mask == 0xffffffff); 290 + drm_WARN_ON(display->drm, pin_mask == 0xffffffff); 287 291 assert_tc_cold_blocked(tc); 288 292 289 293 return (pin_mask & DP_PIN_ASSIGNMENT_MASK(tc->phy_fia_idx)) >> ··· 293 297 static int lnl_tc_port_get_max_lane_count(struct intel_digital_port *dig_port) 294 298 { 295 299 struct intel_display *display = to_intel_display(dig_port); 296 - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); 297 300 enum tc_port tc_port = intel_encoder_to_tc(&dig_port->base); 298 301 intel_wakeref_t wakeref; 299 302 u32 val, pin_assignment; 300 303 301 304 with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE, wakeref) 302 - val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port)); 305 + val = intel_de_read(display, TCSS_DDI_STATUS(tc_port)); 303 306 304 307 pin_assignment = 305 308 REG_FIELD_GET(TCSS_DDI_STATUS_PIN_ASSIGNMENT_MASK, val); ··· 364 369 365 370 int intel_tc_port_max_lane_count(struct intel_digital_port *dig_port) 366 371 { 367 - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); 372 + struct intel_display *display = to_intel_display(dig_port); 368 373 struct intel_tc_port *tc = to_tc_port(dig_port); 369 374 370 375 if (!intel_encoder_is_tc(&dig_port->base) || tc->mode != TC_PORT_DP_ALT) ··· 372 377 373 378 assert_tc_cold_blocked(tc); 374 379 375 - if (DISPLAY_VER(i915) >= 20) 380 + if (DISPLAY_VER(display) >= 20) 376 381 return lnl_tc_port_get_max_lane_count(dig_port); 377 382 378 - if (DISPLAY_VER(i915) >= 14) 383 + if (DISPLAY_VER(display) >= 14) 379 384 return mtl_tc_port_get_max_lane_count(dig_port); 380 385 381 386 return intel_tc_port_get_max_lane_count(dig_port); ··· 384 389 void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port, 385 390 int required_lanes) 386 391 { 387 - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); 392 + struct intel_display *display = to_intel_display(dig_port); 388 393 struct intel_tc_port *tc = to_tc_port(dig_port); 389 394 bool lane_reversal = dig_port->lane_reversal; 390 395 u32 val; 391 396 392 - if (DISPLAY_VER(i915) >= 14) 397 + if (DISPLAY_VER(display) >= 14) 393 398 return; 394 399 395 - drm_WARN_ON(&i915->drm, 400 + drm_WARN_ON(display->drm, 396 401 lane_reversal && tc->mode != TC_PORT_LEGACY); 397 402 398 403 assert_tc_cold_blocked(tc); 399 404 400 - val = intel_de_read(i915, PORT_TX_DFLEXDPMLE1(tc->phy_fia)); 405 + val = intel_de_read(display, PORT_TX_DFLEXDPMLE1(tc->phy_fia)); 401 406 val &= ~DFLEXDPMLE1_DPMLETC_MASK(tc->phy_fia_idx); 402 407 403 408 switch (required_lanes) { ··· 418 423 MISSING_CASE(required_lanes); 419 424 } 420 425 421 - intel_de_write(i915, PORT_TX_DFLEXDPMLE1(tc->phy_fia), val); 426 + intel_de_write(display, PORT_TX_DFLEXDPMLE1(tc->phy_fia), val); 422 427 } 423 428 424 429 static void tc_port_fixup_legacy_flag(struct intel_tc_port *tc, 425 430 u32 live_status_mask) 426 431 { 427 - struct drm_i915_private *i915 = tc_to_i915(tc); 432 + struct intel_display *display = to_intel_display(tc->dig_port); 428 433 u32 valid_hpd_mask; 429 434 430 - drm_WARN_ON(&i915->drm, tc->mode != TC_PORT_DISCONNECTED); 435 + drm_WARN_ON(display->drm, tc->mode != TC_PORT_DISCONNECTED); 431 436 432 437 if (hweight32(live_status_mask) != 1) 433 438 return; ··· 442 447 return; 443 448 444 449 /* If live status mismatches the VBT flag, trust the live status. */ 445 - drm_dbg_kms(&i915->drm, 450 + drm_dbg_kms(display->drm, 446 451 "Port %s: live status %08x mismatches the legacy port flag %08x, fixing flag\n", 447 452 tc->port_name, live_status_mask, valid_hpd_mask); 448 453 ··· 485 490 static u32 icl_tc_phy_hpd_live_status(struct intel_tc_port *tc) 486 491 { 487 492 struct intel_display *display = to_intel_display(tc->dig_port); 488 - struct drm_i915_private *i915 = tc_to_i915(tc); 489 493 struct intel_digital_port *dig_port = tc->dig_port; 490 - u32 isr_bit = i915->display.hotplug.pch_hpd[dig_port->base.hpd_pin]; 494 + u32 isr_bit = display->hotplug.pch_hpd[dig_port->base.hpd_pin]; 491 495 intel_wakeref_t wakeref; 492 496 u32 fia_isr; 493 497 u32 pch_isr; 494 498 u32 mask = 0; 495 499 496 500 with_intel_display_power(display, tc_phy_cold_off_domain(tc), wakeref) { 497 - fia_isr = intel_de_read(i915, PORT_TX_DFLEXDPSP(tc->phy_fia)); 498 - pch_isr = intel_de_read(i915, SDEISR); 501 + fia_isr = intel_de_read(display, PORT_TX_DFLEXDPSP(tc->phy_fia)); 502 + pch_isr = intel_de_read(display, SDEISR); 499 503 } 500 504 501 505 if (fia_isr == 0xffffffff) { 502 - drm_dbg_kms(&i915->drm, 506 + drm_dbg_kms(display->drm, 503 507 "Port %s: PHY in TCCOLD, nothing connected\n", 504 508 tc->port_name); 505 509 return mask; ··· 525 531 */ 526 532 static bool icl_tc_phy_is_ready(struct intel_tc_port *tc) 527 533 { 528 - struct drm_i915_private *i915 = tc_to_i915(tc); 534 + struct intel_display *display = to_intel_display(tc->dig_port); 529 535 u32 val; 530 536 531 537 assert_tc_cold_blocked(tc); 532 538 533 - val = intel_de_read(i915, PORT_TX_DFLEXDPPMS(tc->phy_fia)); 539 + val = intel_de_read(display, PORT_TX_DFLEXDPPMS(tc->phy_fia)); 534 540 if (val == 0xffffffff) { 535 - drm_dbg_kms(&i915->drm, 541 + drm_dbg_kms(display->drm, 536 542 "Port %s: PHY in TCCOLD, assuming not ready\n", 537 543 tc->port_name); 538 544 return false; ··· 544 550 static bool icl_tc_phy_take_ownership(struct intel_tc_port *tc, 545 551 bool take) 546 552 { 547 - struct drm_i915_private *i915 = tc_to_i915(tc); 553 + struct intel_display *display = to_intel_display(tc->dig_port); 548 554 u32 val; 549 555 550 556 assert_tc_cold_blocked(tc); 551 557 552 - val = intel_de_read(i915, PORT_TX_DFLEXDPCSSS(tc->phy_fia)); 558 + val = intel_de_read(display, PORT_TX_DFLEXDPCSSS(tc->phy_fia)); 553 559 if (val == 0xffffffff) { 554 - drm_dbg_kms(&i915->drm, 560 + drm_dbg_kms(display->drm, 555 561 "Port %s: PHY in TCCOLD, can't %s ownership\n", 556 562 tc->port_name, take ? "take" : "release"); 557 563 ··· 562 568 if (take) 563 569 val |= DP_PHY_MODE_STATUS_NOT_SAFE(tc->phy_fia_idx); 564 570 565 - intel_de_write(i915, PORT_TX_DFLEXDPCSSS(tc->phy_fia), val); 571 + intel_de_write(display, PORT_TX_DFLEXDPCSSS(tc->phy_fia), val); 566 572 567 573 return true; 568 574 } 569 575 570 576 static bool icl_tc_phy_is_owned(struct intel_tc_port *tc) 571 577 { 572 - struct drm_i915_private *i915 = tc_to_i915(tc); 578 + struct intel_display *display = to_intel_display(tc->dig_port); 573 579 u32 val; 574 580 575 581 assert_tc_cold_blocked(tc); 576 582 577 - val = intel_de_read(i915, PORT_TX_DFLEXDPCSSS(tc->phy_fia)); 583 + val = intel_de_read(display, PORT_TX_DFLEXDPCSSS(tc->phy_fia)); 578 584 if (val == 0xffffffff) { 579 - drm_dbg_kms(&i915->drm, 585 + drm_dbg_kms(display->drm, 580 586 "Port %s: PHY in TCCOLD, assume not owned\n", 581 587 tc->port_name); 582 588 return false; ··· 613 619 static bool tc_phy_verify_legacy_or_dp_alt_mode(struct intel_tc_port *tc, 614 620 int required_lanes) 615 621 { 616 - struct drm_i915_private *i915 = tc_to_i915(tc); 622 + struct intel_display *display = to_intel_display(tc->dig_port); 617 623 struct intel_digital_port *dig_port = tc->dig_port; 618 624 int max_lanes; 619 625 620 626 max_lanes = intel_tc_port_max_lane_count(dig_port); 621 627 if (tc->mode == TC_PORT_LEGACY) { 622 - drm_WARN_ON(&i915->drm, max_lanes != 4); 628 + drm_WARN_ON(display->drm, max_lanes != 4); 623 629 return true; 624 630 } 625 631 626 - drm_WARN_ON(&i915->drm, tc->mode != TC_PORT_DP_ALT); 632 + drm_WARN_ON(display->drm, tc->mode != TC_PORT_DP_ALT); 627 633 628 634 /* 629 635 * Now we have to re-check the live state, in case the port recently 630 636 * became disconnected. Not necessary for legacy mode. 631 637 */ 632 638 if (!(tc_phy_hpd_live_status(tc) & BIT(TC_PORT_DP_ALT))) { 633 - drm_dbg_kms(&i915->drm, "Port %s: PHY sudden disconnect\n", 639 + drm_dbg_kms(display->drm, "Port %s: PHY sudden disconnect\n", 634 640 tc->port_name); 635 641 return false; 636 642 } 637 643 638 644 if (max_lanes < required_lanes) { 639 - drm_dbg_kms(&i915->drm, 645 + drm_dbg_kms(display->drm, 640 646 "Port %s: PHY max lanes %d < required lanes %d\n", 641 647 tc->port_name, 642 648 max_lanes, required_lanes); ··· 649 655 static bool icl_tc_phy_connect(struct intel_tc_port *tc, 650 656 int required_lanes) 651 657 { 652 - struct drm_i915_private *i915 = tc_to_i915(tc); 658 + struct intel_display *display = to_intel_display(tc->dig_port); 653 659 654 660 tc->lock_wakeref = tc_cold_block(tc); 655 661 ··· 658 664 659 665 if ((!tc_phy_is_ready(tc) || 660 666 !icl_tc_phy_take_ownership(tc, true)) && 661 - !drm_WARN_ON(&i915->drm, tc->mode == TC_PORT_LEGACY)) { 662 - drm_dbg_kms(&i915->drm, "Port %s: can't take PHY ownership (ready %s)\n", 667 + !drm_WARN_ON(display->drm, tc->mode == TC_PORT_LEGACY)) { 668 + drm_dbg_kms(display->drm, "Port %s: can't take PHY ownership (ready %s)\n", 663 669 tc->port_name, 664 670 str_yes_no(tc_phy_is_ready(tc))); 665 671 goto out_unblock_tc_cold; ··· 727 733 static void tgl_tc_phy_init(struct intel_tc_port *tc) 728 734 { 729 735 struct intel_display *display = to_intel_display(tc->dig_port); 730 - struct drm_i915_private *i915 = tc_to_i915(tc); 731 736 intel_wakeref_t wakeref; 732 737 u32 val; 733 738 734 739 with_intel_display_power(display, tc_phy_cold_off_domain(tc), wakeref) 735 - val = intel_de_read(i915, PORT_TX_DFLEXDPSP(FIA1)); 740 + val = intel_de_read(display, PORT_TX_DFLEXDPSP(FIA1)); 736 741 737 - drm_WARN_ON(&i915->drm, val == 0xffffffff); 742 + drm_WARN_ON(display->drm, val == 0xffffffff); 738 743 739 744 tc_phy_load_fia_params(tc, val & MODULAR_FIA_MASK); 740 745 } ··· 768 775 static u32 adlp_tc_phy_hpd_live_status(struct intel_tc_port *tc) 769 776 { 770 777 struct intel_display *display = to_intel_display(tc->dig_port); 771 - struct drm_i915_private *i915 = tc_to_i915(tc); 772 778 struct intel_digital_port *dig_port = tc->dig_port; 773 779 enum hpd_pin hpd_pin = dig_port->base.hpd_pin; 774 - u32 cpu_isr_bits = i915->display.hotplug.hpd[hpd_pin]; 775 - u32 pch_isr_bit = i915->display.hotplug.pch_hpd[hpd_pin]; 780 + u32 cpu_isr_bits = display->hotplug.hpd[hpd_pin]; 781 + u32 pch_isr_bit = display->hotplug.pch_hpd[hpd_pin]; 776 782 intel_wakeref_t wakeref; 777 783 u32 cpu_isr; 778 784 u32 pch_isr; 779 785 u32 mask = 0; 780 786 781 787 with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE, wakeref) { 782 - cpu_isr = intel_de_read(i915, GEN11_DE_HPD_ISR); 783 - pch_isr = intel_de_read(i915, SDEISR); 788 + cpu_isr = intel_de_read(display, GEN11_DE_HPD_ISR); 789 + pch_isr = intel_de_read(display, SDEISR); 784 790 } 785 791 786 792 if (cpu_isr & (cpu_isr_bits & GEN11_DE_TC_HOTPLUG_MASK)) ··· 802 810 */ 803 811 static bool adlp_tc_phy_is_ready(struct intel_tc_port *tc) 804 812 { 805 - struct drm_i915_private *i915 = tc_to_i915(tc); 813 + struct intel_display *display = to_intel_display(tc->dig_port); 806 814 enum tc_port tc_port = intel_encoder_to_tc(&tc->dig_port->base); 807 815 u32 val; 808 816 809 817 assert_display_core_power_enabled(tc); 810 818 811 - val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port)); 819 + val = intel_de_read(display, TCSS_DDI_STATUS(tc_port)); 812 820 if (val == 0xffffffff) { 813 - drm_dbg_kms(&i915->drm, 821 + drm_dbg_kms(display->drm, 814 822 "Port %s: PHY in TCCOLD, assuming not ready\n", 815 823 tc->port_name); 816 824 return false; ··· 822 830 static bool adlp_tc_phy_take_ownership(struct intel_tc_port *tc, 823 831 bool take) 824 832 { 825 - struct drm_i915_private *i915 = tc_to_i915(tc); 833 + struct intel_display *display = to_intel_display(tc->dig_port); 826 834 enum port port = tc->dig_port->base.port; 827 835 828 836 assert_tc_port_power_enabled(tc); 829 837 830 - intel_de_rmw(i915, DDI_BUF_CTL(port), DDI_BUF_CTL_TC_PHY_OWNERSHIP, 838 + intel_de_rmw(display, DDI_BUF_CTL(port), DDI_BUF_CTL_TC_PHY_OWNERSHIP, 831 839 take ? DDI_BUF_CTL_TC_PHY_OWNERSHIP : 0); 832 840 833 841 return true; ··· 835 843 836 844 static bool adlp_tc_phy_is_owned(struct intel_tc_port *tc) 837 845 { 838 - struct drm_i915_private *i915 = tc_to_i915(tc); 846 + struct intel_display *display = to_intel_display(tc->dig_port); 839 847 enum port port = tc->dig_port->base.port; 840 848 u32 val; 841 849 842 850 assert_tc_port_power_enabled(tc); 843 851 844 - val = intel_de_read(i915, DDI_BUF_CTL(port)); 852 + val = intel_de_read(display, DDI_BUF_CTL(port)); 845 853 return val & DDI_BUF_CTL_TC_PHY_OWNERSHIP; 846 854 } 847 855 ··· 864 872 static bool adlp_tc_phy_connect(struct intel_tc_port *tc, int required_lanes) 865 873 { 866 874 struct intel_display *display = to_intel_display(tc->dig_port); 867 - struct drm_i915_private *i915 = tc_to_i915(tc); 868 875 enum intel_display_power_domain port_power_domain = 869 876 tc_port_power_domain(tc); 870 877 intel_wakeref_t port_wakeref; ··· 876 885 port_wakeref = intel_display_power_get(display, port_power_domain); 877 886 878 887 if (!adlp_tc_phy_take_ownership(tc, true) && 879 - !drm_WARN_ON(&i915->drm, tc->mode == TC_PORT_LEGACY)) { 880 - drm_dbg_kms(&i915->drm, "Port %s: can't take PHY ownership\n", 888 + !drm_WARN_ON(display->drm, tc->mode == TC_PORT_LEGACY)) { 889 + drm_dbg_kms(display->drm, "Port %s: can't take PHY ownership\n", 881 890 tc->port_name); 882 891 goto out_put_port_power; 883 892 } 884 893 885 894 if (!tc_phy_is_ready(tc) && 886 - !drm_WARN_ON(&i915->drm, tc->mode == TC_PORT_LEGACY)) { 887 - drm_dbg_kms(&i915->drm, "Port %s: PHY not ready\n", 895 + !drm_WARN_ON(display->drm, tc->mode == TC_PORT_LEGACY)) { 896 + drm_dbg_kms(display->drm, "Port %s: PHY not ready\n", 888 897 tc->port_name); 889 898 goto out_release_phy; 890 899 } ··· 956 965 static u32 xelpdp_tc_phy_hpd_live_status(struct intel_tc_port *tc) 957 966 { 958 967 struct intel_display *display = to_intel_display(tc->dig_port); 959 - struct drm_i915_private *i915 = tc_to_i915(tc); 960 968 struct intel_digital_port *dig_port = tc->dig_port; 961 969 enum hpd_pin hpd_pin = dig_port->base.hpd_pin; 962 - u32 pica_isr_bits = i915->display.hotplug.hpd[hpd_pin]; 963 - u32 pch_isr_bit = i915->display.hotplug.pch_hpd[hpd_pin]; 970 + u32 pica_isr_bits = display->hotplug.hpd[hpd_pin]; 971 + u32 pch_isr_bit = display->hotplug.pch_hpd[hpd_pin]; 964 972 intel_wakeref_t wakeref; 965 973 u32 pica_isr; 966 974 u32 pch_isr; 967 975 u32 mask = 0; 968 976 969 977 with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE, wakeref) { 970 - pica_isr = intel_de_read(i915, PICAINTERRUPT_ISR); 971 - pch_isr = intel_de_read(i915, SDEISR); 978 + pica_isr = intel_de_read(display, PICAINTERRUPT_ISR); 979 + pch_isr = intel_de_read(display, SDEISR); 972 980 } 973 981 974 982 if (pica_isr & (pica_isr_bits & XELPDP_DP_ALT_HOTPLUG_MASK)) ··· 984 994 static bool 985 995 xelpdp_tc_phy_tcss_power_is_enabled(struct intel_tc_port *tc) 986 996 { 987 - struct drm_i915_private *i915 = tc_to_i915(tc); 997 + struct intel_display *display = to_intel_display(tc->dig_port); 988 998 enum port port = tc->dig_port->base.port; 989 - i915_reg_t reg = XELPDP_PORT_BUF_CTL1(i915, port); 999 + i915_reg_t reg = XELPDP_PORT_BUF_CTL1(display, port); 990 1000 991 1001 assert_tc_cold_blocked(tc); 992 1002 993 - return intel_de_read(i915, reg) & XELPDP_TCSS_POWER_STATE; 1003 + return intel_de_read(display, reg) & XELPDP_TCSS_POWER_STATE; 994 1004 } 995 1005 996 1006 static bool 997 1007 xelpdp_tc_phy_wait_for_tcss_power(struct intel_tc_port *tc, bool enabled) 998 1008 { 999 - struct drm_i915_private *i915 = tc_to_i915(tc); 1009 + struct intel_display *display = to_intel_display(tc->dig_port); 1000 1010 1001 1011 if (wait_for(xelpdp_tc_phy_tcss_power_is_enabled(tc) == enabled, 5)) { 1002 - drm_dbg_kms(&i915->drm, 1012 + drm_dbg_kms(display->drm, 1003 1013 "Port %s: timeout waiting for TCSS power to get %s\n", 1004 1014 str_enabled_disabled(enabled), 1005 1015 tc->port_name); ··· 1059 1069 1060 1070 static bool xelpdp_tc_phy_enable_tcss_power(struct intel_tc_port *tc, bool enable) 1061 1071 { 1062 - struct drm_i915_private *i915 = tc_to_i915(tc); 1072 + struct intel_display *display = to_intel_display(tc->dig_port); 1063 1073 1064 1074 __xelpdp_tc_phy_enable_tcss_power(tc, enable); 1065 1075 ··· 1072 1082 return true; 1073 1083 1074 1084 out_disable: 1075 - if (drm_WARN_ON(&i915->drm, tc->mode == TC_PORT_LEGACY)) 1085 + if (drm_WARN_ON(display->drm, tc->mode == TC_PORT_LEGACY)) 1076 1086 return false; 1077 1087 1078 1088 if (!enable) ··· 1086 1096 1087 1097 static void xelpdp_tc_phy_take_ownership(struct intel_tc_port *tc, bool take) 1088 1098 { 1089 - struct drm_i915_private *i915 = tc_to_i915(tc); 1099 + struct intel_display *display = to_intel_display(tc->dig_port); 1090 1100 enum port port = tc->dig_port->base.port; 1091 - i915_reg_t reg = XELPDP_PORT_BUF_CTL1(i915, port); 1101 + i915_reg_t reg = XELPDP_PORT_BUF_CTL1(display, port); 1092 1102 u32 val; 1093 1103 1094 1104 assert_tc_cold_blocked(tc); 1095 1105 1096 - val = intel_de_read(i915, reg); 1106 + val = intel_de_read(display, reg); 1097 1107 if (take) 1098 1108 val |= XELPDP_TC_PHY_OWNERSHIP; 1099 1109 else 1100 1110 val &= ~XELPDP_TC_PHY_OWNERSHIP; 1101 - intel_de_write(i915, reg, val); 1111 + intel_de_write(display, reg, val); 1102 1112 } 1103 1113 1104 1114 static bool xelpdp_tc_phy_is_owned(struct intel_tc_port *tc) 1105 1115 { 1106 - struct drm_i915_private *i915 = tc_to_i915(tc); 1116 + struct intel_display *display = to_intel_display(tc->dig_port); 1107 1117 enum port port = tc->dig_port->base.port; 1108 - i915_reg_t reg = XELPDP_PORT_BUF_CTL1(i915, port); 1118 + i915_reg_t reg = XELPDP_PORT_BUF_CTL1(display, port); 1109 1119 1110 1120 assert_tc_cold_blocked(tc); 1111 1121 1112 - return intel_de_read(i915, reg) & XELPDP_TC_PHY_OWNERSHIP; 1122 + return intel_de_read(display, reg) & XELPDP_TC_PHY_OWNERSHIP; 1113 1123 } 1114 1124 1115 1125 static void xelpdp_tc_phy_get_hw_state(struct intel_tc_port *tc) 1116 1126 { 1117 - struct drm_i915_private *i915 = tc_to_i915(tc); 1127 + struct intel_display *display = to_intel_display(tc->dig_port); 1118 1128 intel_wakeref_t tc_cold_wref; 1119 1129 enum intel_display_power_domain domain; 1120 1130 ··· 1124 1134 if (tc->mode != TC_PORT_DISCONNECTED) 1125 1135 tc->lock_wakeref = tc_cold_block(tc); 1126 1136 1127 - drm_WARN_ON(&i915->drm, 1137 + drm_WARN_ON(display->drm, 1128 1138 (tc->mode == TC_PORT_DP_ALT || tc->mode == TC_PORT_LEGACY) && 1129 1139 !xelpdp_tc_phy_tcss_power_is_enabled(tc)); 1130 1140 ··· 1197 1207 1198 1208 static u32 tc_phy_hpd_live_status(struct intel_tc_port *tc) 1199 1209 { 1200 - struct drm_i915_private *i915 = tc_to_i915(tc); 1210 + struct intel_display *display = to_intel_display(tc->dig_port); 1201 1211 u32 mask; 1202 1212 1203 1213 mask = tc->phy_ops->hpd_live_status(tc); 1204 1214 1205 1215 /* The sink can be connected only in a single mode. */ 1206 - drm_WARN_ON_ONCE(&i915->drm, hweight32(mask) > 1); 1216 + drm_WARN_ON_ONCE(display->drm, hweight32(mask) > 1); 1207 1217 1208 1218 return mask; 1209 1219 } ··· 1226 1236 static bool tc_phy_is_ready_and_owned(struct intel_tc_port *tc, 1227 1237 bool phy_is_ready, bool phy_is_owned) 1228 1238 { 1229 - struct drm_i915_private *i915 = tc_to_i915(tc); 1239 + struct intel_display *display = to_intel_display(tc->dig_port); 1230 1240 1231 - drm_WARN_ON(&i915->drm, phy_is_owned && !phy_is_ready); 1241 + drm_WARN_ON(display->drm, phy_is_owned && !phy_is_ready); 1232 1242 1233 1243 return phy_is_ready && phy_is_owned; 1234 1244 } ··· 1236 1246 static bool tc_phy_is_connected(struct intel_tc_port *tc, 1237 1247 enum icl_port_dpll_id port_pll_type) 1238 1248 { 1239 - struct intel_encoder *encoder = &tc->dig_port->base; 1240 - struct drm_i915_private *i915 = to_i915(encoder->base.dev); 1249 + struct intel_display *display = to_intel_display(tc->dig_port); 1241 1250 bool phy_is_ready = tc_phy_is_ready(tc); 1242 1251 bool phy_is_owned = tc_phy_is_owned(tc); 1243 1252 bool is_connected; ··· 1246 1257 else 1247 1258 is_connected = port_pll_type == ICL_PORT_DPLL_DEFAULT; 1248 1259 1249 - drm_dbg_kms(&i915->drm, 1260 + drm_dbg_kms(display->drm, 1250 1261 "Port %s: PHY connected: %s (ready: %s, owned: %s, pll_type: %s)\n", 1251 1262 tc->port_name, 1252 1263 str_yes_no(is_connected), ··· 1259 1270 1260 1271 static bool tc_phy_wait_for_ready(struct intel_tc_port *tc) 1261 1272 { 1262 - struct drm_i915_private *i915 = tc_to_i915(tc); 1273 + struct intel_display *display = to_intel_display(tc->dig_port); 1263 1274 1264 1275 if (wait_for(tc_phy_is_ready(tc), 500)) { 1265 - drm_err(&i915->drm, "Port %s: timeout waiting for PHY ready\n", 1276 + drm_err(display->drm, "Port %s: timeout waiting for PHY ready\n", 1266 1277 tc->port_name); 1267 1278 1268 1279 return false; ··· 1332 1343 static enum tc_port_mode 1333 1344 tc_phy_get_current_mode(struct intel_tc_port *tc) 1334 1345 { 1335 - struct drm_i915_private *i915 = tc_to_i915(tc); 1346 + struct intel_display *display = to_intel_display(tc->dig_port); 1336 1347 enum tc_port_mode live_mode = tc_phy_hpd_live_mode(tc); 1337 1348 bool phy_is_ready; 1338 1349 bool phy_is_owned; ··· 1352 1363 if (!tc_phy_is_ready_and_owned(tc, phy_is_ready, phy_is_owned)) { 1353 1364 mode = get_tc_mode_in_phy_not_owned_state(tc, live_mode); 1354 1365 } else { 1355 - drm_WARN_ON(&i915->drm, live_mode == TC_PORT_TBT_ALT); 1366 + drm_WARN_ON(display->drm, live_mode == TC_PORT_TBT_ALT); 1356 1367 mode = get_tc_mode_in_phy_owned_state(tc, live_mode); 1357 1368 } 1358 1369 1359 - drm_dbg_kms(&i915->drm, 1370 + drm_dbg_kms(display->drm, 1360 1371 "Port %s: PHY mode: %s (ready: %s, owned: %s, HPD: %s)\n", 1361 1372 tc->port_name, 1362 1373 tc_port_mode_name(mode), ··· 1396 1407 1397 1408 static void tc_phy_connect(struct intel_tc_port *tc, int required_lanes) 1398 1409 { 1399 - struct drm_i915_private *i915 = tc_to_i915(tc); 1410 + struct intel_display *display = to_intel_display(tc->dig_port); 1400 1411 u32 live_status_mask = tc_phy_hpd_live_status(tc); 1401 1412 bool connected; 1402 1413 ··· 1410 1421 connected = tc->phy_ops->connect(tc, required_lanes); 1411 1422 } 1412 1423 1413 - drm_WARN_ON(&i915->drm, !connected); 1424 + drm_WARN_ON(display->drm, !connected); 1414 1425 } 1415 1426 1416 1427 static void tc_phy_disconnect(struct intel_tc_port *tc) ··· 1480 1491 1481 1492 static bool tc_port_is_enabled(struct intel_tc_port *tc) 1482 1493 { 1483 - struct drm_i915_private *i915 = tc_to_i915(tc); 1494 + struct intel_display *display = to_intel_display(tc->dig_port); 1484 1495 struct intel_digital_port *dig_port = tc->dig_port; 1485 1496 1486 1497 assert_tc_port_power_enabled(tc); 1487 1498 1488 - return intel_de_read(i915, DDI_BUF_CTL(dig_port->base.port)) & 1499 + return intel_de_read(display, DDI_BUF_CTL(dig_port->base.port)) & 1489 1500 DDI_BUF_CTL_ENABLE; 1490 1501 } 1491 1502 ··· 1498 1509 */ 1499 1510 void intel_tc_port_init_mode(struct intel_digital_port *dig_port) 1500 1511 { 1501 - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); 1512 + struct intel_display *display = to_intel_display(dig_port); 1502 1513 struct intel_tc_port *tc = to_tc_port(dig_port); 1503 1514 bool update_mode = false; 1504 1515 1505 1516 mutex_lock(&tc->lock); 1506 1517 1507 - drm_WARN_ON(&i915->drm, tc->mode != TC_PORT_DISCONNECTED); 1508 - drm_WARN_ON(&i915->drm, tc->lock_wakeref); 1509 - drm_WARN_ON(&i915->drm, tc->link_refcount); 1518 + drm_WARN_ON(display->drm, tc->mode != TC_PORT_DISCONNECTED); 1519 + drm_WARN_ON(display->drm, tc->lock_wakeref); 1520 + drm_WARN_ON(display->drm, tc->link_refcount); 1510 1521 1511 1522 tc_phy_get_hw_state(tc); 1512 1523 /* ··· 1529 1540 if (!tc_port_is_enabled(tc)) { 1530 1541 update_mode = true; 1531 1542 } else if (tc->mode == TC_PORT_DISCONNECTED) { 1532 - drm_WARN_ON(&i915->drm, !tc->legacy_port); 1533 - drm_err(&i915->drm, 1543 + drm_WARN_ON(display->drm, !tc->legacy_port); 1544 + drm_err(display->drm, 1534 1545 "Port %s: PHY disconnected on enabled port, connecting it\n", 1535 1546 tc->port_name); 1536 1547 update_mode = true; ··· 1548 1559 static bool tc_port_has_active_links(struct intel_tc_port *tc, 1549 1560 const struct intel_crtc_state *crtc_state) 1550 1561 { 1551 - struct drm_i915_private *i915 = tc_to_i915(tc); 1562 + struct intel_display *display = to_intel_display(tc->dig_port); 1552 1563 struct intel_digital_port *dig_port = tc->dig_port; 1553 1564 enum icl_port_dpll_id pll_type = ICL_PORT_DPLL_DEFAULT; 1554 1565 int active_links = 0; ··· 1562 1573 } 1563 1574 1564 1575 if (active_links && !tc_phy_is_connected(tc, pll_type)) 1565 - drm_err(&i915->drm, 1576 + drm_err(display->drm, 1566 1577 "Port %s: PHY disconnected with %d active link(s)\n", 1567 1578 tc->port_name, active_links); 1568 1579 ··· 1584 1595 void intel_tc_port_sanitize_mode(struct intel_digital_port *dig_port, 1585 1596 const struct intel_crtc_state *crtc_state) 1586 1597 { 1587 - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); 1598 + struct intel_display *display = to_intel_display(dig_port); 1588 1599 struct intel_tc_port *tc = to_tc_port(dig_port); 1589 1600 1590 1601 mutex_lock(&tc->lock); 1591 1602 1592 - drm_WARN_ON(&i915->drm, tc->link_refcount != 1); 1603 + drm_WARN_ON(display->drm, tc->link_refcount != 1); 1593 1604 if (!tc_port_has_active_links(tc, crtc_state)) { 1594 1605 /* 1595 1606 * TBT-alt is the default mode in any case the PHY ownership is not ··· 1599 1610 */ 1600 1611 if (tc->init_mode != TC_PORT_TBT_ALT && 1601 1612 tc->init_mode != TC_PORT_DISCONNECTED) 1602 - drm_dbg_kms(&i915->drm, 1613 + drm_dbg_kms(display->drm, 1603 1614 "Port %s: PHY left in %s mode on disabled port, disconnecting it\n", 1604 1615 tc->port_name, 1605 1616 tc_port_mode_name(tc->init_mode)); ··· 1607 1618 __intel_tc_port_put_link(tc); 1608 1619 } 1609 1620 1610 - drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n", 1621 + drm_dbg_kms(display->drm, "Port %s: sanitize mode (%s)\n", 1611 1622 tc->port_name, 1612 1623 tc_port_mode_name(tc->mode)); 1613 1624 ··· 1626 1637 */ 1627 1638 bool intel_tc_port_connected(struct intel_encoder *encoder) 1628 1639 { 1640 + struct intel_display *display = to_intel_display(encoder); 1629 1641 struct intel_digital_port *dig_port = enc_to_dig_port(encoder); 1630 - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); 1631 1642 struct intel_tc_port *tc = to_tc_port(dig_port); 1632 1643 u32 mask = ~0; 1633 1644 1634 - drm_WARN_ON(&i915->drm, !intel_tc_port_ref_held(dig_port)); 1645 + drm_WARN_ON(display->drm, !intel_tc_port_ref_held(dig_port)); 1635 1646 1636 1647 if (tc->mode != TC_PORT_DISCONNECTED) 1637 1648 mask = BIT(tc->mode); ··· 1666 1677 struct intel_atomic_state *state, 1667 1678 struct drm_modeset_acquire_ctx *ctx) 1668 1679 { 1669 - struct drm_i915_private *i915 = tc_to_i915(tc); 1680 + struct intel_display *display = to_intel_display(tc->dig_port); 1670 1681 struct intel_digital_port *dig_port = tc->dig_port; 1671 1682 struct intel_dp *intel_dp = enc_to_intel_dp(&dig_port->base); 1672 1683 struct intel_crtc *crtc; 1673 1684 u8 pipe_mask; 1674 1685 int ret; 1675 1686 1676 - ret = drm_modeset_lock(&i915->drm.mode_config.connection_mutex, ctx); 1687 + ret = drm_modeset_lock(&display->drm->mode_config.connection_mutex, ctx); 1677 1688 if (ret) 1678 1689 return ret; 1679 1690 ··· 1684 1695 if (!pipe_mask) 1685 1696 return 0; 1686 1697 1687 - for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, pipe_mask) { 1698 + for_each_intel_crtc_in_pipe_mask(display->drm, crtc, pipe_mask) { 1688 1699 struct intel_crtc_state *crtc_state; 1689 1700 1690 1701 crtc_state = intel_atomic_get_crtc_state(&state->base, crtc); ··· 1702 1713 1703 1714 static int reset_link(struct intel_tc_port *tc) 1704 1715 { 1705 - struct drm_i915_private *i915 = tc_to_i915(tc); 1716 + struct intel_display *display = to_intel_display(tc->dig_port); 1706 1717 struct drm_modeset_acquire_ctx ctx; 1707 1718 struct drm_atomic_state *_state; 1708 1719 struct intel_atomic_state *state; 1709 1720 int ret; 1710 1721 1711 - _state = drm_atomic_state_alloc(&i915->drm); 1722 + _state = drm_atomic_state_alloc(display->drm); 1712 1723 if (!_state) 1713 1724 return -ENOMEM; 1714 1725 ··· 1727 1738 { 1728 1739 struct intel_tc_port *tc = 1729 1740 container_of(work, struct intel_tc_port, link_reset_work.work); 1730 - struct drm_i915_private *i915 = tc_to_i915(tc); 1741 + struct intel_display *display = to_intel_display(tc->dig_port); 1731 1742 int ret; 1732 1743 1733 1744 if (!__intel_tc_port_link_needs_reset(tc)) 1734 1745 return; 1735 1746 1736 - mutex_lock(&i915->drm.mode_config.mutex); 1747 + mutex_lock(&display->drm->mode_config.mutex); 1737 1748 1738 - drm_dbg_kms(&i915->drm, 1749 + drm_dbg_kms(display->drm, 1739 1750 "Port %s: TypeC DP-alt sink disconnected, resetting link\n", 1740 1751 tc->port_name); 1741 1752 ret = reset_link(tc); 1742 - drm_WARN_ON(&i915->drm, ret); 1753 + drm_WARN_ON(display->drm, ret); 1743 1754 1744 - mutex_unlock(&i915->drm.mode_config.mutex); 1755 + mutex_unlock(&display->drm->mode_config.mutex); 1745 1756 } 1746 1757 1747 1758 bool intel_tc_port_link_reset(struct intel_digital_port *dig_port) ··· 1769 1780 static void __intel_tc_port_lock(struct intel_tc_port *tc, 1770 1781 int required_lanes) 1771 1782 { 1772 - struct drm_i915_private *i915 = tc_to_i915(tc); 1783 + struct intel_display *display = to_intel_display(tc->dig_port); 1773 1784 1774 1785 mutex_lock(&tc->lock); 1775 1786 ··· 1779 1790 intel_tc_port_update_mode(tc, required_lanes, 1780 1791 false); 1781 1792 1782 - drm_WARN_ON(&i915->drm, tc->mode == TC_PORT_DISCONNECTED); 1783 - drm_WARN_ON(&i915->drm, tc->mode != TC_PORT_TBT_ALT && 1784 - !tc_phy_is_owned(tc)); 1793 + drm_WARN_ON(display->drm, tc->mode == TC_PORT_DISCONNECTED); 1794 + drm_WARN_ON(display->drm, tc->mode != TC_PORT_TBT_ALT && !tc_phy_is_owned(tc)); 1785 1795 } 1786 1796 1787 1797 void intel_tc_port_lock(struct intel_digital_port *dig_port) ··· 1873 1885 1874 1886 int intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy) 1875 1887 { 1876 - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); 1888 + struct intel_display *display = to_intel_display(dig_port); 1877 1889 struct intel_tc_port *tc; 1878 1890 enum port port = dig_port->base.port; 1879 1891 enum tc_port tc_port = intel_encoder_to_tc(&dig_port->base); 1880 1892 1881 - if (drm_WARN_ON(&i915->drm, tc_port == TC_PORT_NONE)) 1893 + if (drm_WARN_ON(display->drm, tc_port == TC_PORT_NONE)) 1882 1894 return -EINVAL; 1883 1895 1884 1896 tc = kzalloc(sizeof(*tc), GFP_KERNEL); ··· 1888 1900 dig_port->tc = tc; 1889 1901 tc->dig_port = dig_port; 1890 1902 1891 - if (DISPLAY_VER(i915) >= 14) 1903 + if (DISPLAY_VER(display) >= 14) 1892 1904 tc->phy_ops = &xelpdp_tc_phy_ops; 1893 - else if (DISPLAY_VER(i915) >= 13) 1905 + else if (DISPLAY_VER(display) >= 13) 1894 1906 tc->phy_ops = &adlp_tc_phy_ops; 1895 - else if (DISPLAY_VER(i915) >= 12) 1907 + else if (DISPLAY_VER(display) >= 12) 1896 1908 tc->phy_ops = &tgl_tc_phy_ops; 1897 1909 else 1898 1910 tc->phy_ops = &icl_tc_phy_ops;