Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

mtd: nand: Fix data interface configuration logic

When changing from one data interface setting to another, one has to
ensure a specific sequence which is described in the ONFI spec.

One of these constraints is that the CE line has go high after a reset
before a command can be sent with the new data interface setting, which
is not guaranteed by the current implementation.

Rework the nand_reset() function and all the call sites to make sure the
CE line is asserted and released when required.

Also make sure to actually apply the new data interface setting on the
first die.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Fixes: d8e725dd8311 ("mtd: nand: automate NAND timings selection")
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>

+43 -19
+42 -18
drivers/mtd/nand/nand_base.c
··· 1095 1095 /** 1096 1096 * nand_reset - Reset and initialize a NAND device 1097 1097 * @chip: The NAND chip 1098 + * @chipnr: Internal die id 1098 1099 * 1099 1100 * Returns 0 for success or negative error code otherwise 1100 1101 */ 1101 - int nand_reset(struct nand_chip *chip) 1102 + int nand_reset(struct nand_chip *chip, int chipnr) 1102 1103 { 1103 1104 struct mtd_info *mtd = nand_to_mtd(chip); 1104 1105 int ret; ··· 1108 1107 if (ret) 1109 1108 return ret; 1110 1109 1110 + /* 1111 + * The CS line has to be released before we can apply the new NAND 1112 + * interface settings, hence this weird ->select_chip() dance. 1113 + */ 1114 + chip->select_chip(mtd, chipnr); 1111 1115 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); 1116 + chip->select_chip(mtd, -1); 1112 1117 1118 + chip->select_chip(mtd, chipnr); 1113 1119 ret = nand_setup_data_interface(chip); 1120 + chip->select_chip(mtd, -1); 1114 1121 if (ret) 1115 1122 return ret; 1116 1123 ··· 1194 1185 /* Shift to get chip number */ 1195 1186 chipnr = ofs >> chip->chip_shift; 1196 1187 1197 - chip->select_chip(mtd, chipnr); 1198 - 1199 1188 /* 1200 1189 * Reset the chip. 1201 1190 * If we want to check the WP through READ STATUS and check the bit 7 ··· 1201 1194 * some operation can also clear the bit 7 of status register 1202 1195 * eg. erase/program a locked block 1203 1196 */ 1204 - nand_reset(chip); 1197 + nand_reset(chip, chipnr); 1198 + 1199 + chip->select_chip(mtd, chipnr); 1205 1200 1206 1201 /* Check, if it is write protected */ 1207 1202 if (nand_check_wp(mtd)) { ··· 1253 1244 /* Shift to get chip number */ 1254 1245 chipnr = ofs >> chip->chip_shift; 1255 1246 1256 - chip->select_chip(mtd, chipnr); 1257 - 1258 1247 /* 1259 1248 * Reset the chip. 1260 1249 * If we want to check the WP through READ STATUS and check the bit 7 ··· 1260 1253 * some operation can also clear the bit 7 of status register 1261 1254 * eg. erase/program a locked block 1262 1255 */ 1263 - nand_reset(chip); 1256 + nand_reset(chip, chipnr); 1257 + 1258 + chip->select_chip(mtd, chipnr); 1264 1259 1265 1260 /* Check, if it is write protected */ 1266 1261 if (nand_check_wp(mtd)) { ··· 2949 2940 } 2950 2941 2951 2942 chipnr = (int)(to >> chip->chip_shift); 2952 - chip->select_chip(mtd, chipnr); 2953 - 2954 - /* Shift to get page */ 2955 - page = (int)(to >> chip->page_shift); 2956 2943 2957 2944 /* 2958 2945 * Reset the chip. Some chips (like the Toshiba TC5832DC found in one ··· 2956 2951 * if we don't do this. I have no clue why, but I seem to have 'fixed' 2957 2952 * it in the doc2000 driver in August 1999. dwmw2. 2958 2953 */ 2959 - nand_reset(chip); 2954 + nand_reset(chip, chipnr); 2955 + 2956 + chip->select_chip(mtd, chipnr); 2957 + 2958 + /* Shift to get page */ 2959 + page = (int)(to >> chip->page_shift); 2960 2960 2961 2961 /* Check, if it is write protected */ 2962 2962 if (nand_check_wp(mtd)) { ··· 3994 3984 int i, maf_idx; 3995 3985 u8 id_data[8]; 3996 3986 3997 - /* Select the device */ 3998 - chip->select_chip(mtd, 0); 3999 - 4000 3987 /* 4001 3988 * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx) 4002 3989 * after power-up. 4003 3990 */ 4004 - nand_reset(chip); 3991 + nand_reset(chip, 0); 3992 + 3993 + /* Select the device */ 3994 + chip->select_chip(mtd, 0); 4005 3995 4006 3996 /* Send the command for reading device ID */ 4007 3997 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); ··· 4339 4329 return PTR_ERR(type); 4340 4330 } 4341 4331 4332 + /* Initialize the ->data_interface field. */ 4342 4333 ret = nand_init_data_interface(chip); 4334 + if (ret) 4335 + return ret; 4336 + 4337 + /* 4338 + * Setup the data interface correctly on the chip and controller side. 4339 + * This explicit call to nand_setup_data_interface() is only required 4340 + * for the first die, because nand_reset() has been called before 4341 + * ->data_interface and ->default_onfi_timing_mode were set. 4342 + * For the other dies, nand_reset() will automatically switch to the 4343 + * best mode for us. 4344 + */ 4345 + ret = nand_setup_data_interface(chip); 4343 4346 if (ret) 4344 4347 return ret; 4345 4348 ··· 4360 4337 4361 4338 /* Check for a chip array */ 4362 4339 for (i = 1; i < maxchips; i++) { 4363 - chip->select_chip(mtd, i); 4364 4340 /* See comment in nand_get_flash_type for reset */ 4365 - nand_reset(chip); 4341 + nand_reset(chip, i); 4342 + 4343 + chip->select_chip(mtd, i); 4366 4344 /* Send the command for reading device ID */ 4367 4345 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); 4368 4346 /* Read manufacturer and device IDs */
+1 -1
include/linux/mtd/nand.h
··· 1184 1184 int page); 1185 1185 1186 1186 /* Reset and initialize a NAND device */ 1187 - int nand_reset(struct nand_chip *chip); 1187 + int nand_reset(struct nand_chip *chip, int chipnr); 1188 1188 1189 1189 /* Free resources held by the NAND device */ 1190 1190 void nand_cleanup(struct nand_chip *chip);