Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

iio: frequency: Update DDS drivers to use new channel naming convention

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Acked-by: Jonathan Cameron <jic23@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Michael Hennerich and committed by
Greg Kroah-Hartman
73e016ef a6b12855

+109 -106
+42 -39
drivers/staging/iio/Documentation/sysfs-bus-iio-dds
··· 1 1 2 - What: /sys/bus/iio/devices/.../ddsX_freqY 2 + What: /sys/bus/iio/devices/.../out_altvoltageX_frequencyY 3 3 KernelVersion: 2.6.37 4 4 Contact: linux-iio@vger.kernel.org 5 5 Description: 6 6 Stores frequency into tuning word Y. 7 - There will be more than one ddsX_freqY file, which allows for 8 - pin controlled FSK Frequency Shift Keying 9 - (ddsX_pincontrol_freq_en is active) or the user can control 10 - the desired active tuning word by writing Y to the 11 - ddsX_freqsymbol file. 7 + There will be more than one out_altvoltageX_frequencyY file, 8 + which allows for pin controlled FSK Frequency Shift Keying 9 + (out_altvoltageX_pincontrol_frequency_en is active) or the user 10 + can control the desired active tuning word by writing Y to the 11 + out_altvoltageX_frequencysymbol file. 12 12 13 - What: /sys/bus/iio/devices/.../ddsX_freqY_scale 13 + What: /sys/bus/iio/devices/.../out_altvoltageX_frequencyY_scale 14 14 KernelVersion: 2.6.37 15 15 Contact: linux-iio@vger.kernel.org 16 16 Description: 17 - Scale to be applied to ddsX_freqY in order to obtain the 18 - desired value in Hz. If shared across all frequency registers 19 - Y is not present. It is also possible X is not present if 20 - shared across all channels. 17 + Scale to be applied to out_altvoltageX_frequencyY in order to 18 + obtain the desired value in Hz. If shared across all frequency 19 + registers Y is not present. It is also possible X is not present 20 + if shared across all channels. 21 21 22 - What: /sys/bus/iio/devices/.../ddsX_freqsymbol 22 + What: /sys/bus/iio/devices/.../out_altvoltageX_frequencysymbol 23 23 KernelVersion: 2.6.37 24 24 Contact: linux-iio@vger.kernel.org 25 25 Description: 26 26 Specifies the active output frequency tuning word. The value 27 - corresponds to the Y in ddsX_freqY. To exit this mode the user 28 - can write ddsX_pincontrol_freq_en or ddsX_out_enable file. 27 + corresponds to the Y in out_altvoltageX_frequencyY. 28 + To exit this mode the user can write 29 + out_altvoltageX_pincontrol_frequency_en or 30 + out_altvoltageX_out_enable file. 29 31 30 - What: /sys/bus/iio/devices/.../ddsX_phaseY 32 + What: /sys/bus/iio/devices/.../out_altvoltageX_phaseY 31 33 KernelVersion: 2.6.37 32 34 Contact: linux-iio@vger.kernel.org 33 35 Description: 34 36 Stores phase into Y. 35 - There will be more than one ddsX_phaseY file, which allows for 36 - pin controlled PSK Phase Shift Keying 37 - (ddsX_pincontrol_phase_en is active) or the user can 37 + There will be more than one out_altvoltageX_phaseY file, which 38 + allows for pin controlled PSK Phase Shift Keying 39 + (out_altvoltageX_pincontrol_phase_en is active) or the user can 38 40 control the desired phase Y which is added to the phase 39 - accumulator output by writing Y to the en_phase file. 41 + accumulator output by writing Y to the phase_en file. 40 42 41 - What: /sys/bus/iio/devices/.../ddsX_phaseY_scale 43 + What: /sys/bus/iio/devices/.../out_altvoltageX_phaseY_scale 42 44 KernelVersion: 2.6.37 43 45 Contact: linux-iio@vger.kernel.org 44 46 Description: 45 - Scale to be applied to ddsX_phaseY in order to obtain the 46 - desired value in rad. If shared across all phase registers 47 + Scale to be applied to out_altvoltageX_phaseY in order to obtain 48 + the desired value in rad. If shared across all phase registers 47 49 Y is not present. It is also possible X is not present if 48 50 shared across all channels. 49 51 50 - What: /sys/bus/iio/devices/.../ddsX_phasesymbol 52 + What: /sys/bus/iio/devices/.../out_altvoltageX_phasesymbol 51 53 KernelVersion: 2.6.37 52 54 Contact: linux-iio@vger.kernel.org 53 55 Description: 54 56 Specifies the active phase Y which is added to the phase 55 57 accumulator output. The value corresponds to the Y in 56 - ddsX_phaseY. To exit this mode the user can write 57 - ddsX_pincontrol_phase_en or disable file. 58 + out_altvoltageX_phaseY. To exit this mode the user can write 59 + out_altvoltageX_pincontrol_phase_en or disable file. 58 60 59 - What: /sys/bus/iio/devices/.../ddsX_pincontrol_en 60 - What: /sys/bus/iio/devices/.../ddsX_pincontrol_freq_en 61 - What: /sys/bus/iio/devices/.../ddsX_pincontrol_phase_en 61 + What: /sys/bus/iio/devices/.../out_altvoltageX_pincontrol_en 62 + What: /sys/bus/iio/devices/.../out_altvoltageX_pincontrol_frequency_en 63 + What: /sys/bus/iio/devices/.../out_altvoltageX_pincontrol_phase_en 62 64 KernelVersion: 2.6.37 63 65 Contact: linux-iio@vger.kernel.org 64 66 Description: 65 - ddsX_pincontrol_en: Both, the active frequency and phase is 66 - controlled by the respective phase and frequency control inputs. 67 - In case the device in question allows to independent controls, 68 - then there are dedicated files (ddsX_pincontrol_freq_en, 69 - ddsX_pincontrol_phase_en). 67 + out_altvoltageX_pincontrol_en: Both, the active frequency and 68 + phase is controlled by the respective phase and frequency 69 + control inputs. In case the device in features independent 70 + controls, then there are dedicated files 71 + (out_altvoltageX_pincontrol_frequency_en, 72 + out_altvoltageX_pincontrol_phase_en). 70 73 71 - What: /sys/bus/iio/devices/.../ddsX_out_enable 72 - What: /sys/bus/iio/devices/.../ddsX_outY_enable 74 + What: /sys/bus/iio/devices/.../out_altvoltageX_out_enable 75 + What: /sys/bus/iio/devices/.../out_altvoltageX_outY_enable 73 76 KernelVersion: 2.6.37 74 77 Contact: linux-iio@vger.kernel.org 75 78 Description: 76 - ddsX_outY_enable controls signal generation on output Y of 77 - channel X. Y may be suppressed if all channels are 79 + out_altvoltageX_outY_enable controls signal generation on 80 + output Y of channel X. Y may be suppressed if all channels are 78 81 controlled together. 79 82 80 - What: /sys/bus/iio/devices/.../ddsX_outY_wavetype 83 + What: /sys/bus/iio/devices/.../out_altvoltageX_outY_wavetype 81 84 KernelVersion: 2.6.37 82 85 Contact: linux-iio@vger.kernel.org 83 86 Description: ··· 89 86 For a list of available output waveform options read 90 87 available_output_modes. 91 88 92 - What: /sys/bus/iio/devices/.../ddsX_outY_wavetype_available 89 + What: /sys/bus/iio/devices/.../out_altvoltageX_outY_wavetype_available 93 90 KernelVersion: 2.6.37 94 91 Contact: linux-iio@vger.kernel.org 95 92 Description:
+12 -12
drivers/staging/iio/frequency/ad9832.c
··· 177 177 ad9832_write, AD9832_OUTPUT_EN); 178 178 179 179 static struct attribute *ad9832_attributes[] = { 180 - &iio_dev_attr_dds0_freq0.dev_attr.attr, 181 - &iio_dev_attr_dds0_freq1.dev_attr.attr, 182 - &iio_const_attr_dds0_freq_scale.dev_attr.attr, 183 - &iio_dev_attr_dds0_phase0.dev_attr.attr, 184 - &iio_dev_attr_dds0_phase1.dev_attr.attr, 185 - &iio_dev_attr_dds0_phase2.dev_attr.attr, 186 - &iio_dev_attr_dds0_phase3.dev_attr.attr, 187 - &iio_const_attr_dds0_phase_scale.dev_attr.attr, 188 - &iio_dev_attr_dds0_pincontrol_en.dev_attr.attr, 189 - &iio_dev_attr_dds0_freqsymbol.dev_attr.attr, 190 - &iio_dev_attr_dds0_phasesymbol.dev_attr.attr, 191 - &iio_dev_attr_dds0_out_enable.dev_attr.attr, 180 + &iio_dev_attr_out_altvoltage0_frequency0.dev_attr.attr, 181 + &iio_dev_attr_out_altvoltage0_frequency1.dev_attr.attr, 182 + &iio_const_attr_out_altvoltage0_frequency_scale.dev_attr.attr, 183 + &iio_dev_attr_out_altvoltage0_phase0.dev_attr.attr, 184 + &iio_dev_attr_out_altvoltage0_phase1.dev_attr.attr, 185 + &iio_dev_attr_out_altvoltage0_phase2.dev_attr.attr, 186 + &iio_dev_attr_out_altvoltage0_phase3.dev_attr.attr, 187 + &iio_const_attr_out_altvoltage0_phase_scale.dev_attr.attr, 188 + &iio_dev_attr_out_altvoltage0_pincontrol_en.dev_attr.attr, 189 + &iio_dev_attr_out_altvoltage0_frequencysymbol.dev_attr.attr, 190 + &iio_dev_attr_out_altvoltage0_phasesymbol.dev_attr.attr, 191 + &iio_dev_attr_out_altvoltage0_out_enable.dev_attr.attr, 192 192 NULL, 193 193 }; 194 194
+28 -28
drivers/staging/iio/frequency/ad9834.c
··· 218 218 } 219 219 220 220 221 - static IIO_DEVICE_ATTR(dds0_out0_wavetype_available, S_IRUGO, 221 + static IIO_DEVICE_ATTR(out_altvoltage0_out0_wavetype_available, S_IRUGO, 222 222 ad9834_show_out0_wavetype_available, NULL, 0); 223 223 224 224 static ssize_t ad9834_show_out1_wavetype_available(struct device *dev, ··· 237 237 return sprintf(buf, "%s\n", str); 238 238 } 239 239 240 - static IIO_DEVICE_ATTR(dds0_out1_wavetype_available, S_IRUGO, 240 + static IIO_DEVICE_ATTR(out_altvoltage0_out1_wavetype_available, S_IRUGO, 241 241 ad9834_show_out1_wavetype_available, NULL, 0); 242 242 243 243 /** ··· 263 263 static IIO_DEV_ATTR_OUT_WAVETYPE(0, 1, ad9834_store_wavetype, 1); 264 264 265 265 static struct attribute *ad9834_attributes[] = { 266 - &iio_dev_attr_dds0_freq0.dev_attr.attr, 267 - &iio_dev_attr_dds0_freq1.dev_attr.attr, 268 - &iio_const_attr_dds0_freq_scale.dev_attr.attr, 269 - &iio_dev_attr_dds0_phase0.dev_attr.attr, 270 - &iio_dev_attr_dds0_phase1.dev_attr.attr, 271 - &iio_const_attr_dds0_phase_scale.dev_attr.attr, 272 - &iio_dev_attr_dds0_pincontrol_en.dev_attr.attr, 273 - &iio_dev_attr_dds0_freqsymbol.dev_attr.attr, 274 - &iio_dev_attr_dds0_phasesymbol.dev_attr.attr, 275 - &iio_dev_attr_dds0_out_enable.dev_attr.attr, 276 - &iio_dev_attr_dds0_out1_enable.dev_attr.attr, 277 - &iio_dev_attr_dds0_out0_wavetype.dev_attr.attr, 278 - &iio_dev_attr_dds0_out1_wavetype.dev_attr.attr, 279 - &iio_dev_attr_dds0_out0_wavetype_available.dev_attr.attr, 280 - &iio_dev_attr_dds0_out1_wavetype_available.dev_attr.attr, 266 + &iio_dev_attr_out_altvoltage0_frequency0.dev_attr.attr, 267 + &iio_dev_attr_out_altvoltage0_frequency1.dev_attr.attr, 268 + &iio_const_attr_out_altvoltage0_frequency_scale.dev_attr.attr, 269 + &iio_dev_attr_out_altvoltage0_phase0.dev_attr.attr, 270 + &iio_dev_attr_out_altvoltage0_phase1.dev_attr.attr, 271 + &iio_const_attr_out_altvoltage0_phase_scale.dev_attr.attr, 272 + &iio_dev_attr_out_altvoltage0_pincontrol_en.dev_attr.attr, 273 + &iio_dev_attr_out_altvoltage0_frequencysymbol.dev_attr.attr, 274 + &iio_dev_attr_out_altvoltage0_phasesymbol.dev_attr.attr, 275 + &iio_dev_attr_out_altvoltage0_out_enable.dev_attr.attr, 276 + &iio_dev_attr_out_altvoltage0_out1_enable.dev_attr.attr, 277 + &iio_dev_attr_out_altvoltage0_out0_wavetype.dev_attr.attr, 278 + &iio_dev_attr_out_altvoltage0_out1_wavetype.dev_attr.attr, 279 + &iio_dev_attr_out_altvoltage0_out0_wavetype_available.dev_attr.attr, 280 + &iio_dev_attr_out_altvoltage0_out1_wavetype_available.dev_attr.attr, 281 281 NULL, 282 282 }; 283 283 284 284 static struct attribute *ad9833_attributes[] = { 285 - &iio_dev_attr_dds0_freq0.dev_attr.attr, 286 - &iio_dev_attr_dds0_freq1.dev_attr.attr, 287 - &iio_const_attr_dds0_freq_scale.dev_attr.attr, 288 - &iio_dev_attr_dds0_phase0.dev_attr.attr, 289 - &iio_dev_attr_dds0_phase1.dev_attr.attr, 290 - &iio_const_attr_dds0_phase_scale.dev_attr.attr, 291 - &iio_dev_attr_dds0_freqsymbol.dev_attr.attr, 292 - &iio_dev_attr_dds0_phasesymbol.dev_attr.attr, 293 - &iio_dev_attr_dds0_out_enable.dev_attr.attr, 294 - &iio_dev_attr_dds0_out0_wavetype.dev_attr.attr, 295 - &iio_dev_attr_dds0_out0_wavetype_available.dev_attr.attr, 285 + &iio_dev_attr_out_altvoltage0_frequency0.dev_attr.attr, 286 + &iio_dev_attr_out_altvoltage0_frequency1.dev_attr.attr, 287 + &iio_const_attr_out_altvoltage0_frequency_scale.dev_attr.attr, 288 + &iio_dev_attr_out_altvoltage0_phase0.dev_attr.attr, 289 + &iio_dev_attr_out_altvoltage0_phase1.dev_attr.attr, 290 + &iio_const_attr_out_altvoltage0_phase_scale.dev_attr.attr, 291 + &iio_dev_attr_out_altvoltage0_frequencysymbol.dev_attr.attr, 292 + &iio_dev_attr_out_altvoltage0_phasesymbol.dev_attr.attr, 293 + &iio_dev_attr_out_altvoltage0_out_enable.dev_attr.attr, 294 + &iio_dev_attr_out_altvoltage0_out0_wavetype.dev_attr.attr, 295 + &iio_dev_attr_out_altvoltage0_out0_wavetype_available.dev_attr.attr, 296 296 NULL, 297 297 }; 298 298
+27 -27
drivers/staging/iio/frequency/dds.h
··· 7 7 */ 8 8 9 9 /** 10 - * /sys/bus/iio/devices/.../ddsX_freqY 10 + * /sys/bus/iio/devices/.../out_altvoltageX_frequencyY 11 11 */ 12 12 13 13 #define IIO_DEV_ATTR_FREQ(_channel, _num, _mode, _show, _store, _addr) \ 14 - IIO_DEVICE_ATTR(dds##_channel##_freq##_num, \ 14 + IIO_DEVICE_ATTR(out_altvoltage##_channel##_frequency##_num, \ 15 15 _mode, _show, _store, _addr) 16 16 17 17 /** 18 - * /sys/bus/iio/devices/.../ddsX_freqY_scale 18 + * /sys/bus/iio/devices/.../out_altvoltageX_frequencyY_scale 19 19 */ 20 20 21 21 #define IIO_CONST_ATTR_FREQ_SCALE(_channel, _string) \ 22 - IIO_CONST_ATTR(dds##_channel##_freq_scale, _string) 22 + IIO_CONST_ATTR(out_altvoltage##_channel##_frequency_scale, _string) 23 23 24 24 /** 25 - * /sys/bus/iio/devices/.../ddsX_freqsymbol 25 + * /sys/bus/iio/devices/.../out_altvoltageX_frequencysymbol 26 26 */ 27 27 28 28 #define IIO_DEV_ATTR_FREQSYMBOL(_channel, _mode, _show, _store, _addr) \ 29 - IIO_DEVICE_ATTR(dds##_channel##_freqsymbol, \ 29 + IIO_DEVICE_ATTR(out_altvoltage##_channel##_frequencysymbol, \ 30 30 _mode, _show, _store, _addr); 31 31 32 32 /** 33 - * /sys/bus/iio/devices/.../ddsX_phaseY 33 + * /sys/bus/iio/devices/.../out_altvoltageX_phaseY 34 34 */ 35 35 36 36 #define IIO_DEV_ATTR_PHASE(_channel, _num, _mode, _show, _store, _addr) \ 37 - IIO_DEVICE_ATTR(dds##_channel##_phase##_num, \ 37 + IIO_DEVICE_ATTR(out_altvoltage##_channel##_phase##_num, \ 38 38 _mode, _show, _store, _addr) 39 39 40 40 /** 41 - * /sys/bus/iio/devices/.../ddsX_phaseY_scale 41 + * /sys/bus/iio/devices/.../out_altvoltageX_phaseY_scale 42 42 */ 43 43 44 44 #define IIO_CONST_ATTR_PHASE_SCALE(_channel, _string) \ 45 - IIO_CONST_ATTR(dds##_channel##_phase_scale, _string) 45 + IIO_CONST_ATTR(out_altvoltage##_channel##_phase_scale, _string) 46 46 47 47 /** 48 - * /sys/bus/iio/devices/.../ddsX_phasesymbol 48 + * /sys/bus/iio/devices/.../out_altvoltageX_phasesymbol 49 49 */ 50 50 51 51 #define IIO_DEV_ATTR_PHASESYMBOL(_channel, _mode, _show, _store, _addr) \ 52 - IIO_DEVICE_ATTR(dds##_channel##_phasesymbol, \ 52 + IIO_DEVICE_ATTR(out_altvoltage##_channel##_phasesymbol, \ 53 53 _mode, _show, _store, _addr); 54 54 55 55 /** 56 - * /sys/bus/iio/devices/.../ddsX_pincontrol_en 56 + * /sys/bus/iio/devices/.../out_altvoltageX_pincontrol_en 57 57 */ 58 58 59 59 #define IIO_DEV_ATTR_PINCONTROL_EN(_channel, _mode, _show, _store, _addr)\ 60 - IIO_DEVICE_ATTR(dds##_channel##_pincontrol_en, \ 60 + IIO_DEVICE_ATTR(out_altvoltage##_channel##_pincontrol_en, \ 61 61 _mode, _show, _store, _addr); 62 62 63 63 /** 64 - * /sys/bus/iio/devices/.../ddsX_pincontrol_freq_en 64 + * /sys/bus/iio/devices/.../out_altvoltageX_pincontrol_frequency_en 65 65 */ 66 66 67 67 #define IIO_DEV_ATTR_PINCONTROL_FREQ_EN(_channel, _mode, _show, _store, _addr)\ 68 - IIO_DEVICE_ATTR(dds##_channel##_pincontrol_freq_en, \ 68 + IIO_DEVICE_ATTR(out_altvoltage##_channel##_pincontrol_frequency_en,\ 69 69 _mode, _show, _store, _addr); 70 70 71 71 /** 72 - * /sys/bus/iio/devices/.../ddsX_pincontrol_phase_en 72 + * /sys/bus/iio/devices/.../out_altvoltageX_pincontrol_phase_en 73 73 */ 74 74 75 75 #define IIO_DEV_ATTR_PINCONTROL_PHASE_EN(_channel, _mode, _show, _store, _addr)\ 76 - IIO_DEVICE_ATTR(dds##_channel##_pincontrol_phase_en, \ 76 + IIO_DEVICE_ATTR(out_altvoltage##_channel##_pincontrol_phase_en, \ 77 77 _mode, _show, _store, _addr); 78 78 79 79 /** 80 - * /sys/bus/iio/devices/.../ddsX_out_enable 80 + * /sys/bus/iio/devices/.../out_altvoltageX_out_enable 81 81 */ 82 82 83 83 #define IIO_DEV_ATTR_OUT_ENABLE(_channel, _mode, _show, _store, _addr) \ 84 - IIO_DEVICE_ATTR(dds##_channel##_out_enable, \ 84 + IIO_DEVICE_ATTR(out_altvoltage##_channel##_out_enable, \ 85 85 _mode, _show, _store, _addr); 86 86 87 87 /** 88 - * /sys/bus/iio/devices/.../ddsX_outY_enable 88 + * /sys/bus/iio/devices/.../out_altvoltageX_outY_enable 89 89 */ 90 90 91 91 #define IIO_DEV_ATTR_OUTY_ENABLE(_channel, _output, \ 92 92 _mode, _show, _store, _addr) \ 93 - IIO_DEVICE_ATTR(dds##_channel##_out##_output##_enable, \ 93 + IIO_DEVICE_ATTR(out_altvoltage##_channel##_out##_output##_enable,\ 94 94 _mode, _show, _store, _addr); 95 95 96 96 /** 97 - * /sys/bus/iio/devices/.../ddsX_outY_wavetype 97 + * /sys/bus/iio/devices/.../out_altvoltageX_outY_wavetype 98 98 */ 99 99 100 100 #define IIO_DEV_ATTR_OUT_WAVETYPE(_channel, _output, _store, _addr) \ 101 - IIO_DEVICE_ATTR(dds##_channel##_out##_output##_wavetype, \ 101 + IIO_DEVICE_ATTR(out_altvoltage##_channel##_out##_output##_wavetype,\ 102 102 S_IWUSR, NULL, _store, _addr); 103 103 104 104 /** 105 - * /sys/bus/iio/devices/.../ddsX_outY_wavetype_available 105 + * /sys/bus/iio/devices/.../out_altvoltageX_outY_wavetype_available 106 106 */ 107 107 108 108 #define IIO_CONST_ATTR_OUT_WAVETYPES_AVAILABLE(_channel, _output, _modes)\ 109 - IIO_CONST_ATTR(dds##_channel##_out##_output##_wavetype_available,\ 110 - _modes); 109 + IIO_CONST_ATTR( \ 110 + out_altvoltage##_channel##_out##_output##_wavetype_available, _modes);