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ASoC: fsl_esai: Add indentation for binding doc to increase readability
This patch simply adds indentations for DT binding doc to increase readability
without changing any contents.
Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
authored by
Nicolin Chen
and committed by
Mark Brown
73a2cd91
f114040e
+23
-21
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Documentation/devicetree/bindings/sound/fsl,esai.txt
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Documentation/devicetree/bindings/sound/fsl,esai.txt
···
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Required properties:
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- compatible : Compatible list, must contain "fsl,imx35-esai" or
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"fsl,vf610-esai"
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- compatible : Compatible list, must contain "fsl,imx35-esai" or
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"fsl,vf610-esai"
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- reg : Offset and length of the register set for the device.
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- reg : Offset and length of the register set for the device.
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- interrupts : Contains the spdif interrupt.
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- interrupts : Contains the spdif interrupt.
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- dmas : Generic dma devicetree binding as described in
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Documentation/devicetree/bindings/dma/dma.txt.
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- dmas : Generic dma devicetree binding as described in
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Documentation/devicetree/bindings/dma/dma.txt.
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- dma-names : Two dmas have to be defined, "tx" and "rx".
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- dma-names : Two dmas have to be defined, "tx" and "rx".
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- clocks: Contains an entry for each entry in clock-names.
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- clocks : Contains an entry for each entry in clock-names.
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- clock-names : Includes the following entries:
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"core" The core clock used to access registers
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"extal" The esai baud clock for esai controller used to derive
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HCK, SCK and FS.
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"fsys" The system clock derived from ahb clock used to derive
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HCK, SCK and FS.
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- clock-names : Includes the following entries:
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"core" The core clock used to access registers
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"extal" The esai baud clock for esai controller used to
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derive HCK, SCK and FS.
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"fsys" The system clock derived from ahb clock used to
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derive HCK, SCK and FS.
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- fsl,fifo-depth: The number of elements in the transmit and receive FIFOs.
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This number is the maximum allowed value for TFCR[TFWM] or RFCR[RFWM].
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- fsl,fifo-depth : The number of elements in the transmit and receive
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FIFOs. This number is the maximum allowed value for
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TFCR[TFWM] or RFCR[RFWM].
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- fsl,esai-synchronous: This is a boolean property. If present, indicating
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that ESAI would work in the synchronous mode, which means all the settings
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for Receiving would be duplicated from Transmition related registers.
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that ESAI would work in the synchronous mode, which
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means all the settings for Receiving would be
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duplicated from Transmition related registers.
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- big-endian : If this property is absent, the native endian mode will
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be in use as default, or the big endian mode will be in use for all the
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device registers.
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- big-endian : If this property is absent, the native endian mode
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will be in use as default, or the big endian mode
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will be in use for all the device registers.
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Example:
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