Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge remote-tracking branch 'sparc/master' into work.sparc32

... and resolve a non-textual conflict in arch/sparc/lib/memset.S -
EXT(...) stuff shouldn't be reintroduced on merge.

Al Viro 73686e78 b4edf06c

+19 -18
+1 -1
arch/sparc/Kconfig
··· 176 176 Management" code will be disabled if you say Y here. 177 177 178 178 See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO 179 - available at <http://www.tldp.org/docs.html#howto>. 179 + available at <https://www.tldp.org/docs.html#howto>. 180 180 181 181 If you don't know what to do here, say N. 182 182
+4
arch/sparc/boot/piggyback.c
··· 154 154 offset -= LOOKBACK; 155 155 /* skip a.out header */ 156 156 offset += AOUT_TEXT_OFFSET; 157 + if (offset < 0) { 158 + errno = -EINVAL; 159 + die("Calculated a negative offset, probably elftoaout generated an invalid image. Did you use a recent elftoaout ?"); 160 + } 157 161 if (lseek(kernelfd, offset, SEEK_SET) < 0) 158 162 die("lseek"); 159 163 if (read(kernelfd, buffer, BUFSIZE) != BUFSIZE)
+1 -1
arch/sparc/include/asm/backoff.h
··· 18 18 * 19 19 * When we spin, we try to use an operation that will cause the 20 20 * current cpu strand to block, and therefore make the core fully 21 - * available to any other other runnable strands. There are two 21 + * available to any other runnable strands. There are two 22 22 * options, based upon cpu capabilities. 23 23 * 24 24 * On all cpus prior to SPARC-T4 we do three dummy reads of the
+1 -1
arch/sparc/include/asm/pgtsrmmu.h
··· 113 113 extern void *srmmu_nocache_pool; 114 114 #define __nocache_pa(VADDR) (((unsigned long)VADDR) - SRMMU_NOCACHE_VADDR + __pa((unsigned long)srmmu_nocache_pool)) 115 115 #define __nocache_va(PADDR) (__va((unsigned long)PADDR) - (unsigned long)srmmu_nocache_pool + SRMMU_NOCACHE_VADDR) 116 - #define __nocache_fix(VADDR) __va(__nocache_pa(VADDR)) 116 + #define __nocache_fix(VADDR) ((__typeof__(VADDR))__va(__nocache_pa(VADDR))) 117 117 118 118 /* Accessing the MMU control register. */ 119 119 unsigned int srmmu_get_mmureg(void);
+1 -2
arch/sparc/kernel/pci.c
··· 552 552 pci_info(bus, "scan_bus[%pOF] bus no %d\n", 553 553 node, bus->number); 554 554 555 - child = NULL; 556 555 prev_devfn = -1; 557 - while ((child = of_get_next_child(node, child)) != NULL) { 556 + for_each_child_of_node(node, child) { 558 557 if (ofpci_verbose) 559 558 pci_info(bus, " * %pOF\n", child); 560 559 reg = of_get_property(child, "reg", &reglen);
+2 -4
arch/sparc/kernel/viohs.c
··· 428 428 struct vio_dring_register *pkt) 429 429 { 430 430 struct vio_dring_state *dr; 431 - int i, len; 431 + int i; 432 432 433 433 viodbg(HS, "GOT DRING_REG INFO ident[%llx] " 434 434 "ndesc[%u] dsz[%u] opt[0x%x] ncookies[%u]\n", ··· 482 482 pkt->num_descr, pkt->descr_size, pkt->options, 483 483 pkt->num_cookies); 484 484 485 - len = (sizeof(*pkt) + 486 - (dr->ncookies * sizeof(struct ldc_trans_cookie))); 487 - if (send_ctrl(vio, &pkt->tag, len) < 0) 485 + if (send_ctrl(vio, &pkt->tag, struct_size(pkt, cookies, dr->ncookies)) < 0) 488 486 goto send_nack; 489 487 490 488 vio->dr_state |= VIO_DR_STATE_RXREG;
+9 -9
arch/sparc/mm/srmmu.c
··· 689 689 pgdp = pgd_offset_k(start); 690 690 p4dp = p4d_offset(pgdp, start); 691 691 pudp = pud_offset(p4dp, start); 692 - if (pud_none(*(pud_t *)__nocache_fix(pudp))) { 692 + if (pud_none(*__nocache_fix(pudp))) { 693 693 pmdp = __srmmu_get_nocache( 694 694 SRMMU_PMD_TABLE_SIZE, SRMMU_PMD_TABLE_SIZE); 695 695 if (pmdp == NULL) ··· 698 698 pud_set(__nocache_fix(pudp), pmdp); 699 699 } 700 700 pmdp = pmd_offset(__nocache_fix(pudp), start); 701 - if (srmmu_pmd_none(*(pmd_t *)__nocache_fix(pmdp))) { 701 + if (srmmu_pmd_none(*__nocache_fix(pmdp))) { 702 702 ptep = __srmmu_get_nocache(PTE_SIZE, PTE_SIZE); 703 703 if (ptep == NULL) 704 704 early_pgtable_allocfail("pte"); ··· 810 810 p4dp = p4d_offset(pgdp, start); 811 811 pudp = pud_offset(p4dp, start); 812 812 if (what == 2) { 813 - *(pgd_t *)__nocache_fix(pgdp) = __pgd(probed); 813 + *__nocache_fix(pgdp) = __pgd(probed); 814 814 start += PGDIR_SIZE; 815 815 continue; 816 816 } 817 - if (pud_none(*(pud_t *)__nocache_fix(pudp))) { 817 + if (pud_none(*__nocache_fix(pudp))) { 818 818 pmdp = __srmmu_get_nocache(SRMMU_PMD_TABLE_SIZE, 819 819 SRMMU_PMD_TABLE_SIZE); 820 820 if (pmdp == NULL) ··· 822 822 memset(__nocache_fix(pmdp), 0, SRMMU_PMD_TABLE_SIZE); 823 823 pud_set(__nocache_fix(pudp), pmdp); 824 824 } 825 - pmdp = pmd_offset(__nocache_fix(pgdp), start); 825 + pmdp = pmd_offset(__nocache_fix(pudp), start); 826 826 if (what == 1) { 827 827 *(pmd_t *)__nocache_fix(pmdp) = __pmd(probed); 828 828 start += PMD_SIZE; 829 829 continue; 830 830 } 831 - if (srmmu_pmd_none(*(pmd_t *)__nocache_fix(pmdp))) { 831 + if (srmmu_pmd_none(*__nocache_fix(pmdp))) { 832 832 ptep = __srmmu_get_nocache(PTE_SIZE, PTE_SIZE); 833 833 if (ptep == NULL) 834 834 early_pgtable_allocfail("pte"); ··· 836 836 pmd_set(__nocache_fix(pmdp), ptep); 837 837 } 838 838 ptep = pte_offset_kernel(__nocache_fix(pmdp), start); 839 - *(pte_t *)__nocache_fix(ptep) = __pte(probed); 839 + *__nocache_fix(ptep) = __pte(probed); 840 840 start += PAGE_SIZE; 841 841 } 842 842 } ··· 850 850 unsigned long big_pte; 851 851 852 852 big_pte = KERNEL_PTE(phys_base >> 4); 853 - *(pgd_t *)__nocache_fix(pgdp) = __pgd(big_pte); 853 + *__nocache_fix(pgdp) = __pgd(big_pte); 854 854 } 855 855 856 856 /* Map sp_bank entry SP_ENTRY, starting at virtual address VBASE. */ ··· 940 940 srmmu_ctx_table_phys = (ctxd_t *)__nocache_pa(srmmu_context_table); 941 941 942 942 for (i = 0; i < num_contexts; i++) 943 - srmmu_ctxd_set((ctxd_t *)__nocache_fix(&srmmu_context_table[i]), srmmu_swapper_pg_dir); 943 + srmmu_ctxd_set(__nocache_fix(&srmmu_context_table[i]), srmmu_swapper_pg_dir); 944 944 945 945 flush_cache_all(); 946 946 srmmu_set_ctable_ptr((unsigned long)srmmu_ctx_table_phys);