Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'mt76-for-kvalo-2024-02-22' of https://github.com/nbd168/wireless

mt76 patches for 6.9

* fixes
* support for newer chips in the mt7915 driver
* mt7996 improvements
* page pool performance improvement

+976 -526
+28 -5
Documentation/devicetree/bindings/net/wireless/mediatek,mt76.yaml
··· 19 19 Alternatively, it can specify the wireless part of the MT7628/MT7688 20 20 or MT7622/MT7986 SoC. 21 21 22 - allOf: 23 - - $ref: ieee80211.yaml# 24 - 25 22 properties: 26 23 compatible: 27 24 enum: ··· 35 38 MT7986 should contain 3 regions consys, dcm, and sku, in this order. 36 39 37 40 interrupts: 38 - maxItems: 1 41 + minItems: 1 42 + items: 43 + - description: major interrupt for rings 44 + - description: additional interrupt for ring 19 45 + - description: additional interrupt for ring 4 46 + - description: additional interrupt for ring 5 39 47 40 48 power-domains: 41 49 maxItems: 1 ··· 219 217 - compatible 220 218 - reg 221 219 220 + allOf: 221 + - $ref: ieee80211.yaml# 222 + - if: 223 + properties: 224 + compatible: 225 + contains: 226 + enum: 227 + - mediatek,mt7981-wmac 228 + - mediatek,mt7986-wmac 229 + then: 230 + properties: 231 + interrupts: 232 + minItems: 4 233 + else: 234 + properties: 235 + interrupts: 236 + maxItems: 1 237 + 222 238 unevaluatedProperties: false 223 239 224 240 examples: ··· 313 293 reg = <0x18000000 0x1000000>, 314 294 <0x10003000 0x1000>, 315 295 <0x11d10000 0x1000>; 316 - interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>; 296 + interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 297 + <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 298 + <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>, 299 + <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>; 317 300 clocks = <&topckgen 50>, 318 301 <&topckgen 62>; 319 302 clock-names = "mcu", "ap2conn";
+1 -1
drivers/net/wireless/mediatek/mt76/Makefile
··· 10 10 11 11 mt76-y := \ 12 12 mmio.o util.o trace.o dma.o mac80211.o debugfs.o eeprom.o \ 13 - tx.o agg-rx.o mcu.o 13 + tx.o agg-rx.o mcu.o wed.o 14 14 15 15 mt76-$(CONFIG_PCI) += pci.o 16 16 mt76-$(CONFIG_NL80211_TESTMODE) += testmode.o
+1 -1
drivers/net/wireless/mediatek/mt76/agg-rx.c
··· 122 122 struct ieee80211_bar *bar = mt76_skb_get_hdr(skb); 123 123 struct mt76_wcid *wcid = status->wcid; 124 124 struct mt76_rx_tid *tid; 125 - u8 tidno = status->qos_ctl & IEEE80211_QOS_CTL_TID_MASK; 125 + u8 tidno; 126 126 u16 seqno; 127 127 128 128 if (!ieee80211_is_ctl(bar->frame_control))
+7 -99
drivers/net/wireless/mediatek/mt76/dma.c
··· 197 197 q->tail = q->head; 198 198 } 199 199 200 - static void 201 - __mt76_dma_queue_reset(struct mt76_dev *dev, struct mt76_queue *q, 202 - bool reset_idx) 200 + void __mt76_dma_queue_reset(struct mt76_dev *dev, struct mt76_queue *q, 201 + bool reset_idx) 203 202 { 204 203 if (!q || !q->ndesc) 205 204 return; ··· 218 219 mt76_dma_sync_idx(dev, q); 219 220 } 220 221 221 - static void 222 - mt76_dma_queue_reset(struct mt76_dev *dev, struct mt76_queue *q) 222 + void mt76_dma_queue_reset(struct mt76_dev *dev, struct mt76_queue *q) 223 223 { 224 224 __mt76_dma_queue_reset(dev, q, true); 225 225 } ··· 630 632 return ret; 631 633 } 632 634 633 - static int 634 - mt76_dma_rx_fill(struct mt76_dev *dev, struct mt76_queue *q, 635 - bool allow_direct) 635 + int mt76_dma_rx_fill(struct mt76_dev *dev, struct mt76_queue *q, 636 + bool allow_direct) 636 637 { 637 638 int len = SKB_WITH_OVERHEAD(q->buf_size); 638 639 int frames = 0; ··· 678 681 return frames; 679 682 } 680 683 681 - int mt76_dma_wed_setup(struct mt76_dev *dev, struct mt76_queue *q, bool reset) 682 - { 683 - #ifdef CONFIG_NET_MEDIATEK_SOC_WED 684 - int ret = 0, type, ring; 685 - u16 flags; 686 - 687 - if (!q || !q->ndesc) 688 - return -EINVAL; 689 - 690 - flags = q->flags; 691 - if (!q->wed || !mtk_wed_device_active(q->wed)) 692 - q->flags &= ~MT_QFLAG_WED; 693 - 694 - if (!(q->flags & MT_QFLAG_WED)) 695 - return 0; 696 - 697 - type = FIELD_GET(MT_QFLAG_WED_TYPE, q->flags); 698 - ring = FIELD_GET(MT_QFLAG_WED_RING, q->flags); 699 - 700 - switch (type) { 701 - case MT76_WED_Q_TX: 702 - ret = mtk_wed_device_tx_ring_setup(q->wed, ring, q->regs, 703 - reset); 704 - if (!ret) 705 - q->wed_regs = q->wed->tx_ring[ring].reg_base; 706 - break; 707 - case MT76_WED_Q_TXFREE: 708 - /* WED txfree queue needs ring to be initialized before setup */ 709 - q->flags = 0; 710 - mt76_dma_queue_reset(dev, q); 711 - mt76_dma_rx_fill(dev, q, false); 712 - 713 - ret = mtk_wed_device_txfree_ring_setup(q->wed, q->regs); 714 - if (!ret) 715 - q->wed_regs = q->wed->txfree_ring.reg_base; 716 - break; 717 - case MT76_WED_Q_RX: 718 - ret = mtk_wed_device_rx_ring_setup(q->wed, ring, q->regs, 719 - reset); 720 - if (!ret) 721 - q->wed_regs = q->wed->rx_ring[ring].reg_base; 722 - break; 723 - case MT76_WED_RRO_Q_DATA: 724 - q->flags &= ~MT_QFLAG_WED; 725 - __mt76_dma_queue_reset(dev, q, false); 726 - mtk_wed_device_rro_rx_ring_setup(q->wed, ring, q->regs); 727 - q->head = q->ndesc - 1; 728 - q->queued = q->head; 729 - break; 730 - case MT76_WED_RRO_Q_MSDU_PG: 731 - q->flags &= ~MT_QFLAG_WED; 732 - __mt76_dma_queue_reset(dev, q, false); 733 - mtk_wed_device_msdu_pg_rx_ring_setup(q->wed, ring, q->regs); 734 - q->head = q->ndesc - 1; 735 - q->queued = q->head; 736 - break; 737 - case MT76_WED_RRO_Q_IND: 738 - q->flags &= ~MT_QFLAG_WED; 739 - mt76_dma_queue_reset(dev, q); 740 - mt76_dma_rx_fill(dev, q, false); 741 - mtk_wed_device_ind_rx_ring_setup(q->wed, q->regs); 742 - break; 743 - default: 744 - ret = -EINVAL; 745 - break; 746 - } 747 - q->flags = flags; 748 - 749 - return ret; 750 - #else 751 - return 0; 752 - #endif 753 - } 754 - EXPORT_SYMBOL_GPL(mt76_dma_wed_setup); 755 - 756 684 static int 757 685 mt76_dma_alloc_queue(struct mt76_dev *dev, struct mt76_queue *q, 758 686 int idx, int n_desc, int bufsize, ··· 722 800 if (ret) 723 801 return ret; 724 802 725 - ret = mt76_dma_wed_setup(dev, q, false); 803 + ret = mt76_wed_dma_setup(dev, q, false); 726 804 if (ret) 727 805 return ret; 728 806 ··· 785 863 mt76_dma_rx_cleanup(dev, q); 786 864 787 865 /* reset WED rx queues */ 788 - mt76_dma_wed_setup(dev, q, true); 866 + mt76_wed_dma_setup(dev, q, true); 789 867 790 868 if (mt76_queue_is_wed_tx_free(q)) 791 869 return; ··· 975 1053 dev->queue_ops = &mt76_dma_ops; 976 1054 } 977 1055 EXPORT_SYMBOL_GPL(mt76_dma_attach); 978 - 979 - void mt76_dma_wed_reset(struct mt76_dev *dev) 980 - { 981 - struct mt76_mmio *mmio = &dev->mmio; 982 - 983 - if (!test_bit(MT76_STATE_WED_RESET, &dev->phy.state)) 984 - return; 985 - 986 - complete(&mmio->wed_reset); 987 - 988 - if (!wait_for_completion_timeout(&mmio->wed_reset_complete, 3 * HZ)) 989 - dev_err(dev->dev, "wed reset complete timeout\n"); 990 - } 991 - EXPORT_SYMBOL_GPL(mt76_dma_wed_reset); 992 1056 993 1057 void mt76_dma_cleanup(struct mt76_dev *dev) 994 1058 {
+6 -3
drivers/net/wireless/mediatek/mt76/dma.h
··· 79 79 int mt76_dma_rx_poll(struct napi_struct *napi, int budget); 80 80 void mt76_dma_attach(struct mt76_dev *dev); 81 81 void mt76_dma_cleanup(struct mt76_dev *dev); 82 - int mt76_dma_wed_setup(struct mt76_dev *dev, struct mt76_queue *q, bool reset); 83 - void mt76_dma_wed_reset(struct mt76_dev *dev); 82 + int mt76_dma_rx_fill(struct mt76_dev *dev, struct mt76_queue *q, 83 + bool allow_direct); 84 + void __mt76_dma_queue_reset(struct mt76_dev *dev, struct mt76_queue *q, 85 + bool reset_idx); 86 + void mt76_dma_queue_reset(struct mt76_dev *dev, struct mt76_queue *q); 84 87 85 88 static inline void 86 89 mt76_dma_reset_tx_queue(struct mt76_dev *dev, struct mt76_queue *q) 87 90 { 88 91 dev->queue_ops->reset_q(dev, q); 89 92 if (mtk_wed_device_active(&dev->mmio.wed)) 90 - mt76_dma_wed_setup(dev, q, true); 93 + mt76_wed_dma_setup(dev, q, true); 91 94 } 92 95 93 96 static inline void
+9 -17
drivers/net/wireless/mediatek/mt76/mac80211.c
··· 579 579 580 580 int mt76_create_page_pool(struct mt76_dev *dev, struct mt76_queue *q) 581 581 { 582 + bool is_qrx = mt76_queue_is_rx(dev, q); 582 583 struct page_pool_params pp_params = { 583 584 .order = 0, 584 585 .flags = 0, 585 586 .nid = NUMA_NO_NODE, 586 587 .dev = dev->dma_dev, 587 588 }; 588 - int idx = q - dev->q_rx; 589 + int idx = is_qrx ? q - dev->q_rx : -1; 590 + 591 + /* Allocate page_pools just for rx/wed_tx_free queues */ 592 + if (!is_qrx && !mt76_queue_is_wed_tx_free(q)) 593 + return 0; 589 594 590 595 switch (idx) { 591 596 case MT_RXQ_MAIN: ··· 609 604 pp_params.dma_dir = DMA_FROM_DEVICE; 610 605 pp_params.max_len = PAGE_SIZE; 611 606 pp_params.offset = 0; 607 + /* NAPI is available just for rx queues */ 608 + if (idx >= 0 && idx < ARRAY_SIZE(dev->napi)) 609 + pp_params.napi = &dev->napi[idx]; 612 610 } 613 611 614 612 q->page_pool = page_pool_create(&pp_params); ··· 1862 1854 return MT_DFS_STATE_ACTIVE; 1863 1855 } 1864 1856 EXPORT_SYMBOL_GPL(mt76_phy_dfs_state); 1865 - 1866 - #ifdef CONFIG_NET_MEDIATEK_SOC_WED 1867 - int mt76_net_setup_tc(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 1868 - struct net_device *netdev, enum tc_setup_type type, 1869 - void *type_data) 1870 - { 1871 - struct mt76_phy *phy = hw->priv; 1872 - struct mtk_wed_device *wed = &phy->dev->mmio.wed; 1873 - 1874 - if (!mtk_wed_device_active(wed)) 1875 - return -EOPNOTSUPP; 1876 - 1877 - return mtk_wed_device_setup_tc(wed, netdev, type, type_data); 1878 - } 1879 - EXPORT_SYMBOL_GPL(mt76_net_setup_tc); 1880 - #endif /* CONFIG_NET_MEDIATEK_SOC_WED */
-107
drivers/net/wireless/mediatek/mt76/mmio.c
··· 85 85 } 86 86 EXPORT_SYMBOL_GPL(mt76_set_irq_mask); 87 87 88 - #ifdef CONFIG_NET_MEDIATEK_SOC_WED 89 - void mt76_mmio_wed_release_rx_buf(struct mtk_wed_device *wed) 90 - { 91 - struct mt76_dev *dev = container_of(wed, struct mt76_dev, mmio.wed); 92 - int i; 93 - 94 - for (i = 0; i < dev->rx_token_size; i++) { 95 - struct mt76_txwi_cache *t; 96 - 97 - t = mt76_rx_token_release(dev, i); 98 - if (!t || !t->ptr) 99 - continue; 100 - 101 - mt76_put_page_pool_buf(t->ptr, false); 102 - t->ptr = NULL; 103 - 104 - mt76_put_rxwi(dev, t); 105 - } 106 - 107 - mt76_free_pending_rxwi(dev); 108 - } 109 - EXPORT_SYMBOL_GPL(mt76_mmio_wed_release_rx_buf); 110 - 111 - u32 mt76_mmio_wed_init_rx_buf(struct mtk_wed_device *wed, int size) 112 - { 113 - struct mt76_dev *dev = container_of(wed, struct mt76_dev, mmio.wed); 114 - struct mtk_wed_bm_desc *desc = wed->rx_buf_ring.desc; 115 - struct mt76_queue *q = &dev->q_rx[MT_RXQ_MAIN]; 116 - int i, len = SKB_WITH_OVERHEAD(q->buf_size); 117 - struct mt76_txwi_cache *t = NULL; 118 - 119 - for (i = 0; i < size; i++) { 120 - enum dma_data_direction dir; 121 - dma_addr_t addr; 122 - u32 offset; 123 - int token; 124 - void *buf; 125 - 126 - t = mt76_get_rxwi(dev); 127 - if (!t) 128 - goto unmap; 129 - 130 - buf = mt76_get_page_pool_buf(q, &offset, q->buf_size); 131 - if (!buf) 132 - goto unmap; 133 - 134 - addr = page_pool_get_dma_addr(virt_to_head_page(buf)) + offset; 135 - dir = page_pool_get_dma_dir(q->page_pool); 136 - dma_sync_single_for_device(dev->dma_dev, addr, len, dir); 137 - 138 - desc->buf0 = cpu_to_le32(addr); 139 - token = mt76_rx_token_consume(dev, buf, t, addr); 140 - if (token < 0) { 141 - mt76_put_page_pool_buf(buf, false); 142 - goto unmap; 143 - } 144 - 145 - token = FIELD_PREP(MT_DMA_CTL_TOKEN, token); 146 - #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT 147 - token |= FIELD_PREP(MT_DMA_CTL_SDP0_H, addr >> 32); 148 - #endif 149 - desc->token |= cpu_to_le32(token); 150 - desc++; 151 - } 152 - 153 - return 0; 154 - 155 - unmap: 156 - if (t) 157 - mt76_put_rxwi(dev, t); 158 - mt76_mmio_wed_release_rx_buf(wed); 159 - 160 - return -ENOMEM; 161 - } 162 - EXPORT_SYMBOL_GPL(mt76_mmio_wed_init_rx_buf); 163 - 164 - int mt76_mmio_wed_offload_enable(struct mtk_wed_device *wed) 165 - { 166 - struct mt76_dev *dev = container_of(wed, struct mt76_dev, mmio.wed); 167 - 168 - spin_lock_bh(&dev->token_lock); 169 - dev->token_size = wed->wlan.token_start; 170 - spin_unlock_bh(&dev->token_lock); 171 - 172 - return !wait_event_timeout(dev->tx_wait, !dev->wed_token_count, HZ); 173 - } 174 - EXPORT_SYMBOL_GPL(mt76_mmio_wed_offload_enable); 175 - 176 - void mt76_mmio_wed_offload_disable(struct mtk_wed_device *wed) 177 - { 178 - struct mt76_dev *dev = container_of(wed, struct mt76_dev, mmio.wed); 179 - 180 - spin_lock_bh(&dev->token_lock); 181 - dev->token_size = dev->drv->token_size; 182 - spin_unlock_bh(&dev->token_lock); 183 - } 184 - EXPORT_SYMBOL_GPL(mt76_mmio_wed_offload_disable); 185 - 186 - void mt76_mmio_wed_reset_complete(struct mtk_wed_device *wed) 187 - { 188 - struct mt76_dev *dev = container_of(wed, struct mt76_dev, mmio.wed); 189 - 190 - complete(&dev->mmio.wed_reset_complete); 191 - } 192 - EXPORT_SYMBOL_GPL(mt76_mmio_wed_reset_complete); 193 - #endif /*CONFIG_NET_MEDIATEK_SOC_WED */ 194 - 195 88 void mt76_mmio_init(struct mt76_dev *dev, void __iomem *regs) 196 89 { 197 90 static const struct mt76_bus_ops mt76_mmio_ops = {
+41 -20
drivers/net/wireless/mediatek/mt76/mt76.h
··· 210 210 u16 first; 211 211 u16 head; 212 212 u16 tail; 213 + u8 hw_idx; 214 + u8 ep; 213 215 int ndesc; 214 216 int queued; 215 217 int buf_size; ··· 219 217 bool blocked; 220 218 221 219 u8 buf_offset; 222 - u8 hw_idx; 223 220 u16 flags; 224 221 225 222 struct mtk_wed_device *wed; ··· 1082 1081 void mt76_mmio_init(struct mt76_dev *dev, void __iomem *regs); 1083 1082 void mt76_pci_disable_aspm(struct pci_dev *pdev); 1084 1083 1085 - #ifdef CONFIG_NET_MEDIATEK_SOC_WED 1086 - int mt76_net_setup_tc(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 1087 - struct net_device *netdev, enum tc_setup_type type, 1088 - void *type_data); 1089 - #endif /*CONFIG_NET_MEDIATEK_SOC_WED */ 1090 - 1091 1084 static inline u16 mt76_chip(struct mt76_dev *dev) 1092 1085 { 1093 1086 return dev->rev >> 16; ··· 1092 1097 return dev->rev & 0xffff; 1093 1098 } 1094 1099 1100 + void mt76_wed_release_rx_buf(struct mtk_wed_device *wed); 1101 + void mt76_wed_offload_disable(struct mtk_wed_device *wed); 1102 + void mt76_wed_reset_complete(struct mtk_wed_device *wed); 1103 + void mt76_wed_dma_reset(struct mt76_dev *dev); 1104 + int mt76_wed_net_setup_tc(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 1105 + struct net_device *netdev, enum tc_setup_type type, 1106 + void *type_data); 1095 1107 #ifdef CONFIG_NET_MEDIATEK_SOC_WED 1096 - u32 mt76_mmio_wed_init_rx_buf(struct mtk_wed_device *wed, int size); 1097 - void mt76_mmio_wed_release_rx_buf(struct mtk_wed_device *wed); 1098 - int mt76_mmio_wed_offload_enable(struct mtk_wed_device *wed); 1099 - void mt76_mmio_wed_offload_disable(struct mtk_wed_device *wed); 1100 - void mt76_mmio_wed_reset_complete(struct mtk_wed_device *wed); 1101 - #endif /*CONFIG_NET_MEDIATEK_SOC_WED */ 1108 + u32 mt76_wed_init_rx_buf(struct mtk_wed_device *wed, int size); 1109 + int mt76_wed_offload_enable(struct mtk_wed_device *wed); 1110 + int mt76_wed_dma_setup(struct mt76_dev *dev, struct mt76_queue *q, bool reset); 1111 + #else 1112 + static inline u32 mt76_wed_init_rx_buf(struct mtk_wed_device *wed, int size) 1113 + { 1114 + return 0; 1115 + } 1116 + 1117 + static inline int mt76_wed_offload_enable(struct mtk_wed_device *wed) 1118 + { 1119 + return 0; 1120 + } 1121 + 1122 + static inline int mt76_wed_dma_setup(struct mt76_dev *dev, struct mt76_queue *q, 1123 + bool reset) 1124 + { 1125 + return 0; 1126 + } 1127 + #endif /* CONFIG_NET_MEDIATEK_SOC_WED */ 1102 1128 1103 1129 #define mt76xx_chip(dev) mt76_chip(&((dev)->mt76)) 1104 1130 #define mt76xx_rev(dev) mt76_rev(&((dev)->mt76)) ··· 1486 1470 urb->status != -ENOENT; 1487 1471 } 1488 1472 1489 - /* Map hardware queues to usb endpoints */ 1490 - static inline u8 q2ep(u8 qid) 1491 - { 1492 - /* TODO: take management packets to queue 5 */ 1493 - return qid + 1; 1494 - } 1495 - 1496 1473 static inline int 1497 1474 mt76u_bulk_msg(struct mt76_dev *dev, void *data, int len, int *actual_len, 1498 1475 int timeout, int ep) ··· 1606 1597 struct ieee80211_channel *chan, 1607 1598 struct mt76_power_limits *dest, 1608 1599 s8 target_power); 1600 + 1601 + static inline bool mt76_queue_is_rx(struct mt76_dev *dev, struct mt76_queue *q) 1602 + { 1603 + int i; 1604 + 1605 + for (i = 0; i < ARRAY_SIZE(dev->q_rx); i++) { 1606 + if (q == &dev->q_rx[i]) 1607 + return true; 1608 + } 1609 + 1610 + return false; 1611 + } 1609 1612 1610 1613 static inline bool mt76_queue_is_wed_tx_free(struct mt76_queue *q) 1611 1614 {
+5
drivers/net/wireless/mediatek/mt76/mt76_connac.h
··· 227 227 return mt76_chip(dev) == 0x7992; 228 228 } 229 229 230 + static inline bool is_mt799x(struct mt76_dev *dev) 231 + { 232 + return is_mt7996(dev) || is_mt7992(dev); 233 + } 234 + 230 235 static inline bool is_mt7622(struct mt76_dev *dev) 231 236 { 232 237 if (!IS_ENABLED(CONFIG_MT7622_WMAC))
+5
drivers/net/wireless/mediatek/mt76/mt76_connac2_mac.h
··· 32 32 MT_LMAC_PSMP0, 33 33 }; 34 34 35 + enum { 36 + MT_TXS_MPDU_FMT = 0, 37 + MT_TXS_PPDU_FMT = 2, 38 + }; 39 + 35 40 #define MT_TX_FREE_MSDU_CNT GENMASK(9, 0) 36 41 #define MT_TX_FREE_WLAN_ID GENMASK(23, 14) 37 42 #define MT_TX_FREE_COUNT GENMASK(12, 0)
+6 -1
drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c
··· 544 544 val = FIELD_PREP(MT_TXD5_PID, pid); 545 545 if (pid >= MT_PACKET_ID_FIRST) { 546 546 val |= MT_TXD5_TX_STATUS_HOST; 547 - amsdu_en = amsdu_en && !is_mt7921(dev); 547 + amsdu_en = 0; 548 548 } 549 549 550 550 txwi[5] = cpu_to_le32(val); ··· 579 579 spe_idx = 24 + phy_idx; 580 580 txwi[7] |= cpu_to_le32(FIELD_PREP(MT_TXD7_SPE_IDX, spe_idx)); 581 581 } 582 + 583 + txwi[7] &= ~cpu_to_le32(MT_TXD7_HW_AMSDU); 582 584 } 583 585 } 584 586 EXPORT_SYMBOL_GPL(mt76_connac2_mac_write_txwi); ··· 715 713 { 716 714 struct sk_buff_head list; 717 715 struct sk_buff *skb; 716 + 717 + if (le32_get_bits(txs_data[0], MT_TXS0_TXS_FORMAT) == MT_TXS_PPDU_FMT) 718 + return false; 718 719 719 720 mt76_tx_status_lock(dev, &list); 720 721 skb = mt76_tx_status_skb_get(dev, wcid, pid, &list);
+5 -2
drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c
··· 66 66 67 67 if ((!is_connac_v1(dev) && addr == MCU_PATCH_ADDRESS) || 68 68 (is_mt7921(dev) && addr == 0x900000) || 69 - (is_mt7925(dev) && addr == 0x900000) || 69 + (is_mt7925(dev) && (addr == 0x900000 || addr == 0xe0002800)) || 70 70 (is_mt7996(dev) && addr == 0x900000) || 71 71 (is_mt7992(dev) && addr == 0x900000)) 72 72 cmd = MCU_CMD(PATCH_START_REQ); ··· 282 282 .is_tlv_append = 1, 283 283 }; 284 284 struct sk_buff *skb; 285 + 286 + if (is_mt799x(dev) && !wcid->sta) 287 + hdr.muar_idx = 0xe; 285 288 286 289 mt76_connac_mcu_get_wlan_idx(dev, wcid, &hdr.wlan_idx_lo, 287 290 &hdr.wlan_idx_hi); ··· 2104 2101 int j, msg_len, num_ch; 2105 2102 struct sk_buff *skb; 2106 2103 2107 - num_ch = i == batch_size - 1 ? n_chan % batch_len : batch_len; 2104 + num_ch = i == batch_size - 1 ? n_chan - i * batch_len : batch_len; 2108 2105 msg_len = sizeof(tx_power_tlv) + num_ch * sizeof(sku_tlbv); 2109 2106 skb = mt76_mcu_msg_alloc(dev, NULL, msg_len); 2110 2107 if (!skb) {
+4
drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h
··· 808 808 STA_REC_MLD = 0x20, 809 809 STA_REC_EHT = 0x22, 810 810 STA_REC_PN_INFO = 0x26, 811 + STA_REC_KEY_V3 = 0x27, 811 812 STA_REC_HDRT = 0x28, 812 813 STA_REC_HDR_TRANS = 0x2B, 813 814 STA_REC_MAX_NUM ··· 935 934 PHY_TYPE_BE_INDEX, 936 935 PHY_TYPE_INDEX_NUM 937 936 }; 937 + 938 + #define HR_DSSS_ERP_BASIC_RATE GENMASK(3, 0) 939 + #define OFDM_BASIC_RATE (BIT(6) | BIT(8) | BIT(10)) 938 940 939 941 #define PHY_TYPE_BIT_HR_DSSS BIT(PHY_TYPE_HR_DSSS_INDEX) 940 942 #define PHY_TYPE_BIT_ERP BIT(PHY_TYPE_ERP_INDEX)
+1 -1
drivers/net/wireless/mediatek/mt76/mt76x02_usb_core.c
··· 67 67 struct mt76_tx_info *tx_info) 68 68 { 69 69 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76); 70 - int pid, len = tx_info->skb->len, ep = q2ep(dev->mphy.q_tx[qid]->hw_idx); 70 + int pid, len = tx_info->skb->len, ep = dev->mphy.q_tx[qid]->ep; 71 71 struct mt76x02_txwi *txwi; 72 72 bool ampdu = IEEE80211_SKB_CB(tx_info->skb)->flags & IEEE80211_TX_CTL_AMPDU; 73 73 enum mt76_qsel qsel;
+1
drivers/net/wireless/mediatek/mt76/mt76x2/usb.c
··· 18 18 { USB_DEVICE(0x7392, 0xb711) }, /* Edimax EW 7722 UAC */ 19 19 { USB_DEVICE(0x0e8d, 0x7632) }, /* HC-M7662BU1 */ 20 20 { USB_DEVICE(0x2c4e, 0x0103) }, /* Mercury UD13 */ 21 + { USB_DEVICE(0x0846, 0x9014) }, /* Netgear WNDA3100v3 */ 21 22 { USB_DEVICE(0x0846, 0x9053) }, /* Netgear A6210 */ 22 23 { USB_DEVICE(0x045e, 0x02e6) }, /* XBox One Wireless Adapter */ 23 24 { USB_DEVICE(0x045e, 0x02fe) }, /* XBox One Wireless Adapter */
+1 -1
drivers/net/wireless/mediatek/mt76/mt7915/dma.c
··· 614 614 mtk_wed_device_dma_reset(wed); 615 615 616 616 mt7915_dma_disable(dev, force); 617 - mt76_dma_wed_reset(&dev->mt76); 617 + mt76_wed_dma_reset(&dev->mt76); 618 618 619 619 /* reset hw queues */ 620 620 for (i = 0; i < __MT_TXQ_MAX; i++) {
+3 -6
drivers/net/wireless/mediatek/mt76/mt7915/mac.c
··· 1520 1520 if (!(READ_ONCE(dev->recovery.state) & MT_MCU_CMD_STOP_DMA)) 1521 1521 return; 1522 1522 1523 - if (mtk_wed_device_active(&dev->mt76.mmio.wed)) { 1524 - mtk_wed_device_stop(&dev->mt76.mmio.wed); 1525 - if (!is_mt798x(&dev->mt76)) 1526 - mt76_wr(dev, MT_INT_WED_MASK_CSR, 0); 1527 - } 1528 - 1529 1523 ieee80211_stop_queues(mt76_hw(dev)); 1530 1524 if (ext_phy) 1531 1525 ieee80211_stop_queues(ext_phy->hw); ··· 1538 1544 napi_disable(&dev->mt76.tx_napi); 1539 1545 1540 1546 mutex_lock(&dev->mt76.mutex); 1547 + 1548 + if (mtk_wed_device_active(&dev->mt76.mmio.wed)) 1549 + mtk_wed_device_stop(&dev->mt76.mmio.wed); 1541 1550 1542 1551 mt76_wr(dev, MT_MCU_INT_EVENT, MT_MCU_INT_EVENT_DMA_STOPPED); 1543 1552
+1 -1
drivers/net/wireless/mediatek/mt76/mt7915/main.c
··· 1708 1708 .set_radar_background = mt7915_set_radar_background, 1709 1709 #ifdef CONFIG_NET_MEDIATEK_SOC_WED 1710 1710 .net_fill_forward_path = mt7915_net_fill_forward_path, 1711 - .net_setup_tc = mt76_net_setup_tc, 1711 + .net_setup_tc = mt76_wed_net_setup_tc, 1712 1712 #endif 1713 1713 };
+45 -10
drivers/net/wireless/mediatek/mt76/mt7915/mmio.c
··· 490 490 return dev->reg.map[i].maps + ofs; 491 491 } 492 492 493 + return 0; 494 + } 495 + 496 + static u32 __mt7915_reg_remap_addr(struct mt7915_dev *dev, u32 addr) 497 + { 493 498 if ((addr >= MT_INFRA_BASE && addr < MT_WFSYS0_PHY_START) || 494 499 (addr >= MT_WFSYS0_PHY_START && addr < MT_WFSYS1_PHY_START) || 495 500 (addr >= MT_WFSYS1_PHY_START && addr <= MT_WFSYS1_PHY_END)) ··· 519 514 { 520 515 u32 addr = __mt7915_reg_addr(dev, offset); 521 516 522 - memcpy_fromio(buf, dev->mt76.mmio.regs + addr, len); 517 + if (addr) { 518 + memcpy_fromio(buf, dev->mt76.mmio.regs + addr, len); 519 + return; 520 + } 521 + 522 + spin_lock_bh(&dev->reg_lock); 523 + memcpy_fromio(buf, dev->mt76.mmio.regs + 524 + __mt7915_reg_remap_addr(dev, offset), len); 525 + spin_unlock_bh(&dev->reg_lock); 523 526 } 524 527 525 528 static u32 mt7915_rr(struct mt76_dev *mdev, u32 offset) 526 529 { 527 530 struct mt7915_dev *dev = container_of(mdev, struct mt7915_dev, mt76); 528 - u32 addr = __mt7915_reg_addr(dev, offset); 531 + u32 addr = __mt7915_reg_addr(dev, offset), val; 529 532 530 - return dev->bus_ops->rr(mdev, addr); 533 + if (addr) 534 + return dev->bus_ops->rr(mdev, addr); 535 + 536 + spin_lock_bh(&dev->reg_lock); 537 + val = dev->bus_ops->rr(mdev, __mt7915_reg_remap_addr(dev, offset)); 538 + spin_unlock_bh(&dev->reg_lock); 539 + 540 + return val; 531 541 } 532 542 533 543 static void mt7915_wr(struct mt76_dev *mdev, u32 offset, u32 val) ··· 550 530 struct mt7915_dev *dev = container_of(mdev, struct mt7915_dev, mt76); 551 531 u32 addr = __mt7915_reg_addr(dev, offset); 552 532 553 - dev->bus_ops->wr(mdev, addr, val); 533 + if (addr) { 534 + dev->bus_ops->wr(mdev, addr, val); 535 + return; 536 + } 537 + 538 + spin_lock_bh(&dev->reg_lock); 539 + dev->bus_ops->wr(mdev, __mt7915_reg_remap_addr(dev, offset), val); 540 + spin_unlock_bh(&dev->reg_lock); 554 541 } 555 542 556 543 static u32 mt7915_rmw(struct mt76_dev *mdev, u32 offset, u32 mask, u32 val) ··· 565 538 struct mt7915_dev *dev = container_of(mdev, struct mt7915_dev, mt76); 566 539 u32 addr = __mt7915_reg_addr(dev, offset); 567 540 568 - return dev->bus_ops->rmw(mdev, addr, mask, val); 541 + if (addr) 542 + return dev->bus_ops->rmw(mdev, addr, mask, val); 543 + 544 + spin_lock_bh(&dev->reg_lock); 545 + val = dev->bus_ops->rmw(mdev, __mt7915_reg_remap_addr(dev, offset), mask, val); 546 + spin_unlock_bh(&dev->reg_lock); 547 + 548 + return val; 569 549 } 570 550 571 551 #ifdef CONFIG_NET_MEDIATEK_SOC_WED ··· 706 672 } 707 673 708 674 wed->wlan.init_buf = mt7915_wed_init_buf; 709 - wed->wlan.offload_enable = mt76_mmio_wed_offload_enable; 710 - wed->wlan.offload_disable = mt76_mmio_wed_offload_disable; 711 - wed->wlan.init_rx_buf = mt76_mmio_wed_init_rx_buf; 712 - wed->wlan.release_rx_buf = mt76_mmio_wed_release_rx_buf; 675 + wed->wlan.offload_enable = mt76_wed_offload_enable; 676 + wed->wlan.offload_disable = mt76_wed_offload_disable; 677 + wed->wlan.init_rx_buf = mt76_wed_init_rx_buf; 678 + wed->wlan.release_rx_buf = mt76_wed_release_rx_buf; 713 679 wed->wlan.update_wo_rx_stats = mt7915_mmio_wed_update_rx_stats; 714 680 wed->wlan.reset = mt7915_mmio_wed_reset; 715 - wed->wlan.reset_complete = mt76_mmio_wed_reset_complete; 681 + wed->wlan.reset_complete = mt76_wed_reset_complete; 716 682 717 683 dev->mt76.rx_token_size = wed->wlan.rx_npkt; 718 684 ··· 741 707 742 708 dev = container_of(mdev, struct mt7915_dev, mt76); 743 709 mt76_mmio_init(&dev->mt76, mem_base); 710 + spin_lock_init(&dev->reg_lock); 744 711 745 712 switch (device_id) { 746 713 case 0x7915:
+1
drivers/net/wireless/mediatek/mt76/mt7915/mt7915.h
··· 287 287 288 288 struct list_head sta_rc_list; 289 289 struct list_head twt_list; 290 + spinlock_t reg_lock; 290 291 291 292 u32 hw_pattern; 292 293
+2 -1
drivers/net/wireless/mediatek/mt76/mt7915/soc.c
··· 516 516 if (ret) 517 517 return ret; 518 518 519 - if (version == 0x8a00 || version == 0x8a10 || version == 0x8b00) { 519 + if (version == 0x8a00 || version == 0x8a10 || 520 + version == 0x8b00 || version == 0x8c10) { 520 521 rg_xo_01 = 0x1d59080f; 521 522 rg_xo_03 = 0x34c00fe0; 522 523 } else {
+6
drivers/net/wireless/mediatek/mt76/mt7921/init.c
··· 138 138 if (pm->suspended) 139 139 return; 140 140 141 + dev->regd_in_progress = true; 142 + 141 143 mt792x_mutex_acquire(dev); 142 144 mt7921_regd_update(dev); 143 145 mt792x_mutex_release(dev); 146 + 147 + dev->regd_in_progress = false; 148 + wake_up(&dev->wait); 144 149 } 145 150 146 151 int mt7921_mac_init(struct mt792x_dev *dev) ··· 266 261 spin_lock_init(&dev->pm.wake.lock); 267 262 mutex_init(&dev->pm.mutex); 268 263 init_waitqueue_head(&dev->pm.wait); 264 + init_waitqueue_head(&dev->wait); 269 265 if (mt76_is_sdio(&dev->mt76)) 270 266 init_waitqueue_head(&dev->mt76.sdio.wait); 271 267 spin_lock_init(&dev->pm.txq_lock);
+13
drivers/net/wireless/mediatek/mt76/mt7921/main.c
··· 325 325 mt7921_mcu_abort_roc(phy, mvif, phy->roc_token_id); 326 326 } 327 327 328 + void mt7921_roc_abort_sync(struct mt792x_dev *dev) 329 + { 330 + struct mt792x_phy *phy = &dev->phy; 331 + 332 + del_timer_sync(&phy->roc_timer); 333 + cancel_work_sync(&phy->roc_work); 334 + if (test_and_clear_bit(MT76_STATE_ROC, &phy->mt76->state)) 335 + ieee80211_iterate_active_interfaces(mt76_hw(dev), 336 + IEEE80211_IFACE_ITER_RESUME_ALL, 337 + mt7921_roc_iter, (void *)phy); 338 + } 339 + EXPORT_SYMBOL_GPL(mt7921_roc_abort_sync); 340 + 328 341 void mt7921_roc_work(struct work_struct *work) 329 342 { 330 343 struct mt792x_phy *phy;
+2 -2
drivers/net/wireless/mediatek/mt76/mt7921/mcu.c
··· 1272 1272 .mtcl_conf = mt792x_acpi_get_mtcl_conf(&dev->phy, alpha2), 1273 1273 }; 1274 1274 int ret, valid_cnt = 0; 1275 - u16 buf_len = 0; 1275 + u32 buf_len = 0; 1276 1276 u8 *pos; 1277 1277 1278 1278 if (!clc) ··· 1283 1283 if (mt76_find_power_limits_node(&dev->mt76)) 1284 1284 req.cap |= CLC_CAP_DTS_EN; 1285 1285 1286 - buf_len = le16_to_cpu(clc->len) - sizeof(*clc); 1286 + buf_len = le32_to_cpu(clc->len) - sizeof(*clc); 1287 1287 pos = clc->data; 1288 1288 while (buf_len > 16) { 1289 1289 struct mt7921_clc_rule *rule = (struct mt7921_clc_rule *)pos;
+1
drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h
··· 322 322 enum mt7921_roc_req type, u8 token_id); 323 323 int mt7921_mcu_abort_roc(struct mt792x_phy *phy, struct mt792x_vif *vif, 324 324 u8 token_id); 325 + void mt7921_roc_abort_sync(struct mt792x_dev *dev); 325 326 #endif
+13
drivers/net/wireless/mediatek/mt76/mt7921/pci.c
··· 6 6 #include <linux/kernel.h> 7 7 #include <linux/module.h> 8 8 #include <linux/pci.h> 9 + #include <linux/of.h> 9 10 10 11 #include "mt7921.h" 11 12 #include "../mt76_connac2_mac.h" ··· 370 369 if (ret) 371 370 goto err_free_irq; 372 371 372 + if (of_property_read_bool(dev->mt76.dev->of_node, "wakeup-source")) 373 + device_init_wakeup(dev->mt76.dev, true); 374 + 373 375 return 0; 374 376 375 377 err_free_irq: ··· 390 386 struct mt76_dev *mdev = pci_get_drvdata(pdev); 391 387 struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); 392 388 389 + if (of_property_read_bool(dev->mt76.dev->of_node, "wakeup-source")) 390 + device_init_wakeup(dev->mt76.dev, false); 391 + 393 392 mt7921e_unregister_device(dev); 393 + set_bit(MT76_REMOVED, &mdev->phy.state); 394 394 devm_free_irq(&pdev->dev, pdev->irq, dev); 395 395 mt76_free_device(&dev->mt76); 396 396 pci_free_irq_vectors(pdev); ··· 413 405 cancel_delayed_work_sync(&pm->ps_work); 414 406 cancel_work_sync(&pm->wake_work); 415 407 408 + mt7921_roc_abort_sync(dev); 409 + 416 410 err = mt792x_mcu_drv_pmctrl(dev); 417 411 if (err < 0) 418 412 goto restore_suspend; 413 + 414 + wait_event_timeout(dev->wait, 415 + !dev->regd_in_progress, 5 * HZ); 419 416 420 417 err = mt76_connac_mcu_set_hif_suspend(mdev, true); 421 418 if (err)
+2
drivers/net/wireless/mediatek/mt76/mt7921/sdio.c
··· 216 216 cancel_delayed_work_sync(&pm->ps_work); 217 217 cancel_work_sync(&pm->wake_work); 218 218 219 + mt7921_roc_abort_sync(dev); 220 + 219 221 err = mt792x_mcu_drv_pmctrl(dev); 220 222 if (err < 0) 221 223 goto restore_suspend;
+56
drivers/net/wireless/mediatek/mt76/mt7925/init.c
··· 2 2 /* Copyright (C) 2023 MediaTek Inc. */ 3 3 4 4 #include <linux/etherdevice.h> 5 + #include <linux/hwmon.h> 6 + #include <linux/hwmon-sysfs.h> 7 + #include <linux/thermal.h> 5 8 #include <linux/firmware.h> 6 9 #include "mt7925.h" 7 10 #include "mac.h" 8 11 #include "mcu.h" 9 12 13 + static ssize_t mt7925_thermal_temp_show(struct device *dev, 14 + struct device_attribute *attr, 15 + char *buf) 16 + { 17 + switch (to_sensor_dev_attr(attr)->index) { 18 + case 0: { 19 + struct mt792x_phy *phy = dev_get_drvdata(dev); 20 + struct mt792x_dev *mdev = phy->dev; 21 + int temperature; 22 + 23 + mt792x_mutex_acquire(mdev); 24 + temperature = mt7925_mcu_get_temperature(phy); 25 + mt792x_mutex_release(mdev); 26 + 27 + if (temperature < 0) 28 + return temperature; 29 + /* display in millidegree Celsius */ 30 + return sprintf(buf, "%u\n", temperature * 1000); 31 + } 32 + default: 33 + return -EINVAL; 34 + } 35 + } 36 + static SENSOR_DEVICE_ATTR_RO(temp1_input, mt7925_thermal_temp, 0); 37 + 38 + static struct attribute *mt7925_hwmon_attrs[] = { 39 + &sensor_dev_attr_temp1_input.dev_attr.attr, 40 + NULL, 41 + }; 42 + ATTRIBUTE_GROUPS(mt7925_hwmon); 43 + 44 + static int mt7925_thermal_init(struct mt792x_phy *phy) 45 + { 46 + struct wiphy *wiphy = phy->mt76->hw->wiphy; 47 + struct device *hwmon; 48 + const char *name; 49 + 50 + if (!IS_REACHABLE(CONFIG_HWMON)) 51 + return 0; 52 + 53 + name = devm_kasprintf(&wiphy->dev, GFP_KERNEL, "mt7925_%s", 54 + wiphy_name(wiphy)); 55 + 56 + hwmon = devm_hwmon_device_register_with_groups(&wiphy->dev, name, phy, 57 + mt7925_hwmon_groups); 58 + return PTR_ERR_OR_ZERO(hwmon); 59 + } 10 60 static void 11 61 mt7925_regd_notifier(struct wiphy *wiphy, 12 62 struct regulatory_request *req) ··· 189 139 ret = mt7925_init_debugfs(dev); 190 140 if (ret) { 191 141 dev_err(dev->mt76.dev, "register debugfs failed\n"); 142 + return; 143 + } 144 + 145 + ret = mt7925_thermal_init(&dev->phy); 146 + if (ret) { 147 + dev_err(dev->mt76.dev, "thermal init failed\n"); 192 148 return; 193 149 } 194 150
+23 -3
drivers/net/wireless/mediatek/mt76/mt7925/main.c
··· 359 359 mvif->sta.wcid.phy_idx = mvif->mt76.band_idx; 360 360 mvif->sta.wcid.hw_key_idx = -1; 361 361 mvif->sta.wcid.tx_info |= MT_WCID_TX_INFO_SET; 362 + mvif->sta.vif = mvif; 362 363 mt76_wcid_init(&mvif->sta.wcid); 363 364 364 365 mt7925_mac_wtbl_update(dev, idx, ··· 527 526 if (cmd == SET_KEY && !mvif->mt76.cipher) { 528 527 struct mt792x_phy *phy = mt792x_hw_phy(hw); 529 528 530 - mvif->mt76.cipher = mt76_connac_mcu_get_cipher(key->cipher); 529 + mvif->mt76.cipher = mt7925_mcu_get_cipher(key->cipher); 531 530 mt7925_mcu_add_bss_info(phy, mvif->mt76.ctx, vif, sta, true); 532 531 } 533 532 ··· 711 710 712 711 if (slottime != phy->slottime) { 713 712 phy->slottime = slottime; 714 - mt792x_mac_set_timeing(phy); 713 + mt7925_mcu_set_timing(phy, vif); 715 714 } 716 715 } 717 716 ··· 1275 1274 } 1276 1275 1277 1276 static int 1277 + mt7925_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 1278 + unsigned int link_id, u16 queue, 1279 + const struct ieee80211_tx_queue_params *params) 1280 + { 1281 + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; 1282 + static const u8 mq_to_aci[] = { 1283 + [IEEE80211_AC_VO] = 3, 1284 + [IEEE80211_AC_VI] = 2, 1285 + [IEEE80211_AC_BE] = 0, 1286 + [IEEE80211_AC_BK] = 1, 1287 + }; 1288 + 1289 + /* firmware uses access class index */ 1290 + mvif->queue_params[mq_to_aci[queue]] = *params; 1291 + 1292 + return 0; 1293 + } 1294 + 1295 + static int 1278 1296 mt7925_start_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 1279 1297 struct ieee80211_bss_conf *link_conf) 1280 1298 { ··· 1416 1396 .add_interface = mt7925_add_interface, 1417 1397 .remove_interface = mt792x_remove_interface, 1418 1398 .config = mt7925_config, 1419 - .conf_tx = mt792x_conf_tx, 1399 + .conf_tx = mt7925_conf_tx, 1420 1400 .configure_filter = mt7925_configure_filter, 1421 1401 .bss_info_changed = mt7925_bss_info_changed, 1422 1402 .start_ap = mt7925_start_ap,
+140 -72
drivers/net/wireless/mediatek/mt76/mt7925/mcu.c
··· 656 656 return ret; 657 657 } 658 658 659 + int mt7925_mcu_get_temperature(struct mt792x_phy *phy) 660 + { 661 + struct { 662 + u8 _rsv[4]; 663 + 664 + __le16 tag; 665 + __le16 len; 666 + u8 _rsv2[4]; 667 + } __packed req = { 668 + .tag = cpu_to_le16(0x0), 669 + .len = cpu_to_le16(sizeof(req) - 4), 670 + }; 671 + struct mt7925_thermal_evt { 672 + u8 rsv[4]; 673 + __le32 temperature; 674 + } __packed * evt; 675 + struct mt792x_dev *dev = phy->dev; 676 + int temperature, ret; 677 + struct sk_buff *skb; 678 + 679 + ret = mt76_mcu_send_and_get_msg(&dev->mt76, 680 + MCU_WM_UNI_CMD_QUERY(THERMAL), 681 + &req, sizeof(req), true, &skb); 682 + if (ret) 683 + return ret; 684 + 685 + skb_pull(skb, 4 + sizeof(struct tlv)); 686 + evt = (struct mt7925_thermal_evt *)skb->data; 687 + 688 + temperature = le32_to_cpu(evt->temperature); 689 + 690 + dev_kfree_skb(skb); 691 + 692 + return temperature; 693 + } 694 + 659 695 static void 660 696 mt7925_mcu_parse_phy_cap(struct mt792x_dev *dev, char *data) 661 697 { ··· 850 814 struct ieee80211_vif *vif, 851 815 struct ieee80211_sta *sta) 852 816 { 817 + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; 853 818 struct sta_rec_hdr_trans *hdr_trans; 854 819 struct mt76_wcid *wcid; 855 820 struct tlv *tlv; ··· 864 827 else 865 828 hdr_trans->from_ds = true; 866 829 867 - wcid = (struct mt76_wcid *)sta->drv_priv; 830 + if (sta) 831 + wcid = (struct mt76_wcid *)sta->drv_priv; 832 + else 833 + wcid = &mvif->sta.wcid; 834 + 868 835 if (!wcid) 869 836 return; 870 837 ··· 936 895 937 896 e = (struct edca *)tlv; 938 897 e->set = WMM_PARAM_SET; 939 - e->queue = ac + mvif->mt76.wmm_idx * MT76_CONNAC_MAX_WMM_SETS; 898 + e->queue = ac; 940 899 e->aifs = q->aifs; 941 900 e->txop = cpu_to_le16(q->txop); 942 901 ··· 962 921 struct ieee80211_key_conf *key, 963 922 enum set_key_cmd cmd) 964 923 { 924 + struct mt792x_sta *msta = container_of(wcid, struct mt792x_sta, wcid); 965 925 struct sta_rec_sec_uni *sec; 926 + struct mt792x_vif *mvif = msta->vif; 927 + struct ieee80211_sta *sta; 928 + struct ieee80211_vif *vif; 966 929 struct tlv *tlv; 967 930 968 - tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_KEY_V2, sizeof(*sec)); 931 + sta = msta == &mvif->sta ? 932 + NULL : 933 + container_of((void *)msta, struct ieee80211_sta, drv_priv); 934 + vif = container_of((void *)mvif, struct ieee80211_vif, drv_priv); 935 + 936 + tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_KEY_V3, sizeof(*sec)); 969 937 sec = (struct sta_rec_sec_uni *)tlv; 970 - sec->add = cmd; 938 + sec->bss_idx = mvif->mt76.idx; 939 + sec->is_authenticator = 0; 940 + sec->mgmt_prot = 0; 941 + sec->wlan_idx = (u8)wcid->idx; 942 + 943 + if (sta) { 944 + sec->tx_key = 1; 945 + sec->key_type = 1; 946 + memcpy(sec->peer_addr, sta->addr, ETH_ALEN); 947 + } else { 948 + memcpy(sec->peer_addr, vif->bss_conf.bssid, ETH_ALEN); 949 + } 971 950 972 951 if (cmd == SET_KEY) { 973 - struct sec_key_uni *sec_key; 974 952 u8 cipher; 975 953 976 - cipher = mt76_connac_mcu_get_cipher(key->cipher); 977 - if (cipher == MCU_CIPHER_NONE) 954 + sec->add = 1; 955 + cipher = mt7925_mcu_get_cipher(key->cipher); 956 + if (cipher == CONNAC3_CIPHER_NONE) 978 957 return -EOPNOTSUPP; 979 958 980 - sec_key = &sec->key[0]; 981 - sec_key->cipher_len = sizeof(*sec_key); 982 - 983 - if (cipher == MCU_CIPHER_BIP_CMAC_128) { 984 - sec_key->wlan_idx = cpu_to_le16(wcid->idx); 985 - sec_key->cipher_id = MCU_CIPHER_AES_CCMP; 986 - sec_key->key_id = sta_key_conf->keyidx; 987 - sec_key->key_len = 16; 988 - memcpy(sec_key->key, sta_key_conf->key, 16); 989 - 990 - sec_key = &sec->key[1]; 991 - sec_key->wlan_idx = cpu_to_le16(wcid->idx); 992 - sec_key->cipher_id = MCU_CIPHER_BIP_CMAC_128; 993 - sec_key->cipher_len = sizeof(*sec_key); 994 - sec_key->key_len = 16; 995 - memcpy(sec_key->key, key->key, 16); 996 - sec->n_cipher = 2; 959 + if (cipher == CONNAC3_CIPHER_BIP_CMAC_128) { 960 + sec->cipher_id = CONNAC3_CIPHER_BIP_CMAC_128; 961 + sec->key_id = sta_key_conf->keyidx; 962 + sec->key_len = 32; 963 + memcpy(sec->key, sta_key_conf->key, 16); 964 + memcpy(sec->key + 16, key->key, 16); 997 965 } else { 998 - sec_key->wlan_idx = cpu_to_le16(wcid->idx); 999 - sec_key->cipher_id = cipher; 1000 - sec_key->key_id = key->keyidx; 1001 - sec_key->key_len = key->keylen; 1002 - memcpy(sec_key->key, key->key, key->keylen); 966 + sec->cipher_id = cipher; 967 + sec->key_id = key->keyidx; 968 + sec->key_len = key->keylen; 969 + memcpy(sec->key, key->key, key->keylen); 1003 970 1004 - if (cipher == MCU_CIPHER_TKIP) { 971 + if (cipher == CONNAC3_CIPHER_TKIP) { 1005 972 /* Rx/Tx MIC keys are swapped */ 1006 - memcpy(sec_key->key + 16, key->key + 24, 8); 1007 - memcpy(sec_key->key + 24, key->key + 16, 8); 973 + memcpy(sec->key + 16, key->key + 24, 8); 974 + memcpy(sec->key + 24, key->key + 16, 8); 1008 975 } 1009 976 1010 977 /* store key_conf for BIP batch update */ 1011 - if (cipher == MCU_CIPHER_AES_CCMP) { 978 + if (cipher == CONNAC3_CIPHER_AES_CCMP) { 1012 979 memcpy(sta_key_conf->key, key->key, key->keylen); 1013 980 sta_key_conf->keyidx = key->keyidx; 1014 981 } 1015 - 1016 - sec->n_cipher = 1; 1017 982 } 1018 983 } else { 1019 - sec->n_cipher = 0; 984 + sec->add = 0; 1020 985 } 1021 986 1022 987 return 0; ··· 1507 1460 struct tlv *tlv; 1508 1461 u8 af = 0, mm = 0; 1509 1462 1510 - if (!sta->deflink.ht_cap.ht_supported && !sta->deflink.he_6ghz_capa.capa) 1511 - return; 1512 - 1513 1463 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_PHY, sizeof(*phy)); 1514 1464 phy = (struct sta_rec_phy *)tlv; 1515 1465 phy->phy_type = mt76_connac_get_phy_mode_v2(mvif->phy->mt76, vif, chandef->chan->band, sta); 1466 + phy->basic_rate = cpu_to_le16((u16)vif->bss_conf.basic_rates); 1516 1467 if (sta->deflink.ht_cap.ht_supported) { 1517 1468 af = sta->deflink.ht_cap.ampdu_factor; 1518 1469 mm = sta->deflink.ht_cap.ampdu_density; ··· 1618 1573 { 1619 1574 struct mt76_vif *mvif = (struct mt76_vif *)info->vif->drv_priv; 1620 1575 struct mt76_dev *dev = phy->dev; 1621 - struct wtbl_req_hdr *wtbl_hdr; 1622 - struct tlv *sta_wtbl; 1623 1576 struct sk_buff *skb; 1624 1577 1625 1578 skb = __mt76_connac_mcu_alloc_sta_req(dev, mvif, info->wcid, ··· 1641 1598 mt7925_mcu_sta_state_v2_tlv(phy, skb, info->sta, 1642 1599 info->vif, info->rcpi, 1643 1600 info->state); 1644 - mt7925_mcu_sta_hdr_trans_tlv(skb, info->vif, info->sta); 1645 1601 mt7925_mcu_sta_mld_tlv(skb, info->vif, info->sta); 1646 1602 } 1647 1603 1648 - sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL, 1649 - sizeof(struct tlv)); 1650 - 1651 - wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, info->wcid, 1652 - WTBL_RESET_AND_SET, 1653 - sta_wtbl, &skb); 1654 - if (IS_ERR(wtbl_hdr)) 1655 - return PTR_ERR(wtbl_hdr); 1656 - 1657 - if (info->enable) { 1658 - mt76_connac_mcu_wtbl_generic_tlv(dev, skb, info->vif, 1659 - info->sta, sta_wtbl, 1660 - wtbl_hdr); 1661 - mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, info->vif, info->wcid, 1662 - sta_wtbl, wtbl_hdr); 1663 - if (info->sta) 1664 - mt76_connac_mcu_wtbl_ht_tlv(dev, skb, info->sta, 1665 - sta_wtbl, wtbl_hdr, 1666 - true, true); 1667 - } 1604 + if (info->enable) 1605 + mt7925_mcu_sta_hdr_trans_tlv(skb, info->vif, info->sta); 1668 1606 1669 1607 return mt76_mcu_skb_send_msg(dev, skb, info->cmd, true); 1670 1608 } ··· 2073 2049 struct cfg80211_chan_def *chandef = ctx ? &ctx->def : &phy->chandef; 2074 2050 enum nl80211_band band = chandef->chan->band; 2075 2051 struct mt76_connac_bss_basic_tlv *basic_req; 2076 - u8 idx, basic_phy; 2077 2052 struct tlv *tlv; 2078 2053 int conn_type; 2054 + u8 idx; 2079 2055 2080 2056 tlv = mt76_connac_mcu_add_tlv(skb, UNI_BSS_INFO_BASIC, sizeof(*basic_req)); 2081 2057 basic_req = (struct mt76_connac_bss_basic_tlv *)tlv; ··· 2086 2062 2087 2063 basic_req->phymode_ext = mt7925_get_phy_mode_ext(phy, vif, band, sta); 2088 2064 2089 - basic_phy = mt76_connac_get_phy_mode_v2(phy, vif, band, sta); 2090 - basic_req->nonht_basic_phy = cpu_to_le16(basic_phy); 2065 + if (band == NL80211_BAND_2GHZ) 2066 + basic_req->nonht_basic_phy = cpu_to_le16(PHY_TYPE_ERP_INDEX); 2067 + else 2068 + basic_req->nonht_basic_phy = cpu_to_le16(PHY_TYPE_OFDM_INDEX); 2091 2069 2092 2070 memcpy(basic_req->bssid, vif->bss_conf.bssid, ETH_ALEN); 2093 2071 basic_req->phymode = mt76_connac_get_phy_mode(phy, vif, band, sta); ··· 2148 2122 sec = (struct bss_sec_tlv *)tlv; 2149 2123 2150 2124 switch (mvif->cipher) { 2151 - case MCU_CIPHER_GCMP_256: 2152 - case MCU_CIPHER_GCMP: 2125 + case CONNAC3_CIPHER_GCMP_256: 2126 + case CONNAC3_CIPHER_GCMP: 2153 2127 sec->mode = MODE_WPA3_SAE; 2154 2128 sec->status = 8; 2155 2129 break; 2156 - case MCU_CIPHER_AES_CCMP: 2130 + case CONNAC3_CIPHER_AES_CCMP: 2157 2131 sec->mode = MODE_WPA2_PSK; 2158 2132 sec->status = 6; 2159 2133 break; 2160 - case MCU_CIPHER_TKIP: 2134 + case CONNAC3_CIPHER_TKIP: 2161 2135 sec->mode = MODE_WPA2_PSK; 2162 2136 sec->status = 4; 2163 2137 break; 2164 - case MCU_CIPHER_WEP104: 2165 - case MCU_CIPHER_WEP40: 2138 + case CONNAC3_CIPHER_WEP104: 2139 + case CONNAC3_CIPHER_WEP40: 2166 2140 sec->mode = MODE_SHARED; 2167 2141 sec->status = 0; 2168 2142 break; ··· 2192 2166 tlv = mt76_connac_mcu_add_tlv(skb, UNI_BSS_INFO_RATE, sizeof(*bmc)); 2193 2167 2194 2168 bmc = (struct bss_rate_tlv *)tlv; 2169 + 2170 + if (band == NL80211_BAND_2GHZ) 2171 + bmc->basic_rate = cpu_to_le16(HR_DSSS_ERP_BASIC_RATE); 2172 + else 2173 + bmc->basic_rate = cpu_to_le16(OFDM_BASIC_RATE); 2195 2174 2196 2175 bmc->short_preamble = (band == NL80211_BAND_2GHZ); 2197 2176 bmc->bc_fixed_rate = idx; ··· 2280 2249 vif->bss_conf.he_bss_color.color : 0; 2281 2250 } 2282 2251 2252 + static void 2253 + mt7925_mcu_bss_ifs_tlv(struct sk_buff *skb, struct ieee80211_vif *vif) 2254 + { 2255 + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; 2256 + struct mt792x_phy *phy = mvif->phy; 2257 + struct bss_ifs_time_tlv *ifs_time; 2258 + struct tlv *tlv; 2259 + 2260 + tlv = mt76_connac_mcu_add_tlv(skb, UNI_BSS_INFO_IFS_TIME, sizeof(*ifs_time)); 2261 + ifs_time = (struct bss_ifs_time_tlv *)tlv; 2262 + ifs_time->slot_valid = true; 2263 + ifs_time->slot_time = cpu_to_le16(phy->slottime); 2264 + } 2265 + 2266 + int mt7925_mcu_set_timing(struct mt792x_phy *phy, 2267 + struct ieee80211_vif *vif) 2268 + { 2269 + struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; 2270 + struct mt792x_dev *dev = phy->dev; 2271 + struct sk_buff *skb; 2272 + 2273 + skb = __mt7925_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76, 2274 + MT7925_BSS_UPDATE_MAX_SIZE); 2275 + if (IS_ERR(skb)) 2276 + return PTR_ERR(skb); 2277 + 2278 + mt7925_mcu_bss_ifs_tlv(skb, vif); 2279 + 2280 + return mt76_mcu_skb_send_msg(&dev->mt76, skb, 2281 + MCU_UNI_CMD(BSS_INFO_UPDATE), true); 2282 + } 2283 + 2283 2284 int mt7925_mcu_add_bss_info(struct mt792x_phy *phy, 2284 2285 struct ieee80211_chanctx_conf *ctx, 2285 2286 struct ieee80211_vif *vif, ··· 2336 2273 mt7925_mcu_bss_bmc_tlv(skb, phy, ctx, vif, sta); 2337 2274 mt7925_mcu_bss_qos_tlv(skb, vif); 2338 2275 mt7925_mcu_bss_mld_tlv(skb, vif, sta); 2276 + mt7925_mcu_bss_ifs_tlv(skb, vif); 2339 2277 2340 2278 if (vif->bss_conf.he_support) { 2341 2279 mt7925_mcu_bss_he_tlv(skb, vif, phy); ··· 2909 2845 if (cmd & __MCU_CMD_FIELD_UNI) { 2910 2846 uni_txd = (struct mt76_connac2_mcu_uni_txd *)txd; 2911 2847 uni_txd->len = cpu_to_le16(skb->len - sizeof(uni_txd->txd)); 2912 - uni_txd->option = MCU_CMD_UNI_EXT_ACK; 2913 2848 uni_txd->cid = cpu_to_le16(mcu_cmd); 2914 2849 uni_txd->s2d_index = MCU_S2D_H2N; 2915 2850 uni_txd->pkt_type = MCU_PKT_ID; 2916 2851 uni_txd->seq = seq; 2852 + 2853 + if (cmd & __MCU_CMD_FIELD_QUERY) 2854 + uni_txd->option = MCU_CMD_UNI_QUERY_ACK; 2855 + else 2856 + uni_txd->option = MCU_CMD_UNI_EXT_ACK; 2917 2857 2918 2858 goto exit; 2919 2859 }
+76 -18
drivers/net/wireless/mediatek/mt76/mt7925/mcu.h
··· 159 159 UNI_EVENT_SCAN_DONE_NLO = 3, 160 160 }; 161 161 162 + enum connac3_mcu_cipher_type { 163 + CONNAC3_CIPHER_NONE = 0, 164 + CONNAC3_CIPHER_WEP40 = 1, 165 + CONNAC3_CIPHER_TKIP = 2, 166 + CONNAC3_CIPHER_AES_CCMP = 4, 167 + CONNAC3_CIPHER_WEP104 = 5, 168 + CONNAC3_CIPHER_BIP_CMAC_128 = 6, 169 + CONNAC3_CIPHER_WEP128 = 7, 170 + CONNAC3_CIPHER_WAPI = 8, 171 + CONNAC3_CIPHER_CCMP_256 = 10, 172 + CONNAC3_CIPHER_GCMP = 11, 173 + CONNAC3_CIPHER_GCMP_256 = 12, 174 + }; 175 + 162 176 struct mt7925_mcu_scan_chinfo_event { 163 177 u8 nr_chan; 164 178 u8 alpha2[3]; ··· 222 208 __le16 channel_dwell_time; /* channel Dwell interval */ 223 209 __le16 timeout_value; 224 210 __le16 probe_delay_time; 225 - u8 func_mask_ext; 211 + __le32 func_mask_ext; 226 212 }; 227 213 228 214 struct scan_ssid_tlv { ··· 348 334 struct bss_rate_tlv { 349 335 __le16 tag; 350 336 __le16 len; 351 - u8 __rsv1[4]; 337 + u8 __rsv1[2]; 338 + __le16 basic_rate; 352 339 __le16 bc_trans; 353 340 __le16 mc_trans; 354 341 u8 short_preamble; ··· 397 382 u8 _rsv2[3]; 398 383 } __packed; 399 384 400 - struct sec_key_uni { 401 - __le16 wlan_idx; 402 - u8 mgmt_prot; 403 - u8 cipher_id; 404 - u8 cipher_len; 405 - u8 key_id; 406 - u8 key_len; 407 - u8 need_resp; 408 - u8 key[32]; 409 - } __packed; 410 - 411 385 struct sta_rec_sec_uni { 412 386 __le16 tag; 413 387 __le16 len; 414 388 u8 add; 415 - u8 n_cipher; 416 - u8 rsv[2]; 417 - 418 - struct sec_key_uni key[2]; 389 + u8 tx_key; 390 + u8 key_type; 391 + u8 is_authenticator; 392 + u8 peer_addr[6]; 393 + u8 bss_idx; 394 + u8 cipher_id; 395 + u8 key_id; 396 + u8 key_len; 397 + u8 wlan_idx; 398 + u8 mgmt_prot; 399 + u8 key[32]; 400 + u8 key_rsc[16]; 419 401 } __packed; 420 402 421 403 struct sta_rec_hdr_trans { ··· 440 428 } __packed link[2]; 441 429 } __packed; 442 430 431 + struct bss_ifs_time_tlv { 432 + __le16 tag; 433 + __le16 len; 434 + u8 slot_valid; 435 + u8 sifs_valid; 436 + u8 rifs_valid; 437 + u8 eifs_valid; 438 + __le16 slot_time; 439 + __le16 sifs_time; 440 + __le16 rifs_time; 441 + __le16 eifs_time; 442 + u8 eifs_cck_valid; 443 + u8 rsv; 444 + __le16 eifs_cck_time; 445 + } __packed; 446 + 443 447 #define MT7925_STA_UPDATE_MAX_SIZE (sizeof(struct sta_req_hdr) + \ 444 448 sizeof(struct sta_rec_basic) + \ 445 449 sizeof(struct sta_rec_bf) + \ ··· 468 440 sizeof(struct sta_rec_bfee) + \ 469 441 sizeof(struct sta_rec_phy) + \ 470 442 sizeof(struct sta_rec_ra) + \ 471 - sizeof(struct sta_rec_sec) + \ 443 + sizeof(struct sta_rec_sec_uni) + \ 472 444 sizeof(struct sta_rec_ra_fixed) + \ 473 445 sizeof(struct sta_rec_he_6g_capa) + \ 474 446 sizeof(struct sta_rec_eht) + \ ··· 483 455 sizeof(struct bss_mld_tlv) + \ 484 456 sizeof(struct bss_info_uni_he) + \ 485 457 sizeof(struct bss_info_uni_bss_color) + \ 458 + sizeof(struct bss_ifs_time_tlv) + \ 486 459 sizeof(struct tlv)) 487 460 488 461 #define MT_CONNAC3_SKU_POWER_LIMIT 449 ··· 538 509 u8 rsv[4]; 539 510 } __packed; 540 511 512 + static inline enum connac3_mcu_cipher_type 513 + mt7925_mcu_get_cipher(int cipher) 514 + { 515 + switch (cipher) { 516 + case WLAN_CIPHER_SUITE_WEP40: 517 + return CONNAC3_CIPHER_WEP40; 518 + case WLAN_CIPHER_SUITE_WEP104: 519 + return CONNAC3_CIPHER_WEP104; 520 + case WLAN_CIPHER_SUITE_TKIP: 521 + return CONNAC3_CIPHER_TKIP; 522 + case WLAN_CIPHER_SUITE_AES_CMAC: 523 + return CONNAC3_CIPHER_BIP_CMAC_128; 524 + case WLAN_CIPHER_SUITE_CCMP: 525 + return CONNAC3_CIPHER_AES_CCMP; 526 + case WLAN_CIPHER_SUITE_CCMP_256: 527 + return CONNAC3_CIPHER_CCMP_256; 528 + case WLAN_CIPHER_SUITE_GCMP: 529 + return CONNAC3_CIPHER_GCMP; 530 + case WLAN_CIPHER_SUITE_GCMP_256: 531 + return CONNAC3_CIPHER_GCMP_256; 532 + case WLAN_CIPHER_SUITE_SMS4: 533 + return CONNAC3_CIPHER_WAPI; 534 + default: 535 + return CONNAC3_CIPHER_NONE; 536 + } 537 + } 538 + 541 539 int mt7925_mcu_set_dbdc(struct mt76_phy *phy); 542 540 int mt7925_mcu_hw_scan(struct mt76_phy *phy, struct ieee80211_vif *vif, 543 541 struct ieee80211_scan_request *scan_req); ··· 581 525 struct ieee80211_vif *vif, 582 526 struct ieee80211_sta *sta, 583 527 int enable); 528 + int mt7925_mcu_set_timing(struct mt792x_phy *phy, 529 + struct ieee80211_vif *vif); 584 530 int mt7925_mcu_set_deep_sleep(struct mt792x_dev *dev, bool enable); 585 531 int mt7925_mcu_set_channel_domain(struct mt76_phy *phy); 586 532 int mt7925_mcu_set_radio_en(struct mt792x_phy *phy, bool enable);
+1
drivers/net/wireless/mediatek/mt76/mt7925/mt7925.h
··· 271 271 bool enable); 272 272 int mt7925_mcu_config_sniffer(struct mt792x_vif *vif, 273 273 struct ieee80211_chanctx_conf *ctx); 274 + int mt7925_mcu_get_temperature(struct mt792x_phy *phy); 274 275 275 276 int mt7925_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, 276 277 enum mt76_txq_id qid, struct mt76_wcid *wcid,
+3
drivers/net/wireless/mediatek/mt76/mt7925/pci.c
··· 386 386 387 387 dev_info(mdev->dev, "ASIC revision: %04x\n", mdev->rev); 388 388 389 + mt76_rmw_field(dev, MT_HW_EMI_CTL, MT_HW_EMI_CTL_SLPPROT_EN, 1); 390 + 389 391 ret = mt792x_wfsys_reset(dev); 390 392 if (ret) 391 393 goto err_free_dev; ··· 427 425 struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); 428 426 429 427 mt7925e_unregister_device(dev); 428 + set_bit(MT76_REMOVED, &mdev->phy.state); 430 429 devm_free_irq(&pdev->dev, pdev->irq, dev); 431 430 mt76_free_device(&dev->mt76); 432 431 pci_free_irq_vectors(pdev);
+2
drivers/net/wireless/mediatek/mt76/mt792x.h
··· 186 186 bool hw_init_done:1; 187 187 bool fw_assert:1; 188 188 bool has_eht:1; 189 + bool regd_in_progress:1; 190 + wait_queue_head_t wait; 189 191 190 192 struct work_struct init_work; 191 193
+22 -16
drivers/net/wireless/mediatek/mt76/mt792x_acpi_sar.c
··· 66 66 } 67 67 68 68 /* MTCL : Country List Table for 6G band */ 69 - static void 69 + static int 70 70 mt792x_asar_acpi_read_mtcl(struct mt792x_dev *dev, u8 **table, u8 *version) 71 71 { 72 - if (mt792x_acpi_read(dev, MT792x_ACPI_MTCL, table, NULL) < 0) 73 - *version = 1; 74 - else 75 - *version = 2; 72 + int ret; 73 + 74 + *version = ((ret = mt792x_acpi_read(dev, MT792x_ACPI_MTCL, table, NULL)) < 0) 75 + ? 1 : 2; 76 + 77 + return ret; 76 78 } 77 79 78 80 /* MTDS : Dynamic SAR Power Table */ ··· 168 166 if (!asar) 169 167 return -ENOMEM; 170 168 171 - mt792x_asar_acpi_read_mtcl(dev, (u8 **)&asar->countrylist, &asar->ver); 169 + ret = mt792x_asar_acpi_read_mtcl(dev, (u8 **)&asar->countrylist, &asar->ver); 170 + if (ret) { 171 + devm_kfree(dev->mt76.dev, asar->countrylist); 172 + asar->countrylist = NULL; 173 + } 172 174 173 - /* MTDS is mandatory. Return error if table is invalid */ 174 175 ret = mt792x_asar_acpi_read_mtds(dev, (u8 **)&asar->dyn, asar->ver); 175 176 if (ret) { 176 177 devm_kfree(dev->mt76.dev, asar->dyn); 177 - devm_kfree(dev->mt76.dev, asar->countrylist); 178 - devm_kfree(dev->mt76.dev, asar); 179 - 180 - return ret; 178 + asar->dyn = NULL; 181 179 } 182 180 183 181 /* MTGS is optional */ ··· 292 290 const struct cfg80211_sar_capa *capa = phy->mt76->hw->wiphy->sar_capa; 293 291 int i; 294 292 295 - if (!phy->acpisar) 293 + if (!phy->acpisar || !((struct mt792x_acpi_sar *)phy->acpisar)->dyn) 296 294 return 0; 297 295 298 296 /* When ACPI SAR enabled in HW, we should apply rules for .frp ··· 355 353 mt792x_acpi_get_mtcl_map(int row, int column, struct mt792x_asar_cl *cl) 356 354 { 357 355 u8 config = 0; 356 + u8 mode_6g, mode_5g9; 358 357 359 - if (cl->cl6g[row] & BIT(column)) 360 - config |= (cl->mode_6g & 0x3) << 2; 358 + mode_6g = (cl->mode_6g > 0x02) ? 0 : cl->mode_6g; 359 + mode_5g9 = (cl->mode_5g9 > 0x01) ? 0 : cl->mode_5g9; 360 + 361 + if ((cl->cl6g[row] & BIT(column)) || cl->mode_6g == 0x02) 362 + config |= (mode_6g & 0x3) << 2; 361 363 if (cl->version > 1 && cl->cl5g9[row] & BIT(column)) 362 - config |= (cl->mode_5g9 & 0x3); 364 + config |= (mode_5g9 & 0x3); 363 365 364 366 return config; 365 367 } ··· 380 374 "AT", "BE", "BG", "CY", "CZ", "HR", "DK", "EE", 381 375 "FI", "FR", "DE", "GR", "HU", "IS", "IE", "IT", 382 376 "LV", "LI", "LT", "LU", "MT", "NL", "NO", "PL", 383 - "PT", "RO", "MT", "SK", "SI", "ES", "CH", 377 + "PT", "RO", "SK", "SI", "ES", "SE", "CH", 384 378 }; 385 379 struct mt792x_acpi_sar *sar = phy->acpisar; 386 380 struct mt792x_asar_cl *cl;
+1
drivers/net/wireless/mediatek/mt76/mt792x_core.c
··· 354 354 "v_tx_bw_40", 355 355 "v_tx_bw_80", 356 356 "v_tx_bw_160", 357 + "v_tx_bw_320", 357 358 "v_tx_mcs_0", 358 359 "v_tx_mcs_1", 359 360 "v_tx_mcs_2",
+12 -3
drivers/net/wireless/mediatek/mt76/mt792x_dma.c
··· 12 12 { 13 13 struct mt792x_dev *dev = dev_instance; 14 14 15 + if (test_bit(MT76_REMOVED, &dev->mt76.phy.state)) 16 + return IRQ_NONE; 15 17 mt76_wr(dev, dev->irq_map->host_irq_enable, 0); 16 18 17 19 if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state)) ··· 125 123 126 124 int mt792x_dma_enable(struct mt792x_dev *dev) 127 125 { 128 - if (is_mt7925(&dev->mt76)) 129 - mt76_rmw(dev, MT_UWFDMA0_GLO_CFG_EXT1, BIT(28), BIT(28)); 130 - 131 126 /* configure perfetch settings */ 132 127 mt792x_dma_prefetch(dev); 133 128 134 129 /* reset dma idx */ 135 130 mt76_wr(dev, MT_WFDMA0_RST_DTX_PTR, ~0); 131 + if (is_mt7925(&dev->mt76)) 132 + mt76_wr(dev, MT_WFDMA0_RST_DRX_PTR, ~0); 136 133 137 134 /* configure delay interrupt */ 138 135 mt76_wr(dev, MT_WFDMA0_PRI_DLY_INT_CFG0, 0); ··· 141 140 MT_WFDMA0_GLO_CFG_FIFO_LITTLE_ENDIAN | 142 141 MT_WFDMA0_GLO_CFG_CLK_GAT_DIS | 143 142 MT_WFDMA0_GLO_CFG_OMIT_TX_INFO | 143 + FIELD_PREP(MT_WFDMA0_GLO_CFG_DMA_SIZE, 3) | 144 + MT_WFDMA0_GLO_CFG_FIFO_DIS_CHECK | 145 + MT_WFDMA0_GLO_CFG_RX_WB_DDONE | 144 146 MT_WFDMA0_GLO_CFG_CSR_DISP_BASE_PTR_CHAIN_EN | 145 147 MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2); 146 148 147 149 mt76_set(dev, MT_WFDMA0_GLO_CFG, 148 150 MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN); 149 151 152 + if (is_mt7925(&dev->mt76)) { 153 + mt76_rmw(dev, MT_UWFDMA0_GLO_CFG_EXT1, BIT(28), BIT(28)); 154 + mt76_set(dev, MT_WFDMA0_INT_RX_PRI, 0x0F00); 155 + mt76_set(dev, MT_WFDMA0_INT_TX_PRI, 0x7F00); 156 + } 150 157 mt76_set(dev, MT_WFDMA_DUMMY_CR, MT_WFDMA_NEED_REINIT); 151 158 152 159 /* enable interrupts for TX/RX rings */
+8
drivers/net/wireless/mediatek/mt76/mt792x_regs.h
··· 292 292 #define MT_WFDMA0_GLO_CFG_TX_DMA_BUSY BIT(1) 293 293 #define MT_WFDMA0_GLO_CFG_RX_DMA_EN BIT(2) 294 294 #define MT_WFDMA0_GLO_CFG_RX_DMA_BUSY BIT(3) 295 + #define MT_WFDMA0_GLO_CFG_DMA_SIZE GENMASK(5, 4) 295 296 #define MT_WFDMA0_GLO_CFG_TX_WB_DDONE BIT(6) 296 297 #define MT_WFDMA0_GLO_CFG_FW_DWLD_BYPASS_DMASHDL BIT(9) 298 + #define MT_WFDMA0_GLO_CFG_FIFO_DIS_CHECK BIT(11) 297 299 #define MT_WFDMA0_GLO_CFG_FIFO_LITTLE_ENDIAN BIT(12) 300 + #define MT_WFDMA0_GLO_CFG_RX_WB_DDONE BIT(13) 298 301 #define MT_WFDMA0_GLO_CFG_CSR_DISP_BASE_PTR_CHAIN_EN BIT(15) 299 302 #define MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2 BIT(21) 300 303 #define MT_WFDMA0_GLO_CFG_OMIT_RX_INFO BIT(27) ··· 325 322 326 323 #define MT_WFDMA0_RST_DTX_PTR MT_WFDMA0(0x20c) 327 324 #define MT_WFDMA0_RST_DRX_PTR MT_WFDMA0(0x280) 325 + #define MT_WFDMA0_INT_RX_PRI MT_WFDMA0(0x298) 326 + #define MT_WFDMA0_INT_TX_PRI MT_WFDMA0(0x29c) 328 327 #define MT_WFDMA0_GLO_CFG_EXT0 MT_WFDMA0(0x2b0) 329 328 #define MT_WFDMA0_CSR_TX_DMASHDL_ENABLE BIT(6) 330 329 #define MT_WFDMA0_PRI_DLY_INT_CFG0 MT_WFDMA0(0x2f0) ··· 393 388 #define MT_HW_BOUND 0x70010020 394 389 #define MT_HW_CHIPID 0x70010200 395 390 #define MT_HW_REV 0x70010204 391 + 392 + #define MT_HW_EMI_CTL 0x18011100 393 + #define MT_HW_EMI_CTL_SLPPROT_EN BIT(1) 396 394 397 395 #define MT_PCIE_MAC_BASE 0x10000 398 396 #define MT_PCIE_MAC(ofs) (MT_PCIE_MAC_BASE + (ofs))
+35 -37
drivers/net/wireless/mediatek/mt76/mt792x_usb.c
··· 121 121 122 122 static void mt792xu_dma_prefetch(struct mt792x_dev *dev) 123 123 { 124 - mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(0), 125 - MT_WPDMA0_MAX_CNT_MASK, 4); 126 - mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(0), 127 - MT_WPDMA0_BASE_PTR_MASK, 0x80); 124 + #define DMA_PREFETCH_CONF(_idx_, _cnt_, _base_) \ 125 + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL((_idx_)), \ 126 + MT_WPDMA0_MAX_CNT_MASK | MT_WPDMA0_BASE_PTR_MASK, \ 127 + FIELD_PREP(MT_WPDMA0_MAX_CNT_MASK, (_cnt_)) | \ 128 + FIELD_PREP(MT_WPDMA0_BASE_PTR_MASK, (_base_))) 128 129 129 - mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(1), 130 - MT_WPDMA0_MAX_CNT_MASK, 4); 131 - mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(1), 132 - MT_WPDMA0_BASE_PTR_MASK, 0xc0); 133 - 134 - mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(2), 135 - MT_WPDMA0_MAX_CNT_MASK, 4); 136 - mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(2), 137 - MT_WPDMA0_BASE_PTR_MASK, 0x100); 138 - 139 - mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(3), 140 - MT_WPDMA0_MAX_CNT_MASK, 4); 141 - mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(3), 142 - MT_WPDMA0_BASE_PTR_MASK, 0x140); 143 - 144 - mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(4), 145 - MT_WPDMA0_MAX_CNT_MASK, 4); 146 - mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(4), 147 - MT_WPDMA0_BASE_PTR_MASK, 0x180); 148 - 149 - mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(16), 150 - MT_WPDMA0_MAX_CNT_MASK, 4); 151 - mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(16), 152 - MT_WPDMA0_BASE_PTR_MASK, 0x280); 153 - 154 - mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(17), 155 - MT_WPDMA0_MAX_CNT_MASK, 4); 156 - mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(17), 157 - MT_WPDMA0_BASE_PTR_MASK, 0x2c0); 130 + DMA_PREFETCH_CONF(0, 4, 0x080); 131 + DMA_PREFETCH_CONF(1, 4, 0x0c0); 132 + DMA_PREFETCH_CONF(2, 4, 0x100); 133 + DMA_PREFETCH_CONF(3, 4, 0x140); 134 + DMA_PREFETCH_CONF(4, 4, 0x180); 135 + DMA_PREFETCH_CONF(16, 4, 0x280); 136 + DMA_PREFETCH_CONF(17, 4, 0x2c0); 158 137 } 159 138 160 139 static void mt792xu_wfdma_init(struct mt792x_dev *dev) 161 140 { 141 + int i; 142 + 162 143 mt792xu_dma_prefetch(dev); 163 144 164 145 mt76_clear(dev, MT_UWFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_OMIT_RX_INFO); ··· 150 169 MT_WFDMA0_GLO_CFG_TX_DMA_EN | 151 170 MT_WFDMA0_GLO_CFG_RX_DMA_EN); 152 171 153 - /* disable dmashdl */ 154 - mt76_clear(dev, MT_UWFDMA0_GLO_CFG_EXT0, 155 - MT_WFDMA0_CSR_TX_DMASHDL_ENABLE); 156 - mt76_set(dev, MT_DMASHDL_SW_CONTROL, MT_DMASHDL_DMASHDL_BYPASS); 172 + mt76_rmw(dev, MT_DMASHDL_REFILL, MT_DMASHDL_REFILL_MASK, 0xffe00000); 173 + mt76_clear(dev, MT_DMASHDL_PAGE, MT_DMASHDL_GROUP_SEQ_ORDER); 174 + mt76_rmw(dev, MT_DMASHDL_PKT_MAX_SIZE, 175 + MT_DMASHDL_PKT_MAX_SIZE_PLE | MT_DMASHDL_PKT_MAX_SIZE_PSE, 176 + FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PLE, 1) | 177 + FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PSE, 0)); 178 + for (i = 0; i < 5; i++) 179 + mt76_wr(dev, MT_DMASHDL_GROUP_QUOTA(i), 180 + FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MIN, 0x3) | 181 + FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MAX, 0xfff)); 182 + for (i = 5; i < 16; i++) 183 + mt76_wr(dev, MT_DMASHDL_GROUP_QUOTA(i), 184 + FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MIN, 0x0) | 185 + FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MAX, 0x0)); 186 + mt76_wr(dev, MT_DMASHDL_Q_MAP(0), 0x32013201); 187 + mt76_wr(dev, MT_DMASHDL_Q_MAP(1), 0x32013201); 188 + mt76_wr(dev, MT_DMASHDL_Q_MAP(2), 0x55555444); 189 + mt76_wr(dev, MT_DMASHDL_Q_MAP(3), 0x55555444); 190 + 191 + mt76_wr(dev, MT_DMASHDL_SCHED_SET(0), 0x76540132); 192 + mt76_wr(dev, MT_DMASHDL_SCHED_SET(1), 0xFEDCBA98); 157 193 158 194 mt76_set(dev, MT_WFDMA_DUMMY_CR, MT_WFDMA_NEED_REINIT); 159 195 }
+3 -2
drivers/net/wireless/mediatek/mt76/mt7996/dma.c
··· 237 237 MT_WFDMA0_GLO_CFG_TX_DMA_EN | 238 238 MT_WFDMA0_GLO_CFG_RX_DMA_EN | 239 239 MT_WFDMA0_GLO_CFG_OMIT_TX_INFO | 240 - MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2); 240 + MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2 | 241 + MT_WFDMA0_GLO_CFG_EXT_EN); 241 242 242 243 if (dev->hif2) 243 244 mt76_set(dev, MT_WFDMA0_GLO_CFG + hif1_ofs, ··· 695 694 mtk_wed_device_dma_reset(&dev->mt76.mmio.wed); 696 695 697 696 mt7996_dma_disable(dev, force); 698 - mt76_dma_wed_reset(&dev->mt76); 697 + mt76_wed_dma_reset(&dev->mt76); 699 698 700 699 /* reset hw queues */ 701 700 for (i = 0; i < __MT_TXQ_MAX; i++) {
+4 -8
drivers/net/wireless/mediatek/mt76/mt7996/init.c
··· 493 493 494 494 void mt7996_mac_init(struct mt7996_dev *dev) 495 495 { 496 - #define HIF_TXD_V2_1 4 496 + #define HIF_TXD_V2_1 0x21 497 497 int i; 498 498 499 499 mt76_clear(dev, MT_MDP_DCR2, MT_MDP_DCR2_RX_TRANS_SHORT); ··· 506 506 i = dev->mphy.leds.pin ? MT_LED_GPIO_MUX3 : MT_LED_GPIO_MUX2; 507 507 mt76_rmw_field(dev, i, MT_LED_GPIO_SEL_MASK, 4); 508 508 } 509 - 510 - /* txs report queue */ 511 - mt76_rmw_field(dev, MT_DMA_TCRF1(0), MT_DMA_TCRF1_QIDX, 0); 512 - mt76_rmw_field(dev, MT_DMA_TCRF1(1), MT_DMA_TCRF1_QIDX, 6); 513 - mt76_rmw_field(dev, MT_DMA_TCRF1(2), MT_DMA_TCRF1_QIDX, 0); 514 509 515 510 /* rro module init */ 516 511 if (is_mt7996(&dev->mt76)) ··· 1007 1012 /* the maximum cap is 4 x 3, (Nr, Nc) = (3, 2) */ 1008 1013 elem->phy_cap_info[7] |= min_t(int, sts - 1, 2) << 3; 1009 1014 1010 - if (vif != NL80211_IFTYPE_AP) 1015 + if (!(vif == NL80211_IFTYPE_AP || vif == NL80211_IFTYPE_STATION)) 1011 1016 return; 1012 1017 1013 1018 elem->phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER; 1014 - elem->phy_cap_info[4] |= IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER; 1019 + if (vif == NL80211_IFTYPE_AP) 1020 + elem->phy_cap_info[4] |= IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER; 1015 1021 1016 1022 c = FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, 1017 1023 sts - 1) |
+61 -20
drivers/net/wireless/mediatek/mt76/mt7996/mac.c
··· 732 732 FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype); 733 733 734 734 txwi[2] |= cpu_to_le32(val); 735 + 736 + if (wcid->amsdu) 737 + txwi[3] |= cpu_to_le32(MT_TXD3_HW_AMSDU); 735 738 } 736 739 737 740 static void ··· 865 862 val |= MT_TXD3_PROTECT_FRAME; 866 863 if (info->flags & IEEE80211_TX_CTL_NO_ACK) 867 864 val |= MT_TXD3_NO_ACK; 868 - if (wcid->amsdu) 869 - val |= MT_TXD3_HW_AMSDU; 870 865 871 866 txwi[3] = cpu_to_le32(val); 872 867 txwi[4] = 0; ··· 1189 1188 struct ieee80211_tx_info *info; 1190 1189 struct sk_buff_head list; 1191 1190 struct rate_info rate = {}; 1192 - struct sk_buff *skb; 1191 + struct sk_buff *skb = NULL; 1193 1192 bool cck = false; 1194 1193 u32 txrate, txs, mode, stbc; 1195 1194 1196 1195 txs = le32_to_cpu(txs_data[0]); 1197 1196 1198 1197 mt76_tx_status_lock(mdev, &list); 1199 - skb = mt76_tx_status_skb_get(mdev, wcid, pid, &list); 1200 1198 1201 - if (skb) { 1202 - info = IEEE80211_SKB_CB(skb); 1203 - if (!(txs & MT_TXS0_ACK_ERROR_MASK)) 1204 - info->flags |= IEEE80211_TX_STAT_ACK; 1199 + /* only report MPDU TXS */ 1200 + if (le32_get_bits(txs_data[0], MT_TXS0_TXS_FORMAT) == 0) { 1201 + skb = mt76_tx_status_skb_get(mdev, wcid, pid, &list); 1202 + if (skb) { 1203 + info = IEEE80211_SKB_CB(skb); 1204 + if (!(txs & MT_TXS0_ACK_ERROR_MASK)) 1205 + info->flags |= IEEE80211_TX_STAT_ACK; 1205 1206 1206 - info->status.ampdu_len = 1; 1207 - info->status.ampdu_ack_len = 1208 - !!(info->flags & IEEE80211_TX_STAT_ACK); 1207 + info->status.ampdu_len = 1; 1208 + info->status.ampdu_ack_len = 1209 + !!(info->flags & IEEE80211_TX_STAT_ACK); 1209 1210 1210 - info->status.rates[0].idx = -1; 1211 + info->status.rates[0].idx = -1; 1212 + } 1211 1213 } 1212 1214 1213 1215 if (mtk_wed_device_active(&dev->mt76.mmio.wed) && wcid->sta) { ··· 2531 2527 return 0; 2532 2528 } 2533 2529 2530 + static bool 2531 + mt7996_mac_twt_param_equal(struct mt7996_sta *msta, 2532 + struct ieee80211_twt_params *twt_agrt) 2533 + { 2534 + u16 type = le16_to_cpu(twt_agrt->req_type); 2535 + u8 exp; 2536 + int i; 2537 + 2538 + exp = FIELD_GET(IEEE80211_TWT_REQTYPE_WAKE_INT_EXP, type); 2539 + for (i = 0; i < MT7996_MAX_STA_TWT_AGRT; i++) { 2540 + struct mt7996_twt_flow *f; 2541 + 2542 + if (!(msta->twt.flowid_mask & BIT(i))) 2543 + continue; 2544 + 2545 + f = &msta->twt.flow[i]; 2546 + if (f->duration == twt_agrt->min_twt_dur && 2547 + f->mantissa == twt_agrt->mantissa && 2548 + f->exp == exp && 2549 + f->protection == !!(type & IEEE80211_TWT_REQTYPE_PROTECTION) && 2550 + f->flowtype == !!(type & IEEE80211_TWT_REQTYPE_FLOWTYPE) && 2551 + f->trigger == !!(type & IEEE80211_TWT_REQTYPE_TRIGGER)) 2552 + return true; 2553 + } 2554 + 2555 + return false; 2556 + } 2557 + 2534 2558 void mt7996_mac_add_twt_setup(struct ieee80211_hw *hw, 2535 2559 struct ieee80211_sta *sta, 2536 2560 struct ieee80211_twt_setup *twt) ··· 2570 2538 enum ieee80211_twt_setup_cmd sta_setup_cmd; 2571 2539 struct mt7996_dev *dev = mt7996_hw_dev(hw); 2572 2540 struct mt7996_twt_flow *flow; 2573 - int flowid, table_id; 2574 - u8 exp; 2541 + u8 flowid, table_id, exp; 2575 2542 2576 2543 if (mt7996_mac_check_twt_req(twt)) 2577 2544 goto out; ··· 2583 2552 if (hweight8(msta->twt.flowid_mask) == ARRAY_SIZE(msta->twt.flow)) 2584 2553 goto unlock; 2585 2554 2555 + if (twt_agrt->min_twt_dur < MT7996_MIN_TWT_DUR) { 2556 + setup_cmd = TWT_SETUP_CMD_DICTATE; 2557 + twt_agrt->min_twt_dur = MT7996_MIN_TWT_DUR; 2558 + goto unlock; 2559 + } 2560 + 2561 + if (mt7996_mac_twt_param_equal(msta, twt_agrt)) 2562 + goto unlock; 2563 + 2586 2564 flowid = ffs(~msta->twt.flowid_mask) - 1; 2587 - le16p_replace_bits(&twt_agrt->req_type, flowid, 2588 - IEEE80211_TWT_REQTYPE_FLOWID); 2565 + twt_agrt->req_type &= ~cpu_to_le16(IEEE80211_TWT_REQTYPE_FLOWID); 2566 + twt_agrt->req_type |= le16_encode_bits(flowid, 2567 + IEEE80211_TWT_REQTYPE_FLOWID); 2589 2568 2590 2569 table_id = ffs(~dev->twt.table_mask) - 1; 2591 2570 exp = FIELD_GET(IEEE80211_TWT_REQTYPE_WAKE_INT_EXP, req_type); ··· 2642 2601 unlock: 2643 2602 mutex_unlock(&dev->mt76.mutex); 2644 2603 out: 2645 - le16p_replace_bits(&twt_agrt->req_type, setup_cmd, 2646 - IEEE80211_TWT_REQTYPE_SETUP_CMD); 2647 - twt->control = (twt->control & IEEE80211_TWT_CONTROL_WAKE_DUR_UNIT) | 2648 - (twt->control & IEEE80211_TWT_CONTROL_RX_DISABLED); 2604 + twt_agrt->req_type &= ~cpu_to_le16(IEEE80211_TWT_REQTYPE_SETUP_CMD); 2605 + twt_agrt->req_type |= 2606 + le16_encode_bits(setup_cmd, IEEE80211_TWT_REQTYPE_SETUP_CMD); 2607 + twt->control = twt->control & IEEE80211_TWT_CONTROL_RX_DISABLED; 2649 2608 } 2650 2609 2651 2610 void mt7996_mac_twt_teardown_flow(struct mt7996_dev *dev,
+5 -2
drivers/net/wireless/mediatek/mt76/mt7996/main.c
··· 350 350 case WLAN_CIPHER_SUITE_GCMP: 351 351 case WLAN_CIPHER_SUITE_GCMP_256: 352 352 case WLAN_CIPHER_SUITE_SMS4: 353 + break; 353 354 case WLAN_CIPHER_SUITE_BIP_GMAC_128: 354 355 case WLAN_CIPHER_SUITE_BIP_GMAC_256: 355 - break; 356 + if (key->keyidx == 6 || key->keyidx == 7) 357 + break; 358 + fallthrough; 356 359 case WLAN_CIPHER_SUITE_WEP40: 357 360 case WLAN_CIPHER_SUITE_WEP104: 358 361 default: ··· 1502 1499 .set_radar_background = mt7996_set_radar_background, 1503 1500 #ifdef CONFIG_NET_MEDIATEK_SOC_WED 1504 1501 .net_fill_forward_path = mt7996_net_fill_forward_path, 1505 - .net_setup_tc = mt76_net_setup_tc, 1502 + .net_setup_tc = mt76_wed_net_setup_tc, 1506 1503 #endif 1507 1504 };
+20 -12
drivers/net/wireless/mediatek/mt76/mt7996/mcu.c
··· 732 732 static struct tlv * 733 733 mt7996_mcu_add_uni_tlv(struct sk_buff *skb, u16 tag, u16 len) 734 734 { 735 - struct tlv *ptlv, tlv = { 736 - .tag = cpu_to_le16(tag), 737 - .len = cpu_to_le16(len), 738 - }; 735 + struct tlv *ptlv = skb_put(skb, len); 739 736 740 - ptlv = skb_put(skb, len); 741 - memcpy(ptlv, &tlv, sizeof(tlv)); 737 + ptlv->tag = cpu_to_le16(tag); 738 + ptlv->len = cpu_to_le16(len); 742 739 743 740 return ptlv; 744 741 } ··· 1237 1240 static void 1238 1241 mt7996_mcu_sta_eht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 1239 1242 { 1243 + struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 1244 + struct ieee80211_vif *vif = container_of((void *)msta->vif, 1245 + struct ieee80211_vif, drv_priv); 1240 1246 struct ieee80211_eht_mcs_nss_supp *mcs_map; 1241 1247 struct ieee80211_eht_cap_elem_fixed *elem; 1242 1248 struct sta_rec_eht *eht; ··· 1259 1259 eht->phy_cap = cpu_to_le64(*(u64 *)elem->phy_cap_info); 1260 1260 eht->phy_cap_ext = cpu_to_le64(elem->phy_cap_info[8]); 1261 1261 1262 - if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_20) 1263 - memcpy(eht->mcs_map_bw20, &mcs_map->only_20mhz, sizeof(eht->mcs_map_bw20)); 1262 + if (vif->type != NL80211_IFTYPE_STATION && 1263 + (sta->deflink.he_cap.he_cap_elem.phy_cap_info[0] & 1264 + (IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G | 1265 + IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G | 1266 + IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G | 1267 + IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G)) == 0) { 1268 + memcpy(eht->mcs_map_bw20, &mcs_map->only_20mhz, 1269 + sizeof(eht->mcs_map_bw20)); 1270 + return; 1271 + } 1272 + 1264 1273 memcpy(eht->mcs_map_bw80, &mcs_map->bw._80, sizeof(eht->mcs_map_bw80)); 1265 1274 memcpy(eht->mcs_map_bw160, &mcs_map->bw._160, sizeof(eht->mcs_map_bw160)); 1266 1275 memcpy(eht->mcs_map_bw320, &mcs_map->bw._320, sizeof(eht->mcs_map_bw320)); ··· 2519 2510 info = IEEE80211_SKB_CB(skb); 2520 2511 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->mt76->band_idx); 2521 2512 2522 - len = sizeof(*bcn) + MT_TXD_SIZE + skb->len; 2513 + len = ALIGN(sizeof(*bcn) + MT_TXD_SIZE + skb->len, 4); 2523 2514 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_BCN_CONTENT, len); 2524 2515 bcn = (struct bss_bcn_content_tlv *)tlv; 2525 2516 bcn->enable = en; ··· 2588 2579 info->band = band; 2589 2580 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->mt76->band_idx); 2590 2581 2591 - len = sizeof(*discov) + MT_TXD_SIZE + skb->len; 2592 - 2582 + len = ALIGN(sizeof(*discov) + MT_TXD_SIZE + skb->len, 4); 2593 2583 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_OFFLOAD, len); 2594 2584 2595 2585 discov = (struct bss_inband_discovery_tlv *)tlv; ··· 3547 3539 u32 addr = le32_to_cpu(*(__le32 *)(skb->data + 12)); 3548 3540 u8 *buf = (u8 *)dev->mt76.eeprom.data + addr; 3549 3541 3550 - skb_pull(skb, 64); 3542 + skb_pull(skb, 48); 3551 3543 memcpy(buf, skb->data, MT7996_EEPROM_BLOCK_SIZE); 3552 3544 } 3553 3545
+2 -2
drivers/net/wireless/mediatek/mt76/mt7996/mcu.h
··· 800 800 sizeof(struct sta_rec_hdr_trans) + \ 801 801 sizeof(struct tlv)) 802 802 803 - #define MT7996_MAX_BEACON_SIZE 1342 803 + #define MT7996_MAX_BEACON_SIZE 1338 804 804 #define MT7996_BEACON_UPDATE_SIZE (sizeof(struct bss_req_hdr) + \ 805 805 sizeof(struct bss_bcn_content_tlv) + \ 806 - MT_TXD_SIZE + \ 806 + 4 + MT_TXD_SIZE + \ 807 807 sizeof(struct bss_bcn_cntdwn_tlv) + \ 808 808 sizeof(struct bss_bcn_mbss_tlv)) 809 809 #define MT7996_MAX_BSS_OFFLOAD_SIZE (MT7996_MAX_BEACON_SIZE + \
+47 -27
drivers/net/wireless/mediatek/mt76/mt7996/mmio.c
··· 140 140 u32 offset = FIELD_GET(MT_HIF_REMAP_L1_OFFSET, addr); 141 141 u32 base = FIELD_GET(MT_HIF_REMAP_L1_BASE, addr); 142 142 143 - dev->reg_l1_backup = dev->bus_ops->rr(&dev->mt76, MT_HIF_REMAP_L1); 144 143 dev->bus_ops->rmw(&dev->mt76, MT_HIF_REMAP_L1, 145 144 MT_HIF_REMAP_L1_MASK, 146 145 FIELD_PREP(MT_HIF_REMAP_L1_MASK, base)); ··· 154 155 u32 offset = FIELD_GET(MT_HIF_REMAP_L2_OFFSET, addr); 155 156 u32 base = FIELD_GET(MT_HIF_REMAP_L2_BASE, addr); 156 157 157 - dev->reg_l2_backup = dev->bus_ops->rr(&dev->mt76, MT_HIF_REMAP_L2); 158 158 dev->bus_ops->rmw(&dev->mt76, MT_HIF_REMAP_L2, 159 159 MT_HIF_REMAP_L2_MASK, 160 160 FIELD_PREP(MT_HIF_REMAP_L2_MASK, base)); ··· 163 165 return MT_HIF_REMAP_BASE_L2 + offset; 164 166 } 165 167 166 - static void mt7996_reg_remap_restore(struct mt7996_dev *dev) 167 - { 168 - /* remap to ori status */ 169 - if (unlikely(dev->reg_l1_backup)) { 170 - dev->bus_ops->wr(&dev->mt76, MT_HIF_REMAP_L1, dev->reg_l1_backup); 171 - dev->reg_l1_backup = 0; 172 - } 173 - 174 - if (dev->reg_l2_backup) { 175 - dev->bus_ops->wr(&dev->mt76, MT_HIF_REMAP_L2, dev->reg_l2_backup); 176 - dev->reg_l2_backup = 0; 177 - } 178 - } 179 - 180 168 static u32 __mt7996_reg_addr(struct mt7996_dev *dev, u32 addr) 181 169 { 182 170 int i; 183 - 184 - mt7996_reg_remap_restore(dev); 185 171 186 172 if (addr < 0x100000) 187 173 return addr; ··· 183 201 return dev->reg.map[i].mapped + ofs; 184 202 } 185 203 204 + return 0; 205 + } 206 + 207 + static u32 __mt7996_reg_remap_addr(struct mt7996_dev *dev, u32 addr) 208 + { 186 209 if ((addr >= MT_INFRA_BASE && addr < MT_WFSYS0_PHY_START) || 187 210 (addr >= MT_WFSYS0_PHY_START && addr < MT_WFSYS1_PHY_START) || 188 211 (addr >= MT_WFSYS1_PHY_START && addr <= MT_WFSYS1_PHY_END)) ··· 212 225 { 213 226 u32 addr = __mt7996_reg_addr(dev, offset); 214 227 215 - memcpy_fromio(buf, dev->mt76.mmio.regs + addr, len); 228 + if (addr) { 229 + memcpy_fromio(buf, dev->mt76.mmio.regs + addr, len); 230 + return; 231 + } 232 + 233 + spin_lock_bh(&dev->reg_lock); 234 + memcpy_fromio(buf, dev->mt76.mmio.regs + 235 + __mt7996_reg_remap_addr(dev, offset), len); 236 + spin_unlock_bh(&dev->reg_lock); 216 237 } 217 238 218 239 static u32 mt7996_rr(struct mt76_dev *mdev, u32 offset) 219 240 { 220 241 struct mt7996_dev *dev = container_of(mdev, struct mt7996_dev, mt76); 242 + u32 addr = __mt7996_reg_addr(dev, offset), val; 221 243 222 - return dev->bus_ops->rr(mdev, __mt7996_reg_addr(dev, offset)); 244 + if (addr) 245 + return dev->bus_ops->rr(mdev, addr); 246 + 247 + spin_lock_bh(&dev->reg_lock); 248 + val = dev->bus_ops->rr(mdev, __mt7996_reg_remap_addr(dev, offset)); 249 + spin_unlock_bh(&dev->reg_lock); 250 + 251 + return val; 223 252 } 224 253 225 254 static void mt7996_wr(struct mt76_dev *mdev, u32 offset, u32 val) 226 255 { 227 256 struct mt7996_dev *dev = container_of(mdev, struct mt7996_dev, mt76); 257 + u32 addr = __mt7996_reg_addr(dev, offset); 228 258 229 - dev->bus_ops->wr(mdev, __mt7996_reg_addr(dev, offset), val); 259 + if (addr) { 260 + dev->bus_ops->wr(mdev, addr, val); 261 + return; 262 + } 263 + 264 + spin_lock_bh(&dev->reg_lock); 265 + dev->bus_ops->wr(mdev, __mt7996_reg_remap_addr(dev, offset), val); 266 + spin_unlock_bh(&dev->reg_lock); 230 267 } 231 268 232 269 static u32 mt7996_rmw(struct mt76_dev *mdev, u32 offset, u32 mask, u32 val) 233 270 { 234 271 struct mt7996_dev *dev = container_of(mdev, struct mt7996_dev, mt76); 272 + u32 addr = __mt7996_reg_addr(dev, offset); 235 273 236 - return dev->bus_ops->rmw(mdev, __mt7996_reg_addr(dev, offset), mask, val); 274 + if (addr) 275 + return dev->bus_ops->rmw(mdev, addr, mask, val); 276 + 277 + spin_lock_bh(&dev->reg_lock); 278 + val = dev->bus_ops->rmw(mdev, __mt7996_reg_remap_addr(dev, offset), mask, val); 279 + spin_unlock_bh(&dev->reg_lock); 280 + 281 + return val; 237 282 } 238 283 239 284 #ifdef CONFIG_NET_MEDIATEK_SOC_WED ··· 410 391 wed->wlan.amsdu_max_len = 1536; 411 392 412 393 wed->wlan.init_buf = mt7996_wed_init_buf; 413 - wed->wlan.init_rx_buf = mt76_mmio_wed_init_rx_buf; 414 - wed->wlan.release_rx_buf = mt76_mmio_wed_release_rx_buf; 415 - wed->wlan.offload_enable = mt76_mmio_wed_offload_enable; 416 - wed->wlan.offload_disable = mt76_mmio_wed_offload_disable; 394 + wed->wlan.init_rx_buf = mt76_wed_init_rx_buf; 395 + wed->wlan.release_rx_buf = mt76_wed_release_rx_buf; 396 + wed->wlan.offload_enable = mt76_wed_offload_enable; 397 + wed->wlan.offload_disable = mt76_wed_offload_disable; 417 398 if (!hif2) { 418 399 wed->wlan.reset = mt7996_mmio_wed_reset; 419 - wed->wlan.reset_complete = mt76_mmio_wed_reset_complete; 400 + wed->wlan.reset_complete = mt76_wed_reset_complete; 420 401 } 421 402 422 403 if (mtk_wed_device_attach(wed)) ··· 440 421 441 422 dev = container_of(mdev, struct mt7996_dev, mt76); 442 423 mt76_mmio_init(&dev->mt76, mem_base); 424 + spin_lock_init(&dev->reg_lock); 443 425 444 426 switch (device_id) { 445 427 case 0x7990:
+3 -3
drivers/net/wireless/mediatek/mt76/mt7996/mt7996.h
··· 53 53 54 54 #define MT7996_MAX_TWT_AGRT 16 55 55 #define MT7996_MAX_STA_TWT_AGRT 8 56 + #define MT7996_MIN_TWT_DUR 64 56 57 #define MT7996_MAX_QUEUE (__MT_RXQ_MAX + __MT_MCUQ_MAX + 3) 57 58 58 59 /* NOTE: used to map mt76_rates. idx may change if firmware expands table */ ··· 321 320 struct rchan *relay_fwlog; 322 321 323 322 struct { 324 - u8 table_mask; 323 + u16 table_mask; 325 324 u8 n_agrt; 326 325 } twt; 327 326 328 - u32 reg_l1_backup; 329 - u32 reg_l2_backup; 327 + spinlock_t reg_lock; 330 328 331 329 u8 wtbl_size_group; 332 330 };
+29 -23
drivers/net/wireless/mediatek/mt76/usb.c
··· 767 767 if (!test_bit(MT76_STATE_RUNNING, &dev->phy.state)) 768 768 return; 769 769 770 - for (i = 0; i < IEEE80211_NUM_ACS; i++) { 770 + for (i = 0; i <= MT_TXQ_PSD; i++) { 771 771 q = dev->phy.q_tx[i]; 772 772 if (!q) 773 773 continue; ··· 872 872 if (err < 0) 873 873 return err; 874 874 875 - mt76u_fill_bulk_urb(dev, USB_DIR_OUT, q2ep(q->hw_idx), 876 - q->entry[idx].urb, mt76u_complete_tx, 877 - &q->entry[idx]); 875 + mt76u_fill_bulk_urb(dev, USB_DIR_OUT, q->ep, q->entry[idx].urb, 876 + mt76u_complete_tx, &q->entry[idx]); 878 877 879 878 q->head = (q->head + 1) % q->ndesc; 880 879 q->entry[idx].skb = tx_info.skb; ··· 905 906 } 906 907 } 907 908 908 - static u8 mt76u_ac_to_hwq(struct mt76_dev *dev, u8 ac) 909 + static void 910 + mt76u_ac_to_hwq(struct mt76_dev *dev, struct mt76_queue *q, u8 qid) 909 911 { 910 - if (mt76_chip(dev) == 0x7663) { 912 + u8 ac = qid < IEEE80211_NUM_ACS ? qid : IEEE80211_AC_BE; 913 + 914 + switch (mt76_chip(dev)) { 915 + case 0x7663: { 911 916 static const u8 lmac_queue_map[] = { 912 917 /* ac to lmac mapping */ 913 918 [IEEE80211_AC_BK] = 0, ··· 920 917 [IEEE80211_AC_VO] = 4, 921 918 }; 922 919 923 - if (WARN_ON(ac >= ARRAY_SIZE(lmac_queue_map))) 924 - return 1; /* BE */ 925 - 926 - return lmac_queue_map[ac]; 920 + q->hw_idx = lmac_queue_map[ac]; 921 + q->ep = q->hw_idx + 1; 922 + break; 927 923 } 928 - 929 - return mt76_ac_to_hwq(ac); 924 + case 0x7961: 925 + case 0x7925: 926 + q->hw_idx = mt76_ac_to_hwq(ac); 927 + q->ep = qid == MT_TXQ_PSD ? MT_EP_OUT_HCCA : q->hw_idx + 1; 928 + break; 929 + default: 930 + q->hw_idx = mt76_ac_to_hwq(ac); 931 + q->ep = q->hw_idx + 1; 932 + break; 933 + } 930 934 } 931 935 932 936 static int mt76u_alloc_tx(struct mt76_dev *dev) 933 937 { 934 - struct mt76_queue *q; 935 - int i, j, err; 938 + int i; 936 939 937 940 for (i = 0; i <= MT_TXQ_PSD; i++) { 938 - if (i >= IEEE80211_NUM_ACS) { 939 - dev->phy.q_tx[i] = dev->phy.q_tx[0]; 940 - continue; 941 - } 941 + struct mt76_queue *q; 942 + int j, err; 942 943 943 944 q = devm_kzalloc(dev->dev, sizeof(*q), GFP_KERNEL); 944 945 if (!q) 945 946 return -ENOMEM; 946 947 947 948 spin_lock_init(&q->lock); 948 - q->hw_idx = mt76u_ac_to_hwq(dev, i); 949 - 949 + mt76u_ac_to_hwq(dev, q, i); 950 950 dev->phy.q_tx[i] = q; 951 951 952 952 q->entry = devm_kcalloc(dev->dev, ··· 975 969 976 970 mt76_worker_teardown(&dev->usb.status_worker); 977 971 978 - for (i = 0; i < IEEE80211_NUM_ACS; i++) { 972 + for (i = 0; i <= MT_TXQ_PSD; i++) { 979 973 struct mt76_queue *q; 980 974 int j; 981 975 ··· 1005 999 1006 1000 dev_err(dev->dev, "timed out waiting for pending tx\n"); 1007 1001 1008 - for (i = 0; i < IEEE80211_NUM_ACS; i++) { 1002 + for (i = 0; i <= MT_TXQ_PSD; i++) { 1009 1003 q = dev->phy.q_tx[i]; 1010 1004 if (!q) 1011 1005 continue; ··· 1019 1013 /* On device removal we maight queue skb's, but mt76u_tx_kick() 1020 1014 * will fail to submit urb, cleanup those skb's manually. 1021 1015 */ 1022 - for (i = 0; i < IEEE80211_NUM_ACS; i++) { 1016 + for (i = 0; i <= MT_TXQ_PSD; i++) { 1023 1017 q = dev->phy.q_tx[i]; 1024 1018 if (!q) 1025 1019 continue;
+213
drivers/net/wireless/mediatek/mt76/wed.c
··· 1 + // SPDX-License-Identifier: ISC 2 + /* 3 + * Copyright (C) 2023 Lorenzo Bianconi <lorenzo@kernel.org> 4 + */ 5 + 6 + #include "mt76.h" 7 + #include "dma.h" 8 + 9 + void mt76_wed_release_rx_buf(struct mtk_wed_device *wed) 10 + { 11 + struct mt76_dev *dev = container_of(wed, struct mt76_dev, mmio.wed); 12 + int i; 13 + 14 + for (i = 0; i < dev->rx_token_size; i++) { 15 + struct mt76_txwi_cache *t; 16 + 17 + t = mt76_rx_token_release(dev, i); 18 + if (!t || !t->ptr) 19 + continue; 20 + 21 + mt76_put_page_pool_buf(t->ptr, false); 22 + t->ptr = NULL; 23 + 24 + mt76_put_rxwi(dev, t); 25 + } 26 + 27 + mt76_free_pending_rxwi(dev); 28 + } 29 + EXPORT_SYMBOL_GPL(mt76_wed_release_rx_buf); 30 + 31 + #ifdef CONFIG_NET_MEDIATEK_SOC_WED 32 + u32 mt76_wed_init_rx_buf(struct mtk_wed_device *wed, int size) 33 + { 34 + struct mt76_dev *dev = container_of(wed, struct mt76_dev, mmio.wed); 35 + struct mtk_wed_bm_desc *desc = wed->rx_buf_ring.desc; 36 + struct mt76_queue *q = &dev->q_rx[MT_RXQ_MAIN]; 37 + int i, len = SKB_WITH_OVERHEAD(q->buf_size); 38 + struct mt76_txwi_cache *t = NULL; 39 + 40 + for (i = 0; i < size; i++) { 41 + enum dma_data_direction dir; 42 + dma_addr_t addr; 43 + u32 offset; 44 + int token; 45 + void *buf; 46 + 47 + t = mt76_get_rxwi(dev); 48 + if (!t) 49 + goto unmap; 50 + 51 + buf = mt76_get_page_pool_buf(q, &offset, q->buf_size); 52 + if (!buf) 53 + goto unmap; 54 + 55 + addr = page_pool_get_dma_addr(virt_to_head_page(buf)) + offset; 56 + dir = page_pool_get_dma_dir(q->page_pool); 57 + dma_sync_single_for_device(dev->dma_dev, addr, len, dir); 58 + 59 + desc->buf0 = cpu_to_le32(addr); 60 + token = mt76_rx_token_consume(dev, buf, t, addr); 61 + if (token < 0) { 62 + mt76_put_page_pool_buf(buf, false); 63 + goto unmap; 64 + } 65 + 66 + token = FIELD_PREP(MT_DMA_CTL_TOKEN, token); 67 + #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT 68 + token |= FIELD_PREP(MT_DMA_CTL_SDP0_H, addr >> 32); 69 + #endif 70 + desc->token |= cpu_to_le32(token); 71 + desc++; 72 + } 73 + 74 + return 0; 75 + 76 + unmap: 77 + if (t) 78 + mt76_put_rxwi(dev, t); 79 + mt76_wed_release_rx_buf(wed); 80 + 81 + return -ENOMEM; 82 + } 83 + EXPORT_SYMBOL_GPL(mt76_wed_init_rx_buf); 84 + 85 + int mt76_wed_offload_enable(struct mtk_wed_device *wed) 86 + { 87 + struct mt76_dev *dev = container_of(wed, struct mt76_dev, mmio.wed); 88 + 89 + spin_lock_bh(&dev->token_lock); 90 + dev->token_size = wed->wlan.token_start; 91 + spin_unlock_bh(&dev->token_lock); 92 + 93 + return !wait_event_timeout(dev->tx_wait, !dev->wed_token_count, HZ); 94 + } 95 + EXPORT_SYMBOL_GPL(mt76_wed_offload_enable); 96 + 97 + int mt76_wed_dma_setup(struct mt76_dev *dev, struct mt76_queue *q, bool reset) 98 + { 99 + int ret = 0, type, ring; 100 + u16 flags; 101 + 102 + if (!q || !q->ndesc) 103 + return -EINVAL; 104 + 105 + flags = q->flags; 106 + if (!q->wed || !mtk_wed_device_active(q->wed)) 107 + q->flags &= ~MT_QFLAG_WED; 108 + 109 + if (!(q->flags & MT_QFLAG_WED)) 110 + return 0; 111 + 112 + type = FIELD_GET(MT_QFLAG_WED_TYPE, q->flags); 113 + ring = FIELD_GET(MT_QFLAG_WED_RING, q->flags); 114 + 115 + switch (type) { 116 + case MT76_WED_Q_TX: 117 + ret = mtk_wed_device_tx_ring_setup(q->wed, ring, q->regs, 118 + reset); 119 + if (!ret) 120 + q->wed_regs = q->wed->tx_ring[ring].reg_base; 121 + break; 122 + case MT76_WED_Q_TXFREE: 123 + /* WED txfree queue needs ring to be initialized before setup */ 124 + q->flags = 0; 125 + mt76_dma_queue_reset(dev, q); 126 + mt76_dma_rx_fill(dev, q, false); 127 + 128 + ret = mtk_wed_device_txfree_ring_setup(q->wed, q->regs); 129 + if (!ret) 130 + q->wed_regs = q->wed->txfree_ring.reg_base; 131 + break; 132 + case MT76_WED_Q_RX: 133 + ret = mtk_wed_device_rx_ring_setup(q->wed, ring, q->regs, 134 + reset); 135 + if (!ret) 136 + q->wed_regs = q->wed->rx_ring[ring].reg_base; 137 + break; 138 + case MT76_WED_RRO_Q_DATA: 139 + q->flags &= ~MT_QFLAG_WED; 140 + __mt76_dma_queue_reset(dev, q, false); 141 + mtk_wed_device_rro_rx_ring_setup(q->wed, ring, q->regs); 142 + q->head = q->ndesc - 1; 143 + q->queued = q->head; 144 + break; 145 + case MT76_WED_RRO_Q_MSDU_PG: 146 + q->flags &= ~MT_QFLAG_WED; 147 + __mt76_dma_queue_reset(dev, q, false); 148 + mtk_wed_device_msdu_pg_rx_ring_setup(q->wed, ring, q->regs); 149 + q->head = q->ndesc - 1; 150 + q->queued = q->head; 151 + break; 152 + case MT76_WED_RRO_Q_IND: 153 + q->flags &= ~MT_QFLAG_WED; 154 + mt76_dma_queue_reset(dev, q); 155 + mt76_dma_rx_fill(dev, q, false); 156 + mtk_wed_device_ind_rx_ring_setup(q->wed, q->regs); 157 + break; 158 + default: 159 + ret = -EINVAL; 160 + break; 161 + } 162 + q->flags = flags; 163 + 164 + return ret; 165 + } 166 + EXPORT_SYMBOL_GPL(mt76_wed_dma_setup); 167 + #endif /*CONFIG_NET_MEDIATEK_SOC_WED */ 168 + 169 + void mt76_wed_offload_disable(struct mtk_wed_device *wed) 170 + { 171 + struct mt76_dev *dev = container_of(wed, struct mt76_dev, mmio.wed); 172 + 173 + spin_lock_bh(&dev->token_lock); 174 + dev->token_size = dev->drv->token_size; 175 + spin_unlock_bh(&dev->token_lock); 176 + } 177 + EXPORT_SYMBOL_GPL(mt76_wed_offload_disable); 178 + 179 + void mt76_wed_reset_complete(struct mtk_wed_device *wed) 180 + { 181 + struct mt76_dev *dev = container_of(wed, struct mt76_dev, mmio.wed); 182 + 183 + complete(&dev->mmio.wed_reset_complete); 184 + } 185 + EXPORT_SYMBOL_GPL(mt76_wed_reset_complete); 186 + 187 + int mt76_wed_net_setup_tc(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 188 + struct net_device *netdev, enum tc_setup_type type, 189 + void *type_data) 190 + { 191 + struct mt76_phy *phy = hw->priv; 192 + struct mtk_wed_device *wed = &phy->dev->mmio.wed; 193 + 194 + if (!mtk_wed_device_active(wed)) 195 + return -EOPNOTSUPP; 196 + 197 + return mtk_wed_device_setup_tc(wed, netdev, type, type_data); 198 + } 199 + EXPORT_SYMBOL_GPL(mt76_wed_net_setup_tc); 200 + 201 + void mt76_wed_dma_reset(struct mt76_dev *dev) 202 + { 203 + struct mt76_mmio *mmio = &dev->mmio; 204 + 205 + if (!test_bit(MT76_STATE_WED_RESET, &dev->phy.state)) 206 + return; 207 + 208 + complete(&mmio->wed_reset); 209 + 210 + if (!wait_for_completion_timeout(&mmio->wed_reset_complete, 3 * HZ)) 211 + dev_err(dev->dev, "wed reset complete timeout\n"); 212 + } 213 + EXPORT_SYMBOL_GPL(mt76_wed_dma_reset);