Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/amd/display: get dprefclk ss info from integration info table

[why & how]
we have two SSC_En:
we get ssc_info from dce_info for MPLL_SSC_EN.
we used to call VBIOS cmdtbl's smu_info's SS persentage for DPRECLK SS info,
is used for DP AUDIO and VBIOS' smu_info table was from systemIntegrationInfoTable.

since dcn35 VBIOS removed smu_info, driver need to use integrationInfotable directly.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Charlene Liu and committed by
Alex Deucher
72eaa723 8b09656b

+16 -5
+14 -5
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
··· 1014 1014 DC_LOG_BIOS("AS_SIGNAL_TYPE_HDMI ss_percentage: %d\n", ss_info->spread_spectrum_percentage); 1015 1015 break; 1016 1016 case AS_SIGNAL_TYPE_DISPLAY_PORT: 1017 - ss_info->spread_spectrum_percentage = 1017 + if (bp->base.integrated_info) { 1018 + DC_LOG_BIOS("gpuclk_ss_percentage (unit of 0.001 percent): %d\n", bp->base.integrated_info->gpuclk_ss_percentage); 1019 + ss_info->spread_spectrum_percentage = 1020 + bp->base.integrated_info->gpuclk_ss_percentage; 1021 + ss_info->type.CENTER_MODE = 1022 + bp->base.integrated_info->gpuclk_ss_type; 1023 + } else { 1024 + ss_info->spread_spectrum_percentage = 1018 1025 disp_cntl_tbl->dp_ss_percentage; 1019 - ss_info->spread_spectrum_range = 1026 + ss_info->spread_spectrum_range = 1020 1027 disp_cntl_tbl->dp_ss_rate_10hz * 10; 1021 - if (disp_cntl_tbl->dp_ss_mode & ATOM_SS_CENTRE_SPREAD_MODE) 1022 - ss_info->type.CENTER_MODE = true; 1023 - 1028 + if (disp_cntl_tbl->dp_ss_mode & ATOM_SS_CENTRE_SPREAD_MODE) 1029 + ss_info->type.CENTER_MODE = true; 1030 + } 1024 1031 DC_LOG_BIOS("AS_SIGNAL_TYPE_DISPLAY_PORT ss_percentage: %d\n", ss_info->spread_spectrum_percentage); 1025 1032 break; 1026 1033 case AS_SIGNAL_TYPE_GPU_PLL: ··· 2820 2813 info->ma_channel_number = info_v2_2->umachannelnumber; 2821 2814 info->dp_ss_control = 2822 2815 le16_to_cpu(info_v2_2->reserved1); 2816 + info->gpuclk_ss_percentage = info_v2_2->gpuclk_ss_percentage; 2817 + info->gpuclk_ss_type = info_v2_2->gpuclk_ss_type; 2823 2818 2824 2819 for (i = 0; i < NUMBER_OF_UCHAR_FOR_GUID; ++i) { 2825 2820 info->ext_disp_conn_info.gu_id[i] =
+2
drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h
··· 417 417 /* V2.1 */ 418 418 struct edp_info edp1_info; 419 419 struct edp_info edp2_info; 420 + uint32_t gpuclk_ss_percentage; 421 + uint32_t gpuclk_ss_type; 420 422 }; 421 423 422 424 /*