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Merge tag 'arm-soc/for-5.5/devicetree' of https://github.com/Broadcom/stblinux into arm/dt

This pull request contains Broadcom ARM-based SoCs Device Tree updates
for 5.5, please pull the following:

- Stefan paves the way for supporting the Raspberry Pi 4 and gets rid of
a bunch of dtc checker warnings by removing incorrect
nodes/properties, moving BCM2835/6/7 specific nodes into the
appropriate DTS, converts Raspberry Pi boards to JSON schema, and
finally adds minimal Raspberry Pi 4 model B support

- Dan adds support for the Luxul XWC-2000 router based on the BCM47094 SoC

- Chris adds a proper label to the Hurricane 2 watchdog controller node

* tag 'arm-soc/for-5.5/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: bcm: HR2: add label to sp805 watchdog
ARM: dts: BCM5301X: Add DT for Luxul XWC-2000
arm64: dts: broadcom: Add reference to RPi 4 B
ARM: dts: Add minimal Raspberry Pi 4 support
dt-bindings: arm: bcm2835: Add Raspberry Pi 4 to DT schema
dt-bindings: arm: Convert BCM2835 board/soc bindings to json-schema
ARM: dts: bcm283x: Move BCM2835/6/7 specific to bcm2835-common.dtsi
ARM: dts: bcm283x: Remove brcm,bcm2835-pl011 compatible
ARM: dts: bcm283x: Remove simple-bus from fixed clocks

Link: https://lore.kernel.org/r/20191023212814.30622-1-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>

+1291 -257
+54
Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml
··· 1 + # SPDX-License-Identifier: GPL-2.0 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/arm/bcm/bcm2835.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Broadcom BCM2711/BCM2835 Platforms Device Tree Bindings 8 + 9 + maintainers: 10 + - Eric Anholt <eric@anholt.net> 11 + - Stefan Wahren <wahrenst@gmx.net> 12 + 13 + properties: 14 + $nodename: 15 + const: '/' 16 + compatible: 17 + oneOf: 18 + - description: BCM2711 based Boards 19 + items: 20 + - enum: 21 + - raspberrypi,4-model-b 22 + - const: brcm,bcm2711 23 + 24 + - description: BCM2835 based Boards 25 + items: 26 + - enum: 27 + - raspberrypi,model-a 28 + - raspberrypi,model-a-plus 29 + - raspberrypi,model-b 30 + - raspberrypi,model-b-i2c0 # Raspberry Pi Model B (no P5) 31 + - raspberrypi,model-b-rev2 32 + - raspberrypi,model-b-plus 33 + - raspberrypi,compute-module 34 + - raspberrypi,model-zero 35 + - raspberrypi,model-zero-w 36 + - const: brcm,bcm2835 37 + 38 + - description: BCM2836 based Boards 39 + items: 40 + - enum: 41 + - raspberrypi,2-model-b 42 + - const: brcm,bcm2836 43 + 44 + - description: BCM2837 based Boards 45 + items: 46 + - enum: 47 + - raspberrypi,3-model-a-plus 48 + - raspberrypi,3-model-b 49 + - raspberrypi,3-model-b-plus 50 + - raspberrypi,3-compute-module 51 + - raspberrypi,3-compute-module-lite 52 + - const: brcm,bcm2837 53 + 54 + ...
-67
Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt
··· 1 - Broadcom BCM2835 device tree bindings 2 - ------------------------------------------- 3 - 4 - Raspberry Pi Model A 5 - Required root node properties: 6 - compatible = "raspberrypi,model-a", "brcm,bcm2835"; 7 - 8 - Raspberry Pi Model A+ 9 - Required root node properties: 10 - compatible = "raspberrypi,model-a-plus", "brcm,bcm2835"; 11 - 12 - Raspberry Pi Model B 13 - Required root node properties: 14 - compatible = "raspberrypi,model-b", "brcm,bcm2835"; 15 - 16 - Raspberry Pi Model B (no P5) 17 - early model B with I2C0 rather than I2C1 routed to the expansion header 18 - Required root node properties: 19 - compatible = "raspberrypi,model-b-i2c0", "brcm,bcm2835"; 20 - 21 - Raspberry Pi Model B rev2 22 - Required root node properties: 23 - compatible = "raspberrypi,model-b-rev2", "brcm,bcm2835"; 24 - 25 - Raspberry Pi Model B+ 26 - Required root node properties: 27 - compatible = "raspberrypi,model-b-plus", "brcm,bcm2835"; 28 - 29 - Raspberry Pi 2 Model B 30 - Required root node properties: 31 - compatible = "raspberrypi,2-model-b", "brcm,bcm2836"; 32 - 33 - Raspberry Pi 3 Model A+ 34 - Required root node properties: 35 - compatible = "raspberrypi,3-model-a-plus", "brcm,bcm2837"; 36 - 37 - Raspberry Pi 3 Model B 38 - Required root node properties: 39 - compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; 40 - 41 - Raspberry Pi 3 Model B+ 42 - Required root node properties: 43 - compatible = "raspberrypi,3-model-b-plus", "brcm,bcm2837"; 44 - 45 - Raspberry Pi Compute Module 46 - Required root node properties: 47 - compatible = "raspberrypi,compute-module", "brcm,bcm2835"; 48 - 49 - Raspberry Pi Compute Module 3 50 - Required root node properties: 51 - compatible = "raspberrypi,3-compute-module", "brcm,bcm2837"; 52 - 53 - Raspberry Pi Compute Module 3 Lite 54 - Required root node properties: 55 - compatible = "raspberrypi,3-compute-module-lite", "brcm,bcm2837"; 56 - 57 - Raspberry Pi Zero 58 - Required root node properties: 59 - compatible = "raspberrypi,model-zero", "brcm,bcm2835"; 60 - 61 - Raspberry Pi Zero W 62 - Required root node properties: 63 - compatible = "raspberrypi,model-zero-w", "brcm,bcm2835"; 64 - 65 - Generic BCM2835 board 66 - Required root node properties: 67 - compatible = "brcm,bcm2835";
+2
arch/arm/boot/dts/Makefile
··· 83 83 bcm2837-rpi-3-b.dtb \ 84 84 bcm2837-rpi-3-b-plus.dtb \ 85 85 bcm2837-rpi-cm3-io3.dtb \ 86 + bcm2711-rpi-4-b.dtb \ 86 87 bcm2835-rpi-zero.dtb \ 87 88 bcm2835-rpi-zero-w.dtb 88 89 dtb-$(CONFIG_ARCH_BCM_5301X) += \ ··· 114 113 bcm47094-luxul-abr-4500.dtb \ 115 114 bcm47094-luxul-xap-1610.dtb \ 116 115 bcm47094-luxul-xbr-4500.dtb \ 116 + bcm47094-luxul-xwc-2000.dtb \ 117 117 bcm47094-luxul-xwr-3100.dtb \ 118 118 bcm47094-luxul-xwr-3150-v1.dtb \ 119 119 bcm47094-netgear-r8500.dtb \
+1 -1
arch/arm/boot/dts/bcm-hr2.dtsi
··· 268 268 clock-frequency = <100000>; 269 269 }; 270 270 271 - watchdog@39000 { 271 + watchdog: watchdog@39000 { 272 272 compatible = "arm,sp805", "arm,primecell"; 273 273 reg = <0x39000 0x1000>; 274 274 interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>;
+123
arch/arm/boot/dts/bcm2711-rpi-4-b.dts
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + /dts-v1/; 3 + #include "bcm2711.dtsi" 4 + #include "bcm2835-rpi.dtsi" 5 + #include "bcm283x-rpi-usb-peripheral.dtsi" 6 + 7 + / { 8 + compatible = "raspberrypi,4-model-b", "brcm,bcm2711"; 9 + model = "Raspberry Pi 4 Model B"; 10 + 11 + chosen { 12 + /* 8250 auxiliary UART instead of pl011 */ 13 + stdout-path = "serial1:115200n8"; 14 + }; 15 + 16 + /* Will be filled by the bootloader */ 17 + memory@0 { 18 + device_type = "memory"; 19 + reg = <0 0 0>; 20 + }; 21 + 22 + leds { 23 + act { 24 + gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; 25 + }; 26 + 27 + pwr { 28 + label = "PWR"; 29 + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; 30 + }; 31 + }; 32 + 33 + wifi_pwrseq: wifi-pwrseq { 34 + compatible = "mmc-pwrseq-simple"; 35 + reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>; 36 + }; 37 + 38 + sd_io_1v8_reg: sd_io_1v8_reg { 39 + compatible = "regulator-gpio"; 40 + regulator-name = "vdd-sd-io"; 41 + regulator-min-microvolt = <1800000>; 42 + regulator-max-microvolt = <3300000>; 43 + regulator-boot-on; 44 + regulator-always-on; 45 + regulator-settling-time-us = <5000>; 46 + gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>; 47 + states = <1800000 0x1 48 + 3300000 0x0>; 49 + status = "okay"; 50 + }; 51 + }; 52 + 53 + &firmware { 54 + expgpio: gpio { 55 + compatible = "raspberrypi,firmware-gpio"; 56 + gpio-controller; 57 + #gpio-cells = <2>; 58 + gpio-line-names = "BT_ON", 59 + "WL_ON", 60 + "PWR_LED_OFF", 61 + "GLOBAL_RESET", 62 + "VDD_SD_IO_SEL", 63 + "CAM_GPIO", 64 + "", 65 + ""; 66 + status = "okay"; 67 + }; 68 + }; 69 + 70 + &pwm1 { 71 + pinctrl-names = "default"; 72 + pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>; 73 + status = "okay"; 74 + }; 75 + 76 + /* SDHCI is used to control the SDIO for wireless */ 77 + &sdhci { 78 + #address-cells = <1>; 79 + #size-cells = <0>; 80 + pinctrl-names = "default"; 81 + pinctrl-0 = <&emmc_gpio34>; 82 + bus-width = <4>; 83 + non-removable; 84 + mmc-pwrseq = <&wifi_pwrseq>; 85 + status = "okay"; 86 + 87 + brcmf: wifi@1 { 88 + reg = <1>; 89 + compatible = "brcm,bcm4329-fmac"; 90 + }; 91 + }; 92 + 93 + /* EMMC2 is used to drive the SD card */ 94 + &emmc2 { 95 + vqmmc-supply = <&sd_io_1v8_reg>; 96 + broken-cd; 97 + status = "okay"; 98 + }; 99 + 100 + /* uart0 communicates with the BT module */ 101 + &uart0 { 102 + pinctrl-names = "default"; 103 + pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>; 104 + uart-has-rtscts; 105 + status = "okay"; 106 + 107 + bluetooth { 108 + compatible = "brcm,bcm43438-bt"; 109 + max-speed = <2000000>; 110 + shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>; 111 + }; 112 + }; 113 + 114 + /* uart1 is mapped to the pin header */ 115 + &uart1 { 116 + pinctrl-names = "default"; 117 + pinctrl-0 = <&uart1_gpio14>; 118 + status = "okay"; 119 + }; 120 + 121 + &vchiq { 122 + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; 123 + };
+844
arch/arm/boot/dts/bcm2711.dtsi
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + #include "bcm283x.dtsi" 3 + 4 + #include <dt-bindings/interrupt-controller/arm-gic.h> 5 + #include <dt-bindings/soc/bcm2835-pm.h> 6 + 7 + / { 8 + compatible = "brcm,bcm2711"; 9 + 10 + #address-cells = <2>; 11 + #size-cells = <1>; 12 + 13 + interrupt-parent = <&gicv2>; 14 + 15 + soc { 16 + /* 17 + * Defined ranges: 18 + * Common BCM283x peripherals 19 + * BCM2711-specific peripherals 20 + * ARM-local peripherals 21 + */ 22 + ranges = <0x7e000000 0x0 0xfe000000 0x01800000>, 23 + <0x7c000000 0x0 0xfc000000 0x02000000>, 24 + <0x40000000 0x0 0xff800000 0x00800000>; 25 + /* Emulate a contiguous 30-bit address range for DMA */ 26 + dma-ranges = <0xc0000000 0x0 0x00000000 0x3c000000>; 27 + 28 + /* 29 + * This node is the provider for the enable-method for 30 + * bringing up secondary cores. 31 + */ 32 + local_intc: local_intc@40000000 { 33 + compatible = "brcm,bcm2836-l1-intc"; 34 + reg = <0x40000000 0x100>; 35 + }; 36 + 37 + gicv2: interrupt-controller@40041000 { 38 + interrupt-controller; 39 + #interrupt-cells = <3>; 40 + compatible = "arm,gic-400"; 41 + reg = <0x40041000 0x1000>, 42 + <0x40042000 0x2000>, 43 + <0x40044000 0x2000>, 44 + <0x40046000 0x2000>; 45 + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | 46 + IRQ_TYPE_LEVEL_HIGH)>; 47 + }; 48 + 49 + dma: dma@7e007000 { 50 + compatible = "brcm,bcm2835-dma"; 51 + reg = <0x7e007000 0xb00>; 52 + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 53 + <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>, 54 + <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 55 + <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, 56 + <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 57 + <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 58 + <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 59 + /* DMA lite 7 - 10 */ 60 + <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 61 + <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 62 + <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, 63 + <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; 64 + interrupt-names = "dma0", 65 + "dma1", 66 + "dma2", 67 + "dma3", 68 + "dma4", 69 + "dma5", 70 + "dma6", 71 + "dma7", 72 + "dma8", 73 + "dma9", 74 + "dma10"; 75 + #dma-cells = <1>; 76 + brcm,dma-channel-mask = <0x07f5>; 77 + }; 78 + 79 + pm: watchdog@7e100000 { 80 + compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt"; 81 + #power-domain-cells = <1>; 82 + #reset-cells = <1>; 83 + reg = <0x7e100000 0x114>, 84 + <0x7e00a000 0x24>, 85 + <0x7ec11000 0x20>; 86 + clocks = <&clocks BCM2835_CLOCK_V3D>, 87 + <&clocks BCM2835_CLOCK_PERI_IMAGE>, 88 + <&clocks BCM2835_CLOCK_H264>, 89 + <&clocks BCM2835_CLOCK_ISP>; 90 + clock-names = "v3d", "peri_image", "h264", "isp"; 91 + system-power-controller; 92 + }; 93 + 94 + rng@7e104000 { 95 + interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 96 + 97 + /* RNG is incompatible with brcm,bcm2835-rng */ 98 + status = "disabled"; 99 + }; 100 + 101 + uart2: serial@7e201400 { 102 + compatible = "arm,pl011", "arm,primecell"; 103 + reg = <0x7e201400 0x200>; 104 + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; 105 + clocks = <&clocks BCM2835_CLOCK_UART>, 106 + <&clocks BCM2835_CLOCK_VPU>; 107 + clock-names = "uartclk", "apb_pclk"; 108 + arm,primecell-periphid = <0x00241011>; 109 + status = "disabled"; 110 + }; 111 + 112 + uart3: serial@7e201600 { 113 + compatible = "arm,pl011", "arm,primecell"; 114 + reg = <0x7e201600 0x200>; 115 + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; 116 + clocks = <&clocks BCM2835_CLOCK_UART>, 117 + <&clocks BCM2835_CLOCK_VPU>; 118 + clock-names = "uartclk", "apb_pclk"; 119 + arm,primecell-periphid = <0x00241011>; 120 + status = "disabled"; 121 + }; 122 + 123 + uart4: serial@7e201800 { 124 + compatible = "arm,pl011", "arm,primecell"; 125 + reg = <0x7e201800 0x200>; 126 + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; 127 + clocks = <&clocks BCM2835_CLOCK_UART>, 128 + <&clocks BCM2835_CLOCK_VPU>; 129 + clock-names = "uartclk", "apb_pclk"; 130 + arm,primecell-periphid = <0x00241011>; 131 + status = "disabled"; 132 + }; 133 + 134 + uart5: serial@7e201a00 { 135 + compatible = "arm,pl011", "arm,primecell"; 136 + reg = <0x7e201a00 0x200>; 137 + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; 138 + clocks = <&clocks BCM2835_CLOCK_UART>, 139 + <&clocks BCM2835_CLOCK_VPU>; 140 + clock-names = "uartclk", "apb_pclk"; 141 + arm,primecell-periphid = <0x00241011>; 142 + status = "disabled"; 143 + }; 144 + 145 + spi3: spi@7e204600 { 146 + compatible = "brcm,bcm2835-spi"; 147 + reg = <0x7e204600 0x0200>; 148 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 149 + clocks = <&clocks BCM2835_CLOCK_VPU>; 150 + #address-cells = <1>; 151 + #size-cells = <0>; 152 + status = "disabled"; 153 + }; 154 + 155 + spi4: spi@7e204800 { 156 + compatible = "brcm,bcm2835-spi"; 157 + reg = <0x7e204800 0x0200>; 158 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 159 + clocks = <&clocks BCM2835_CLOCK_VPU>; 160 + #address-cells = <1>; 161 + #size-cells = <0>; 162 + status = "disabled"; 163 + }; 164 + 165 + spi5: spi@7e204a00 { 166 + compatible = "brcm,bcm2835-spi"; 167 + reg = <0x7e204a00 0x0200>; 168 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 169 + clocks = <&clocks BCM2835_CLOCK_VPU>; 170 + #address-cells = <1>; 171 + #size-cells = <0>; 172 + status = "disabled"; 173 + }; 174 + 175 + spi6: spi@7e204c00 { 176 + compatible = "brcm,bcm2835-spi"; 177 + reg = <0x7e204c00 0x0200>; 178 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 179 + clocks = <&clocks BCM2835_CLOCK_VPU>; 180 + #address-cells = <1>; 181 + #size-cells = <0>; 182 + status = "disabled"; 183 + }; 184 + 185 + i2c3: i2c@7e205600 { 186 + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; 187 + reg = <0x7e205600 0x200>; 188 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; 189 + clocks = <&clocks BCM2835_CLOCK_VPU>; 190 + #address-cells = <1>; 191 + #size-cells = <0>; 192 + status = "disabled"; 193 + }; 194 + 195 + i2c4: i2c@7e205800 { 196 + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; 197 + reg = <0x7e205800 0x200>; 198 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; 199 + clocks = <&clocks BCM2835_CLOCK_VPU>; 200 + #address-cells = <1>; 201 + #size-cells = <0>; 202 + status = "disabled"; 203 + }; 204 + 205 + i2c5: i2c@7e205a00 { 206 + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; 207 + reg = <0x7e205a00 0x200>; 208 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; 209 + clocks = <&clocks BCM2835_CLOCK_VPU>; 210 + #address-cells = <1>; 211 + #size-cells = <0>; 212 + status = "disabled"; 213 + }; 214 + 215 + i2c6: i2c@7e205c00 { 216 + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; 217 + reg = <0x7e205c00 0x200>; 218 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; 219 + clocks = <&clocks BCM2835_CLOCK_VPU>; 220 + #address-cells = <1>; 221 + #size-cells = <0>; 222 + status = "disabled"; 223 + }; 224 + 225 + pwm1: pwm@7e20c800 { 226 + compatible = "brcm,bcm2835-pwm"; 227 + reg = <0x7e20c800 0x28>; 228 + clocks = <&clocks BCM2835_CLOCK_PWM>; 229 + assigned-clocks = <&clocks BCM2835_CLOCK_PWM>; 230 + assigned-clock-rates = <10000000>; 231 + #pwm-cells = <2>; 232 + status = "disabled"; 233 + }; 234 + 235 + emmc2: emmc2@7e340000 { 236 + compatible = "brcm,bcm2711-emmc2"; 237 + reg = <0x7e340000 0x100>; 238 + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; 239 + clocks = <&clocks BCM2711_CLOCK_EMMC2>; 240 + status = "disabled"; 241 + }; 242 + 243 + hvs@7e400000 { 244 + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; 245 + }; 246 + }; 247 + 248 + arm-pmu { 249 + compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3"; 250 + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 251 + <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, 252 + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 253 + <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 254 + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; 255 + }; 256 + 257 + timer { 258 + compatible = "arm,armv8-timer"; 259 + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | 260 + IRQ_TYPE_LEVEL_LOW)>, 261 + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | 262 + IRQ_TYPE_LEVEL_LOW)>, 263 + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | 264 + IRQ_TYPE_LEVEL_LOW)>, 265 + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | 266 + IRQ_TYPE_LEVEL_LOW)>; 267 + /* This only applies to the ARMv7 stub */ 268 + arm,cpu-registers-not-fw-configured; 269 + }; 270 + 271 + cpus: cpus { 272 + #address-cells = <1>; 273 + #size-cells = <0>; 274 + enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit 275 + 276 + cpu0: cpu@0 { 277 + device_type = "cpu"; 278 + compatible = "arm,cortex-a72"; 279 + reg = <0>; 280 + enable-method = "spin-table"; 281 + cpu-release-addr = <0x0 0x000000d8>; 282 + }; 283 + 284 + cpu1: cpu@1 { 285 + device_type = "cpu"; 286 + compatible = "arm,cortex-a72"; 287 + reg = <1>; 288 + enable-method = "spin-table"; 289 + cpu-release-addr = <0x0 0x000000e0>; 290 + }; 291 + 292 + cpu2: cpu@2 { 293 + device_type = "cpu"; 294 + compatible = "arm,cortex-a72"; 295 + reg = <2>; 296 + enable-method = "spin-table"; 297 + cpu-release-addr = <0x0 0x000000e8>; 298 + }; 299 + 300 + cpu3: cpu@3 { 301 + device_type = "cpu"; 302 + compatible = "arm,cortex-a72"; 303 + reg = <3>; 304 + enable-method = "spin-table"; 305 + cpu-release-addr = <0x0 0x000000f0>; 306 + }; 307 + }; 308 + }; 309 + 310 + &clk_osc { 311 + clock-frequency = <54000000>; 312 + }; 313 + 314 + &clocks { 315 + compatible = "brcm,bcm2711-cprman"; 316 + }; 317 + 318 + &cpu_thermal { 319 + coefficients = <(-487) 410040>; 320 + }; 321 + 322 + &dsi0 { 323 + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; 324 + }; 325 + 326 + &dsi1 { 327 + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 328 + }; 329 + 330 + &gpio { 331 + compatible = "brcm,bcm2711-gpio"; 332 + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 333 + <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 334 + <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 335 + <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 336 + 337 + gpclk0_gpio49: gpclk0_gpio49 { 338 + pin-gpclk { 339 + pins = "gpio49"; 340 + function = "alt1"; 341 + bias-disable; 342 + }; 343 + }; 344 + gpclk1_gpio50: gpclk1_gpio50 { 345 + pin-gpclk { 346 + pins = "gpio50"; 347 + function = "alt1"; 348 + bias-disable; 349 + }; 350 + }; 351 + gpclk2_gpio51: gpclk2_gpio51 { 352 + pin-gpclk { 353 + pins = "gpio51"; 354 + function = "alt1"; 355 + bias-disable; 356 + }; 357 + }; 358 + 359 + i2c0_gpio46: i2c0_gpio46 { 360 + pin-sda { 361 + function = "alt0"; 362 + pins = "gpio46"; 363 + bias-pull-up; 364 + }; 365 + pin-scl { 366 + function = "alt0"; 367 + pins = "gpio47"; 368 + bias-disable; 369 + }; 370 + }; 371 + i2c1_gpio46: i2c1_gpio46 { 372 + pin-sda { 373 + function = "alt1"; 374 + pins = "gpio46"; 375 + bias-pull-up; 376 + }; 377 + pin-scl { 378 + function = "alt1"; 379 + pins = "gpio47"; 380 + bias-disable; 381 + }; 382 + }; 383 + i2c3_gpio2: i2c3_gpio2 { 384 + pin-sda { 385 + function = "alt5"; 386 + pins = "gpio2"; 387 + bias-pull-up; 388 + }; 389 + pin-scl { 390 + function = "alt5"; 391 + pins = "gpio3"; 392 + bias-disable; 393 + }; 394 + }; 395 + i2c3_gpio4: i2c3_gpio4 { 396 + pin-sda { 397 + function = "alt5"; 398 + pins = "gpio4"; 399 + bias-pull-up; 400 + }; 401 + pin-scl { 402 + function = "alt5"; 403 + pins = "gpio5"; 404 + bias-disable; 405 + }; 406 + }; 407 + i2c4_gpio6: i2c4_gpio6 { 408 + pin-sda { 409 + function = "alt5"; 410 + pins = "gpio6"; 411 + bias-pull-up; 412 + }; 413 + pin-scl { 414 + function = "alt5"; 415 + pins = "gpio7"; 416 + bias-disable; 417 + }; 418 + }; 419 + i2c4_gpio8: i2c4_gpio8 { 420 + pin-sda { 421 + function = "alt5"; 422 + pins = "gpio8"; 423 + bias-pull-up; 424 + }; 425 + pin-scl { 426 + function = "alt5"; 427 + pins = "gpio9"; 428 + bias-disable; 429 + }; 430 + }; 431 + i2c5_gpio10: i2c5_gpio10 { 432 + pin-sda { 433 + function = "alt5"; 434 + pins = "gpio10"; 435 + bias-pull-up; 436 + }; 437 + pin-scl { 438 + function = "alt5"; 439 + pins = "gpio11"; 440 + bias-disable; 441 + }; 442 + }; 443 + i2c5_gpio12: i2c5_gpio12 { 444 + pin-sda { 445 + function = "alt5"; 446 + pins = "gpio12"; 447 + bias-pull-up; 448 + }; 449 + pin-scl { 450 + function = "alt5"; 451 + pins = "gpio13"; 452 + bias-disable; 453 + }; 454 + }; 455 + i2c6_gpio0: i2c6_gpio0 { 456 + pin-sda { 457 + function = "alt5"; 458 + pins = "gpio0"; 459 + bias-pull-up; 460 + }; 461 + pin-scl { 462 + function = "alt5"; 463 + pins = "gpio1"; 464 + bias-disable; 465 + }; 466 + }; 467 + i2c6_gpio22: i2c6_gpio22 { 468 + pin-sda { 469 + function = "alt5"; 470 + pins = "gpio22"; 471 + bias-pull-up; 472 + }; 473 + pin-scl { 474 + function = "alt5"; 475 + pins = "gpio23"; 476 + bias-disable; 477 + }; 478 + }; 479 + i2c_slave_gpio8: i2c_slave_gpio8 { 480 + pins-i2c-slave { 481 + pins = "gpio8", 482 + "gpio9", 483 + "gpio10", 484 + "gpio11"; 485 + function = "alt3"; 486 + }; 487 + }; 488 + 489 + jtag_gpio48: jtag_gpio48 { 490 + pins-jtag { 491 + pins = "gpio48", 492 + "gpio49", 493 + "gpio50", 494 + "gpio51", 495 + "gpio52", 496 + "gpio53"; 497 + function = "alt4"; 498 + }; 499 + }; 500 + 501 + mii_gpio28: mii_gpio28 { 502 + pins-mii { 503 + pins = "gpio28", 504 + "gpio29", 505 + "gpio30", 506 + "gpio31"; 507 + function = "alt4"; 508 + }; 509 + }; 510 + mii_gpio36: mii_gpio36 { 511 + pins-mii { 512 + pins = "gpio36", 513 + "gpio37", 514 + "gpio38", 515 + "gpio39"; 516 + function = "alt5"; 517 + }; 518 + }; 519 + 520 + pcm_gpio50: pcm_gpio50 { 521 + pins-pcm { 522 + pins = "gpio50", 523 + "gpio51", 524 + "gpio52", 525 + "gpio53"; 526 + function = "alt2"; 527 + }; 528 + }; 529 + 530 + pwm0_0_gpio12: pwm0_0_gpio12 { 531 + pin-pwm { 532 + pins = "gpio12"; 533 + function = "alt0"; 534 + bias-disable; 535 + }; 536 + }; 537 + pwm0_0_gpio18: pwm0_0_gpio18 { 538 + pin-pwm { 539 + pins = "gpio18"; 540 + function = "alt5"; 541 + bias-disable; 542 + }; 543 + }; 544 + pwm1_0_gpio40: pwm1_0_gpio40 { 545 + pin-pwm { 546 + pins = "gpio40"; 547 + function = "alt0"; 548 + bias-disable; 549 + }; 550 + }; 551 + pwm0_1_gpio13: pwm0_1_gpio13 { 552 + pin-pwm { 553 + pins = "gpio13"; 554 + function = "alt0"; 555 + bias-disable; 556 + }; 557 + }; 558 + pwm0_1_gpio19: pwm0_1_gpio19 { 559 + pin-pwm { 560 + pins = "gpio19"; 561 + function = "alt5"; 562 + bias-disable; 563 + }; 564 + }; 565 + pwm1_1_gpio41: pwm1_1_gpio41 { 566 + pin-pwm { 567 + pins = "gpio41"; 568 + function = "alt0"; 569 + bias-disable; 570 + }; 571 + }; 572 + pwm0_1_gpio45: pwm0_1_gpio45 { 573 + pin-pwm { 574 + pins = "gpio45"; 575 + function = "alt0"; 576 + bias-disable; 577 + }; 578 + }; 579 + pwm0_0_gpio52: pwm0_0_gpio52 { 580 + pin-pwm { 581 + pins = "gpio52"; 582 + function = "alt1"; 583 + bias-disable; 584 + }; 585 + }; 586 + pwm0_1_gpio53: pwm0_1_gpio53 { 587 + pin-pwm { 588 + pins = "gpio53"; 589 + function = "alt1"; 590 + bias-disable; 591 + }; 592 + }; 593 + 594 + rgmii_gpio35: rgmii_gpio35 { 595 + pin-start-stop { 596 + pins = "gpio35"; 597 + function = "alt4"; 598 + }; 599 + pin-rx-ok { 600 + pins = "gpio36"; 601 + function = "alt4"; 602 + }; 603 + }; 604 + rgmii_irq_gpio34: rgmii_irq_gpio34 { 605 + pin-irq { 606 + pins = "gpio34"; 607 + function = "alt5"; 608 + }; 609 + }; 610 + rgmii_irq_gpio39: rgmii_irq_gpio39 { 611 + pin-irq { 612 + pins = "gpio39"; 613 + function = "alt4"; 614 + }; 615 + }; 616 + rgmii_mdio_gpio28: rgmii_mdio_gpio28 { 617 + pins-mdio { 618 + pins = "gpio28", 619 + "gpio29"; 620 + function = "alt5"; 621 + }; 622 + }; 623 + rgmii_mdio_gpio37: rgmii_mdio_gpio37 { 624 + pins-mdio { 625 + pins = "gpio37", 626 + "gpio38"; 627 + function = "alt4"; 628 + }; 629 + }; 630 + 631 + spi0_gpio46: spi0_gpio46 { 632 + pins-spi { 633 + pins = "gpio46", 634 + "gpio47", 635 + "gpio48", 636 + "gpio49"; 637 + function = "alt2"; 638 + }; 639 + }; 640 + spi2_gpio46: spi2_gpio46 { 641 + pins-spi { 642 + pins = "gpio46", 643 + "gpio47", 644 + "gpio48", 645 + "gpio49", 646 + "gpio50"; 647 + function = "alt5"; 648 + }; 649 + }; 650 + spi3_gpio0: spi3_gpio0 { 651 + pins-spi { 652 + pins = "gpio0", 653 + "gpio1", 654 + "gpio2", 655 + "gpio3"; 656 + function = "alt3"; 657 + }; 658 + }; 659 + spi4_gpio4: spi4_gpio4 { 660 + pins-spi { 661 + pins = "gpio4", 662 + "gpio5", 663 + "gpio6", 664 + "gpio7"; 665 + function = "alt3"; 666 + }; 667 + }; 668 + spi5_gpio12: spi5_gpio12 { 669 + pins-spi { 670 + pins = "gpio12", 671 + "gpio13", 672 + "gpio14", 673 + "gpio15"; 674 + function = "alt3"; 675 + }; 676 + }; 677 + spi6_gpio18: spi6_gpio18 { 678 + pins-spi { 679 + pins = "gpio18", 680 + "gpio19", 681 + "gpio20", 682 + "gpio21"; 683 + function = "alt3"; 684 + }; 685 + }; 686 + 687 + uart2_gpio0: uart2_gpio0 { 688 + pin-tx { 689 + pins = "gpio0"; 690 + function = "alt4"; 691 + bias-disable; 692 + }; 693 + pin-rx { 694 + pins = "gpio1"; 695 + function = "alt4"; 696 + bias-pull-up; 697 + }; 698 + }; 699 + uart2_ctsrts_gpio2: uart2_ctsrts_gpio2 { 700 + pin-cts { 701 + pins = "gpio2"; 702 + function = "alt4"; 703 + bias-pull-up; 704 + }; 705 + pin-rts { 706 + pins = "gpio3"; 707 + function = "alt4"; 708 + bias-disable; 709 + }; 710 + }; 711 + uart3_gpio4: uart3_gpio4 { 712 + pin-tx { 713 + pins = "gpio4"; 714 + function = "alt4"; 715 + bias-disable; 716 + }; 717 + pin-rx { 718 + pins = "gpio5"; 719 + function = "alt4"; 720 + bias-pull-up; 721 + }; 722 + }; 723 + uart3_ctsrts_gpio6: uart3_ctsrts_gpio6 { 724 + pin-cts { 725 + pins = "gpio6"; 726 + function = "alt4"; 727 + bias-pull-up; 728 + }; 729 + pin-rts { 730 + pins = "gpio7"; 731 + function = "alt4"; 732 + bias-disable; 733 + }; 734 + }; 735 + uart4_gpio8: uart4_gpio8 { 736 + pin-tx { 737 + pins = "gpio8"; 738 + function = "alt4"; 739 + bias-disable; 740 + }; 741 + pin-rx { 742 + pins = "gpio9"; 743 + function = "alt4"; 744 + bias-pull-up; 745 + }; 746 + }; 747 + uart4_ctsrts_gpio10: uart4_ctsrts_gpio10 { 748 + pin-cts { 749 + pins = "gpio10"; 750 + function = "alt4"; 751 + bias-pull-up; 752 + }; 753 + pin-rts { 754 + pins = "gpio11"; 755 + function = "alt4"; 756 + bias-disable; 757 + }; 758 + }; 759 + uart5_gpio12: uart5_gpio12 { 760 + pin-tx { 761 + pins = "gpio12"; 762 + function = "alt4"; 763 + bias-disable; 764 + }; 765 + pin-rx { 766 + pins = "gpio13"; 767 + function = "alt4"; 768 + bias-pull-up; 769 + }; 770 + }; 771 + uart5_ctsrts_gpio14: uart5_ctsrts_gpio14 { 772 + pin-cts { 773 + pins = "gpio14"; 774 + function = "alt4"; 775 + bias-pull-up; 776 + }; 777 + pin-rts { 778 + pins = "gpio15"; 779 + function = "alt4"; 780 + bias-disable; 781 + }; 782 + }; 783 + }; 784 + 785 + &i2c0 { 786 + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; 787 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; 788 + }; 789 + 790 + &i2c1 { 791 + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; 792 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; 793 + }; 794 + 795 + &mailbox { 796 + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 797 + }; 798 + 799 + &sdhci { 800 + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; 801 + }; 802 + 803 + &sdhost { 804 + interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 805 + }; 806 + 807 + &spi { 808 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 809 + }; 810 + 811 + &spi1 { 812 + interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 813 + }; 814 + 815 + &spi2 { 816 + interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 817 + }; 818 + 819 + &system_timer { 820 + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, 821 + <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, 822 + <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>, 823 + <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 824 + }; 825 + 826 + &txp { 827 + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 828 + }; 829 + 830 + &uart0 { 831 + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; 832 + }; 833 + 834 + &uart1 { 835 + interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 836 + }; 837 + 838 + &usb { 839 + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 840 + }; 841 + 842 + &vec { 843 + interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; 844 + };
+194
arch/arm/boot/dts/bcm2835-common.dtsi
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + 3 + /* This include file covers the common peripherals and configuration between 4 + * bcm2835, bcm2836 and bcm2837 implementations. 5 + */ 6 + 7 + / { 8 + interrupt-parent = <&intc>; 9 + 10 + soc { 11 + dma: dma@7e007000 { 12 + compatible = "brcm,bcm2835-dma"; 13 + reg = <0x7e007000 0xf00>; 14 + interrupts = <1 16>, 15 + <1 17>, 16 + <1 18>, 17 + <1 19>, 18 + <1 20>, 19 + <1 21>, 20 + <1 22>, 21 + <1 23>, 22 + <1 24>, 23 + <1 25>, 24 + <1 26>, 25 + /* dma channel 11-14 share one irq */ 26 + <1 27>, 27 + <1 27>, 28 + <1 27>, 29 + <1 27>, 30 + /* unused shared irq for all channels */ 31 + <1 28>; 32 + interrupt-names = "dma0", 33 + "dma1", 34 + "dma2", 35 + "dma3", 36 + "dma4", 37 + "dma5", 38 + "dma6", 39 + "dma7", 40 + "dma8", 41 + "dma9", 42 + "dma10", 43 + "dma11", 44 + "dma12", 45 + "dma13", 46 + "dma14", 47 + "dma-shared-all"; 48 + #dma-cells = <1>; 49 + brcm,dma-channel-mask = <0x7f35>; 50 + }; 51 + 52 + intc: interrupt-controller@7e00b200 { 53 + compatible = "brcm,bcm2835-armctrl-ic"; 54 + reg = <0x7e00b200 0x200>; 55 + interrupt-controller; 56 + #interrupt-cells = <2>; 57 + }; 58 + 59 + pm: watchdog@7e100000 { 60 + compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt"; 61 + #power-domain-cells = <1>; 62 + #reset-cells = <1>; 63 + reg = <0x7e100000 0x114>, 64 + <0x7e00a000 0x24>; 65 + clocks = <&clocks BCM2835_CLOCK_V3D>, 66 + <&clocks BCM2835_CLOCK_PERI_IMAGE>, 67 + <&clocks BCM2835_CLOCK_H264>, 68 + <&clocks BCM2835_CLOCK_ISP>; 69 + clock-names = "v3d", "peri_image", "h264", "isp"; 70 + system-power-controller; 71 + }; 72 + 73 + pixelvalve@7e206000 { 74 + compatible = "brcm,bcm2835-pixelvalve0"; 75 + reg = <0x7e206000 0x100>; 76 + interrupts = <2 13>; /* pwa0 */ 77 + }; 78 + 79 + pixelvalve@7e207000 { 80 + compatible = "brcm,bcm2835-pixelvalve1"; 81 + reg = <0x7e207000 0x100>; 82 + interrupts = <2 14>; /* pwa1 */ 83 + }; 84 + 85 + thermal: thermal@7e212000 { 86 + compatible = "brcm,bcm2835-thermal"; 87 + reg = <0x7e212000 0x8>; 88 + clocks = <&clocks BCM2835_CLOCK_TSENS>; 89 + #thermal-sensor-cells = <0>; 90 + status = "disabled"; 91 + }; 92 + 93 + i2c2: i2c@7e805000 { 94 + compatible = "brcm,bcm2835-i2c"; 95 + reg = <0x7e805000 0x1000>; 96 + interrupts = <2 21>; 97 + clocks = <&clocks BCM2835_CLOCK_VPU>; 98 + #address-cells = <1>; 99 + #size-cells = <0>; 100 + status = "okay"; 101 + }; 102 + 103 + pixelvalve@7e807000 { 104 + compatible = "brcm,bcm2835-pixelvalve2"; 105 + reg = <0x7e807000 0x100>; 106 + interrupts = <2 10>; /* pixelvalve */ 107 + }; 108 + 109 + hdmi: hdmi@7e902000 { 110 + compatible = "brcm,bcm2835-hdmi"; 111 + reg = <0x7e902000 0x600>, 112 + <0x7e808000 0x100>; 113 + interrupts = <2 8>, <2 9>; 114 + ddc = <&i2c2>; 115 + clocks = <&clocks BCM2835_PLLH_PIX>, 116 + <&clocks BCM2835_CLOCK_HSM>; 117 + clock-names = "pixel", "hdmi"; 118 + dmas = <&dma 17>; 119 + dma-names = "audio-rx"; 120 + status = "disabled"; 121 + }; 122 + 123 + v3d: v3d@7ec00000 { 124 + compatible = "brcm,bcm2835-v3d"; 125 + reg = <0x7ec00000 0x1000>; 126 + interrupts = <1 10>; 127 + power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>; 128 + }; 129 + 130 + vc4: gpu { 131 + compatible = "brcm,bcm2835-vc4"; 132 + }; 133 + }; 134 + }; 135 + 136 + &cpu_thermal { 137 + thermal-sensors = <&thermal>; 138 + }; 139 + 140 + &gpio { 141 + i2c_slave_gpio18: i2c_slave_gpio18 { 142 + brcm,pins = <18 19 20 21>; 143 + brcm,function = <BCM2835_FSEL_ALT3>; 144 + }; 145 + 146 + jtag_gpio4: jtag_gpio4 { 147 + brcm,pins = <4 5 6 12 13>; 148 + brcm,function = <BCM2835_FSEL_ALT5>; 149 + }; 150 + 151 + pwm0_gpio12: pwm0_gpio12 { 152 + brcm,pins = <12>; 153 + brcm,function = <BCM2835_FSEL_ALT0>; 154 + }; 155 + pwm0_gpio18: pwm0_gpio18 { 156 + brcm,pins = <18>; 157 + brcm,function = <BCM2835_FSEL_ALT5>; 158 + }; 159 + pwm0_gpio40: pwm0_gpio40 { 160 + brcm,pins = <40>; 161 + brcm,function = <BCM2835_FSEL_ALT0>; 162 + }; 163 + pwm1_gpio13: pwm1_gpio13 { 164 + brcm,pins = <13>; 165 + brcm,function = <BCM2835_FSEL_ALT0>; 166 + }; 167 + pwm1_gpio19: pwm1_gpio19 { 168 + brcm,pins = <19>; 169 + brcm,function = <BCM2835_FSEL_ALT5>; 170 + }; 171 + pwm1_gpio41: pwm1_gpio41 { 172 + brcm,pins = <41>; 173 + brcm,function = <BCM2835_FSEL_ALT0>; 174 + }; 175 + pwm1_gpio45: pwm1_gpio45 { 176 + brcm,pins = <45>; 177 + brcm,function = <BCM2835_FSEL_ALT0>; 178 + }; 179 + }; 180 + 181 + &i2s { 182 + dmas = <&dma 2>, <&dma 3>; 183 + dma-names = "tx", "rx"; 184 + }; 185 + 186 + &sdhost { 187 + dmas = <&dma 13>; 188 + dma-names = "rx-tx"; 189 + }; 190 + 191 + &spi { 192 + dmas = <&dma 6>, <&dma 7>; 193 + dma-names = "tx", "rx"; 194 + };
-4
arch/arm/boot/dts/bcm2835-rpi.dtsi
··· 59 59 clock-frequency = <100000>; 60 60 }; 61 61 62 - &i2c2 { 63 - status = "okay"; 64 - }; 65 - 66 62 &usb { 67 63 power-domains = <&power RPI_POWER_DOMAIN_USB>; 68 64 };
+1
arch/arm/boot/dts/bcm2835.dtsi
··· 1 1 // SPDX-License-Identifier: GPL-2.0 2 2 #include "bcm283x.dtsi" 3 + #include "bcm2835-common.dtsi" 3 4 4 5 / { 5 6 compatible = "brcm,bcm2835";
+1
arch/arm/boot/dts/bcm2836.dtsi
··· 1 1 // SPDX-License-Identifier: GPL-2.0 2 2 #include "bcm283x.dtsi" 3 + #include "bcm2835-common.dtsi" 3 4 4 5 / { 5 6 compatible = "brcm,bcm2836";
+1
arch/arm/boot/dts/bcm2837.dtsi
··· 1 1 #include "bcm283x.dtsi" 2 + #include "bcm2835-common.dtsi" 2 3 3 4 / { 4 5 compatible = "brcm,bcm2837";
+7
arch/arm/boot/dts/bcm283x-rpi-usb-peripheral.dtsi
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + &usb { 3 + dr_mode = "peripheral"; 4 + g-rx-fifo-size = <256>; 5 + g-np-tx-fifo-size = <32>; 6 + g-tx-fifo-size = <256 256 512 512 512 768 768>; 7 + };
+6 -184
arch/arm/boot/dts/bcm283x.dtsi
··· 18 18 / { 19 19 compatible = "brcm,bcm2835"; 20 20 model = "BCM2835"; 21 - interrupt-parent = <&intc>; 22 21 #address-cells = <1>; 23 22 #size-cells = <1>; 24 23 ··· 34 35 cpu_thermal: cpu-thermal { 35 36 polling-delay-passive = <0>; 36 37 polling-delay = <1000>; 37 - 38 - thermal-sensors = <&thermal>; 39 38 40 39 trips { 41 40 cpu-crit { ··· 53 56 #address-cells = <1>; 54 57 #size-cells = <1>; 55 58 56 - timer@7e003000 { 59 + system_timer: timer@7e003000 { 57 60 compatible = "brcm,bcm2835-system-timer"; 58 61 reg = <0x7e003000 0x1000>; 59 62 interrupts = <1 0>, <1 1>, <1 2>, <1 3>; ··· 64 67 clock-frequency = <1000000>; 65 68 }; 66 69 67 - txp@7e004000 { 70 + txp: txp@7e004000 { 68 71 compatible = "brcm,bcm2835-txp"; 69 72 reg = <0x7e004000 0x20>; 70 73 interrupts = <1 11>; 71 - }; 72 - 73 - dma: dma@7e007000 { 74 - compatible = "brcm,bcm2835-dma"; 75 - reg = <0x7e007000 0xf00>; 76 - interrupts = <1 16>, 77 - <1 17>, 78 - <1 18>, 79 - <1 19>, 80 - <1 20>, 81 - <1 21>, 82 - <1 22>, 83 - <1 23>, 84 - <1 24>, 85 - <1 25>, 86 - <1 26>, 87 - /* dma channel 11-14 share one irq */ 88 - <1 27>, 89 - <1 27>, 90 - <1 27>, 91 - <1 27>, 92 - /* unused shared irq for all channels */ 93 - <1 28>; 94 - interrupt-names = "dma0", 95 - "dma1", 96 - "dma2", 97 - "dma3", 98 - "dma4", 99 - "dma5", 100 - "dma6", 101 - "dma7", 102 - "dma8", 103 - "dma9", 104 - "dma10", 105 - "dma11", 106 - "dma12", 107 - "dma13", 108 - "dma14", 109 - "dma-shared-all"; 110 - #dma-cells = <1>; 111 - brcm,dma-channel-mask = <0x7f35>; 112 - }; 113 - 114 - intc: interrupt-controller@7e00b200 { 115 - compatible = "brcm,bcm2835-armctrl-ic"; 116 - reg = <0x7e00b200 0x200>; 117 - interrupt-controller; 118 - #interrupt-cells = <2>; 119 - }; 120 - 121 - pm: watchdog@7e100000 { 122 - compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt"; 123 - #power-domain-cells = <1>; 124 - #reset-cells = <1>; 125 - reg = <0x7e100000 0x114>, 126 - <0x7e00a000 0x24>; 127 - clocks = <&clocks BCM2835_CLOCK_V3D>, 128 - <&clocks BCM2835_CLOCK_PERI_IMAGE>, 129 - <&clocks BCM2835_CLOCK_H264>, 130 - <&clocks BCM2835_CLOCK_ISP>; 131 - clock-names = "v3d", "peri_image", "h264", "isp"; 132 - system-power-controller; 133 74 }; 134 75 135 76 clocks: cprman@7e101000 { ··· 119 184 interrupt-controller; 120 185 #interrupt-cells = <2>; 121 186 122 - /* Defines pin muxing groups according to 123 - * BCM2835-ARM-Peripherals.pdf page 102. 187 + /* Defines common pin muxing groups 124 188 * 125 189 * While each pin can have its mux selected 126 190 * for various functions individually, some ··· 197 263 brcm,pins = <44 45>; 198 264 brcm,function = <BCM2835_FSEL_ALT2>; 199 265 }; 200 - i2c_slave_gpio18: i2c_slave_gpio18 { 201 - brcm,pins = <18 19 20 21>; 202 - brcm,function = <BCM2835_FSEL_ALT3>; 203 - }; 204 266 205 - jtag_gpio4: jtag_gpio4 { 206 - brcm,pins = <4 5 6 12 13>; 207 - brcm,function = <BCM2835_FSEL_ALT5>; 208 - }; 209 267 jtag_gpio22: jtag_gpio22 { 210 268 brcm,pins = <22 23 24 25 26 27>; 211 269 brcm,function = <BCM2835_FSEL_ALT4>; ··· 210 284 pcm_gpio28: pcm_gpio28 { 211 285 brcm,pins = <28 29 30 31>; 212 286 brcm,function = <BCM2835_FSEL_ALT2>; 213 - }; 214 - 215 - pwm0_gpio12: pwm0_gpio12 { 216 - brcm,pins = <12>; 217 - brcm,function = <BCM2835_FSEL_ALT0>; 218 - }; 219 - pwm0_gpio18: pwm0_gpio18 { 220 - brcm,pins = <18>; 221 - brcm,function = <BCM2835_FSEL_ALT5>; 222 - }; 223 - pwm0_gpio40: pwm0_gpio40 { 224 - brcm,pins = <40>; 225 - brcm,function = <BCM2835_FSEL_ALT0>; 226 - }; 227 - pwm1_gpio13: pwm1_gpio13 { 228 - brcm,pins = <13>; 229 - brcm,function = <BCM2835_FSEL_ALT0>; 230 - }; 231 - pwm1_gpio19: pwm1_gpio19 { 232 - brcm,pins = <19>; 233 - brcm,function = <BCM2835_FSEL_ALT5>; 234 - }; 235 - pwm1_gpio41: pwm1_gpio41 { 236 - brcm,pins = <41>; 237 - brcm,function = <BCM2835_FSEL_ALT0>; 238 - }; 239 - pwm1_gpio45: pwm1_gpio45 { 240 - brcm,pins = <45>; 241 - brcm,function = <BCM2835_FSEL_ALT0>; 242 287 }; 243 288 244 289 sdhost_gpio48: sdhost_gpio48 { ··· 293 396 }; 294 397 295 398 uart0: serial@7e201000 { 296 - compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell"; 399 + compatible = "arm,pl011", "arm,primecell"; 297 400 reg = <0x7e201000 0x200>; 298 401 interrupts = <2 25>; 299 402 clocks = <&clocks BCM2835_CLOCK_UART>, ··· 307 410 reg = <0x7e202000 0x100>; 308 411 interrupts = <2 24>; 309 412 clocks = <&clocks BCM2835_CLOCK_VPU>; 310 - dmas = <&dma 13>; 311 - dma-names = "rx-tx"; 312 413 status = "disabled"; 313 414 }; 314 415 ··· 314 419 compatible = "brcm,bcm2835-i2s"; 315 420 reg = <0x7e203000 0x24>; 316 421 clocks = <&clocks BCM2835_CLOCK_PCM>; 317 - 318 - dmas = <&dma 2>, 319 - <&dma 3>; 320 - dma-names = "tx", "rx"; 321 422 status = "disabled"; 322 423 }; 323 424 ··· 322 431 reg = <0x7e204000 0x200>; 323 432 interrupts = <2 22>; 324 433 clocks = <&clocks BCM2835_CLOCK_VPU>; 325 - dmas = <&dma 6>, <&dma 7>; 326 - dma-names = "tx", "rx"; 327 434 #address-cells = <1>; 328 435 #size-cells = <0>; 329 436 status = "disabled"; ··· 335 446 #address-cells = <1>; 336 447 #size-cells = <0>; 337 448 status = "disabled"; 338 - }; 339 - 340 - pixelvalve@7e206000 { 341 - compatible = "brcm,bcm2835-pixelvalve0"; 342 - reg = <0x7e206000 0x100>; 343 - interrupts = <2 13>; /* pwa0 */ 344 - }; 345 - 346 - pixelvalve@7e207000 { 347 - compatible = "brcm,bcm2835-pixelvalve1"; 348 - reg = <0x7e207000 0x100>; 349 - interrupts = <2 14>; /* pwa1 */ 350 449 }; 351 450 352 451 dpi: dpi@7e208000 { ··· 365 488 "dsi0_ddr2", 366 489 "dsi0_ddr"; 367 490 368 - }; 369 - 370 - thermal: thermal@7e212000 { 371 - compatible = "brcm,bcm2835-thermal"; 372 - reg = <0x7e212000 0x8>; 373 - clocks = <&clocks BCM2835_CLOCK_TSENS>; 374 - #thermal-sensor-cells = <0>; 375 - status = "disabled"; 376 491 }; 377 492 378 493 aux: aux@7e215000 { ··· 456 587 status = "disabled"; 457 588 }; 458 589 459 - i2c2: i2c@7e805000 { 460 - compatible = "brcm,bcm2835-i2c"; 461 - reg = <0x7e805000 0x1000>; 462 - interrupts = <2 21>; 463 - clocks = <&clocks BCM2835_CLOCK_VPU>; 464 - #address-cells = <1>; 465 - #size-cells = <0>; 466 - status = "disabled"; 467 - }; 468 - 469 590 vec: vec@7e806000 { 470 591 compatible = "brcm,bcm2835-vec"; 471 592 reg = <0x7e806000 0x1000>; 472 593 clocks = <&clocks BCM2835_CLOCK_VEC>; 473 594 interrupts = <2 27>; 474 - status = "disabled"; 475 - }; 476 - 477 - pixelvalve@7e807000 { 478 - compatible = "brcm,bcm2835-pixelvalve2"; 479 - reg = <0x7e807000 0x100>; 480 - interrupts = <2 10>; /* pixelvalve */ 481 - }; 482 - 483 - hdmi: hdmi@7e902000 { 484 - compatible = "brcm,bcm2835-hdmi"; 485 - reg = <0x7e902000 0x600>, 486 - <0x7e808000 0x100>; 487 - interrupts = <2 8>, <2 9>; 488 - ddc = <&i2c2>; 489 - clocks = <&clocks BCM2835_PLLH_PIX>, 490 - <&clocks BCM2835_CLOCK_HSM>; 491 - clock-names = "pixel", "hdmi"; 492 - dmas = <&dma 17>; 493 - dma-names = "audio-rx"; 494 595 status = "disabled"; 495 596 }; 496 597 ··· 475 636 phys = <&usbphy>; 476 637 phy-names = "usb2-phy"; 477 638 }; 478 - 479 - v3d: v3d@7ec00000 { 480 - compatible = "brcm,bcm2835-v3d"; 481 - reg = <0x7ec00000 0x1000>; 482 - interrupts = <1 10>; 483 - power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>; 484 - }; 485 - 486 - vc4: gpu { 487 - compatible = "brcm,bcm2835-vc4"; 488 - }; 489 639 }; 490 640 491 641 clocks { 492 - compatible = "simple-bus"; 493 - #address-cells = <1>; 494 - #size-cells = <0>; 495 - 496 642 /* The oscillator is the root of the clock tree. */ 497 - clk_osc: clock@3 { 643 + clk_osc: clk-osc { 498 644 compatible = "fixed-clock"; 499 - reg = <3>; 500 645 #clock-cells = <0>; 501 646 clock-output-names = "osc"; 502 647 clock-frequency = <19200000>; 503 648 }; 504 649 505 - clk_usb: clock@4 { 650 + clk_usb: clk-usb { 506 651 compatible = "fixed-clock"; 507 - reg = <4>; 508 652 #clock-cells = <0>; 509 653 clock-output-names = "otg"; 510 654 clock-frequency = <480000000>;
+53
arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 + /* 3 + * Copyright 2019 Legrand AV Inc. 4 + */ 5 + 6 + /dts-v1/; 7 + 8 + #include "bcm47094.dtsi" 9 + #include "bcm5301x-nand-cs0-bch8.dtsi" 10 + 11 + / { 12 + compatible = "luxul,xwc-2000-v1", "brcm,bcm47094", "brcm,bcm4708"; 13 + model = "Luxul XWC-2000 V1"; 14 + 15 + chosen { 16 + bootargs = "earlycon"; 17 + }; 18 + 19 + memory { 20 + reg = <0x00000000 0x08000000 21 + 0x88000000 0x18000000>; 22 + }; 23 + 24 + leds { 25 + compatible = "gpio-leds"; 26 + 27 + status { 28 + label = "bcm53xx:green:status"; 29 + gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>; 30 + linux,default-trigger = "timer"; 31 + }; 32 + }; 33 + 34 + gpio-keys { 35 + compatible = "gpio-keys"; 36 + #address-cells = <1>; 37 + #size-cells = <0>; 38 + 39 + restart { 40 + label = "Reset"; 41 + linux,code = <KEY_RESTART>; 42 + gpios = <&chipcommon 19 GPIO_ACTIVE_LOW>; 43 + }; 44 + }; 45 + }; 46 + 47 + &uart1 { 48 + status = "okay"; 49 + }; 50 + 51 + &spi_nor { 52 + status = "okay"; 53 + };
+2 -1
arch/arm64/boot/dts/broadcom/Makefile
··· 1 1 # SPDX-License-Identifier: GPL-2.0 2 - dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rpi-3-a-plus.dtb \ 2 + dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-4-b.dtb \ 3 + bcm2837-rpi-3-a-plus.dtb \ 3 4 bcm2837-rpi-3-b.dtb \ 4 5 bcm2837-rpi-3-b-plus.dtb \ 5 6 bcm2837-rpi-cm3-io3.dtb
+2
arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b.dts
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + #include "arm/bcm2711-rpi-4-b.dts"