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perf/x86/msr: Add Sapphire Rapids CPU support

SMI_COUNT MSR is supported on Sapphire Rapids CPU.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/1633551137-192083-1-git-send-email-kan.liang@linux.intel.com

authored by Kan Liang and committed by Peter Zijlstra 71920ea9 64570fbc

+1
unified split
+1
arch/x86/events/msr.c
··· 68 case INTEL_FAM6_BROADWELL_D: 69 case INTEL_FAM6_BROADWELL_G: 70 case INTEL_FAM6_BROADWELL_X: 71 72 case INTEL_FAM6_ATOM_SILVERMONT: 73 case INTEL_FAM6_ATOM_SILVERMONT_D:
··· 68 case INTEL_FAM6_BROADWELL_D: 69 case INTEL_FAM6_BROADWELL_G: 70 case INTEL_FAM6_BROADWELL_X: 71 + case INTEL_FAM6_SAPPHIRERAPIDS_X: 72 73 case INTEL_FAM6_ATOM_SILVERMONT: 74 case INTEL_FAM6_ATOM_SILVERMONT_D: