Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/amd/display: Update some comments to improve the code readability

This commit updates some comments to be more precise and adds another
small comment to some other parts to improve the code readability.

Reviewed-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Rodrigo Siqueira and committed by
Alex Deucher
71866b72 7725605f

+11 -6
+5 -5
drivers/gpu/drm/amd/display/dc/dc.h
··· 309 309 unsigned int max_compressed_blk_size; 310 310 unsigned int max_uncompressed_blk_size; 311 311 bool independent_64b_blks; 312 - //These bitfields to be used starting with DCN 312 + //These bitfields to be used starting with DCN 3.0 313 313 struct { 314 - uint32_t dcc_256_64_64 : 1;//available in ASICs before DCN (the worst compression case) 315 - uint32_t dcc_128_128_uncontrained : 1; //available in ASICs before DCN 316 - uint32_t dcc_256_128_128 : 1; //available starting with DCN 317 - uint32_t dcc_256_256_unconstrained : 1; //available in ASICs before DCN (the best compression case) 314 + uint32_t dcc_256_64_64 : 1;//available in ASICs before DCN 3.0 (the worst compression case) 315 + uint32_t dcc_128_128_uncontrained : 1; //available in ASICs before DCN 3.0 316 + uint32_t dcc_256_128_128 : 1; //available starting with DCN 3.0 317 + uint32_t dcc_256_256_unconstrained : 1; //available in ASICs before DCN 3.0 (the best compression case) 318 318 } dcc_controls; 319 319 }; 320 320
+1 -1
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h
··· 147 147 uint32_t DCN_CUR1_TTU_CNTL1;\ 148 148 uint32_t VMID_SETTINGS_0 149 149 150 - 150 + /*shared with dcn3.x*/ 151 151 #define DCN21_HUBP_REG_COMMON_VARIABLE_LIST \ 152 152 DCN2_HUBP_REG_COMMON_VARIABLE_LIST; \ 153 153 uint32_t FLIP_PARAMETERS_3;\
+5
drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hubp.c
··· 77 77 MRQ_EXPANSION_MODE, rq_regs->mrq_expansion_mode, 78 78 CRQ_EXPANSION_MODE, rq_regs->crq_expansion_mode); 79 79 80 + /* no need to program PTE */ 80 81 REG_SET_5(DCHUBP_REQ_SIZE_CONFIG, 0, 81 82 CHUNK_SIZE, rq_regs->rq_regs_l.chunk_size, 82 83 MIN_CHUNK_SIZE, rq_regs->rq_regs_l.min_chunk_size, ··· 100 99 struct _vcs_dpi_display_rq_regs_st *rq_regs, 101 100 struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest) 102 101 { 102 + /* 103 + * otg is locked when this func is called. Register are double buffered. 104 + * disable the requestors is not needed 105 + */ 103 106 hubp2_vready_at_or_After_vsync(hubp, pipe_dest); 104 107 hubp201_program_requestor(hubp, rq_regs); 105 108 hubp201_program_deadline(hubp, dlg_attr, ttu_attr);