tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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drm/amdgpu: Fix null point error

need to check adev->powerplay.pp_funcs first, becasue from
AI, the smu ip can be disabled by user, and the pp_handle
is null in this case.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Rex Zhu and committed by
Alex Deucher 7179d240 6f059c64

+10 -6
+4 -2
drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
··· 135 135 * 2. power off the acp tiles 136 136 * 3. check and enter ulv state 137 137 */ 138 - if (adev->powerplay.pp_funcs->set_powergating_by_smu) 138 + if (adev->powerplay.pp_funcs && 139 + adev->powerplay.pp_funcs->set_powergating_by_smu) 139 140 amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, true); 140 141 } 141 142 return 0; ··· 518 517 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 519 518 bool enable = state == AMD_PG_STATE_GATE ? true : false; 520 519 521 - if (adev->powerplay.pp_funcs->set_powergating_by_smu) 520 + if (adev->powerplay.pp_funcs && 521 + adev->powerplay.pp_funcs->set_powergating_by_smu) 522 522 amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, enable); 523 523 524 524 return 0;
+1 -1
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
··· 392 392 if (!(adev->powerplay.pp_feature & PP_GFXOFF_MASK)) 393 393 return; 394 394 395 - if (!adev->powerplay.pp_funcs->set_powergating_by_smu) 395 + if (!adev->powerplay.pp_funcs || !adev->powerplay.pp_funcs->set_powergating_by_smu) 396 396 return; 397 397 398 398
+1 -1
drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
··· 280 280 return; 281 281 282 282 if (enable && adev->pg_flags & AMD_PG_SUPPORT_MMHUB) { 283 - if (adev->powerplay.pp_funcs->set_powergating_by_smu) 283 + if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->set_powergating_by_smu) 284 284 amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GMC, true); 285 285 286 286 }
+4 -2
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
··· 1366 1366 int r; 1367 1367 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 1368 1368 1369 - if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs->set_powergating_by_smu) 1369 + if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs && 1370 + adev->powerplay.pp_funcs->set_powergating_by_smu) 1370 1371 amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_SDMA, false); 1371 1372 1372 1373 sdma_v4_0_init_golden_registers(adev); ··· 1387 1386 sdma_v4_0_ctx_switch_enable(adev, false); 1388 1387 sdma_v4_0_enable(adev, false); 1389 1388 1390 - if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs->set_powergating_by_smu) 1389 + if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs 1390 + && adev->powerplay.pp_funcs->set_powergating_by_smu) 1391 1391 amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_SDMA, true); 1392 1392 1393 1393 return 0;