Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

iommu/arm-smmu-qcom: Make set_stall work when the device is on

Up until now we have only called the set_stall callback during
initialization when the device is off. But we will soon start calling it
to temporarily disable stall-on-fault when the device is on, so handle
that by checking if the device is on and writing SCTLR.

Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Link: https://lore.kernel.org/r/20250520-msm-gpu-fault-fixes-next-v8-3-fce6ee218787@gmail.com
[will: Fix "mixed declarations and code" warning from sparse]
Signed-off-by: Will Deacon <will@kernel.org>

authored by

Connor Abbott and committed by
Will Deacon
70892277 3053a2c5

+33 -6
+30 -3
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
··· 112 112 { 113 113 struct arm_smmu_domain *smmu_domain = (void *)cookie; 114 114 struct arm_smmu_cfg *cfg = &smmu_domain->cfg; 115 - struct qcom_smmu *qsmmu = to_qcom_smmu(smmu_domain->smmu); 115 + struct arm_smmu_device *smmu = smmu_domain->smmu; 116 + struct qcom_smmu *qsmmu = to_qcom_smmu(smmu); 117 + u32 mask = BIT(cfg->cbndx); 118 + bool stall_changed = !!(qsmmu->stall_enabled & mask) != enabled; 119 + unsigned long flags; 116 120 117 121 if (enabled) 118 - qsmmu->stall_enabled |= BIT(cfg->cbndx); 122 + qsmmu->stall_enabled |= mask; 119 123 else 120 - qsmmu->stall_enabled &= ~BIT(cfg->cbndx); 124 + qsmmu->stall_enabled &= ~mask; 125 + 126 + /* 127 + * If the device is on and we changed the setting, update the register. 128 + * The spec pseudocode says that CFCFG is resampled after a fault, and 129 + * we believe that no implementations cache it in the TLB, so it should 130 + * be safe to change it without a TLB invalidation. 131 + */ 132 + if (stall_changed && pm_runtime_get_if_active(smmu->dev) > 0) { 133 + u32 reg; 134 + 135 + spin_lock_irqsave(&smmu_domain->cb_lock, flags); 136 + reg = arm_smmu_cb_read(smmu, cfg->cbndx, ARM_SMMU_CB_SCTLR); 137 + 138 + if (enabled) 139 + reg |= ARM_SMMU_SCTLR_CFCFG; 140 + else 141 + reg &= ~ARM_SMMU_SCTLR_CFCFG; 142 + 143 + arm_smmu_cb_write(smmu, cfg->cbndx, ARM_SMMU_CB_SCTLR, reg); 144 + spin_unlock_irqrestore(&smmu_domain->cb_lock, flags); 145 + 146 + pm_runtime_put_autosuspend(smmu->dev); 147 + } 121 148 } 122 149 123 150 static void qcom_adreno_smmu_set_prr_bit(const void *cookie, bool set)
+3 -3
include/linux/adreno-smmu-priv.h
··· 45 45 * TTBR0 translation is enabled with the specified cfg 46 46 * @get_fault_info: Called by the GPU fault handler to get information about 47 47 * the fault 48 - * @set_stall: Configure whether stall on fault (CFCFG) is enabled. Call 49 - * before set_ttbr0_cfg(). If stalling on fault is enabled, 50 - * the GPU driver must call resume_translation() 48 + * @set_stall: Configure whether stall on fault (CFCFG) is enabled. If 49 + * stalling on fault is enabled, the GPU driver must call 50 + * resume_translation() 51 51 * @resume_translation: Resume translation after a fault 52 52 * 53 53 * @set_prr_bit: [optional] Configure the GPU's Partially Resident