Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

mmc: sdhci-pci-o2micro: Add SeaBird SeaEagle SD3 support

Add O2Micro/BayHubTech chip 8520 subversion B1 SD3.0 support.
Add O2Micro/BayHubTech chip 8620 and 8621 SD3.0 support
Enable Led function of 8520 chip.

Signed-off-by: Peter Guo <peter.guo@bayhubtech.com>
Signed-off-by: Adam Lee <adam.lee@canonical.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>

authored by

Peter Guo and committed by
Chris Ball
706adf6b ee526d51

+80 -1
+77 -1
drivers/mmc/host/sdhci-pci-o2micro.c
··· 21 21 #include "sdhci-pci.h" 22 22 #include "sdhci-pci-o2micro.h" 23 23 24 + static void o2_pci_set_baseclk(struct sdhci_pci_chip *chip, u32 value) 25 + { 26 + u32 scratch_32; 27 + pci_read_config_dword(chip->pdev, 28 + O2_SD_PLL_SETTING, &scratch_32); 29 + 30 + scratch_32 &= 0x0000FFFF; 31 + scratch_32 |= value; 32 + 33 + pci_write_config_dword(chip->pdev, 34 + O2_SD_PLL_SETTING, scratch_32); 35 + } 36 + 37 + static void o2_pci_led_enable(struct sdhci_pci_chip *chip) 38 + { 39 + int ret; 40 + u32 scratch_32; 41 + 42 + /* Set led of SD host function enable */ 43 + ret = pci_read_config_dword(chip->pdev, 44 + O2_SD_FUNC_REG0, &scratch_32); 45 + if (ret) 46 + return; 47 + 48 + scratch_32 &= ~O2_SD_FREG0_LEDOFF; 49 + pci_write_config_dword(chip->pdev, 50 + O2_SD_FUNC_REG0, scratch_32); 51 + 52 + ret = pci_read_config_dword(chip->pdev, 53 + O2_SD_TEST_REG, &scratch_32); 54 + if (ret) 55 + return; 56 + 57 + scratch_32 |= O2_SD_LED_ENABLE; 58 + pci_write_config_dword(chip->pdev, 59 + O2_SD_TEST_REG, scratch_32); 60 + 61 + } 62 + 24 63 void sdhci_pci_o2_fujin2_pci_init(struct sdhci_pci_chip *chip) 25 64 { 26 65 u32 scratch_32; ··· 255 216 scratch &= 0x7f; 256 217 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch); 257 218 219 + /* DevId=8520 subId= 0x11 or 0x12 Type Chip support */ 220 + if (chip->pdev->device == PCI_DEVICE_ID_O2_FUJIN2) { 221 + ret = pci_read_config_dword(chip->pdev, 222 + O2_SD_FUNC_REG0, 223 + &scratch_32); 224 + scratch_32 = ((scratch_32 & 0xFF000000) >> 24); 225 + 226 + /* Check Whether subId is 0x11 or 0x12 */ 227 + if ((scratch_32 == 0x11) || (scratch_32 == 0x12)) { 228 + scratch_32 = 0x2c280000; 229 + 230 + /* Set Base Clock to 208MZ */ 231 + o2_pci_set_baseclk(chip, scratch_32); 232 + ret = pci_read_config_dword(chip->pdev, 233 + O2_SD_FUNC_REG4, 234 + &scratch_32); 235 + 236 + /* Enable Base Clk setting change */ 237 + scratch_32 |= O2_SD_FREG4_ENABLE_CLK_SET; 238 + pci_write_config_dword(chip->pdev, 239 + O2_SD_FUNC_REG4, 240 + scratch_32); 241 + 242 + /* Set Tuning Window to 4 */ 243 + pci_write_config_byte(chip->pdev, 244 + O2_SD_TUNING_CTRL, 0x44); 245 + 246 + break; 247 + } 248 + } 249 + 250 + /* Enable 8520 led function */ 251 + o2_pci_led_enable(chip); 252 + 258 253 /* Set timeout CLK */ 259 254 ret = pci_read_config_dword(chip->pdev, 260 255 O2_SD_CLK_SETTING, &scratch_32); ··· 349 276 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch); 350 277 351 278 ret = pci_read_config_dword(chip->pdev, 352 - O2_SD_FUNC_REG0, &scratch_32); 279 + O2_SD_PLL_SETTING, &scratch_32); 353 280 354 281 if ((scratch_32 & 0xff000000) == 0x01000000) { 355 282 scratch_32 &= 0x0000FFFF; ··· 372 299 O2_SD_FUNC_REG4, scratch_32); 373 300 } 374 301 302 + /* Set Tuning Windows to 5 */ 303 + pci_write_config_byte(chip->pdev, 304 + O2_SD_TUNING_CTRL, 0x55); 375 305 /* Lock WP */ 376 306 ret = pci_read_config_byte(chip->pdev, 377 307 O2_SD_LOCK_WP, &scratch);
+3
drivers/mmc/host/sdhci-pci-o2micro.h
··· 57 57 #define O2_SD_UHS2_L1_CTRL 0x35C 58 58 #define O2_SD_FUNC_REG3 0x3E0 59 59 #define O2_SD_FUNC_REG4 0x3E4 60 + #define O2_SD_LED_ENABLE BIT(6) 61 + #define O2_SD_FREG0_LEDOFF BIT(13) 62 + #define O2_SD_FREG4_ENABLE_CLK_SET BIT(22) 60 63 61 64 #define O2_SD_VENDOR_SETTING 0x110 62 65 #define O2_SD_VENDOR_SETTING2 0x1C8