tjh.dev / kernel
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[ARM] 3732/1: S3C24XX: tidy syntax in osiris and anubis machines

Patch from Ben Dooks

Tidy the syntax, such as missing ,'s on the end of
struct entries, in the Osiris and Anubis machines.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

authored by Ben Dooks and committed by Russell King 705630db 34d92626

+23 -22
unified split
+13 -12
arch/arm/mach-s3c2410/mach-anubis.c
··· 60 .virtual = (u32)S3C24XX_VA_ISA_BYTE, 61 .pfn = __phys_to_pfn(0x0), 62 .length = SZ_4M, 63 - .type = MT_DEVICE 64 }, { 65 .virtual = (u32)S3C24XX_VA_ISA_WORD, 66 .pfn = __phys_to_pfn(0x0), 67 - .length = SZ_4M, MT_DEVICE 68 }, 69 70 /* we could possibly compress the next set down into a set of smaller tables ··· 79 .virtual = (u32)ANUBIS_VA_CTRL1, 80 .pfn = __phys_to_pfn(ANUBIS_PA_CTRL1), 81 .length = SZ_4K, 82 - .type = MT_DEVICE 83 }, { 84 .virtual = (u32)ANUBIS_VA_CTRL2, 85 .pfn = __phys_to_pfn(ANUBIS_PA_CTRL2), 86 .length = SZ_4K, 87 - .type =MT_DEVICE 88 }, 89 90 /* IDE drives */ ··· 127 .name = "pclk", 128 .divisor = 1, 129 .min_baud = 0, 130 - .max_baud = 0. 131 } 132 }; 133 ··· 140 .ulcon = ULCON, 141 .ufcon = UFCON, 142 .clocks = anubis_serial_clocks, 143 - .clocks_size = ARRAY_SIZE(anubis_serial_clocks) 144 }, 145 [1] = { 146 .hwport = 2, ··· 149 .ulcon = ULCON, 150 .ufcon = UFCON, 151 .clocks = anubis_serial_clocks, 152 - .clocks_size = ARRAY_SIZE(anubis_serial_clocks) 153 }, 154 }; 155 ··· 163 [0] = { 164 .name = "Boot Agent", 165 .size = SZ_16K, 166 - .offset = 0 167 }, 168 [1] = { 169 .name = "/boot", ··· 195 .nr_chips = 1, 196 .nr_map = external_map, 197 .nr_partitions = ARRAY_SIZE(anubis_default_nand_part), 198 - .partitions = anubis_default_nand_part 199 }, 200 [0] = { 201 .name = "chip0", 202 .nr_chips = 1, 203 .nr_map = chip0_map, 204 .nr_partitions = ARRAY_SIZE(anubis_default_nand_part), 205 - .partitions = anubis_default_nand_part 206 }, 207 [2] = { 208 .name = "chip1", 209 .nr_chips = 1, 210 .nr_map = chip1_map, 211 .nr_partitions = ARRAY_SIZE(anubis_default_nand_part), 212 - .partitions = anubis_default_nand_part 213 }, 214 }; 215 ··· 314 .devices = anubis_devices, 315 .devices_count = ARRAY_SIZE(anubis_devices), 316 .clocks = anubis_clocks, 317 - .clocks_count = ARRAY_SIZE(anubis_clocks) 318 }; 319 320 static void __init anubis_map_io(void)
··· 60 .virtual = (u32)S3C24XX_VA_ISA_BYTE, 61 .pfn = __phys_to_pfn(0x0), 62 .length = SZ_4M, 63 + .type = MT_DEVICE, 64 }, { 65 .virtual = (u32)S3C24XX_VA_ISA_WORD, 66 .pfn = __phys_to_pfn(0x0), 67 + .length = SZ_4M, 68 + .type = MT_DEVICE, 69 }, 70 71 /* we could possibly compress the next set down into a set of smaller tables ··· 78 .virtual = (u32)ANUBIS_VA_CTRL1, 79 .pfn = __phys_to_pfn(ANUBIS_PA_CTRL1), 80 .length = SZ_4K, 81 + .type = MT_DEVICE, 82 }, { 83 .virtual = (u32)ANUBIS_VA_CTRL2, 84 .pfn = __phys_to_pfn(ANUBIS_PA_CTRL2), 85 .length = SZ_4K, 86 + .type = MT_DEVICE, 87 }, 88 89 /* IDE drives */ ··· 126 .name = "pclk", 127 .divisor = 1, 128 .min_baud = 0, 129 + .max_baud = 0, 130 } 131 }; 132 ··· 139 .ulcon = ULCON, 140 .ufcon = UFCON, 141 .clocks = anubis_serial_clocks, 142 + .clocks_size = ARRAY_SIZE(anubis_serial_clocks), 143 }, 144 [1] = { 145 .hwport = 2, ··· 148 .ulcon = ULCON, 149 .ufcon = UFCON, 150 .clocks = anubis_serial_clocks, 151 + .clocks_size = ARRAY_SIZE(anubis_serial_clocks), 152 }, 153 }; 154 ··· 162 [0] = { 163 .name = "Boot Agent", 164 .size = SZ_16K, 165 + .offset = 0, 166 }, 167 [1] = { 168 .name = "/boot", ··· 194 .nr_chips = 1, 195 .nr_map = external_map, 196 .nr_partitions = ARRAY_SIZE(anubis_default_nand_part), 197 + .partitions = anubis_default_nand_part, 198 }, 199 [0] = { 200 .name = "chip0", 201 .nr_chips = 1, 202 .nr_map = chip0_map, 203 .nr_partitions = ARRAY_SIZE(anubis_default_nand_part), 204 + .partitions = anubis_default_nand_part, 205 }, 206 [2] = { 207 .name = "chip1", 208 .nr_chips = 1, 209 .nr_map = chip1_map, 210 .nr_partitions = ARRAY_SIZE(anubis_default_nand_part), 211 + .partitions = anubis_default_nand_part, 212 }, 213 }; 214 ··· 313 .devices = anubis_devices, 314 .devices_count = ARRAY_SIZE(anubis_devices), 315 .clocks = anubis_clocks, 316 + .clocks_count = ARRAY_SIZE(anubis_clocks), 317 }; 318 319 static void __init anubis_map_io(void)
+10 -10
arch/arm/mach-s3c2410/mach-osiris.c
··· 67 .virtual = (u32)OSIRIS_VA_CTRL1, 68 .pfn = __phys_to_pfn(OSIRIS_PA_CTRL1), 69 .length = SZ_16K, 70 - .type = MT_DEVICE 71 }, { 72 .virtual = (u32)OSIRIS_VA_CTRL2, 73 .pfn = __phys_to_pfn(OSIRIS_PA_CTRL2), 74 .length = SZ_16K, 75 - .type = MT_DEVICE 76 }, 77 }; 78 ··· 91 .name = "pclk", 92 .divisor = 1, 93 .min_baud = 0, 94 - .max_baud = 0. 95 } 96 }; 97 ··· 103 .ulcon = ULCON, 104 .ufcon = UFCON, 105 .clocks = osiris_serial_clocks, 106 - .clocks_size = ARRAY_SIZE(osiris_serial_clocks) 107 }, 108 [1] = { 109 .hwport = 1, ··· 112 .ulcon = ULCON, 113 .ufcon = UFCON, 114 .clocks = osiris_serial_clocks, 115 - .clocks_size = ARRAY_SIZE(osiris_serial_clocks) 116 }, 117 }; 118 ··· 126 [0] = { 127 .name = "Boot Agent", 128 .size = SZ_16K, 129 - .offset = 0 130 }, 131 [1] = { 132 .name = "/boot", ··· 158 .nr_chips = 1, 159 .nr_map = external_map, 160 .nr_partitions = ARRAY_SIZE(osiris_default_nand_part), 161 - .partitions = osiris_default_nand_part 162 }, 163 [0] = { 164 .name = "chip0", 165 .nr_chips = 1, 166 .nr_map = chip0_map, 167 .nr_partitions = ARRAY_SIZE(osiris_default_nand_part), 168 - .partitions = osiris_default_nand_part 169 }, 170 [2] = { 171 .name = "chip1", 172 .nr_chips = 1, 173 .nr_map = chip1_map, 174 .nr_partitions = ARRAY_SIZE(osiris_default_nand_part), 175 - .partitions = osiris_default_nand_part 176 }, 177 }; 178 ··· 245 .devices = osiris_devices, 246 .devices_count = ARRAY_SIZE(osiris_devices), 247 .clocks = osiris_clocks, 248 - .clocks_count = ARRAY_SIZE(osiris_clocks) 249 }; 250 251 static void __init osiris_map_io(void)
··· 67 .virtual = (u32)OSIRIS_VA_CTRL1, 68 .pfn = __phys_to_pfn(OSIRIS_PA_CTRL1), 69 .length = SZ_16K, 70 + .type = MT_DEVICE, 71 }, { 72 .virtual = (u32)OSIRIS_VA_CTRL2, 73 .pfn = __phys_to_pfn(OSIRIS_PA_CTRL2), 74 .length = SZ_16K, 75 + .type = MT_DEVICE, 76 }, 77 }; 78 ··· 91 .name = "pclk", 92 .divisor = 1, 93 .min_baud = 0, 94 + .max_baud = 0, 95 } 96 }; 97 ··· 103 .ulcon = ULCON, 104 .ufcon = UFCON, 105 .clocks = osiris_serial_clocks, 106 + .clocks_size = ARRAY_SIZE(osiris_serial_clocks), 107 }, 108 [1] = { 109 .hwport = 1, ··· 112 .ulcon = ULCON, 113 .ufcon = UFCON, 114 .clocks = osiris_serial_clocks, 115 + .clocks_size = ARRAY_SIZE(osiris_serial_clocks), 116 }, 117 }; 118 ··· 126 [0] = { 127 .name = "Boot Agent", 128 .size = SZ_16K, 129 + .offset = 0, 130 }, 131 [1] = { 132 .name = "/boot", ··· 158 .nr_chips = 1, 159 .nr_map = external_map, 160 .nr_partitions = ARRAY_SIZE(osiris_default_nand_part), 161 + .partitions = osiris_default_nand_part, 162 }, 163 [0] = { 164 .name = "chip0", 165 .nr_chips = 1, 166 .nr_map = chip0_map, 167 .nr_partitions = ARRAY_SIZE(osiris_default_nand_part), 168 + .partitions = osiris_default_nand_part, 169 }, 170 [2] = { 171 .name = "chip1", 172 .nr_chips = 1, 173 .nr_map = chip1_map, 174 .nr_partitions = ARRAY_SIZE(osiris_default_nand_part), 175 + .partitions = osiris_default_nand_part, 176 }, 177 }; 178 ··· 245 .devices = osiris_devices, 246 .devices_count = ARRAY_SIZE(osiris_devices), 247 .clocks = osiris_clocks, 248 + .clocks_count = ARRAY_SIZE(osiris_clocks), 249 }; 250 251 static void __init osiris_map_io(void)