Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

net: mscc: ocelot: add ops for decoding watermark threshold and occupancy

We'll need to read back the watermark thresholds and occupancy from
hardware (for devlink-sb integration), not only to write them as we did
so far in ocelot_port_set_maxlen. So introduce 2 new functions in struct
ocelot_ops, similar to wm_enc, and implement them for the 3 supported
mscc_ocelot switches.

Remove the INUSE and MAXUSE unpacking helpers for the QSYS_RES_STAT
register, because that doesn't scale with the number of switches that
mscc_ocelot supports now. They have different bit widths for the
watermarks, and we need function pointers to abstract that difference
away.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

authored by

Vladimir Oltean and committed by
Jakub Kicinski
703b7621 f6fe01d6

+54 -6
+18
drivers/net/dsa/ocelot/felix_vsc9959.c
··· 1006 1006 return value; 1007 1007 } 1008 1008 1009 + static u16 vsc9959_wm_dec(u16 wm) 1010 + { 1011 + WARN_ON(wm & ~GENMASK(8, 0)); 1012 + 1013 + if (wm & BIT(8)) 1014 + return (wm & GENMASK(7, 0)) * 16; 1015 + 1016 + return wm; 1017 + } 1018 + 1019 + static void vsc9959_wm_stat(u32 val, u32 *inuse, u32 *maxuse) 1020 + { 1021 + *inuse = (val & GENMASK(23, 12)) >> 12; 1022 + *maxuse = val & GENMASK(11, 0); 1023 + } 1024 + 1009 1025 static const struct ocelot_ops vsc9959_ops = { 1010 1026 .reset = vsc9959_reset, 1011 1027 .wm_enc = vsc9959_wm_enc, 1028 + .wm_dec = vsc9959_wm_dec, 1029 + .wm_stat = vsc9959_wm_stat, 1012 1030 .port_to_netdev = felix_port_to_netdev, 1013 1031 .netdev_to_port = felix_netdev_to_port, 1014 1032 };
+18
drivers/net/dsa/ocelot/seville_vsc9953.c
··· 1057 1057 return value; 1058 1058 } 1059 1059 1060 + static u16 vsc9953_wm_dec(u16 wm) 1061 + { 1062 + WARN_ON(wm & ~GENMASK(9, 0)); 1063 + 1064 + if (wm & BIT(9)) 1065 + return (wm & GENMASK(8, 0)) * 16; 1066 + 1067 + return wm; 1068 + } 1069 + 1070 + static void vsc9953_wm_stat(u32 val, u32 *inuse, u32 *maxuse) 1071 + { 1072 + *inuse = (val & GENMASK(25, 13)) >> 13; 1073 + *maxuse = val & GENMASK(12, 0); 1074 + } 1075 + 1060 1076 static const struct ocelot_ops vsc9953_ops = { 1061 1077 .reset = vsc9953_reset, 1062 1078 .wm_enc = vsc9953_wm_enc, 1079 + .wm_dec = vsc9953_wm_dec, 1080 + .wm_stat = vsc9953_wm_stat, 1063 1081 .port_to_netdev = felix_port_to_netdev, 1064 1082 .netdev_to_port = felix_netdev_to_port, 1065 1083 };
+16
drivers/net/ethernet/mscc/ocelot_vsc7514.c
··· 763 763 return value; 764 764 } 765 765 766 + static u16 ocelot_wm_dec(u16 wm) 767 + { 768 + if (wm & BIT(8)) 769 + return (wm & GENMASK(7, 0)) * 16; 770 + 771 + return wm; 772 + } 773 + 774 + static void ocelot_wm_stat(u32 val, u32 *inuse, u32 *maxuse) 775 + { 776 + *inuse = (val & GENMASK(23, 12)) >> 12; 777 + *maxuse = val & GENMASK(11, 0); 778 + } 779 + 766 780 static const struct ocelot_ops ocelot_ops = { 767 781 .reset = ocelot_reset, 768 782 .wm_enc = ocelot_wm_enc, 783 + .wm_dec = ocelot_wm_dec, 784 + .wm_stat = ocelot_wm_stat, 769 785 .port_to_netdev = ocelot_port_to_netdev, 770 786 .netdev_to_port = ocelot_netdev_to_port, 771 787 };
+2
include/soc/mscc/ocelot.h
··· 563 563 int (*netdev_to_port)(struct net_device *dev); 564 564 int (*reset)(struct ocelot *ocelot); 565 565 u16 (*wm_enc)(u16 value); 566 + u16 (*wm_dec)(u16 value); 567 + void (*wm_stat)(u32 val, u32 *inuse, u32 *maxuse); 566 568 }; 567 569 568 570 struct ocelot_vcap_block {
-6
include/soc/mscc/ocelot_qsys.h
··· 71 71 72 72 #define QSYS_RES_STAT_GSZ 0x8 73 73 74 - #define QSYS_RES_STAT_INUSE(x) (((x) << 12) & GENMASK(23, 12)) 75 - #define QSYS_RES_STAT_INUSE_M GENMASK(23, 12) 76 - #define QSYS_RES_STAT_INUSE_X(x) (((x) & GENMASK(23, 12)) >> 12) 77 - #define QSYS_RES_STAT_MAXUSE(x) ((x) & GENMASK(11, 0)) 78 - #define QSYS_RES_STAT_MAXUSE_M GENMASK(11, 0) 79 - 80 74 #define QSYS_MMGT_EQ_CTRL_FP_FREE_CNT(x) ((x) & GENMASK(15, 0)) 81 75 #define QSYS_MMGT_EQ_CTRL_FP_FREE_CNT_M GENMASK(15, 0) 82 76