[MIPS] JMR3927 fixes. o Check if IRQ is disabled or in progress before reenabling interrupts in jmr3927_irq_end.. o s/spinlock_irqsave/spin_lock_irqsave/ o s/spinlock_irqrestore/spin_unlock_irqrestore/ o Flush write buffer after setting IRQ mask o In 2.6 jmr3927_ioc_interrupt interrupt handlers return irqreturn_t Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

authored by Sergei Shtylylov and committed by Ralf Baechle 702a96a6 5666c094

+19 -9
+19 -9
arch/mips/jmr3927/rbhma3100/irq.c
··· 113 114 static void jmr3927_irq_end(unsigned int irq) 115 { 116 - jmr3927_irq_enable(irq); 117 } 118 119 static void jmr3927_irq_disable(unsigned int irq_nr) ··· 122 struct tb_irq_space* sp; 123 unsigned long flags; 124 125 - spinlock_irqsave(&jmr3927_irq_lock, flags); 126 for (sp = tb_irq_spaces; sp; sp = sp->next) { 127 if (sp->start_irqno <= irq_nr && 128 irq_nr < sp->start_irqno + sp->nr_irqs) { ··· 132 break; 133 } 134 } 135 - spinlock_irqrestore(&jmr3927_irq_lock, flags); 136 } 137 138 static void jmr3927_irq_enable(unsigned int irq_nr) ··· 140 struct tb_irq_space* sp; 141 unsigned long flags; 142 143 - spinlock_irqsave(&jmr3927_irq_lock, flags); 144 for (sp = tb_irq_spaces; sp; sp = sp->next) { 145 if (sp->start_irqno <= irq_nr && 146 irq_nr < sp->start_irqno + sp->nr_irqs) { ··· 150 break; 151 } 152 } 153 - spinlock_irqrestore(&jmr3927_irq_lock, flags); 154 } 155 156 /* ··· 206 /* update IRCSR */ 207 tx3927_ircptr->imr = 0; 208 tx3927_ircptr->imr = irc_elevel; 209 } 210 static void unmask_irq_irc(int irq_nr, int space_id) 211 { 212 volatile unsigned long *ilrp = &tx3927_ircptr->ilr[irq_nr / 2]; ··· 280 do_IRQ(irq + JMR3927_IRQ_IRC, regs); 281 } 282 283 - static void jmr3927_ioc_interrupt(int irq, void *dev_id, struct pt_regs *regs) 284 { 285 unsigned char istat = jmr3927_ioc_reg_in(JMR3927_IOC_INTS2_ADDR); 286 int i; ··· 291 do_IRQ(irq, regs); 292 } 293 } 294 } 295 296 static struct irqaction ioc_action = { 297 jmr3927_ioc_interrupt, 0, CPU_MASK_NONE, "IOC", NULL, NULL, 298 }; 299 300 - static void jmr3927_isac_interrupt(int irq, void *dev_id, struct pt_regs *regs) 301 { 302 unsigned char istat = jmr3927_isac_reg_in(JMR3927_ISAC_INTS2_ADDR); 303 int i; ··· 309 do_IRQ(irq, regs); 310 } 311 } 312 } 313 314 static struct irqaction isac_action = { ··· 317 }; 318 319 320 - static void jmr3927_isaerr_interrupt(int irq, void * dev_id, struct pt_regs * regs) 321 { 322 printk(KERN_WARNING "ISA error interrupt (irq 0x%x).\n", irq); 323 } 324 static struct irqaction isaerr_action = { 325 jmr3927_isaerr_interrupt, 0, CPU_MASK_NONE, "ISA error", NULL, NULL, 326 }; 327 328 - static void jmr3927_pcierr_interrupt(int irq, void * dev_id, struct pt_regs * regs) 329 { 330 printk(KERN_WARNING "PCI error interrupt (irq 0x%x).\n", irq); 331 printk(KERN_WARNING "pcistat:%02x, lbstat:%04lx\n", 332 tx3927_pcicptr->pcistat, tx3927_pcicptr->lbstat); 333 } 334 static struct irqaction pcierr_action = { 335 jmr3927_pcierr_interrupt, 0, CPU_MASK_NONE, "PCI error", NULL, NULL,
··· 113 114 static void jmr3927_irq_end(unsigned int irq) 115 { 116 + if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) 117 + jmr3927_irq_enable(irq); 118 } 119 120 static void jmr3927_irq_disable(unsigned int irq_nr) ··· 121 struct tb_irq_space* sp; 122 unsigned long flags; 123 124 + spin_lock_irqsave(&jmr3927_irq_lock, flags); 125 for (sp = tb_irq_spaces; sp; sp = sp->next) { 126 if (sp->start_irqno <= irq_nr && 127 irq_nr < sp->start_irqno + sp->nr_irqs) { ··· 131 break; 132 } 133 } 134 + spin_unlock_irqrestore(&jmr3927_irq_lock, flags); 135 } 136 137 static void jmr3927_irq_enable(unsigned int irq_nr) ··· 139 struct tb_irq_space* sp; 140 unsigned long flags; 141 142 + spin_lock_irqsave(&jmr3927_irq_lock, flags); 143 for (sp = tb_irq_spaces; sp; sp = sp->next) { 144 if (sp->start_irqno <= irq_nr && 145 irq_nr < sp->start_irqno + sp->nr_irqs) { ··· 149 break; 150 } 151 } 152 + spin_unlock_irqrestore(&jmr3927_irq_lock, flags); 153 } 154 155 /* ··· 205 /* update IRCSR */ 206 tx3927_ircptr->imr = 0; 207 tx3927_ircptr->imr = irc_elevel; 208 + /* flush write buffer */ 209 + (void)tx3927_ircptr->ssr; 210 } 211 + 212 static void unmask_irq_irc(int irq_nr, int space_id) 213 { 214 volatile unsigned long *ilrp = &tx3927_ircptr->ilr[irq_nr / 2]; ··· 276 do_IRQ(irq + JMR3927_IRQ_IRC, regs); 277 } 278 279 + static irqreturn_t jmr3927_ioc_interrupt(int irq, void *dev_id, struct pt_regs *regs) 280 { 281 unsigned char istat = jmr3927_ioc_reg_in(JMR3927_IOC_INTS2_ADDR); 282 int i; ··· 287 do_IRQ(irq, regs); 288 } 289 } 290 + return IRQ_HANDLED; 291 } 292 293 static struct irqaction ioc_action = { 294 jmr3927_ioc_interrupt, 0, CPU_MASK_NONE, "IOC", NULL, NULL, 295 }; 296 297 + static irqreturn_t jmr3927_isac_interrupt(int irq, void *dev_id, struct pt_regs *regs) 298 { 299 unsigned char istat = jmr3927_isac_reg_in(JMR3927_ISAC_INTS2_ADDR); 300 int i; ··· 304 do_IRQ(irq, regs); 305 } 306 } 307 + return IRQ_HANDLED; 308 } 309 310 static struct irqaction isac_action = { ··· 311 }; 312 313 314 + static irqreturn_t jmr3927_isaerr_interrupt(int irq, void * dev_id, struct pt_regs * regs) 315 { 316 printk(KERN_WARNING "ISA error interrupt (irq 0x%x).\n", irq); 317 + 318 + return IRQ_HANDLED; 319 } 320 static struct irqaction isaerr_action = { 321 jmr3927_isaerr_interrupt, 0, CPU_MASK_NONE, "ISA error", NULL, NULL, 322 }; 323 324 + static irqreturn_t jmr3927_pcierr_interrupt(int irq, void * dev_id, struct pt_regs * regs) 325 { 326 printk(KERN_WARNING "PCI error interrupt (irq 0x%x).\n", irq); 327 printk(KERN_WARNING "pcistat:%02x, lbstat:%04lx\n", 328 tx3927_pcicptr->pcistat, tx3927_pcicptr->lbstat); 329 + 330 + return IRQ_HANDLED; 331 } 332 static struct irqaction pcierr_action = { 333 jmr3927_pcierr_interrupt, 0, CPU_MASK_NONE, "PCI error", NULL, NULL,