ucc_geth: Fix a bunch of sparse warnings

ucc_geth didn't have anything marked as __iomem. It was also inconsistent
with its use of in/out accessors (using them sometimes, not using them other
times). Cleaning this up cuts the warnings down from hundreds to just over a
dozen.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>

authored by Andy Fleming and committed by Jeff Garzik 6fee40e9 9b9a8bfc

+174 -160
+144 -132
drivers/net/ucc_geth.c
··· 62 62 #endif /* UGETH_VERBOSE_DEBUG */ 63 63 #define UGETH_MSG_DEFAULT (NETIF_MSG_IFUP << 1 ) - 1 64 64 65 - void uec_set_ethtool_ops(struct net_device *netdev); 66 65 67 66 static DEFINE_SPINLOCK(ugeth_lock); 68 67 ··· 215 216 } 216 217 } 217 218 218 - static struct sk_buff *get_new_skb(struct ucc_geth_private *ugeth, u8 *bd) 219 + static struct sk_buff *get_new_skb(struct ucc_geth_private *ugeth, 220 + u8 __iomem *bd) 219 221 { 220 222 struct sk_buff *skb = NULL; 221 223 ··· 236 236 237 237 skb->dev = ugeth->dev; 238 238 239 - out_be32(&((struct qe_bd *)bd)->buf, 239 + out_be32(&((struct qe_bd __iomem *)bd)->buf, 240 240 dma_map_single(NULL, 241 241 skb->data, 242 242 ugeth->ug_info->uf_info.max_rx_buf_length + 243 243 UCC_GETH_RX_DATA_BUF_ALIGNMENT, 244 244 DMA_FROM_DEVICE)); 245 245 246 - out_be32((u32 *)bd, (R_E | R_I | (in_be32((u32 *)bd) & R_W))); 246 + out_be32((u32 __iomem *)bd, 247 + (R_E | R_I | (in_be32((u32 __iomem*)bd) & R_W))); 247 248 248 249 return skb; 249 250 } 250 251 251 252 static int rx_bd_buffer_set(struct ucc_geth_private *ugeth, u8 rxQ) 252 253 { 253 - u8 *bd; 254 + u8 __iomem *bd; 254 255 u32 bd_status; 255 256 struct sk_buff *skb; 256 257 int i; ··· 260 259 i = 0; 261 260 262 261 do { 263 - bd_status = in_be32((u32*)bd); 262 + bd_status = in_be32((u32 __iomem *)bd); 264 263 skb = get_new_skb(ugeth, bd); 265 264 266 265 if (!skb) /* If can not allocate data buffer, ··· 278 277 } 279 278 280 279 static int fill_init_enet_entries(struct ucc_geth_private *ugeth, 281 - volatile u32 *p_start, 280 + u32 *p_start, 282 281 u8 num_entries, 283 282 u32 thread_size, 284 283 u32 thread_alignment, ··· 317 316 } 318 317 319 318 static int return_init_enet_entries(struct ucc_geth_private *ugeth, 320 - volatile u32 *p_start, 319 + u32 *p_start, 321 320 u8 num_entries, 322 321 enum qe_risc_allocation risc, 323 322 int skip_page_for_first_entry) ··· 327 326 int snum; 328 327 329 328 for (i = 0; i < num_entries; i++) { 329 + u32 val = *p_start; 330 + 330 331 /* Check that this entry was actually valid -- 331 332 needed in case failed in allocations */ 332 - if ((*p_start & ENET_INIT_PARAM_RISC_MASK) == risc) { 333 + if ((val & ENET_INIT_PARAM_RISC_MASK) == risc) { 333 334 snum = 334 - (u32) (*p_start & ENET_INIT_PARAM_SNUM_MASK) >> 335 + (u32) (val & ENET_INIT_PARAM_SNUM_MASK) >> 335 336 ENET_INIT_PARAM_SNUM_SHIFT; 336 337 qe_put_snum((u8) snum); 337 338 if (!((i == 0) && skip_page_for_first_entry)) { 338 339 /* First entry of Rx does not have page */ 339 340 init_enet_offset = 340 - (in_be32(p_start) & 341 - ENET_INIT_PARAM_PTR_MASK); 341 + (val & ENET_INIT_PARAM_PTR_MASK); 342 342 qe_muram_free(init_enet_offset); 343 343 } 344 - *(p_start++) = 0; /* Just for cosmetics */ 344 + *p_start++ = 0; 345 345 } 346 346 } 347 347 ··· 351 349 352 350 #ifdef DEBUG 353 351 static int dump_init_enet_entries(struct ucc_geth_private *ugeth, 354 - volatile u32 *p_start, 352 + u32 __iomem *p_start, 355 353 u8 num_entries, 356 354 u32 thread_size, 357 355 enum qe_risc_allocation risc, ··· 362 360 int snum; 363 361 364 362 for (i = 0; i < num_entries; i++) { 363 + u32 val = in_be32(p_start); 364 + 365 365 /* Check that this entry was actually valid -- 366 366 needed in case failed in allocations */ 367 - if ((*p_start & ENET_INIT_PARAM_RISC_MASK) == risc) { 367 + if ((val & ENET_INIT_PARAM_RISC_MASK) == risc) { 368 368 snum = 369 - (u32) (*p_start & ENET_INIT_PARAM_SNUM_MASK) >> 369 + (u32) (val & ENET_INIT_PARAM_SNUM_MASK) >> 370 370 ENET_INIT_PARAM_SNUM_SHIFT; 371 371 qe_put_snum((u8) snum); 372 372 if (!((i == 0) && skip_page_for_first_entry)) { ··· 444 440 445 441 static int hw_clear_addr_in_paddr(struct ucc_geth_private *ugeth, u8 paddr_num) 446 442 { 447 - struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt; 443 + struct ucc_geth_82xx_address_filtering_pram __iomem *p_82xx_addr_filt; 448 444 449 445 if (!(paddr_num < NUM_OF_PADDRS)) { 450 446 ugeth_warn("%s: Illagel paddr_num.", __FUNCTION__); ··· 452 448 } 453 449 454 450 p_82xx_addr_filt = 455 - (struct ucc_geth_82xx_address_filtering_pram *) ugeth->p_rx_glbl_pram-> 451 + (struct ucc_geth_82xx_address_filtering_pram __iomem *) ugeth->p_rx_glbl_pram-> 456 452 addressfiltering; 457 453 458 454 /* Writing address ff.ff.ff.ff.ff.ff disables address ··· 467 463 static void hw_add_addr_in_hash(struct ucc_geth_private *ugeth, 468 464 u8 *p_enet_addr) 469 465 { 470 - struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt; 466 + struct ucc_geth_82xx_address_filtering_pram __iomem *p_82xx_addr_filt; 471 467 u32 cecr_subblock; 472 468 473 469 p_82xx_addr_filt = 474 - (struct ucc_geth_82xx_address_filtering_pram *) ugeth->p_rx_glbl_pram-> 470 + (struct ucc_geth_82xx_address_filtering_pram __iomem *) ugeth->p_rx_glbl_pram-> 475 471 addressfiltering; 476 472 477 473 cecr_subblock = ··· 491 487 static void magic_packet_detection_enable(struct ucc_geth_private *ugeth) 492 488 { 493 489 struct ucc_fast_private *uccf; 494 - struct ucc_geth *ug_regs; 490 + struct ucc_geth __iomem *ug_regs; 495 491 u32 maccfg2, uccm; 496 492 497 493 uccf = ugeth->uccf; ··· 511 507 static void magic_packet_detection_disable(struct ucc_geth_private *ugeth) 512 508 { 513 509 struct ucc_fast_private *uccf; 514 - struct ucc_geth *ug_regs; 510 + struct ucc_geth __iomem *ug_regs; 515 511 u32 maccfg2, uccm; 516 512 517 513 uccf = ugeth->uccf; ··· 542 538 rx_firmware_statistics, 543 539 struct ucc_geth_hardware_statistics *hardware_statistics) 544 540 { 545 - struct ucc_fast *uf_regs; 546 - struct ucc_geth *ug_regs; 541 + struct ucc_fast __iomem *uf_regs; 542 + struct ucc_geth __iomem *ug_regs; 547 543 struct ucc_geth_tx_firmware_statistics_pram *p_tx_fw_statistics_pram; 548 544 struct ucc_geth_rx_firmware_statistics_pram *p_rx_fw_statistics_pram; 549 545 550 546 ug_regs = ugeth->ug_regs; 551 - uf_regs = (struct ucc_fast *) ug_regs; 547 + uf_regs = (struct ucc_fast __iomem *) ug_regs; 552 548 p_tx_fw_statistics_pram = ugeth->p_tx_fw_statistics_pram; 553 549 p_rx_fw_statistics_pram = ugeth->p_rx_fw_statistics_pram; 554 550 ··· 1136 1132 } 1137 1133 #endif /* DEBUG */ 1138 1134 1139 - static void init_default_reg_vals(volatile u32 *upsmr_register, 1140 - volatile u32 *maccfg1_register, 1141 - volatile u32 *maccfg2_register) 1135 + static void init_default_reg_vals(u32 __iomem *upsmr_register, 1136 + u32 __iomem *maccfg1_register, 1137 + u32 __iomem *maccfg2_register) 1142 1138 { 1143 1139 out_be32(upsmr_register, UCC_GETH_UPSMR_INIT); 1144 1140 out_be32(maccfg1_register, UCC_GETH_MACCFG1_INIT); ··· 1152 1148 u8 alt_beb_truncation, 1153 1149 u8 max_retransmissions, 1154 1150 u8 collision_window, 1155 - volatile u32 *hafdup_register) 1151 + u32 __iomem *hafdup_register) 1156 1152 { 1157 1153 u32 value = 0; 1158 1154 ··· 1184 1180 u8 non_btb_ipg, 1185 1181 u8 min_ifg, 1186 1182 u8 btb_ipg, 1187 - volatile u32 *ipgifg_register) 1183 + u32 __iomem *ipgifg_register) 1188 1184 { 1189 1185 u32 value = 0; 1190 1186 ··· 1219 1215 int tx_flow_control_enable, 1220 1216 u16 pause_period, 1221 1217 u16 extension_field, 1222 - volatile u32 *upsmr_register, 1223 - volatile u32 *uempr_register, 1224 - volatile u32 *maccfg1_register) 1218 + u32 __iomem *upsmr_register, 1219 + u32 __iomem *uempr_register, 1220 + u32 __iomem *maccfg1_register) 1225 1221 { 1226 1222 u32 value = 0; 1227 1223 ··· 1247 1243 1248 1244 static int init_hw_statistics_gathering_mode(int enable_hardware_statistics, 1249 1245 int auto_zero_hardware_statistics, 1250 - volatile u32 *upsmr_register, 1251 - volatile u16 *uescr_register) 1246 + u32 __iomem *upsmr_register, 1247 + u16 __iomem *uescr_register) 1252 1248 { 1253 1249 u32 upsmr_value = 0; 1254 1250 u16 uescr_value = 0; ··· 1274 1270 static int init_firmware_statistics_gathering_mode(int 1275 1271 enable_tx_firmware_statistics, 1276 1272 int enable_rx_firmware_statistics, 1277 - volatile u32 *tx_rmon_base_ptr, 1273 + u32 __iomem *tx_rmon_base_ptr, 1278 1274 u32 tx_firmware_statistics_structure_address, 1279 - volatile u32 *rx_rmon_base_ptr, 1275 + u32 __iomem *rx_rmon_base_ptr, 1280 1276 u32 rx_firmware_statistics_structure_address, 1281 - volatile u16 *temoder_register, 1282 - volatile u32 *remoder_register) 1277 + u16 __iomem *temoder_register, 1278 + u32 __iomem *remoder_register) 1283 1279 { 1284 1280 /* Note: this function does not check if */ 1285 1281 /* the parameters it receives are NULL */ ··· 1311 1307 u8 address_byte_3, 1312 1308 u8 address_byte_4, 1313 1309 u8 address_byte_5, 1314 - volatile u32 *macstnaddr1_register, 1315 - volatile u32 *macstnaddr2_register) 1310 + u32 __iomem *macstnaddr1_register, 1311 + u32 __iomem *macstnaddr2_register) 1316 1312 { 1317 1313 u32 value = 0; 1318 1314 ··· 1348 1344 } 1349 1345 1350 1346 static int init_check_frame_length_mode(int length_check, 1351 - volatile u32 *maccfg2_register) 1347 + u32 __iomem *maccfg2_register) 1352 1348 { 1353 1349 u32 value = 0; 1354 1350 ··· 1364 1360 } 1365 1361 1366 1362 static int init_preamble_length(u8 preamble_length, 1367 - volatile u32 *maccfg2_register) 1363 + u32 __iomem *maccfg2_register) 1368 1364 { 1369 1365 u32 value = 0; 1370 1366 ··· 1380 1376 1381 1377 static int init_rx_parameters(int reject_broadcast, 1382 1378 int receive_short_frames, 1383 - int promiscuous, volatile u32 *upsmr_register) 1379 + int promiscuous, u32 __iomem *upsmr_register) 1384 1380 { 1385 1381 u32 value = 0; 1386 1382 ··· 1407 1403 } 1408 1404 1409 1405 static int init_max_rx_buff_len(u16 max_rx_buf_len, 1410 - volatile u16 *mrblr_register) 1406 + u16 __iomem *mrblr_register) 1411 1407 { 1412 1408 /* max_rx_buf_len value must be a multiple of 128 */ 1413 1409 if ((max_rx_buf_len == 0) ··· 1419 1415 } 1420 1416 1421 1417 static int init_min_frame_len(u16 min_frame_length, 1422 - volatile u16 *minflr_register, 1423 - volatile u16 *mrblr_register) 1418 + u16 __iomem *minflr_register, 1419 + u16 __iomem *mrblr_register) 1424 1420 { 1425 1421 u16 mrblr_value = 0; 1426 1422 ··· 1435 1431 static int adjust_enet_interface(struct ucc_geth_private *ugeth) 1436 1432 { 1437 1433 struct ucc_geth_info *ug_info; 1438 - struct ucc_geth *ug_regs; 1439 - struct ucc_fast *uf_regs; 1434 + struct ucc_geth __iomem *ug_regs; 1435 + struct ucc_fast __iomem *uf_regs; 1440 1436 int ret_val; 1441 1437 u32 upsmr, maccfg2, tbiBaseAddress; 1442 1438 u16 value; ··· 1521 1517 static void adjust_link(struct net_device *dev) 1522 1518 { 1523 1519 struct ucc_geth_private *ugeth = netdev_priv(dev); 1524 - struct ucc_geth *ug_regs; 1525 - struct ucc_fast *uf_regs; 1520 + struct ucc_geth __iomem *ug_regs; 1521 + struct ucc_fast __iomem *uf_regs; 1526 1522 struct phy_device *phydev = ugeth->phydev; 1527 1523 unsigned long flags; 1528 1524 int new_state = 0; ··· 1682 1678 uccf = ugeth->uccf; 1683 1679 1684 1680 /* Clear acknowledge bit */ 1685 - temp = ugeth->p_rx_glbl_pram->rxgstpack; 1681 + temp = in_8(&ugeth->p_rx_glbl_pram->rxgstpack); 1686 1682 temp &= ~GRACEFUL_STOP_ACKNOWLEDGE_RX; 1687 - ugeth->p_rx_glbl_pram->rxgstpack = temp; 1683 + out_8(&ugeth->p_rx_glbl_pram->rxgstpack, temp); 1688 1684 1689 1685 /* Keep issuing command and checking acknowledge bit until 1690 1686 it is asserted, according to spec */ ··· 1696 1692 qe_issue_cmd(QE_GRACEFUL_STOP_RX, cecr_subblock, 1697 1693 QE_CR_PROTOCOL_ETHERNET, 0); 1698 1694 1699 - temp = ugeth->p_rx_glbl_pram->rxgstpack; 1695 + temp = in_8(&ugeth->p_rx_glbl_pram->rxgstpack); 1700 1696 } while (!(temp & GRACEFUL_STOP_ACKNOWLEDGE_RX)); 1701 1697 1702 1698 uccf->stopped_rx = 1; ··· 1995 1991 enum enet_addr_type 1996 1992 enet_addr_type) 1997 1993 { 1998 - struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt; 1994 + struct ucc_geth_82xx_address_filtering_pram __iomem *p_82xx_addr_filt; 1999 1995 struct ucc_fast_private *uccf; 2000 1996 enum comm_dir comm_dir; 2001 1997 struct list_head *p_lh; 2002 1998 u16 i, num; 2003 - u32 *addr_h, *addr_l; 1999 + u32 __iomem *addr_h; 2000 + u32 __iomem *addr_l; 2004 2001 u8 *p_counter; 2005 2002 2006 2003 uccf = ugeth->uccf; 2007 2004 2008 2005 p_82xx_addr_filt = 2009 - (struct ucc_geth_82xx_address_filtering_pram *) ugeth->p_rx_glbl_pram-> 2010 - addressfiltering; 2006 + (struct ucc_geth_82xx_address_filtering_pram __iomem *) 2007 + ugeth->p_rx_glbl_pram->addressfiltering; 2011 2008 2012 2009 if (enet_addr_type == ENET_ADDR_TYPE_GROUP) { 2013 2010 addr_h = &(p_82xx_addr_filt->gaddr_h); ··· 2084 2079 static void ucc_geth_memclean(struct ucc_geth_private *ugeth) 2085 2080 { 2086 2081 u16 i, j; 2087 - u8 *bd; 2082 + u8 __iomem *bd; 2088 2083 2089 2084 if (!ugeth) 2090 2085 return; ··· 2159 2154 for (j = 0; j < ugeth->ug_info->bdRingLenTx[i]; j++) { 2160 2155 if (ugeth->tx_skbuff[i][j]) { 2161 2156 dma_unmap_single(NULL, 2162 - ((struct qe_bd *)bd)->buf, 2163 - (in_be32((u32 *)bd) & 2157 + in_be32(&((struct qe_bd __iomem *)bd)->buf), 2158 + (in_be32((u32 __iomem *)bd) & 2164 2159 BD_LENGTH_MASK), 2165 2160 DMA_TO_DEVICE); 2166 2161 dev_kfree_skb_any(ugeth->tx_skbuff[i][j]); ··· 2187 2182 for (j = 0; j < ugeth->ug_info->bdRingLenRx[i]; j++) { 2188 2183 if (ugeth->rx_skbuff[i][j]) { 2189 2184 dma_unmap_single(NULL, 2190 - ((struct qe_bd *)bd)->buf, 2185 + in_be32(&((struct qe_bd __iomem *)bd)->buf), 2191 2186 ugeth->ug_info-> 2192 2187 uf_info.max_rx_buf_length + 2193 2188 UCC_GETH_RX_DATA_BUF_ALIGNMENT, ··· 2223 2218 { 2224 2219 struct ucc_geth_private *ugeth; 2225 2220 struct dev_mc_list *dmi; 2226 - struct ucc_fast *uf_regs; 2227 - struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt; 2221 + struct ucc_fast __iomem *uf_regs; 2222 + struct ucc_geth_82xx_address_filtering_pram __iomem *p_82xx_addr_filt; 2228 2223 int i; 2229 2224 2230 2225 ugeth = netdev_priv(dev); ··· 2233 2228 2234 2229 if (dev->flags & IFF_PROMISC) { 2235 2230 2236 - uf_regs->upsmr |= UPSMR_PRO; 2231 + out_be32(&uf_regs->upsmr, in_be32(&uf_regs->upsmr) | UPSMR_PRO); 2237 2232 2238 2233 } else { 2239 2234 2240 - uf_regs->upsmr &= ~UPSMR_PRO; 2235 + out_be32(&uf_regs->upsmr, in_be32(&uf_regs->upsmr)&~UPSMR_PRO); 2241 2236 2242 2237 p_82xx_addr_filt = 2243 - (struct ucc_geth_82xx_address_filtering_pram *) ugeth-> 2238 + (struct ucc_geth_82xx_address_filtering_pram __iomem *) ugeth-> 2244 2239 p_rx_glbl_pram->addressfiltering; 2245 2240 2246 2241 if (dev->flags & IFF_ALLMULTI) { ··· 2275 2270 2276 2271 static void ucc_geth_stop(struct ucc_geth_private *ugeth) 2277 2272 { 2278 - struct ucc_geth *ug_regs = ugeth->ug_regs; 2273 + struct ucc_geth __iomem *ug_regs = ugeth->ug_regs; 2279 2274 struct phy_device *phydev = ugeth->phydev; 2280 2275 u32 tempval; 2281 2276 ··· 2424 2419 return -ENOMEM; 2425 2420 } 2426 2421 2427 - ugeth->ug_regs = (struct ucc_geth *) ioremap(uf_info->regs, sizeof(struct ucc_geth)); 2422 + ugeth->ug_regs = (struct ucc_geth __iomem *) ioremap(uf_info->regs, sizeof(struct ucc_geth)); 2428 2423 2429 2424 return 0; 2430 2425 } 2431 2426 2432 2427 static int ucc_geth_startup(struct ucc_geth_private *ugeth) 2433 2428 { 2434 - struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt; 2435 - struct ucc_geth_init_pram *p_init_enet_pram; 2429 + struct ucc_geth_82xx_address_filtering_pram __iomem *p_82xx_addr_filt; 2430 + struct ucc_geth_init_pram __iomem *p_init_enet_pram; 2436 2431 struct ucc_fast_private *uccf; 2437 2432 struct ucc_geth_info *ug_info; 2438 2433 struct ucc_fast_info *uf_info; 2439 - struct ucc_fast *uf_regs; 2440 - struct ucc_geth *ug_regs; 2434 + struct ucc_fast __iomem *uf_regs; 2435 + struct ucc_geth __iomem *ug_regs; 2441 2436 int ret_val = -EINVAL; 2442 2437 u32 remoder = UCC_GETH_REMODER_INIT; 2443 2438 u32 init_enet_pram_offset, cecr_subblock, command, maccfg1; ··· 2445 2440 u16 temoder = UCC_GETH_TEMODER_INIT; 2446 2441 u16 test; 2447 2442 u8 function_code = 0; 2448 - u8 *bd, *endOfRing; 2443 + u8 __iomem *bd; 2444 + u8 __iomem *endOfRing; 2449 2445 u8 numThreadsRxNumerical, numThreadsTxNumerical; 2450 2446 2451 2447 ugeth_vdbg("%s: IN", __FUNCTION__); ··· 2608 2602 if (UCC_GETH_TX_BD_RING_ALIGNMENT > 4) 2609 2603 align = UCC_GETH_TX_BD_RING_ALIGNMENT; 2610 2604 ugeth->tx_bd_ring_offset[j] = 2611 - kmalloc((u32) (length + align), GFP_KERNEL); 2605 + (u32) kmalloc((u32) (length + align), GFP_KERNEL); 2612 2606 2613 2607 if (ugeth->tx_bd_ring_offset[j] != 0) 2614 2608 ugeth->p_tx_bd_ring[j] = 2615 - (void*)((ugeth->tx_bd_ring_offset[j] + 2609 + (u8 __iomem *)((ugeth->tx_bd_ring_offset[j] + 2616 2610 align) & ~(align - 1)); 2617 2611 } else if (uf_info->bd_mem_part == MEM_PART_MURAM) { 2618 2612 ugeth->tx_bd_ring_offset[j] = ··· 2620 2614 UCC_GETH_TX_BD_RING_ALIGNMENT); 2621 2615 if (!IS_ERR_VALUE(ugeth->tx_bd_ring_offset[j])) 2622 2616 ugeth->p_tx_bd_ring[j] = 2623 - (u8 *) qe_muram_addr(ugeth-> 2617 + (u8 __iomem *) qe_muram_addr(ugeth-> 2624 2618 tx_bd_ring_offset[j]); 2625 2619 } 2626 2620 if (!ugeth->p_tx_bd_ring[j]) { ··· 2632 2626 return -ENOMEM; 2633 2627 } 2634 2628 /* Zero unused end of bd ring, according to spec */ 2635 - memset(ugeth->p_tx_bd_ring[j] + 2636 - ug_info->bdRingLenTx[j] * sizeof(struct qe_bd), 0, 2629 + memset_io((void __iomem *)(ugeth->p_tx_bd_ring[j] + 2630 + ug_info->bdRingLenTx[j] * sizeof(struct qe_bd)), 0, 2637 2631 length - ug_info->bdRingLenTx[j] * sizeof(struct qe_bd)); 2638 2632 } 2639 2633 ··· 2645 2639 if (UCC_GETH_RX_BD_RING_ALIGNMENT > 4) 2646 2640 align = UCC_GETH_RX_BD_RING_ALIGNMENT; 2647 2641 ugeth->rx_bd_ring_offset[j] = 2648 - kmalloc((u32) (length + align), GFP_KERNEL); 2642 + (u32) kmalloc((u32) (length + align), GFP_KERNEL); 2649 2643 if (ugeth->rx_bd_ring_offset[j] != 0) 2650 2644 ugeth->p_rx_bd_ring[j] = 2651 - (void*)((ugeth->rx_bd_ring_offset[j] + 2645 + (u8 __iomem *)((ugeth->rx_bd_ring_offset[j] + 2652 2646 align) & ~(align - 1)); 2653 2647 } else if (uf_info->bd_mem_part == MEM_PART_MURAM) { 2654 2648 ugeth->rx_bd_ring_offset[j] = ··· 2656 2650 UCC_GETH_RX_BD_RING_ALIGNMENT); 2657 2651 if (!IS_ERR_VALUE(ugeth->rx_bd_ring_offset[j])) 2658 2652 ugeth->p_rx_bd_ring[j] = 2659 - (u8 *) qe_muram_addr(ugeth-> 2653 + (u8 __iomem *) qe_muram_addr(ugeth-> 2660 2654 rx_bd_ring_offset[j]); 2661 2655 } 2662 2656 if (!ugeth->p_rx_bd_ring[j]) { ··· 2691 2685 bd = ugeth->confBd[j] = ugeth->txBd[j] = ugeth->p_tx_bd_ring[j]; 2692 2686 for (i = 0; i < ug_info->bdRingLenTx[j]; i++) { 2693 2687 /* clear bd buffer */ 2694 - out_be32(&((struct qe_bd *)bd)->buf, 0); 2688 + out_be32(&((struct qe_bd __iomem *)bd)->buf, 0); 2695 2689 /* set bd status and length */ 2696 - out_be32((u32 *)bd, 0); 2690 + out_be32((u32 __iomem *)bd, 0); 2697 2691 bd += sizeof(struct qe_bd); 2698 2692 } 2699 2693 bd -= sizeof(struct qe_bd); 2700 2694 /* set bd status and length */ 2701 - out_be32((u32 *)bd, T_W); /* for last BD set Wrap bit */ 2695 + out_be32((u32 __iomem *)bd, T_W); /* for last BD set Wrap bit */ 2702 2696 } 2703 2697 2704 2698 /* Init Rx bds */ ··· 2723 2717 bd = ugeth->rxBd[j] = ugeth->p_rx_bd_ring[j]; 2724 2718 for (i = 0; i < ug_info->bdRingLenRx[j]; i++) { 2725 2719 /* set bd status and length */ 2726 - out_be32((u32 *)bd, R_I); 2720 + out_be32((u32 __iomem *)bd, R_I); 2727 2721 /* clear bd buffer */ 2728 - out_be32(&((struct qe_bd *)bd)->buf, 0); 2722 + out_be32(&((struct qe_bd __iomem *)bd)->buf, 0); 2729 2723 bd += sizeof(struct qe_bd); 2730 2724 } 2731 2725 bd -= sizeof(struct qe_bd); 2732 2726 /* set bd status and length */ 2733 - out_be32((u32 *)bd, R_W); /* for last BD set Wrap bit */ 2727 + out_be32((u32 __iomem *)bd, R_W); /* for last BD set Wrap bit */ 2734 2728 } 2735 2729 2736 2730 /* ··· 2750 2744 return -ENOMEM; 2751 2745 } 2752 2746 ugeth->p_tx_glbl_pram = 2753 - (struct ucc_geth_tx_global_pram *) qe_muram_addr(ugeth-> 2747 + (struct ucc_geth_tx_global_pram __iomem *) qe_muram_addr(ugeth-> 2754 2748 tx_glbl_pram_offset); 2755 2749 /* Zero out p_tx_glbl_pram */ 2756 - memset(ugeth->p_tx_glbl_pram, 0, sizeof(struct ucc_geth_tx_global_pram)); 2750 + memset_io((void __iomem *)ugeth->p_tx_glbl_pram, 0, sizeof(struct ucc_geth_tx_global_pram)); 2757 2751 2758 2752 /* Fill global PRAM */ 2759 2753 ··· 2774 2768 } 2775 2769 2776 2770 ugeth->p_thread_data_tx = 2777 - (struct ucc_geth_thread_data_tx *) qe_muram_addr(ugeth-> 2771 + (struct ucc_geth_thread_data_tx __iomem *) qe_muram_addr(ugeth-> 2778 2772 thread_dat_tx_offset); 2779 2773 out_be32(&ugeth->p_tx_glbl_pram->tqptr, ugeth->thread_dat_tx_offset); 2780 2774 ··· 2785 2779 2786 2780 /* iphoffset */ 2787 2781 for (i = 0; i < TX_IP_OFFSET_ENTRY_MAX; i++) 2788 - ugeth->p_tx_glbl_pram->iphoffset[i] = ug_info->iphoffset[i]; 2782 + out_8(&ugeth->p_tx_glbl_pram->iphoffset[i], 2783 + ug_info->iphoffset[i]); 2789 2784 2790 2785 /* SQPTR */ 2791 2786 /* Size varies with number of Tx queues */ ··· 2804 2797 } 2805 2798 2806 2799 ugeth->p_send_q_mem_reg = 2807 - (struct ucc_geth_send_queue_mem_region *) qe_muram_addr(ugeth-> 2800 + (struct ucc_geth_send_queue_mem_region __iomem *) qe_muram_addr(ugeth-> 2808 2801 send_q_mem_reg_offset); 2809 2802 out_be32(&ugeth->p_tx_glbl_pram->sqptr, ugeth->send_q_mem_reg_offset); 2810 2803 ··· 2848 2841 } 2849 2842 2850 2843 ugeth->p_scheduler = 2851 - (struct ucc_geth_scheduler *) qe_muram_addr(ugeth-> 2844 + (struct ucc_geth_scheduler __iomem *) qe_muram_addr(ugeth-> 2852 2845 scheduler_offset); 2853 2846 out_be32(&ugeth->p_tx_glbl_pram->schedulerbasepointer, 2854 2847 ugeth->scheduler_offset); 2855 2848 /* Zero out p_scheduler */ 2856 - memset(ugeth->p_scheduler, 0, sizeof(struct ucc_geth_scheduler)); 2849 + memset_io((void __iomem *)ugeth->p_scheduler, 0, sizeof(struct ucc_geth_scheduler)); 2857 2850 2858 2851 /* Set values in scheduler */ 2859 2852 out_be32(&ugeth->p_scheduler->mblinterval, 2860 2853 ug_info->mblinterval); 2861 2854 out_be16(&ugeth->p_scheduler->nortsrbytetime, 2862 2855 ug_info->nortsrbytetime); 2863 - ugeth->p_scheduler->fracsiz = ug_info->fracsiz; 2864 - ugeth->p_scheduler->strictpriorityq = ug_info->strictpriorityq; 2865 - ugeth->p_scheduler->txasap = ug_info->txasap; 2866 - ugeth->p_scheduler->extrabw = ug_info->extrabw; 2856 + out_8(&ugeth->p_scheduler->fracsiz, ug_info->fracsiz); 2857 + out_8(&ugeth->p_scheduler->strictpriorityq, 2858 + ug_info->strictpriorityq); 2859 + out_8(&ugeth->p_scheduler->txasap, ug_info->txasap); 2860 + out_8(&ugeth->p_scheduler->extrabw, ug_info->extrabw); 2867 2861 for (i = 0; i < NUM_TX_QUEUES; i++) 2868 - ugeth->p_scheduler->weightfactor[i] = 2869 - ug_info->weightfactor[i]; 2862 + out_8(&ugeth->p_scheduler->weightfactor[i], 2863 + ug_info->weightfactor[i]); 2870 2864 2871 2865 /* Set pointers to cpucount registers in scheduler */ 2872 2866 ugeth->p_cpucount[0] = &(ugeth->p_scheduler->cpucount0); ··· 2898 2890 return -ENOMEM; 2899 2891 } 2900 2892 ugeth->p_tx_fw_statistics_pram = 2901 - (struct ucc_geth_tx_firmware_statistics_pram *) 2893 + (struct ucc_geth_tx_firmware_statistics_pram __iomem *) 2902 2894 qe_muram_addr(ugeth->tx_fw_statistics_pram_offset); 2903 2895 /* Zero out p_tx_fw_statistics_pram */ 2904 - memset(ugeth->p_tx_fw_statistics_pram, 2896 + memset_io((void __iomem *)ugeth->p_tx_fw_statistics_pram, 2905 2897 0, sizeof(struct ucc_geth_tx_firmware_statistics_pram)); 2906 2898 } 2907 2899 ··· 2938 2930 return -ENOMEM; 2939 2931 } 2940 2932 ugeth->p_rx_glbl_pram = 2941 - (struct ucc_geth_rx_global_pram *) qe_muram_addr(ugeth-> 2933 + (struct ucc_geth_rx_global_pram __iomem *) qe_muram_addr(ugeth-> 2942 2934 rx_glbl_pram_offset); 2943 2935 /* Zero out p_rx_glbl_pram */ 2944 - memset(ugeth->p_rx_glbl_pram, 0, sizeof(struct ucc_geth_rx_global_pram)); 2936 + memset_io((void __iomem *)ugeth->p_rx_glbl_pram, 0, sizeof(struct ucc_geth_rx_global_pram)); 2945 2937 2946 2938 /* Fill global PRAM */ 2947 2939 ··· 2961 2953 } 2962 2954 2963 2955 ugeth->p_thread_data_rx = 2964 - (struct ucc_geth_thread_data_rx *) qe_muram_addr(ugeth-> 2956 + (struct ucc_geth_thread_data_rx __iomem *) qe_muram_addr(ugeth-> 2965 2957 thread_dat_rx_offset); 2966 2958 out_be32(&ugeth->p_rx_glbl_pram->rqptr, ugeth->thread_dat_rx_offset); 2967 2959 ··· 2984 2976 return -ENOMEM; 2985 2977 } 2986 2978 ugeth->p_rx_fw_statistics_pram = 2987 - (struct ucc_geth_rx_firmware_statistics_pram *) 2979 + (struct ucc_geth_rx_firmware_statistics_pram __iomem *) 2988 2980 qe_muram_addr(ugeth->rx_fw_statistics_pram_offset); 2989 2981 /* Zero out p_rx_fw_statistics_pram */ 2990 - memset(ugeth->p_rx_fw_statistics_pram, 0, 2982 + memset_io((void __iomem *)ugeth->p_rx_fw_statistics_pram, 0, 2991 2983 sizeof(struct ucc_geth_rx_firmware_statistics_pram)); 2992 2984 } 2993 2985 ··· 3008 3000 } 3009 3001 3010 3002 ugeth->p_rx_irq_coalescing_tbl = 3011 - (struct ucc_geth_rx_interrupt_coalescing_table *) 3003 + (struct ucc_geth_rx_interrupt_coalescing_table __iomem *) 3012 3004 qe_muram_addr(ugeth->rx_irq_coalescing_tbl_offset); 3013 3005 out_be32(&ugeth->p_rx_glbl_pram->intcoalescingptr, 3014 3006 ugeth->rx_irq_coalescing_tbl_offset); ··· 3077 3069 } 3078 3070 3079 3071 ugeth->p_rx_bd_qs_tbl = 3080 - (struct ucc_geth_rx_bd_queues_entry *) qe_muram_addr(ugeth-> 3072 + (struct ucc_geth_rx_bd_queues_entry __iomem *) qe_muram_addr(ugeth-> 3081 3073 rx_bd_qs_tbl_offset); 3082 3074 out_be32(&ugeth->p_rx_glbl_pram->rbdqptr, ugeth->rx_bd_qs_tbl_offset); 3083 3075 /* Zero out p_rx_bd_qs_tbl */ 3084 - memset(ugeth->p_rx_bd_qs_tbl, 3076 + memset_io((void __iomem *)ugeth->p_rx_bd_qs_tbl, 3085 3077 0, 3086 3078 ug_info->numQueuesRx * (sizeof(struct ucc_geth_rx_bd_queues_entry) + 3087 3079 sizeof(struct ucc_geth_rx_prefetched_bds))); ··· 3141 3133 &ugeth->p_rx_glbl_pram->remoder); 3142 3134 3143 3135 /* function code register */ 3144 - ugeth->p_rx_glbl_pram->rstate = function_code; 3136 + out_8(&ugeth->p_rx_glbl_pram->rstate, function_code); 3145 3137 3146 3138 /* initialize extended filtering */ 3147 3139 if (ug_info->rxExtendedFiltering) { ··· 3168 3160 } 3169 3161 3170 3162 ugeth->p_exf_glbl_param = 3171 - (struct ucc_geth_exf_global_pram *) qe_muram_addr(ugeth-> 3163 + (struct ucc_geth_exf_global_pram __iomem *) qe_muram_addr(ugeth-> 3172 3164 exf_glbl_param_offset); 3173 3165 out_be32(&ugeth->p_rx_glbl_pram->exfGlobalParam, 3174 3166 ugeth->exf_glbl_param_offset); ··· 3183 3175 ugeth_82xx_filtering_clear_addr_in_paddr(ugeth, (u8) j); 3184 3176 3185 3177 p_82xx_addr_filt = 3186 - (struct ucc_geth_82xx_address_filtering_pram *) ugeth-> 3178 + (struct ucc_geth_82xx_address_filtering_pram __iomem *) ugeth-> 3187 3179 p_rx_glbl_pram->addressfiltering; 3188 3180 3189 3181 ugeth_82xx_filtering_clear_all_addr_in_hash(ugeth, ··· 3315 3307 return -ENOMEM; 3316 3308 } 3317 3309 p_init_enet_pram = 3318 - (struct ucc_geth_init_pram *) qe_muram_addr(init_enet_pram_offset); 3310 + (struct ucc_geth_init_pram __iomem *) qe_muram_addr(init_enet_pram_offset); 3319 3311 3320 3312 /* Copy shadow InitEnet command parameter structure into PRAM */ 3321 - p_init_enet_pram->resinit1 = ugeth->p_init_enet_param_shadow->resinit1; 3322 - p_init_enet_pram->resinit2 = ugeth->p_init_enet_param_shadow->resinit2; 3323 - p_init_enet_pram->resinit3 = ugeth->p_init_enet_param_shadow->resinit3; 3324 - p_init_enet_pram->resinit4 = ugeth->p_init_enet_param_shadow->resinit4; 3313 + out_8(&p_init_enet_pram->resinit1, 3314 + ugeth->p_init_enet_param_shadow->resinit1); 3315 + out_8(&p_init_enet_pram->resinit2, 3316 + ugeth->p_init_enet_param_shadow->resinit2); 3317 + out_8(&p_init_enet_pram->resinit3, 3318 + ugeth->p_init_enet_param_shadow->resinit3); 3319 + out_8(&p_init_enet_pram->resinit4, 3320 + ugeth->p_init_enet_param_shadow->resinit4); 3325 3321 out_be16(&p_init_enet_pram->resinit5, 3326 3322 ugeth->p_init_enet_param_shadow->resinit5); 3327 - p_init_enet_pram->largestexternallookupkeysize = 3328 - ugeth->p_init_enet_param_shadow->largestexternallookupkeysize; 3323 + out_8(&p_init_enet_pram->largestexternallookupkeysize, 3324 + ugeth->p_init_enet_param_shadow->largestexternallookupkeysize); 3329 3325 out_be32(&p_init_enet_pram->rgftgfrxglobal, 3330 3326 ugeth->p_init_enet_param_shadow->rgftgfrxglobal); 3331 3327 for (i = 0; i < ENET_INIT_PARAM_MAX_ENTRIES_RX; i++) ··· 3383 3371 #ifdef CONFIG_UGETH_TX_ON_DEMAND 3384 3372 struct ucc_fast_private *uccf; 3385 3373 #endif 3386 - u8 *bd; /* BD pointer */ 3374 + u8 __iomem *bd; /* BD pointer */ 3387 3375 u32 bd_status; 3388 3376 u8 txQ = 0; 3389 3377 ··· 3395 3383 3396 3384 /* Start from the next BD that should be filled */ 3397 3385 bd = ugeth->txBd[txQ]; 3398 - bd_status = in_be32((u32 *)bd); 3386 + bd_status = in_be32((u32 __iomem *)bd); 3399 3387 /* Save the skb pointer so we can free it later */ 3400 3388 ugeth->tx_skbuff[txQ][ugeth->skb_curtx[txQ]] = skb; 3401 3389 ··· 3405 3393 1) & TX_RING_MOD_MASK(ugeth->ug_info->bdRingLenTx[txQ]); 3406 3394 3407 3395 /* set up the buffer descriptor */ 3408 - out_be32(&((struct qe_bd *)bd)->buf, 3396 + out_be32(&((struct qe_bd __iomem *)bd)->buf, 3409 3397 dma_map_single(NULL, skb->data, skb->len, DMA_TO_DEVICE)); 3410 3398 3411 3399 /* printk(KERN_DEBUG"skb->data is 0x%x\n",skb->data); */ ··· 3413 3401 bd_status = (bd_status & T_W) | T_R | T_I | T_L | skb->len; 3414 3402 3415 3403 /* set bd status and length */ 3416 - out_be32((u32 *)bd, bd_status); 3404 + out_be32((u32 __iomem *)bd, bd_status); 3417 3405 3418 3406 dev->trans_start = jiffies; 3419 3407 ··· 3453 3441 static int ucc_geth_rx(struct ucc_geth_private *ugeth, u8 rxQ, int rx_work_limit) 3454 3442 { 3455 3443 struct sk_buff *skb; 3456 - u8 *bd; 3444 + u8 __iomem *bd; 3457 3445 u16 length, howmany = 0; 3458 3446 u32 bd_status; 3459 3447 u8 *bdBuffer; ··· 3466 3454 /* collect received buffers */ 3467 3455 bd = ugeth->rxBd[rxQ]; 3468 3456 3469 - bd_status = in_be32((u32 *)bd); 3457 + bd_status = in_be32((u32 __iomem *)bd); 3470 3458 3471 3459 /* while there are received buffers and BD is full (~R_E) */ 3472 3460 while (!((bd_status & (R_E)) || (--rx_work_limit < 0))) { 3473 - bdBuffer = (u8 *) in_be32(&((struct qe_bd *)bd)->buf); 3461 + bdBuffer = (u8 *) in_be32(&((struct qe_bd __iomem *)bd)->buf); 3474 3462 length = (u16) ((bd_status & BD_LENGTH_MASK) - 4); 3475 3463 skb = ugeth->rx_skbuff[rxQ][ugeth->skb_currx[rxQ]]; 3476 3464 ··· 3528 3516 else 3529 3517 bd += sizeof(struct qe_bd); 3530 3518 3531 - bd_status = in_be32((u32 *)bd); 3519 + bd_status = in_be32((u32 __iomem *)bd); 3532 3520 } 3533 3521 3534 3522 ugeth->rxBd[rxQ] = bd; ··· 3539 3527 { 3540 3528 /* Start from the next BD that should be filled */ 3541 3529 struct ucc_geth_private *ugeth = netdev_priv(dev); 3542 - u8 *bd; /* BD pointer */ 3530 + u8 __iomem *bd; /* BD pointer */ 3543 3531 u32 bd_status; 3544 3532 3545 3533 bd = ugeth->confBd[txQ]; 3546 - bd_status = in_be32((u32 *)bd); 3534 + bd_status = in_be32((u32 __iomem *)bd); 3547 3535 3548 3536 /* Normal processing. */ 3549 3537 while ((bd_status & T_R) == 0) { ··· 3573 3561 bd += sizeof(struct qe_bd); 3574 3562 else 3575 3563 bd = ugeth->p_tx_bd_ring[txQ]; 3576 - bd_status = in_be32((u32 *)bd); 3564 + bd_status = in_be32((u32 __iomem *)bd); 3577 3565 } 3578 3566 ugeth->confBd[txQ] = bd; 3579 3567 return 0;
+28 -20
drivers/net/ucc_geth.h
··· 700 700 u32 iaddr_l; /* individual address filter, low */ 701 701 u32 gaddr_h; /* group address filter, high */ 702 702 u32 gaddr_l; /* group address filter, low */ 703 - struct ucc_geth_82xx_enet_address taddr; 704 - struct ucc_geth_82xx_enet_address paddr[NUM_OF_PADDRS]; 703 + struct ucc_geth_82xx_enet_address __iomem taddr; 704 + struct ucc_geth_82xx_enet_address __iomem paddr[NUM_OF_PADDRS]; 705 705 u8 res0[0x40 - 0x38]; 706 706 } __attribute__ ((packed)); 707 707 ··· 1186 1186 struct ucc_fast_private *uccf; 1187 1187 struct net_device *dev; 1188 1188 struct napi_struct napi; 1189 - struct ucc_geth *ug_regs; 1189 + struct ucc_geth __iomem *ug_regs; 1190 1190 struct ucc_geth_init_pram *p_init_enet_param_shadow; 1191 - struct ucc_geth_exf_global_pram *p_exf_glbl_param; 1191 + struct ucc_geth_exf_global_pram __iomem *p_exf_glbl_param; 1192 1192 u32 exf_glbl_param_offset; 1193 - struct ucc_geth_rx_global_pram *p_rx_glbl_pram; 1193 + struct ucc_geth_rx_global_pram __iomem *p_rx_glbl_pram; 1194 1194 u32 rx_glbl_pram_offset; 1195 - struct ucc_geth_tx_global_pram *p_tx_glbl_pram; 1195 + struct ucc_geth_tx_global_pram __iomem *p_tx_glbl_pram; 1196 1196 u32 tx_glbl_pram_offset; 1197 - struct ucc_geth_send_queue_mem_region *p_send_q_mem_reg; 1197 + struct ucc_geth_send_queue_mem_region __iomem *p_send_q_mem_reg; 1198 1198 u32 send_q_mem_reg_offset; 1199 - struct ucc_geth_thread_data_tx *p_thread_data_tx; 1199 + struct ucc_geth_thread_data_tx __iomem *p_thread_data_tx; 1200 1200 u32 thread_dat_tx_offset; 1201 - struct ucc_geth_thread_data_rx *p_thread_data_rx; 1201 + struct ucc_geth_thread_data_rx __iomem *p_thread_data_rx; 1202 1202 u32 thread_dat_rx_offset; 1203 - struct ucc_geth_scheduler *p_scheduler; 1203 + struct ucc_geth_scheduler __iomem *p_scheduler; 1204 1204 u32 scheduler_offset; 1205 - struct ucc_geth_tx_firmware_statistics_pram *p_tx_fw_statistics_pram; 1205 + struct ucc_geth_tx_firmware_statistics_pram __iomem *p_tx_fw_statistics_pram; 1206 1206 u32 tx_fw_statistics_pram_offset; 1207 - struct ucc_geth_rx_firmware_statistics_pram *p_rx_fw_statistics_pram; 1207 + struct ucc_geth_rx_firmware_statistics_pram __iomem *p_rx_fw_statistics_pram; 1208 1208 u32 rx_fw_statistics_pram_offset; 1209 - struct ucc_geth_rx_interrupt_coalescing_table *p_rx_irq_coalescing_tbl; 1209 + struct ucc_geth_rx_interrupt_coalescing_table __iomem *p_rx_irq_coalescing_tbl; 1210 1210 u32 rx_irq_coalescing_tbl_offset; 1211 - struct ucc_geth_rx_bd_queues_entry *p_rx_bd_qs_tbl; 1211 + struct ucc_geth_rx_bd_queues_entry __iomem *p_rx_bd_qs_tbl; 1212 1212 u32 rx_bd_qs_tbl_offset; 1213 - u8 *p_tx_bd_ring[NUM_TX_QUEUES]; 1213 + u8 __iomem *p_tx_bd_ring[NUM_TX_QUEUES]; 1214 1214 u32 tx_bd_ring_offset[NUM_TX_QUEUES]; 1215 - u8 *p_rx_bd_ring[NUM_RX_QUEUES]; 1215 + u8 __iomem *p_rx_bd_ring[NUM_RX_QUEUES]; 1216 1216 u32 rx_bd_ring_offset[NUM_RX_QUEUES]; 1217 - u8 *confBd[NUM_TX_QUEUES]; 1218 - u8 *txBd[NUM_TX_QUEUES]; 1219 - u8 *rxBd[NUM_RX_QUEUES]; 1217 + u8 __iomem *confBd[NUM_TX_QUEUES]; 1218 + u8 __iomem *txBd[NUM_TX_QUEUES]; 1219 + u8 __iomem *rxBd[NUM_RX_QUEUES]; 1220 1220 int badFrame[NUM_RX_QUEUES]; 1221 1221 u16 cpucount[NUM_TX_QUEUES]; 1222 - volatile u16 *p_cpucount[NUM_TX_QUEUES]; 1222 + u16 __iomem *p_cpucount[NUM_TX_QUEUES]; 1223 1223 int indAddrRegUsed[NUM_OF_PADDRS]; 1224 1224 u8 paddr[NUM_OF_PADDRS][ENET_NUM_OCTETS_PER_ADDRESS]; /* ethernet address */ 1225 1225 u8 numGroupAddrInHash; ··· 1250 1250 int oldduplex; 1251 1251 int oldlink; 1252 1252 }; 1253 + 1254 + void uec_set_ethtool_ops(struct net_device *netdev); 1255 + int init_flow_control_params(u32 automatic_flow_control_mode, 1256 + int rx_flow_control_enable, int tx_flow_control_enable, 1257 + u16 pause_period, u16 extension_field, 1258 + u32 __iomem *upsmr_register, u32 __iomem *uempr_register, 1259 + u32 __iomem *maccfg1_register); 1260 + 1253 1261 1254 1262 #endif /* __UCC_GETH_H__ */
-6
drivers/net/ucc_geth_ethtool.c
··· 108 108 #define UEC_TX_FW_STATS_LEN ARRAY_SIZE(tx_fw_stat_gstrings) 109 109 #define UEC_RX_FW_STATS_LEN ARRAY_SIZE(rx_fw_stat_gstrings) 110 110 111 - extern int init_flow_control_params(u32 automatic_flow_control_mode, 112 - int rx_flow_control_enable, 113 - int tx_flow_control_enable, u16 pause_period, 114 - u16 extension_field, volatile u32 *upsmr_register, 115 - volatile u32 *uempr_register, volatile u32 *maccfg1_register); 116 - 117 111 static int 118 112 uec_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) 119 113 {
+2 -2
drivers/net/ucc_geth_mii.c
··· 104 104 } 105 105 106 106 /* Reset the MIIM registers, and wait for the bus to free */ 107 - int uec_mdio_reset(struct mii_bus *bus) 107 + static int uec_mdio_reset(struct mii_bus *bus) 108 108 { 109 109 struct ucc_mii_mng __iomem *regs = (void __iomem *)bus->priv; 110 110 unsigned int timeout = PHY_INIT_TIMEOUT; ··· 240 240 return err; 241 241 } 242 242 243 - int uec_mdio_remove(struct of_device *ofdev) 243 + static int uec_mdio_remove(struct of_device *ofdev) 244 244 { 245 245 struct device *device = &ofdev->dev; 246 246 struct mii_bus *bus = dev_get_drvdata(device);