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kernel
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linux
regulator: Add driver for MT6331 PMIC regulators
Add a driver for the regulators found in the MT6331 PMIC.
This PMIC features six buck and 21 Low DropOut (LDO) regulators.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220913123456.384513-3-angelogioacchino.delregno@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
authored by
AngeloGioacchino Del Regno
and committed by
Mark Brown
6f7a71f8
6385e216
+563
+9
drivers/regulator/Kconfig
+9
drivers/regulator/Kconfig
···
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This driver supports the control of different power rails of device
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through regulator interface.
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config REGULATOR_MT6331
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tristate "MediaTek MT6331 PMIC"
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depends on MFD_MT6397
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help
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Say y here to select this option to enable the power regulator of
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MediaTek MT6331 PMIC.
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This driver supports the control of different power rails of device
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through regulator interface
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config REGULATOR_MT6358
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tristate "MediaTek MT6358 PMIC"
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depends on MFD_MT6397
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drivers/regulator/Makefile
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drivers/regulator/Makefile
···
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obj-$(CONFIG_REGULATOR_MT6311) += mt6311-regulator.o
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obj-$(CONFIG_REGULATOR_MT6315) += mt6315-regulator.o
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obj-$(CONFIG_REGULATOR_MT6323) += mt6323-regulator.o
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obj-$(CONFIG_REGULATOR_MT6331) += mt6331-regulator.o
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obj-$(CONFIG_REGULATOR_MT6358) += mt6358-regulator.o
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obj-$(CONFIG_REGULATOR_MT6359) += mt6359-regulator.o
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obj-$(CONFIG_REGULATOR_MT6360) += mt6360-regulator.o
+507
drivers/regulator/mt6331-regulator.c
+507
drivers/regulator/mt6331-regulator.c
···
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// SPDX-License-Identifier: GPL-2.0
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//
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// Copyright (c) 2022 Collabora Ltd.
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// Author: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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//
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// Based on mt6323-regulator.c,
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// Copyright (c) 2016 MediaTek Inc.
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//
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/mfd/mt6397/core.h>
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#include <linux/mfd/mt6331/registers.h>
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#include <linux/regulator/driver.h>
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#include <linux/regulator/machine.h>
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#include <linux/regulator/mt6331-regulator.h>
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#include <linux/regulator/of_regulator.h>
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+
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#define MT6331_LDO_MODE_NORMAL 0
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#define MT6331_LDO_MODE_LP 1
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+
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/*
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* MT6331 regulators information
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*
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* @desc: standard fields of regulator description.
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* @qi: Mask for query enable signal status of regulators
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* @vselon_reg: Register sections for hardware control mode of bucks
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* @vselctrl_reg: Register for controlling the buck control mode.
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* @vselctrl_mask: Mask for query buck's voltage control mode.
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* @status_reg: Register for regulator enable status where qi unavailable
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* @status_mask: Mask for querying regulator enable status
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*/
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struct mt6331_regulator_info {
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struct regulator_desc desc;
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u32 qi;
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u32 vselon_reg;
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u32 vselctrl_reg;
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u32 vselctrl_mask;
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u32 modeset_reg;
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u32 modeset_mask;
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u32 status_reg;
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u32 status_mask;
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};
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+
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#define MT6331_BUCK(match, vreg, min, max, step, volt_ranges, enreg, \
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vosel, vosel_mask, voselon, vosel_ctrl) \
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[MT6331_ID_##vreg] = { \
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.desc = { \
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.name = #vreg, \
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.of_match = of_match_ptr(match), \
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.ops = &mt6331_volt_range_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = MT6331_ID_##vreg, \
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.owner = THIS_MODULE, \
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.n_voltages = (max - min)/step + 1, \
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.linear_ranges = volt_ranges, \
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.n_linear_ranges = ARRAY_SIZE(volt_ranges), \
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.vsel_reg = vosel, \
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.vsel_mask = vosel_mask, \
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.enable_reg = enreg, \
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.enable_mask = BIT(0), \
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}, \
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.qi = BIT(13), \
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.vselon_reg = voselon, \
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.vselctrl_reg = vosel_ctrl, \
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.vselctrl_mask = BIT(1), \
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.status_mask = 0, \
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}
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+
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#define MT6331_LDO_AO(match, vreg, ldo_volt_table, vosel, vosel_mask) \
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[MT6331_ID_##vreg] = { \
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.desc = { \
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.name = #vreg, \
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.of_match = of_match_ptr(match), \
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.ops = &mt6331_volt_table_ao_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = MT6331_ID_##vreg, \
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.owner = THIS_MODULE, \
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.n_voltages = ARRAY_SIZE(ldo_volt_table), \
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.volt_table = ldo_volt_table, \
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.vsel_reg = vosel, \
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.vsel_mask = vosel_mask, \
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}, \
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}
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#define MT6331_LDO_S(match, vreg, ldo_volt_table, enreg, enbit, vosel, \
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vosel_mask, _modeset_reg, _modeset_mask, \
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_status_reg, _status_mask) \
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[MT6331_ID_##vreg] = { \
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.desc = { \
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.name = #vreg, \
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.of_match = of_match_ptr(match), \
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.ops = &mt6331_volt_table_no_qi_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = MT6331_ID_##vreg, \
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.owner = THIS_MODULE, \
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.n_voltages = ARRAY_SIZE(ldo_volt_table), \
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.volt_table = ldo_volt_table, \
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.vsel_reg = vosel, \
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.vsel_mask = vosel_mask, \
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.enable_reg = enreg, \
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.enable_mask = BIT(enbit), \
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}, \
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.modeset_reg = _modeset_reg, \
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.modeset_mask = _modeset_mask, \
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.status_reg = _status_reg, \
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.status_mask = _status_mask, \
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}
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#define MT6331_LDO(match, vreg, ldo_volt_table, enreg, enbit, vosel, \
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vosel_mask, _modeset_reg, _modeset_mask) \
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[MT6331_ID_##vreg] = { \
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.desc = { \
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.name = #vreg, \
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.of_match = of_match_ptr(match), \
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.ops = (_modeset_reg ? \
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&mt6331_volt_table_ops : \
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&mt6331_volt_table_no_ms_ops), \
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.type = REGULATOR_VOLTAGE, \
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.id = MT6331_ID_##vreg, \
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.owner = THIS_MODULE, \
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.n_voltages = ARRAY_SIZE(ldo_volt_table), \
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.volt_table = ldo_volt_table, \
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.vsel_reg = vosel, \
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.vsel_mask = vosel_mask, \
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.enable_reg = enreg, \
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.enable_mask = BIT(enbit), \
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}, \
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.qi = BIT(15), \
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.modeset_reg = _modeset_reg, \
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.modeset_mask = _modeset_mask, \
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}
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#define MT6331_REG_FIXED(match, vreg, enreg, enbit, qibit, volt, \
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_modeset_reg, _modeset_mask) \
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[MT6331_ID_##vreg] = { \
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.desc = { \
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.name = #vreg, \
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.of_match = of_match_ptr(match), \
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.ops = (_modeset_reg ? \
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&mt6331_volt_fixed_ops : \
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&mt6331_volt_fixed_no_ms_ops), \
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.type = REGULATOR_VOLTAGE, \
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.id = MT6331_ID_##vreg, \
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.owner = THIS_MODULE, \
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.n_voltages = 1, \
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.enable_reg = enreg, \
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.enable_mask = BIT(enbit), \
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.min_uV = volt, \
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}, \
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.qi = BIT(qibit), \
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.modeset_reg = _modeset_reg, \
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.modeset_mask = _modeset_mask, \
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}
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static const struct linear_range buck_volt_range[] = {
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REGULATOR_LINEAR_RANGE(700000, 0, 0x7f, 6250),
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};
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static const unsigned int ldo_volt_table1[] = {
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2800000, 3000000, 0, 3200000
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};
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static const unsigned int ldo_volt_table2[] = {
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1500000, 1800000, 2500000, 2800000,
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};
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static const unsigned int ldo_volt_table3[] = {
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1200000, 1300000, 1500000, 1800000, 2000000, 2800000, 3000000, 3300000,
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};
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static const unsigned int ldo_volt_table4[] = {
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0, 0, 1700000, 1800000, 1860000, 2760000, 3000000, 3100000,
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};
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static const unsigned int ldo_volt_table5[] = {
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1800000, 3300000, 1800000, 3300000,
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};
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static const unsigned int ldo_volt_table6[] = {
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3000000, 3300000,
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};
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static const unsigned int ldo_volt_table7[] = {
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1200000, 1600000, 1700000, 1800000, 1900000, 2000000, 2100000, 2200000,
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};
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static const unsigned int ldo_volt_table8[] = {
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900000, 1000000, 1100000, 1220000, 1300000, 1500000, 1500000, 1500000,
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};
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static const unsigned int ldo_volt_table9[] = {
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1000000, 1050000, 1100000, 1150000, 1200000, 1250000, 1300000, 1300000,
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};
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static const unsigned int ldo_volt_table10[] = {
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1200000, 1300000, 1500000, 1800000,
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};
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static const unsigned int ldo_volt_table11[] = {
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1200000, 1300000, 1400000, 1500000, 1600000, 1700000, 1800000, 1800000,
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};
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static int mt6331_get_status(struct regulator_dev *rdev)
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{
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struct mt6331_regulator_info *info = rdev_get_drvdata(rdev);
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u32 regval;
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int ret;
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ret = regmap_read(rdev->regmap, info->desc.enable_reg, ®val);
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if (ret != 0) {
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dev_err(&rdev->dev, "Failed to get enable reg: %d\n", ret);
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return ret;
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}
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return (regval & info->qi) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF;
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}
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static int mt6331_ldo_set_mode(struct regulator_dev *rdev, unsigned int mode)
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{
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struct mt6331_regulator_info *info = rdev_get_drvdata(rdev);
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int val;
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switch (mode) {
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case REGULATOR_MODE_STANDBY:
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val = MT6331_LDO_MODE_LP;
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break;
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case REGULATOR_MODE_NORMAL:
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val = MT6331_LDO_MODE_NORMAL;
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break;
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default:
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return -EINVAL;
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}
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val <<= ffs(info->modeset_mask) - 1;
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return regmap_update_bits(rdev->regmap, info->modeset_reg,
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info->modeset_mask, val);
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}
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static unsigned int mt6331_ldo_get_mode(struct regulator_dev *rdev)
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{
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struct mt6331_regulator_info *info = rdev_get_drvdata(rdev);
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unsigned int val;
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int ret;
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ret = regmap_read(rdev->regmap, info->modeset_reg, &val);
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if (ret < 0)
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return ret;
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val &= info->modeset_mask;
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val >>= ffs(info->modeset_mask) - 1;
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return (val & BIT(0)) ? REGULATOR_MODE_STANDBY : REGULATOR_MODE_NORMAL;
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}
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+
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static const struct regulator_ops mt6331_volt_range_ops = {
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.list_voltage = regulator_list_voltage_linear_range,
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.map_voltage = regulator_map_voltage_linear_range,
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.set_voltage_sel = regulator_set_voltage_sel_regmap,
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.get_voltage_sel = regulator_get_voltage_sel_regmap,
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.set_voltage_time_sel = regulator_set_voltage_time_sel,
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.enable = regulator_enable_regmap,
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.disable = regulator_disable_regmap,
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.is_enabled = regulator_is_enabled_regmap,
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.get_status = mt6331_get_status,
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};
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+
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static const struct regulator_ops mt6331_volt_table_no_ms_ops = {
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.list_voltage = regulator_list_voltage_table,
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.map_voltage = regulator_map_voltage_iterate,
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.set_voltage_sel = regulator_set_voltage_sel_regmap,
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.get_voltage_sel = regulator_get_voltage_sel_regmap,
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.set_voltage_time_sel = regulator_set_voltage_time_sel,
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.enable = regulator_enable_regmap,
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.disable = regulator_disable_regmap,
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.is_enabled = regulator_is_enabled_regmap,
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.get_status = mt6331_get_status,
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};
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+
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static const struct regulator_ops mt6331_volt_table_no_qi_ops = {
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.list_voltage = regulator_list_voltage_table,
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.map_voltage = regulator_map_voltage_iterate,
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.set_voltage_sel = regulator_set_voltage_sel_regmap,
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.get_voltage_sel = regulator_get_voltage_sel_regmap,
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.set_voltage_time_sel = regulator_set_voltage_time_sel,
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.enable = regulator_enable_regmap,
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.disable = regulator_disable_regmap,
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.is_enabled = regulator_is_enabled_regmap,
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.set_mode = mt6331_ldo_set_mode,
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.get_mode = mt6331_ldo_get_mode,
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};
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+
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static const struct regulator_ops mt6331_volt_table_ops = {
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.list_voltage = regulator_list_voltage_table,
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.map_voltage = regulator_map_voltage_iterate,
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.set_voltage_sel = regulator_set_voltage_sel_regmap,
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.get_voltage_sel = regulator_get_voltage_sel_regmap,
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.set_voltage_time_sel = regulator_set_voltage_time_sel,
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.enable = regulator_enable_regmap,
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.disable = regulator_disable_regmap,
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.is_enabled = regulator_is_enabled_regmap,
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.get_status = mt6331_get_status,
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.set_mode = mt6331_ldo_set_mode,
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.get_mode = mt6331_ldo_get_mode,
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};
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+
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static const struct regulator_ops mt6331_volt_table_ao_ops = {
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.list_voltage = regulator_list_voltage_table,
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.map_voltage = regulator_map_voltage_iterate,
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.set_voltage_sel = regulator_set_voltage_sel_regmap,
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.get_voltage_sel = regulator_get_voltage_sel_regmap,
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.set_voltage_time_sel = regulator_set_voltage_time_sel,
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};
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+
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static const struct regulator_ops mt6331_volt_fixed_no_ms_ops = {
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.list_voltage = regulator_list_voltage_linear,
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.enable = regulator_enable_regmap,
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.disable = regulator_disable_regmap,
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.is_enabled = regulator_is_enabled_regmap,
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.get_status = mt6331_get_status,
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};
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+
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static const struct regulator_ops mt6331_volt_fixed_ops = {
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.list_voltage = regulator_list_voltage_linear,
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.enable = regulator_enable_regmap,
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.disable = regulator_disable_regmap,
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.is_enabled = regulator_is_enabled_regmap,
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.get_status = mt6331_get_status,
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.set_mode = mt6331_ldo_set_mode,
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.get_mode = mt6331_ldo_get_mode,
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};
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+
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/* The array is indexed by id(MT6331_ID_XXX) */
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static struct mt6331_regulator_info mt6331_regulators[] = {
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MT6331_BUCK("buck-vdvfs11", VDVFS11, 700000, 1493750, 6250,
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buck_volt_range, MT6331_VDVFS11_CON9,
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MT6331_VDVFS11_CON11, GENMASK(6, 0),
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+
MT6331_VDVFS11_CON12, MT6331_VDVFS11_CON7),
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+
MT6331_BUCK("buck-vdvfs12", VDVFS12, 700000, 1493750, 6250,
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buck_volt_range, MT6331_VDVFS12_CON9,
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MT6331_VDVFS12_CON11, GENMASK(6, 0),
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MT6331_VDVFS12_CON12, MT6331_VDVFS12_CON7),
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+
MT6331_BUCK("buck-vdvfs13", VDVFS13, 700000, 1493750, 6250,
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buck_volt_range, MT6331_VDVFS13_CON9,
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MT6331_VDVFS13_CON11, GENMASK(6, 0),
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MT6331_VDVFS13_CON12, MT6331_VDVFS13_CON7),
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+
MT6331_BUCK("buck-vdvfs14", VDVFS14, 700000, 1493750, 6250,
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buck_volt_range, MT6331_VDVFS14_CON9,
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MT6331_VDVFS14_CON11, GENMASK(6, 0),
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+
MT6331_VDVFS14_CON12, MT6331_VDVFS14_CON7),
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+
MT6331_BUCK("buck-vcore2", VCORE2, 700000, 1493750, 6250,
355
+
buck_volt_range, MT6331_VCORE2_CON9,
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+
MT6331_VCORE2_CON11, GENMASK(6, 0),
357
+
MT6331_VCORE2_CON12, MT6331_VCORE2_CON7),
358
+
MT6331_REG_FIXED("buck-vio18", VIO18, MT6331_VIO18_CON9, 0, 13, 1800000, 0, 0),
359
+
MT6331_REG_FIXED("ldo-vrtc", VRTC, MT6331_DIGLDO_CON11, 8, 15, 2800000, 0, 0),
360
+
MT6331_REG_FIXED("ldo-vtcxo1", VTCXO1, MT6331_ANALDO_CON1, 10, 15, 2800000,
361
+
MT6331_ANALDO_CON1, GENMASK(1, 0)),
362
+
MT6331_REG_FIXED("ldo-vtcxo2", VTCXO2, MT6331_ANALDO_CON2, 10, 15, 2800000,
363
+
MT6331_ANALDO_CON2, GENMASK(1, 0)),
364
+
MT6331_REG_FIXED("ldo-vsram", VSRAM_DVFS1, MT6331_SYSLDO_CON4, 10, 15, 1012500,
365
+
MT6331_SYSLDO_CON4, GENMASK(1, 0)),
366
+
MT6331_REG_FIXED("ldo-vio28", VIO28, MT6331_DIGLDO_CON1, 10, 15, 2800000,
367
+
MT6331_DIGLDO_CON1, GENMASK(1, 0)),
368
+
MT6331_LDO("ldo-avdd32aud", AVDD32_AUD, ldo_volt_table1, MT6331_ANALDO_CON3, 10,
369
+
MT6331_ANALDO_CON10, GENMASK(6, 5), MT6331_ANALDO_CON3, GENMASK(1, 0)),
370
+
MT6331_LDO("ldo-vauxa32", VAUXA32, ldo_volt_table1, MT6331_ANALDO_CON4, 10,
371
+
MT6331_ANALDO_CON6, GENMASK(6, 5), MT6331_ANALDO_CON4, GENMASK(1, 0)),
372
+
MT6331_LDO("ldo-vemc33", VEMC33, ldo_volt_table6, MT6331_DIGLDO_CON5, 10,
373
+
MT6331_DIGLDO_CON17, BIT(6), MT6331_DIGLDO_CON5, GENMASK(1, 0)),
374
+
MT6331_LDO("ldo-vibr", VIBR, ldo_volt_table3, MT6331_DIGLDO_CON12, 10,
375
+
MT6331_DIGLDO_CON20, GENMASK(6, 4), MT6331_DIGLDO_CON12, GENMASK(1, 0)),
376
+
MT6331_LDO("ldo-vmc", VMC, ldo_volt_table5, MT6331_DIGLDO_CON3, 10,
377
+
MT6331_DIGLDO_CON15, GENMASK(5, 4), MT6331_DIGLDO_CON3, GENMASK(1, 0)),
378
+
MT6331_LDO("ldo-vmch", VMCH, ldo_volt_table6, MT6331_DIGLDO_CON4, 10,
379
+
MT6331_DIGLDO_CON16, BIT(6), MT6331_DIGLDO_CON4, GENMASK(1, 0)),
380
+
MT6331_LDO("ldo-vmipi", VMIPI, ldo_volt_table3, MT6331_SYSLDO_CON5, 10,
381
+
MT6331_SYSLDO_CON13, GENMASK(5, 3), MT6331_SYSLDO_CON5, GENMASK(1, 0)),
382
+
MT6331_LDO("ldo-vsim1", VSIM1, ldo_volt_table4, MT6331_DIGLDO_CON8, 10,
383
+
MT6331_DIGLDO_CON21, GENMASK(6, 4), MT6331_DIGLDO_CON8, GENMASK(1, 0)),
384
+
MT6331_LDO("ldo-vsim2", VSIM2, ldo_volt_table4, MT6331_DIGLDO_CON9, 10,
385
+
MT6331_DIGLDO_CON22, GENMASK(6, 4), MT6331_DIGLDO_CON9, GENMASK(1, 0)),
386
+
MT6331_LDO("ldo-vusb10", VUSB10, ldo_volt_table9, MT6331_SYSLDO_CON2, 10,
387
+
MT6331_SYSLDO_CON10, GENMASK(5, 3), MT6331_SYSLDO_CON2, GENMASK(1, 0)),
388
+
MT6331_LDO("ldo-vcama", VCAMA, ldo_volt_table2, MT6331_ANALDO_CON5, 15,
389
+
MT6331_ANALDO_CON9, GENMASK(5, 4), 0, 0),
390
+
MT6331_LDO_S("ldo-vcamaf", VCAM_AF, ldo_volt_table3, MT6331_DIGLDO_CON2, 10,
391
+
MT6331_DIGLDO_CON14, GENMASK(6, 4), MT6331_DIGLDO_CON2, GENMASK(1, 0),
392
+
MT6331_EN_STATUS1, BIT(0)),
393
+
MT6331_LDO_S("ldo-vcamd", VCAMD, ldo_volt_table8, MT6331_SYSLDO_CON1, 15,
394
+
MT6331_SYSLDO_CON9, GENMASK(6, 4), MT6331_SYSLDO_CON1, GENMASK(1, 0),
395
+
MT6331_EN_STATUS1, BIT(11)),
396
+
MT6331_LDO_S("ldo-vcamio", VCAM_IO, ldo_volt_table10, MT6331_SYSLDO_CON3, 10,
397
+
MT6331_SYSLDO_CON11, GENMASK(4, 3), MT6331_SYSLDO_CON3, GENMASK(1, 0),
398
+
MT6331_EN_STATUS1, BIT(13)),
399
+
MT6331_LDO_S("ldo-vgp1", VGP1, ldo_volt_table3, MT6331_DIGLDO_CON6, 10,
400
+
MT6331_DIGLDO_CON19, GENMASK(6, 4), MT6331_DIGLDO_CON6, GENMASK(1, 0),
401
+
MT6331_EN_STATUS1, BIT(4)),
402
+
MT6331_LDO_S("ldo-vgp2", VGP2, ldo_volt_table10, MT6331_SYSLDO_CON6, 10,
403
+
MT6331_SYSLDO_CON14, GENMASK(4, 3), MT6331_SYSLDO_CON6, GENMASK(1, 0),
404
+
MT6331_EN_STATUS1, BIT(15)),
405
+
MT6331_LDO_S("ldo-vgp3", VGP3, ldo_volt_table10, MT6331_SYSLDO_CON7, 10,
406
+
MT6331_SYSLDO_CON15, GENMASK(4, 3), MT6331_SYSLDO_CON7, GENMASK(1, 0),
407
+
MT6331_EN_STATUS2, BIT(0)),
408
+
MT6331_LDO_S("ldo-vgp4", VGP4, ldo_volt_table7, MT6331_DIGLDO_CON7, 10,
409
+
MT6331_DIGLDO_CON18, GENMASK(6, 4), MT6331_DIGLDO_CON7, GENMASK(1, 0),
410
+
MT6331_EN_STATUS1, BIT(5)),
411
+
MT6331_LDO_AO("ldo-vdig18", VDIG18, ldo_volt_table11,
412
+
MT6331_DIGLDO_CON28, GENMASK(14, 12)),
413
+
};
414
+
415
+
static int mt6331_set_buck_vosel_reg(struct platform_device *pdev)
416
+
{
417
+
struct mt6397_chip *mt6331 = dev_get_drvdata(pdev->dev.parent);
418
+
int i;
419
+
u32 regval;
420
+
421
+
for (i = 0; i < MT6331_ID_VREG_MAX; i++) {
422
+
if (mt6331_regulators[i].vselctrl_reg) {
423
+
if (regmap_read(mt6331->regmap,
424
+
mt6331_regulators[i].vselctrl_reg,
425
+
®val) < 0) {
426
+
dev_err(&pdev->dev,
427
+
"Failed to read buck ctrl\n");
428
+
return -EIO;
429
+
}
430
+
431
+
if (regval & mt6331_regulators[i].vselctrl_mask) {
432
+
mt6331_regulators[i].desc.vsel_reg =
433
+
mt6331_regulators[i].vselon_reg;
434
+
}
435
+
}
436
+
}
437
+
438
+
return 0;
439
+
}
440
+
441
+
static int mt6331_regulator_probe(struct platform_device *pdev)
442
+
{
443
+
struct mt6397_chip *mt6331 = dev_get_drvdata(pdev->dev.parent);
444
+
struct regulator_config config = {};
445
+
struct regulator_dev *rdev;
446
+
int i;
447
+
u32 reg_value;
448
+
449
+
/* Query buck controller to select activated voltage register part */
450
+
if (mt6331_set_buck_vosel_reg(pdev))
451
+
return -EIO;
452
+
453
+
/* Read PMIC chip revision to update constraints and voltage table */
454
+
if (regmap_read(mt6331->regmap, MT6331_HWCID, ®_value) < 0) {
455
+
dev_err(&pdev->dev, "Failed to read Chip ID\n");
456
+
return -EIO;
457
+
}
458
+
reg_value &= GENMASK(7, 0);
459
+
460
+
dev_info(&pdev->dev, "Chip ID = 0x%x\n", reg_value);
461
+
462
+
/*
463
+
* ChipID 0x10 is "MT6331 E1", has a different voltage table and
464
+
* it's currently not supported in this driver. Upon detection of
465
+
* this ID, refuse to register the regulators, as we will wrongly
466
+
* interpret the VSEL for this revision, potentially overvolting
467
+
* some device.
468
+
*/
469
+
if (reg_value == 0x10) {
470
+
dev_err(&pdev->dev, "Chip version not supported. Bailing out.\n");
471
+
return -EINVAL;
472
+
}
473
+
474
+
for (i = 0; i < MT6331_ID_VREG_MAX; i++) {
475
+
config.dev = &pdev->dev;
476
+
config.driver_data = &mt6331_regulators[i];
477
+
config.regmap = mt6331->regmap;
478
+
rdev = devm_regulator_register(&pdev->dev,
479
+
&mt6331_regulators[i].desc, &config);
480
+
if (IS_ERR(rdev)) {
481
+
dev_err(&pdev->dev, "failed to register %s\n",
482
+
mt6331_regulators[i].desc.name);
483
+
return PTR_ERR(rdev);
484
+
}
485
+
}
486
+
return 0;
487
+
}
488
+
489
+
static const struct platform_device_id mt6331_platform_ids[] = {
490
+
{"mt6331-regulator", 0},
491
+
{ /* sentinel */ },
492
+
};
493
+
MODULE_DEVICE_TABLE(platform, mt6331_platform_ids);
494
+
495
+
static struct platform_driver mt6331_regulator_driver = {
496
+
.driver = {
497
+
.name = "mt6331-regulator",
498
+
},
499
+
.probe = mt6331_regulator_probe,
500
+
.id_table = mt6331_platform_ids,
501
+
};
502
+
503
+
module_platform_driver(mt6331_regulator_driver);
504
+
505
+
MODULE_AUTHOR("AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>");
506
+
MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6331 PMIC");
507
+
MODULE_LICENSE("GPL");
+46
include/linux/regulator/mt6331-regulator.h
+46
include/linux/regulator/mt6331-regulator.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0-only */
2
+
/*
3
+
* Copyright (c) 2022 Collabora Ltd.
4
+
* Author: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
5
+
*/
6
+
7
+
#ifndef __LINUX_REGULATOR_MT6331_H
8
+
#define __LINUX_REGULATOR_MT6331_H
9
+
10
+
enum {
11
+
/* BUCK */
12
+
MT6331_ID_VDVFS11 = 0,
13
+
MT6331_ID_VDVFS12,
14
+
MT6331_ID_VDVFS13,
15
+
MT6331_ID_VDVFS14,
16
+
MT6331_ID_VCORE2,
17
+
MT6331_ID_VIO18,
18
+
/* LDO */
19
+
MT6331_ID_VTCXO1,
20
+
MT6331_ID_VTCXO2,
21
+
MT6331_ID_AVDD32_AUD,
22
+
MT6331_ID_VAUXA32,
23
+
MT6331_ID_VCAMA,
24
+
MT6331_ID_VIO28,
25
+
MT6331_ID_VCAM_AF,
26
+
MT6331_ID_VMC,
27
+
MT6331_ID_VMCH,
28
+
MT6331_ID_VEMC33,
29
+
MT6331_ID_VGP1,
30
+
MT6331_ID_VSIM1,
31
+
MT6331_ID_VSIM2,
32
+
MT6331_ID_VMIPI,
33
+
MT6331_ID_VIBR,
34
+
MT6331_ID_VGP4,
35
+
MT6331_ID_VCAMD,
36
+
MT6331_ID_VUSB10,
37
+
MT6331_ID_VCAM_IO,
38
+
MT6331_ID_VSRAM_DVFS1,
39
+
MT6331_ID_VGP2,
40
+
MT6331_ID_VGP3,
41
+
MT6331_ID_VRTC,
42
+
MT6331_ID_VDIG18,
43
+
MT6331_ID_VREG_MAX
44
+
};
45
+
46
+
#endif /* __LINUX_REGULATOR_MT6331_H */