Merge tag 'powerpc-4.12-4' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux

Pull powerpc fixes from Michael Ellerman:
"Fix running SPU programs on Cell, and a few other minor fixes.

Thanks to Alistair Popple, Jeremy Kerr, Michael Neuling, Nicholas
Piggin"

* tag 'powerpc-4.12-4' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
powerpc: Add PPC_FEATURE userspace bits for SCV and DARN instructions
powerpc/spufs: Fix hash faults for kernel regions
powerpc: Fix booting P9 hash with CONFIG_PPC_RADIX_MMU=N
powerpc/powernv/npu-dma.c: Fix opal_npu_destroy_context() call
selftests/powerpc: Fix TM resched DSCR test with some compilers

Changed files
+12 -6
arch
powerpc
include
uapi
kernel
platforms
cell
powernv
tools
testing
selftests
powerpc
+2
arch/powerpc/include/uapi/asm/cputable.h
··· 46 46 #define PPC_FEATURE2_HTM_NOSC 0x01000000 47 47 #define PPC_FEATURE2_ARCH_3_00 0x00800000 /* ISA 3.00 */ 48 48 #define PPC_FEATURE2_HAS_IEEE128 0x00400000 /* VSX IEEE Binary Float 128-bit */ 49 + #define PPC_FEATURE2_DARN 0x00200000 /* darn random number insn */ 50 + #define PPC_FEATURE2_SCV 0x00100000 /* scv syscall */ 49 51 50 52 /* 51 53 * IMPORTANT!
+2 -1
arch/powerpc/kernel/cputable.c
··· 124 124 #define COMMON_USER_POWER9 COMMON_USER_POWER8 125 125 #define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \ 126 126 PPC_FEATURE2_ARCH_3_00 | \ 127 - PPC_FEATURE2_HAS_IEEE128) 127 + PPC_FEATURE2_HAS_IEEE128 | \ 128 + PPC_FEATURE2_DARN ) 128 129 129 130 #ifdef CONFIG_PPC_BOOK3E_64 130 131 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
+2
arch/powerpc/kernel/prom.c
··· 161 161 { .pabyte = 0, .pabit = 3, .cpu_features = CPU_FTR_CTRL }, 162 162 { .pabyte = 0, .pabit = 6, .cpu_features = CPU_FTR_NOEXECUTE }, 163 163 { .pabyte = 1, .pabit = 2, .mmu_features = MMU_FTR_CI_LARGE_PAGE }, 164 + #ifdef CONFIG_PPC_RADIX_MMU 164 165 { .pabyte = 40, .pabit = 0, .mmu_features = MMU_FTR_TYPE_RADIX }, 166 + #endif 165 167 { .pabyte = 1, .pabit = 1, .invert = 1, .cpu_features = CPU_FTR_NODSISRALIGN }, 166 168 { .pabyte = 5, .pabit = 0, .cpu_features = CPU_FTR_REAL_LE, 167 169 .cpu_user_ftrs = PPC_FEATURE_TRUE_LE },
+3 -1
arch/powerpc/platforms/cell/spu_base.c
··· 197 197 (REGION_ID(ea) != USER_REGION_ID)) { 198 198 199 199 spin_unlock(&spu->register_lock); 200 - ret = hash_page(ea, _PAGE_PRESENT | _PAGE_READ, 0x300, dsisr); 200 + ret = hash_page(ea, 201 + _PAGE_PRESENT | _PAGE_READ | _PAGE_PRIVILEGED, 202 + 0x300, dsisr); 201 203 spin_lock(&spu->register_lock); 202 204 203 205 if (!ret) {
+2 -3
arch/powerpc/platforms/powernv/npu-dma.c
··· 714 714 void pnv_npu2_destroy_context(struct npu_context *npu_context, 715 715 struct pci_dev *gpdev) 716 716 { 717 - struct pnv_phb *nphb, *phb; 717 + struct pnv_phb *nphb; 718 718 struct npu *npu; 719 719 struct pci_dev *npdev = pnv_pci_get_npu_dev(gpdev, 0); 720 720 struct device_node *nvlink_dn; ··· 728 728 729 729 nphb = pci_bus_to_host(npdev->bus)->private_data; 730 730 npu = &nphb->npu; 731 - phb = pci_bus_to_host(gpdev->bus)->private_data; 732 731 nvlink_dn = of_parse_phandle(npdev->dev.of_node, "ibm,nvlink", 0); 733 732 if (WARN_ON(of_property_read_u32(nvlink_dn, "ibm,npu-link-index", 734 733 &nvlink_index))) 735 734 return; 736 735 npu_context->npdev[npu->index][nvlink_index] = NULL; 737 - opal_npu_destroy_context(phb->opal_id, npu_context->mm->context.id, 736 + opal_npu_destroy_context(nphb->opal_id, npu_context->mm->context.id, 738 737 PCI_DEVID(gpdev->bus->number, gpdev->devfn)); 739 738 kref_put(&npu_context->kref, pnv_npu2_release_context); 740 739 }
+1 -1
tools/testing/selftests/powerpc/tm/tm-resched-dscr.c
··· 42 42 printf("Check DSCR TM context switch: "); 43 43 fflush(stdout); 44 44 for (;;) { 45 - rv = 1; 46 45 asm __volatile__ ( 47 46 /* set a known value into the DSCR */ 48 47 "ld 3, %[dscr1];" 49 48 "mtspr %[sprn_dscr], 3;" 50 49 50 + "li %[rv], 1;" 51 51 /* start and suspend a transaction */ 52 52 "tbegin.;" 53 53 "beq 1f;"