Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

dt-bindings: clock: Add SC7280 GPUCC clock binding

Add device tree bindings for graphics clock subsystem clock
controller for Qualcomm Technology Inc's SC7280 SoCs.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1626189143-12957-5-git-send-email-tdas@codeaurora.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

authored by

Taniya Das and committed by
Stephen Boyd
6f1a1ced 1a00c962

+39 -2
+4 -2
Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
··· 1 - # SPDX-License-Identifier: GPL-2.0-only 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 2 %YAML 1.2 3 3 --- 4 4 $id: http://devicetree.org/schemas/clock/qcom,gpucc.yaml# ··· 11 11 12 12 description: | 13 13 Qualcomm graphics clock control module which supports the clocks, resets and 14 - power domains on SDM845/SC7180/SM8150/SM8250. 14 + power domains on Qualcomm SoCs. 15 15 16 16 See also: 17 17 dt-bindings/clock/qcom,gpucc-sdm845.h 18 18 dt-bindings/clock/qcom,gpucc-sc7180.h 19 + dt-bindings/clock/qcom,gpucc-sc7280.h 19 20 dt-bindings/clock/qcom,gpucc-sm8150.h 20 21 dt-bindings/clock/qcom,gpucc-sm8250.h 21 22 ··· 25 24 enum: 26 25 - qcom,sdm845-gpucc 27 26 - qcom,sc7180-gpucc 27 + - qcom,sc7280-gpucc 28 28 - qcom,sm8150-gpucc 29 29 - qcom,sm8250-gpucc 30 30
+35
include/dt-bindings/clock/qcom,gpucc-sc7280.h
··· 1 + /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 + /* 3 + * Copyright (c) 2021, The Linux Foundation. All rights reserved. 4 + */ 5 + 6 + #ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SC7280_H 7 + #define _DT_BINDINGS_CLK_QCOM_GPU_CC_SC7280_H 8 + 9 + /* GPU_CC clocks */ 10 + #define GPU_CC_PLL0 0 11 + #define GPU_CC_PLL1 1 12 + #define GPU_CC_AHB_CLK 2 13 + #define GPU_CC_CB_CLK 3 14 + #define GPU_CC_CRC_AHB_CLK 4 15 + #define GPU_CC_CX_GMU_CLK 5 16 + #define GPU_CC_CX_SNOC_DVM_CLK 6 17 + #define GPU_CC_CXO_AON_CLK 7 18 + #define GPU_CC_CXO_CLK 8 19 + #define GPU_CC_GMU_CLK_SRC 9 20 + #define GPU_CC_GX_GMU_CLK 10 21 + #define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK 11 22 + #define GPU_CC_HUB_AHB_DIV_CLK_SRC 12 23 + #define GPU_CC_HUB_AON_CLK 13 24 + #define GPU_CC_HUB_CLK_SRC 14 25 + #define GPU_CC_HUB_CX_INT_CLK 15 26 + #define GPU_CC_HUB_CX_INT_DIV_CLK_SRC 16 27 + #define GPU_CC_MND1X_0_GFX3D_CLK 17 28 + #define GPU_CC_MND1X_1_GFX3D_CLK 18 29 + #define GPU_CC_SLEEP_CLK 19 30 + 31 + /* GPU_CC power domains */ 32 + #define GPU_CC_CX_GDSC 0 33 + #define GPU_CC_GX_GDSC 1 34 + 35 + #endif