tjh.dev / kernel
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[Blackfin] arch: Encourage users to use the spidev character driver: Provide platform support

- Enable kernel generic spidev driver for blackfin SPI ADC
- spi_adc driver, document and test sample not synced

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>

authored by Michael Hennerich and committed by Bryan Wu 6e668936 8b01eaff

+103 -38
unified split
+17
arch/blackfin/mach-bf527/boards/ezkit.c
··· 517 517 .bits_per_word = 16, 518 518 }; 519 519 #endif 520 + 521 + #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) 522 + static struct bfin5xx_spi_chip spidev_chip_info = { 523 + .enable_dma = 0, 524 + .bits_per_word = 8, 525 + }; 526 + #endif 527 + 520 528 static struct spi_board_info bfin_spi_board_info[] __initdata = { 521 529 #if defined(CONFIG_MTD_M25P80) \ 522 530 || defined(CONFIG_MTD_M25P80_MODULE) ··· 640 632 .chip_select = 5, 641 633 .controller_data = &spi_wm8731_chip_info, 642 634 .mode = SPI_MODE_0, 635 + }, 636 + #endif 637 + #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) 638 + { 639 + .modalias = "spidev", 640 + .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 641 + .bus_num = 0, 642 + .chip_select = 1, 643 + .controller_data = &spidev_chip_info, 643 644 }, 644 645 #endif 645 646 };
+16
arch/blackfin/mach-bf533/boards/ezkit.c
··· 134 134 }; 135 135 #endif 136 136 137 + #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) 138 + static struct bfin5xx_spi_chip spidev_chip_info = { 139 + .enable_dma = 0, 140 + .bits_per_word = 8, 141 + }; 142 + #endif 143 + 137 144 static struct spi_board_info bfin_spi_board_info[] __initdata = { 138 145 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) 139 146 { ··· 173 166 .bus_num = 0, 174 167 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, 175 168 .controller_data = &ad1836_spi_chip_info, 169 + }, 170 + #endif 171 + #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) 172 + { 173 + .modalias = "spidev", 174 + .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 175 + .bus_num = 0, 176 + .chip_select = 1, 177 + .controller_data = &spidev_chip_info, 176 178 }, 177 179 #endif 178 180 };
+16
arch/blackfin/mach-bf533/boards/stamp.c
··· 226 226 }; 227 227 #endif 228 228 229 + #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) 230 + static struct bfin5xx_spi_chip spidev_chip_info = { 231 + .enable_dma = 0, 232 + .bits_per_word = 8, 233 + }; 234 + #endif 235 + 229 236 static struct spi_board_info bfin_spi_board_info[] __initdata = { 230 237 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) 231 238 { ··· 317 310 .platform_data = NULL, 318 311 .controller_data = &ad5304_chip_info, 319 312 .mode = SPI_MODE_2, 313 + }, 314 + #endif 315 + #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) 316 + { 317 + .modalias = "spidev", 318 + .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 319 + .bus_num = 0, 320 + .chip_select = 1, 321 + .controller_data = &spidev_chip_info, 320 322 }, 321 323 #endif 322 324 };
+16
arch/blackfin/mach-bf537/boards/stamp.c
··· 487 487 }; 488 488 #endif 489 489 490 + #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) 491 + static struct bfin5xx_spi_chip spidev_chip_info = { 492 + .enable_dma = 0, 493 + .bits_per_word = 8, 494 + }; 495 + #endif 496 + 490 497 static struct spi_board_info bfin_spi_board_info[] __initdata = { 491 498 #if defined(CONFIG_MTD_M25P80) \ 492 499 || defined(CONFIG_MTD_M25P80_MODULE) ··· 598 591 .bus_num = 0, 599 592 .chip_select = 1, 600 593 .controller_data = &spi_ad7877_chip_info, 594 + }, 595 + #endif 596 + #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) 597 + { 598 + .modalias = "spidev", 599 + .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 600 + .bus_num = 0, 601 + .chip_select = 1, 602 + .controller_data = &spidev_chip_info, 601 603 }, 602 604 #endif 603 605 };
+16
arch/blackfin/mach-bf548/boards/ezkit.c
··· 420 420 }; 421 421 #endif 422 422 423 + #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) 424 + static struct bfin5xx_spi_chip spidev_chip_info = { 425 + .enable_dma = 0, 426 + .bits_per_word = 8, 427 + }; 428 + #endif 429 + 423 430 static struct spi_board_info bf54x_spi_board_info[] __initdata = { 424 431 #if defined(CONFIG_MTD_M25P80) \ 425 432 || defined(CONFIG_MTD_M25P80_MODULE) ··· 451 444 .chip_select = 2, 452 445 .controller_data = &spi_ad7877_chip_info, 453 446 }, 447 + #endif 448 + #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) 449 + { 450 + .modalias = "spidev", 451 + .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 452 + .bus_num = 0, 453 + .chip_select = 1, 454 + .controller_data = &spidev_chip_info, 455 + }, 454 456 #endif 455 457 }; 456 458
+16
arch/blackfin/mach-bf561/boards/ezkit.c
··· 266 266 .bits_per_word = 16, 267 267 }; 268 268 #endif 269 + 270 + #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) 271 + static struct bfin5xx_spi_chip spidev_chip_info = { 272 + .enable_dma = 0, 273 + .bits_per_word = 8, 274 + }; 275 + #endif 269 276 #endif 270 277 271 278 /* SPI (0) */ ··· 315 308 .bus_num = 0, 316 309 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, 317 310 .controller_data = &ad1836_spi_chip_info, 311 + }, 312 + #endif 313 + #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) 314 + { 315 + .modalias = "spidev", 316 + .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 317 + .bus_num = 0, 318 + .chip_select = 1, 319 + .controller_data = &spidev_chip_info, 318 320 }, 319 321 #endif 320 322 };
+6 -38
include/asm-blackfin/bfin5xx_spi.h
··· 1 1 /************************************************************ 2 - * 3 - * Copyright (C) 2004, Analog Devices. All Rights Reserved 2 + 3 + * Copyright (C) 2006-2008, Analog Devices. All Rights Reserved 4 4 * 5 5 * FILE bfin5xx_spi.h 6 6 * PROGRAMMER(S): Luke Yang (Analog Devices Inc.) ··· 32 32 #define SPI_BAUD_OFF 0x14 33 33 #define SPI_SHAW_OFF 0x18 34 34 35 - #define CMD_SPI_OUT_ENABLE 1 36 - #define CMD_SPI_SET_BAUDRATE 2 37 - #define CMD_SPI_SET_POLAR 3 38 - #define CMD_SPI_SET_PHASE 4 39 - #define CMD_SPI_SET_MASTER 5 40 - #define CMD_SPI_SET_SENDOPT 6 41 - #define CMD_SPI_SET_RECVOPT 7 42 - #define CMD_SPI_SET_ORDER 8 43 - #define CMD_SPI_SET_LENGTH16 9 44 - #define CMD_SPI_GET_STAT 11 45 - #define CMD_SPI_GET_CFG 12 46 - #define CMD_SPI_SET_CSAVAIL 13 47 - #define CMD_SPI_SET_CSHIGH 14 /* CS unavail */ 48 - #define CMD_SPI_SET_CSLOW 15 /* CS avail */ 49 - #define CMD_SPI_MISO_ENABLE 16 50 - #define CMD_SPI_SET_CSENABLE 17 51 - #define CMD_SPI_SET_CSDISABLE 18 52 - 53 - #define CMD_SPI_SET_TRIGGER_MODE 19 54 - #define CMD_SPI_SET_TRIGGER_SENSE 20 55 - #define CMD_SPI_SET_TRIGGER_EDGE 21 56 - #define CMD_SPI_SET_TRIGGER_LEVEL 22 57 - 58 - #define CMD_SPI_SET_TIME_SPS 23 59 - #define CMD_SPI_SET_TIME_SAMPLES 24 60 - #define CMD_SPI_GET_SYSTEMCLOCK 25 61 - 62 - #define CMD_SPI_SET_WRITECONTINUOUS 26 63 - #define CMD_SPI_SET_SKFS 27 64 - 65 - #define CMD_SPI_GET_ALLCONFIG 32 /* For debug */ 66 - 67 - #define SPI_DEFAULT_BARD 0x0100 68 - 69 - #define SPI0_IRQ_NUM IRQ_SPI 70 - #define SPI_ERR_TRIG -1 71 35 72 36 #define BIT_CTL_ENABLE 0x4000 73 37 #define BIT_CTL_OPENDRAIN 0x2000 ··· 111 147 #define CFG_SPI_CS5VALUE 5 112 148 #define CFG_SPI_CS6VALUE 6 113 149 #define CFG_SPI_CS7VALUE 7 150 + 151 + #define CMD_SPI_SET_BAUDRATE 2 152 + #define CMD_SPI_GET_SYSTEMCLOCK 25 153 + #define CMD_SPI_SET_WRITECONTINUOUS 26 114 154 115 155 /* device.platform_data for SSP controller devices */ 116 156 struct bfin5xx_spi_master {