Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'soundwire-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/soundwire into char-misc-next

Vinod writes:

soundwire updates for 5.11-rc1

Updates for last PR for this year contain:
- Improvements from Intel for port interrupt handling
- SDCA cascade interrupt support
- runtime pm for master device

* tag 'soundwire-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/soundwire:
soundwire: intel: fix another unused-function warning
soundwire: master: use pm_runtime_set_active() on add
soundwire: qcom: Fix build failure when slimbus is module
soundwire: bus: only clear valid DPN interrupts
soundwire: bus: only clear valid DP0 interrupts
soundwire: registers: add definitions for clearable interrupt fields
soundwire: bus: reset slave_notify status at each loop
soundwire: bus: add comments to explain interrupt loop filter
soundwire: SDCA: detect sdca_cascade interrupt
soundwire: Fix DEBUG_LOCKS_WARN_ON for uninitialized attribute

+79 -16
+46 -9
drivers/soundwire/bus.c
··· 1280 1280 1281 1281 static int sdw_handle_dp0_interrupt(struct sdw_slave *slave, u8 *slave_status) 1282 1282 { 1283 - u8 clear = 0, impl_int_mask; 1283 + u8 clear, impl_int_mask; 1284 1284 int status, status2, ret, count = 0; 1285 1285 1286 1286 status = sdw_read(slave, SDW_DP0_INT); ··· 1291 1291 } 1292 1292 1293 1293 do { 1294 + clear = status & ~SDW_DP0_INTERRUPTS; 1295 + 1294 1296 if (status & SDW_DP0_INT_TEST_FAIL) { 1295 1297 dev_err(&slave->dev, "Test fail for port 0\n"); 1296 1298 clear |= SDW_DP0_INT_TEST_FAIL; ··· 1321 1319 *slave_status = clear; 1322 1320 } 1323 1321 1324 - /* clear the interrupt */ 1322 + /* clear the interrupts but don't touch reserved and SDCA_CASCADE fields */ 1325 1323 ret = sdw_write(slave, SDW_DP0_INT, clear); 1326 1324 if (ret < 0) { 1327 1325 dev_err(slave->bus->dev, ··· 1336 1334 "SDW_DP0_INT read failed:%d\n", status2); 1337 1335 return status2; 1338 1336 } 1337 + /* filter to limit loop to interrupts identified in the first status read */ 1339 1338 status &= status2; 1340 1339 1341 1340 count++; 1342 1341 1343 1342 /* we can get alerts while processing so keep retrying */ 1344 - } while (status != 0 && count < SDW_READ_INTR_CLEAR_RETRY); 1343 + } while ((status & SDW_DP0_INTERRUPTS) && (count < SDW_READ_INTR_CLEAR_RETRY)); 1345 1344 1346 1345 if (count == SDW_READ_INTR_CLEAR_RETRY) 1347 1346 dev_warn(slave->bus->dev, "Reached MAX_RETRY on DP0 read\n"); ··· 1353 1350 static int sdw_handle_port_interrupt(struct sdw_slave *slave, 1354 1351 int port, u8 *slave_status) 1355 1352 { 1356 - u8 clear = 0, impl_int_mask; 1353 + u8 clear, impl_int_mask; 1357 1354 int status, status2, ret, count = 0; 1358 1355 u32 addr; 1359 1356 ··· 1370 1367 } 1371 1368 1372 1369 do { 1370 + clear = status & ~SDW_DPN_INTERRUPTS; 1371 + 1373 1372 if (status & SDW_DPN_INT_TEST_FAIL) { 1374 1373 dev_err(&slave->dev, "Test fail for port:%d\n", port); 1375 1374 clear |= SDW_DPN_INT_TEST_FAIL; ··· 1394 1389 *slave_status = clear; 1395 1390 } 1396 1391 1397 - /* clear the interrupt */ 1392 + /* clear the interrupt but don't touch reserved fields */ 1398 1393 ret = sdw_write(slave, addr, clear); 1399 1394 if (ret < 0) { 1400 1395 dev_err(slave->bus->dev, ··· 1409 1404 "SDW_DPN_INT read failed:%d\n", status2); 1410 1405 return status2; 1411 1406 } 1407 + /* filter to limit loop to interrupts identified in the first status read */ 1412 1408 status &= status2; 1413 1409 1414 1410 count++; 1415 1411 1416 1412 /* we can get alerts while processing so keep retrying */ 1417 - } while (status != 0 && count < SDW_READ_INTR_CLEAR_RETRY); 1413 + } while ((status & SDW_DPN_INTERRUPTS) && (count < SDW_READ_INTR_CLEAR_RETRY)); 1418 1414 1419 1415 if (count == SDW_READ_INTR_CLEAR_RETRY) 1420 1416 dev_warn(slave->bus->dev, "Reached MAX_RETRY on port read"); ··· 1429 1423 u8 clear = 0, bit, port_status[15] = {0}; 1430 1424 int port_num, stat, ret, count = 0; 1431 1425 unsigned long port; 1432 - bool slave_notify = false; 1426 + bool slave_notify; 1427 + u8 sdca_cascade = 0; 1433 1428 u8 buf, buf2[2], _buf, _buf2[2]; 1434 1429 bool parity_check; 1435 1430 bool parity_quirk; ··· 1460 1453 goto io_err; 1461 1454 } 1462 1455 1456 + if (slave->prop.is_sdca) { 1457 + ret = sdw_read(slave, SDW_DP0_INT); 1458 + if (ret < 0) { 1459 + dev_err(slave->bus->dev, 1460 + "SDW_DP0_INT read failed:%d\n", ret); 1461 + goto io_err; 1462 + } 1463 + sdca_cascade = ret & SDW_DP0_SDCA_CASCADE; 1464 + } 1465 + 1463 1466 do { 1467 + slave_notify = false; 1468 + 1464 1469 /* 1465 1470 * Check parity, bus clash and Slave (impl defined) 1466 1471 * interrupt ··· 1507 1488 } 1508 1489 clear |= SDW_SCP_INT1_IMPL_DEF; 1509 1490 } 1491 + 1492 + /* the SDCA interrupts are cleared in the codec driver .interrupt_callback() */ 1493 + if (sdca_cascade) 1494 + slave_notify = true; 1510 1495 1511 1496 /* Check port 0 - 3 interrupts */ 1512 1497 port = buf & SDW_SCP_INT1_PORT0_3; ··· 1549 1526 /* Update the Slave driver */ 1550 1527 if (slave_notify && slave->ops && 1551 1528 slave->ops->interrupt_callback) { 1529 + slave_intr.sdca_cascade = sdca_cascade; 1552 1530 slave_intr.control_port = clear; 1553 1531 memcpy(slave_intr.port, &port_status, 1554 1532 sizeof(slave_intr.port)); ··· 1587 1563 goto io_err; 1588 1564 } 1589 1565 1590 - /* Make sure no interrupts are pending */ 1566 + if (slave->prop.is_sdca) { 1567 + ret = sdw_read(slave, SDW_DP0_INT); 1568 + if (ret < 0) { 1569 + dev_err(slave->bus->dev, 1570 + "SDW_DP0_INT read failed:%d\n", ret); 1571 + goto io_err; 1572 + } 1573 + sdca_cascade = ret & SDW_DP0_SDCA_CASCADE; 1574 + } 1575 + 1576 + /* 1577 + * Make sure no interrupts are pending, but filter to limit loop 1578 + * to interrupts identified in the first status read 1579 + */ 1591 1580 buf &= _buf; 1592 1581 buf2[0] &= _buf2[0]; 1593 1582 buf2[1] &= _buf2[1]; 1594 - stat = buf || buf2[0] || buf2[1]; 1583 + stat = buf || buf2[0] || buf2[1] || sdca_cascade; 1595 1584 1596 1585 /* 1597 1586 * Exit loop if Slave is continuously in ALERT state even
+2 -6
drivers/soundwire/intel.c
··· 1585 1585 * PM calls 1586 1586 */ 1587 1587 1588 - #ifdef CONFIG_PM 1589 - 1590 1588 static int __maybe_unused intel_suspend(struct device *dev) 1591 1589 { 1592 1590 struct sdw_cdns *cdns = dev_get_drvdata(dev); ··· 1639 1641 return 0; 1640 1642 } 1641 1643 1642 - static int intel_suspend_runtime(struct device *dev) 1644 + static int __maybe_unused intel_suspend_runtime(struct device *dev) 1643 1645 { 1644 1646 struct sdw_cdns *cdns = dev_get_drvdata(dev); 1645 1647 struct sdw_intel *sdw = cdns_to_intel(cdns); ··· 1794 1796 return ret; 1795 1797 } 1796 1798 1797 - static int intel_resume_runtime(struct device *dev) 1799 + static int __maybe_unused intel_resume_runtime(struct device *dev) 1798 1800 { 1799 1801 struct sdw_cdns *cdns = dev_get_drvdata(dev); 1800 1802 struct sdw_intel *sdw = cdns_to_intel(cdns); ··· 1966 1968 1967 1969 return ret; 1968 1970 } 1969 - 1970 - #endif 1971 1971 1972 1972 static const struct dev_pm_ops intel_pm = { 1973 1973 SET_SYSTEM_SLEEP_PM_OPS(intel_suspend, intel_resume)
+14
drivers/soundwire/master.c
··· 9 9 #include "bus.h" 10 10 11 11 /* 12 + * The 3s value for autosuspend will only be used if there are no 13 + * devices physically attached on a bus segment. In practice enabling 14 + * the bus operation will result in children devices become active and 15 + * the master device will only suspend when all its children are no 16 + * longer active. 17 + */ 18 + #define SDW_MASTER_SUSPEND_DELAY_MS 3000 19 + 20 + /* 12 21 * The sysfs for properties reflects the MIPI description as given 13 22 * in the MIPI DisCo spec 14 23 * ··· 163 154 bus->dev = &md->dev; 164 155 bus->md = md; 165 156 157 + pm_runtime_set_autosuspend_delay(&bus->md->dev, SDW_MASTER_SUSPEND_DELAY_MS); 158 + pm_runtime_use_autosuspend(&bus->md->dev); 159 + pm_runtime_mark_last_busy(&bus->md->dev); 160 + pm_runtime_set_active(&bus->md->dev); 166 161 pm_runtime_enable(&bus->md->dev); 162 + pm_runtime_idle(&bus->md->dev); 167 163 device_register_err: 168 164 return ret; 169 165 }
+1 -1
drivers/soundwire/qcom.c
··· 799 799 data = of_device_get_match_data(dev); 800 800 ctrl->rows_index = sdw_find_row_index(data->default_rows); 801 801 ctrl->cols_index = sdw_find_col_index(data->default_cols); 802 - #if IS_ENABLED(CONFIG_SLIMBUS) 802 + #if IS_REACHABLE(CONFIG_SLIMBUS) 803 803 if (dev->parent->bus == &slimbus_bus) { 804 804 #else 805 805 if (false) {
+1
drivers/soundwire/sysfs_slave_dpn.c
··· 37 37 return -ENOMEM; \ 38 38 dpn_attr->N = N; \ 39 39 dpn_attr->dir = dir; \ 40 + sysfs_attr_init(&dpn_attr->dev_attr.attr); \ 40 41 dpn_attr->format_string = format_string; \ 41 42 dpn_attr->dev_attr.attr.name = __stringify(field); \ 42 43 dpn_attr->dev_attr.attr.mode = 0444; \
+4
include/linux/soundwire/sdw.h
··· 359 359 * @sink_dpn_prop: Sink Data Port N properties 360 360 * @scp_int1_mask: SCP_INT1_MASK desired settings 361 361 * @quirks: bitmask identifying deltas from the MIPI specification 362 + * @is_sdca: the Slave supports the SDCA specification 362 363 */ 363 364 struct sdw_slave_prop { 364 365 u32 mipi_revision; ··· 383 382 struct sdw_dpn_prop *sink_dpn_prop; 384 383 u8 scp_int1_mask; 385 384 u32 quirks; 385 + bool is_sdca; 386 386 }; 387 387 388 388 #define SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY BIT(0) ··· 481 479 482 480 /** 483 481 * struct sdw_slave_intr_status - Slave interrupt status 482 + * @sdca_cascade: set if the Slave device reports an SDCA interrupt 484 483 * @control_port: control port status 485 484 * @port: data port status 486 485 */ 487 486 struct sdw_slave_intr_status { 487 + bool sdca_cascade; 488 488 u8 control_port; 489 489 u8 port[15]; 490 490 };
+11
include/linux/soundwire/sdw_registers.h
··· 41 41 #define SDW_DP0_INT_IMPDEF1 BIT(5) 42 42 #define SDW_DP0_INT_IMPDEF2 BIT(6) 43 43 #define SDW_DP0_INT_IMPDEF3 BIT(7) 44 + #define SDW_DP0_INTERRUPTS (SDW_DP0_INT_TEST_FAIL | \ 45 + SDW_DP0_INT_PORT_READY | \ 46 + SDW_DP0_INT_BRA_FAILURE | \ 47 + SDW_DP0_INT_IMPDEF1 | \ 48 + SDW_DP0_INT_IMPDEF2 | \ 49 + SDW_DP0_INT_IMPDEF3) 44 50 45 51 #define SDW_DP0_PORTCTRL_DATAMODE GENMASK(3, 2) 46 52 #define SDW_DP0_PORTCTRL_NXTINVBANK BIT(4) ··· 247 241 #define SDW_DPN_INT_IMPDEF1 BIT(5) 248 242 #define SDW_DPN_INT_IMPDEF2 BIT(6) 249 243 #define SDW_DPN_INT_IMPDEF3 BIT(7) 244 + #define SDW_DPN_INTERRUPTS (SDW_DPN_INT_TEST_FAIL | \ 245 + SDW_DPN_INT_PORT_READY | \ 246 + SDW_DPN_INT_IMPDEF1 | \ 247 + SDW_DPN_INT_IMPDEF2 | \ 248 + SDW_DPN_INT_IMPDEF3) 250 249 251 250 #define SDW_DPN_PORTCTRL_FLOWMODE GENMASK(1, 0) 252 251 #define SDW_DPN_PORTCTRL_DATAMODE GENMASK(3, 2)